A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Cover Sheet Custom 1 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. REV:0.2 Mobile Merom uFCPGA with Satna Rosa Platform Schematics Document 2007-07-30 Compal confidential A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Block Diagram Custom 2 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. Power On/Off CKT. LPC BUS page 22 H_A#(3..31) page 27 BANK 0, 1, 2, 3 USB Conn 533/667/800MHz DMI DC/DC Interface CKT. Mobile Yonah/Merom USB2.0 FSB Clock Generator ICS9LPRS355 Power Circuit DC/DC IDE ODD Connector uFCPGA-478 CPU page 28 DDR2-SO-DIMM X2 page 31 page 4 page 4,5,6 RTC CKT. page 15 DDR2 -400/533/667 page 4 page 7,8,9,10,11,12 SB ICH8 Thermal Sensor ADM1032AR page 13,14 page 18,19,20,21 page 19 Fan Control Dual Channel Touch Pad CONN. Int.KBD ENE KB926 page 30 page 30page 28 Page 32,33,34,35,36,37,38 PCI-E BUS page 28 LED SPI 25LF080A SPI ROM page 29 H_D#(0..63) Spartan 1.1 (Merom +Crestline+ICH8) AC-LINK/Azalia page 22 SATA HDD Connector PATA Master page 22 Mini-Card WLAN NB Crestline SATA page 24 Audio Conexant page 25 MODEM AMOM page 26 AMP & Audio Jack ENE P3017 CX20561-12Z page 16 page 17 LVDS Conn page 23 page 23 RTL8100CL RJ45/11 CONN Realtek CRT/TV-OUT PCI BUS File Name : LA-4031P Compal confidential Socket P USB Card Reader page 27 CX20548 ZZZ1 PCB 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Notes List 3 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. 1 0 1 0 0 1 0 0A4 I2C / SMBUS ADDRESSING 1 0 1 0 0 0 0 0 D2 A0 CLOCK GENERATOR (EXT.) HEX DDR SO-DIMM 1 ADDRESS DDR SO-DIMM 0 1 1 0 1 0 0 1 0 DEVICE Symbol Note : : means Digital Ground : means Analog Ground @ : means just reserve , no build DEBUG@ : means just reserve for debug. SERIAL SENSOR (CPU) SMB_EC_CK2 SOURCE KB925 INVERTER BATT EEPROM THERMAL SODIMM CLK CHIP SMBUS Control Table SMB_CK_CLK1 SMB_CK_DAT1 ICH8 MINI CARD SMB_EC_DA2 SMB_EC_CK1 SMB_EC_DA1 KB925 LCD_CLK LCD_DAT Crestline LCD ADM1032 X X X X X X X X X X X X X X X X X X X X X X X X X V V V External PCI Devices IDSEL #PIRQREQ/GNT #DEVICE LAN AD17 0 A O O X +0.9V Voltage Rails S3 +3VS X X +3VALW +5VS S1 O +1.25VS +CPU_CORE OO OO X X X +VCCP power plane O O O O O X S5 S4/ Battery only X X X +B State +1.5VS +1.8V S5 S4/AC & Battery don't exist S5 S4/AC +5VALW S0 O O BOM: 43152432L03(965GM) & 43152432L04(960GML) with card reader Jump-Short: PJP? V V V V BOM: 43152432L01(965GM) & 43152432L02(960GML) without card reader 5 5 4 4 3 3 2 2 1 1 D D C C B B A A H_PROCHOT# OCP# XDP_TDI XDP_TMS XDP_TRST# XDP_TCK H_REQ#2 H_DBSY# H_ADS# H_A#3 H_A#22 H_A#19 XDP_TRST# H_REQ#4 H_ADSTB#0 H_A#18 H_TRDY# H_REQ#3 H_INTR H_HITM# H_A#6 H_A#26 H_FERR# H_DRDY# CLK_CPU_BCLK CLK_CPU_BCLK# H_A#4 H_A#23 H_A#32 H_BR0# H_A#7 H_A#13 H_THERMDC XDP_TCK H_RS#1 H_LOCK# H_A#5 H_A#25 H_A#21 H_A#10 H_A#34 H_NMI H_DEFER# H_REQ#0 XDP_DBRESET# H_BPRI# H_ADSTB#1 H_A#9 H_A#31 H_A#35 XDP_TMS H_INIT# H_A#30 H_A#24 H_A#16 H_A#11 H_RS#2 H_IGNNE# H_REQ#1 H_A#8 H_A#28 H_STPCLK# H_SMI# XDP_TDI H_A#27 H_A#20 H_A#15 H_THERMTRIP# H_RS#0 H_HIT# H_BNR# H_A20M# H_A#17 H_A#12 H_A#33 H_THERMDA H_A#29 H_A#14 H_I ERR# H_THERMDA_R H_THERMDC_R SMB_EC_DA2 SMB_EC_CK2 H_THERMDA H_THERMDC L_THERM# SMB_EC_CK2 SMB_EC_DA2 THERM# FAN H_RESET# H_PROCHOT# DBRESET# THERM# L_THERM# OCP#20 H_A#[3..16]7 H_ADSTB#07 H_REQ#07 H_REQ#17 H_REQ#27 H_REQ#47 H_A#[17..35]7 H_ADSTB#17 H_A20M#19 H_FERR#19 H_IGNNE#19 H_STPCLK#19 H_INTR19 H_NMI19 H_SMI#19 H_ADS#7 H_BNR#7 H_BPRI#7 H_BR0#7 H_THERMTRIP#7,19 CLK_CPU_BCLK 15 CLK_CPU_BCLK#15 H_RESET#7 H_RS#0 7 H_RS#1 7 H_RS#2 7 H_TRDY#7 H_DEFER#7 H_DRDY#7 H_DBSY#7 H_INIT#19 H_LOCK#7 H_HIT#7 H_HITM#7 XDP_DBRESET#20 H_REQ#37 SMB_EC_CK230 SMB_EC_DA230 FAN_PWM30 H_PROCHOT#37 +VCCP +VCCP +VCCP +VCCP +3VS +3VS +5VS +3VS +3VS +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Merom(1/3)-AGTL+/XDP Custom 4 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil For Merom, R14 and R15 are 0ohm For Penryn, R14 and R15 are 100ohm. Thermal Sensor ADM1032ARMZ PWM Fan Control circuit Address:100_1100 SP02000D000 S W-CONN ACES 85204-02001 2P P1.25 ACES_85204-02001_2P SP07000FP00 S SOCKET TYCO 2-1871873-2 478P H3 CPU SP07000FD00 S SOCKET FOXCONN PZ4782A-274M-41 478P H3 U1 ADM1032ARMZ-2REEL_MSOP8 VDD 1 ALERT# 6 THERM# 4 GND 5 D+ 2 D- 3 SCLK 8 SDATA 7 R16 10K_0402_5% 1 2 C6 0.1U_0402_16V4Z 1 2 C2 0.1U_0402_16V4Z 1 2 R427 10K_0402_5% @ 1 2 E B C Q2 MMBT3904_SOT23 @ 2 3 1 R416 10K_0402_5% @ 1 2 R3 39_0402_1% 1 2 R8 27_0402_5% 1 2 C5 4.7U_0805_10V4Z 1 2 R414 0_0402_5% 1 2 R405 0_0402_5% 1 2 R7 560_0402_5% 1 2 D1 RB751V_SOD323 2 1 R10 56_0402_5% 1 2 R426 10K_0402_5% @ 1 2 S G D Q1 SI3456BDV-T1-E3_TSOP6 3 6 2 4 5 1 C3 0.1U_0402_16V4Z 1 2 C4 2200P_0402_50V7K 1 2 R14 0_0402_5% 1 2 R2 15_0402_5% 1 2 JP3 ACES_85204-02001 CONN@ 1 1 2 2 G1 3 G2 4 R413 0_0402_5% @ 1 2 U2 TC7SH00FU_SSOP5 @ INB 1 INA 2 O 4 G 3 P 5 R17 56_0402_5%@ 1 2 R415 0_0402_5%@ 1 2 R15 0_0402_5% 1 2 ADDR GROUP 0ADDR GROUP 1 CONTROL XDP/ITP SIGNALS H CLK THERMAL RESERVED ICH JP2A Merom Ball-out Rev 1a CONN@ A[10]# N3 A[11]# P5 A[12]# P2 A[13]# L2 A[14]# P4 A[15]# P1 A[16]# R1 A[17]# Y2 A[18]# U5 A[19]# R3 A[20]# W6 A[21]# U4 A[22]# Y5 A[23]# U1 A[24]# R4 A[25]# T5 A[26]# T3 A[27]# W2 A[28]# W5 A[29]# Y4 A[3]# J4 A[30]# U2 A[31]# V4 RSVD[01] M4 RSVD[02] N5 RSVD[03] T2 RSVD[04] V3 RSVD[05] B2 RSVD[06] C3 RSVD[07] D2 RSVD[08] D22 A[4]# L5 A[5]# L4 A[6]# K5 A[7]# M3 A[8]# N2 A[9]# J1 A20M# A6 ADS# H1 ADSTB[0]# M1 ADSTB[1]# V1 RSVD[09] D3 BCLK[0] A22 BCLK[1] A21 BNR# E2 BPM[0]# AD4 BPM[1]# AD3 BPM[2]# AD1 BPM[3]# AC4 BPRI# G5 BR0# F1 DBR# C20 DBSY# E1 DEFER# H5 DRDY# F21 FERR# A5 HIT# G6 HITM# E4 IERR# D20 IGNNE# C4 INIT# B3 LINT0 C6 LINT1 B4 LOCK# H4 PRDY# AC2 PREQ# AC1 PROCHOT# D21 REQ[0]# K3 REQ[1]# H2 REQ[2]# K2 REQ[3]# J3 REQ[4]# L1 RESET# C1 RS[0]# F3 RS[1]# F4 RS[2]# G3 SMI# A3 STPCLK# D5 TCK AC5 TDI AA6 TDO AB3 THERMTRIP# C7 THERMDA A24 THERMDC B25 TMS AB5 TRDY# G2 TRST# AB6 A[32]# W3 A[33]# AA4 A[34]# AB2 A[35]# AA3 RSVD[10] F6 R13 68_0402_5% 1 2 D26 RLZ5.1B_LL34 @ 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A V_CPU_GTLREF H_D#4 H_D#14 H_D#10 H_D#9 H_D#3 H_D#13 H_D#6 H_D#2 H_D#8 H_D#12 H_D#1 H_D#5 H_D#7 H_D#11 H_D#0 H_D#15 H_D#27 H_D#25 H_D#31 H_D#24 H_D#20 H_D#30 H_D#23 H_D#19 H_D#29 H_D#16 H_D#18 H_D#22 H_D#26 H_D#28 H_D#17 H_D#21 H_DINV#0 H_DINV#1 H_DINV#3 H_DINV#2 H_DSTBN#2 H_DSTBP#2 H_DSTBP#1 H_DSTBN#1 H_DSTBP#0 H_DSTBN#0 H_DSTBN#3 H_DSTBP#3 H_D#48 H_D#56 H_D#52 H_D#59 H_D#63 H_D#55 H_D#51 H_D#62 H_D#58 H_D#54 H_D#50 H_D#57 H_D#61 H_D#53 H_D#49 H_D#60 COMP0 COMP2 COMP3 COMP1 CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 H_CPUSLP# H_DPSLP# H_DPRSTP# H_PSI# V_CPU_GTLREF TEST1 TEST2 VSSSENSE VCCSENSE H_DPWR# H_D#47 H_D#43 H_D#42 H_D#37 H_D#34 H_D#33 H_D#39 H_D#38 H_D#41 H_D#40 H_D#35 H_D#36 H_D#45 H_D#44 H_D#32 H_D#46 TEST3 TEST5 TEST6 TEST4 H_PWRGOOD VSSSENSE VCCSENSE VCCSENSE 37 VSSSENSE 37 H_D#[0..15]7 H_DSTBN#07 H_DSTBP#07 H_DINV#07 H_D#[16..31]7 H_DSTBN#17 H_DSTBP#17 H_DINV#17 CPU_BSEL015 CPU_BSEL115 CPU_BSEL215 H_D#[32..47] 7 H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7 H_D#[48..63] 7 H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7 H_DPRSTP#7,19,37 H_DPSLP#19 H_CPUSLP#7 H_DPWR#7 H_PWRGOOD 19 H_PSI#37 CPU_VID0 37 CPU_VID1 37 CPU_VID2 37 CPU_VID3 37 CPU_VID4 37 CPU_VID5 37 CPU_VID6 37 +VCCP +VCCP +1.5VS +VCC_CORE +VCC_CORE +VCC_CORE Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Merom(2/3)-AGTL+/PWR Custom 5 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Close to CPU pin AD26 within 500mils. CPU_BSEL CPU_BSEL2 CPU_BSEL1 166 200 0 1 0 1 CPU_BSEL0 1 0 Resistor placed within 0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils. Length match within 25 mils. The trace width/space/other is 20/7/25. Close to CPU pin within 500mils. Near pin B26 layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs C10 0.01U_0402_16V7K 1 2 R27 1K_0402_1% 1 2 R29 2K_0402_1% 1 2 + C7 220U_6.3V_M 1 2 C8 0.1U_0402_16V4Z@ 1 2 R21 1K_0402_5%@ 1 2 T2 R18 0_0402_5% 1 2 R20 1K_0402_5%@ 1 2 R25 27.4_0402_1% 1 2 R19 0_0402_5% 1 2 R23 27.4_0402_1% 1 2 R24 54.9_0402_1% 1 2 T1 R30 100_0402_1% 1 2 C9 10U_0805_6.3V6M 1 2 R28 100_0402_1% 1 2 JP2C Merom Ball-out Rev 1a . CONN@ VCC[001] A7 VCC[002] A9 VCC[003] A10 VCC[004] A12 VCC[005] A13 VCC[006] A15 VCC[007] A17 VCC[008] A18 VCC[009] A20 VCC[010] B7 VCC[011] B9 VCC[012] B10 VCC[013] B12 VCC[014] B14 VCC[015] B15 VCC[016] B17 VCC[017] B18 VCC[018] B20 VCC[019] C9 VCC[020] C10 VCC[021] C12 VCC[022] C13 VCC[023] C15 VCC[024] C17 VCC[025] C18 VCC[026] D9 VCC[027] D10 VCC[028] D12 VCC[029] D14 VCC[030] D15 VCC[031] D17 VCC[032] D18 VCC[033] E7 VCC[034] E9 VCC[035] E10 VCC[036] E12 VCC[037] E13 VCC[038] E15 VCC[039] E17 VCC[040] E18 VCC[041] E20 VCC[042] F7 VCC[043] F9 VCC[044] F10 VCC[045] F12 VCC[046] F14 VCC[047] F15 VCC[048] F17 VCC[049] F18 VCC[050] F20 VCC[051] AA7 VCC[052] AA9 VCC[053] AA10 VCC[054] AA12 VCC[055] AA13 VCC[056] AA15 VCC[057] AA17 VCC[058] AA18 VCC[059] AA20 VCC[060] AB9 VCC[061] AC10 VCC[062] AB10 VCC[063] AB12 VCC[064] AB14 VCC[065] AB15 VCC[066] AB17 VCC[067] AB18 VCC[068] AB20 VCC[069] AB7 VCC[070] AC7 VCC[071] AC9 VCC[072] AC12 VCC[073] AC13 VCC[074] AC15 VCC[075] AC17 VCC[076] AC18 VCC[077] AD7 VCC[078] AD9 VCC[079] AD10 VCC[080] AD12 VCC[081] AD14 VCC[082] AD15 VCC[083] AD17 VCC[084] AD18 VCC[085] AE9 VCC[086] AE10 VCC[087] AE12 VCC[088] AE13 VCC[089] AE15 VCC[090] AE17 VCC[091] AE18 VCC[092] AE20 VCC[093] AF9 VCC[094] AF10 VCC[095] AF12 VCC[096] AF14 VCC[097] AF15 VCC[098] AF17 VCC[099] AF18 VCC[100] AF20 VCCA[01] B26 VCCP[03] J6 VCCP[04] K6 VCCP[05] M6 VCCP[06] J21 VCCP[07] K21 VCCP[08] M21 VCCP[09] N21 VCCP[10] N6 VCCP[11] R21 VCCP[12] R6 VCCP[13] T21 VCCP[14] T6 VCCP[15] V21 VCCP[16] W21 VCCSENSE AF7 VID[0] AD6 VID[1] AF5 VID[2] AE5 VID[3] AF4 VID[4] AE3 VID[5] AF3 VID[6] AE2 VSSSENSE AE7 VCCA[02] C26 VCCP[01] G21 VCCP[02] V6 R22 54.9_0402_1% 1 2 DATA GRP 0 DATA GRP 1 DATA GRP 2DATA GRP 3 MISC JP2B Merom Ball-out Rev 1a CONN@ COMP[0] R26 COMP[1] U26 COMP[2] AA1 COMP[3] Y1 D[0]# E22 D[1]# F24 D[10]# J24 D[11]# J23 D[12]# H22 D[13]# F26 D[14]# K22 D[15]# H23 D[16]# N22 D[17]# K25 D[18]# P26 D[19]# R23 D[2]# E26 D[20]# L23 D[21]# M24 D[22]# L22 D[23]# M23 D[24]# P25 D[25]# P23 D[26]# P22 D[27]# T24 D[28]# R24 D[29]# L25 D[3]# G22 D[30]# T25 D[31]# N25 D[32]# Y22 D[33]# AB24 D[34]# V24 D[35]# V26 D[36]# V23 D[37]# T22 D[38]# U25 D[39]# U23 D[4]# F23 D[40]# Y25 D[41]# W22 D[42]# Y23 D[43]# W24 D[44]# W25 D[45]# AA23 D[46]# AA24 D[47]# AB25 D[48]# AE24 D[49]# AD24 D[5]# G25 D[50]# AA21 D[51]# AB22 D[52]# AB21 D[53]# AC26 D[54]# AD20 D[55]# AE22 D[56]# AF23 D[57]# AC25 D[58]# AE21 D[59]# AD21 D[6]# E25 D[60]# AC22 D[61]# AD23 D[62]# AF22 D[63]# AC23 D[7]# E23 D[8]# K24 D[9]# G24 TEST5 AF1 DINV[0]# H25 DINV[1]# N24 DINV[2]# U22 DINV[3]# AC20 DPRSTP# E5 DPSLP# B5 DPWR# D24 DSTBN[0]# J26 DSTBN[1]# L26 DSTBN[2]# Y26 DSTBN[3]# AE25 DSTBP[0]# H26 DSTBP[1]# M26 DSTBP[2]# AA26 DSTBP[3]# AF24 GTLREF AD26 PSI# AE6 PWRGOOD D6 SLP# D7 TEST3 C24 BSEL[0] B22 BSEL[1] B23 BSEL[2] C21 TEST2 D25 TEST4 AF26 TEST6 A26 TEST1 C23 T3 5 5 4 4 3 3 2 2 1 1 D D C C B B A A +VCC_CORE +VCC_CORE +VCC_CORE +VCC_CORE +VCC_CORE +VCCP Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Merom(3/3)-GND&Bypass Custom 6 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Place these inside socket cavity on L8 (North side Secondary) ESR <= 1.5m ohm Capacitor > 1980uF Near CPU CORE regulator Mid Frequence Decoupling Place these capacitors on L8 (Sorth side,Secondary Layer) Place these capacitors on L8 (North side,Secondary Layer) Place these capacitors on L8 (Sorth side,Secondary Layer) Place these capacitors on L8 (North side,Secondary Layer) C42 10U_0805_6.3V6M 1 2 C38 10U_0805_6.3V6M 1 2 C27 10U_0805_6.3V6M 1 2 C22 10U_0805_6.3V6M 1 2 C39 10U_0805_6.3V6M 1 2 C30 10U_0805_6.3V6M 1 2 C25 10U_0805_6.3V6M 1 2 C13 10U_0805_6.3V6M 1 2 C41 10U_0805_6.3V6M 1 2 C29 10U_0805_6.3V6M 1 2 + C49 1000U 2.5V M H80 LESR8M @ 1 2 C53 0.1U_0402_16V4Z 1 2 + C45 220U_D2_2V_Y_LESR9M 1 2 C15 10U_0805_6.3V6M 1 2 + C48 220U_D2_2V_Y_LESR9M 1 2 C50 0.1U_0402_16V4Z 1 2 C11 10U_0805_6.3V6M 1 2 C12 10U_0805_6.3V6M 1 2 C28 10U_0805_6.3V6M 1 2 C19 10U_0805_6.3V6M 1 2 C21 10U_0805_6.3V6M 1 2 C51 0.1U_0402_16V4Z 1 2 C34 10U_0805_6.3V6M 1 2 C36 10U_0805_6.3V6M 1 2 C16 10U_0805_6.3V6M 1 2 C20 10U_0805_6.3V6M 1 2 C31 10U_0805_6.3V6M 1 2 C26 10U_0805_6.3V6M 1 2 C32 10U_0805_6.3V6M 1 2 C14 10U_0805_6.3V6M 1 2 JP2D Merom Ball-out Rev 1a . CONN@ VSS[082] P6 VSS[148] AE11 VSS[002] A8 VSS[003] A11 VSS[004] A14 VSS[005] A16 VSS[006] A19 VSS[007] A23 VSS[008] AF2 VSS[009] B6 VSS[010] B8 VSS[011] B11 VSS[012] B13 VSS[013] B16 VSS[014] B19 VSS[015] B21 VSS[016] B24 VSS[017] C5 VSS[018] C8 VSS[019] C11 VSS[020] C14 VSS[021] C16 VSS[022] C19 VSS[023] C2 VSS[024] C22 VSS[025] C25 VSS[026] D1 VSS[027] D4 VSS[028] D8 VSS[029] D11 VSS[030] D13 VSS[031] D16 VSS[032] D19 VSS[033] D23 VSS[034] D26 VSS[035] E3 VSS[036] E6 VSS[037] E8 VSS[038] E11 VSS[039] E14 VSS[040] E16 VSS[041] E19 VSS[042] E21 VSS[043] E24 VSS[044] F5 VSS[045] F8 VSS[046] F11 VSS[047] F13 VSS[048] F16 VSS[049] F19 VSS[050] F2 VSS[051] F22 VSS[052] F25 VSS[053] G4 VSS[054] G1 VSS[055] G23 VSS[056] G26 VSS[057] H3 VSS[058] H6 VSS[059] H21 VSS[060] H24 VSS[061] J2 VSS[062] J5 VSS[063] J22 VSS[064] J25 VSS[065] K1 VSS[066] K4 VSS[067] K23 VSS[068] K26 VSS[069] L3 VSS[070] L6 VSS[071] L21 VSS[072] L24 VSS[073] M2 VSS[074] M5 VSS[075] M22 VSS[076] M25 VSS[077] N1 VSS[078] N4 VSS[079] N23 VSS[080] N26 VSS[081] P3 VSS[162] A25 VSS[161] AF21 VSS[160] AF19 VSS[159] AF16 VSS[158] AF13 VSS[157] AF11 VSS[156] AF8 VSS[155] AF6 VSS[154] A2 VSS[153] AE26 VSS[152] AE23 VSS[151] AE19 VSS[083] P21 VSS[084] P24 VSS[085] R2 VSS[086] R5 VSS[087] R22 VSS[088] R25 VSS[089] T1 VSS[090] T4 VSS[091] T23 VSS[092] T26 VSS[093] U3 VSS[094] U6 VSS[095] U21 VSS[096] U24 VSS[097] V2 VSS[098] V5 VSS[099] V22 VSS[100] V25 VSS[101] W1 VSS[102] W4 VSS[103] W23 VSS[104] W26 VSS[105] Y3 VSS[107] Y21 VSS[108] Y24 VSS[109] AA2 VSS[110] AA5 VSS[111] AA8 VSS[112] AA11 VSS[113] AA14 VSS[114] AA16 VSS[115] AA19 VSS[116] AA22 VSS[117] AA25 VSS[118] AB1 VSS[119] AB4 VSS[120] AB8 VSS[121] AB11 VSS[122] AB13 VSS[123] AB16 VSS[124] AB19 VSS[125] AB23 VSS[126] AB26 VSS[127] AC3 VSS[128] AC6 VSS[129] AC8 VSS[130] AC11 VSS[131] AC14 VSS[132] AC16 VSS[133] AC19 VSS[134] AC21 VSS[135] AC24 VSS[136] AD2 VSS[137] AD5 VSS[138] AD8 VSS[139] AD11 VSS[140] AD13 VSS[141] AD16 VSS[142] AD19 VSS[143] AD22 VSS[144] AD25 VSS[145] AE1 VSS[146] AE4 VSS[106] Y6 VSS[001] A4 VSS[149] AE14 VSS[150] AE16 VSS[147] AE8 VSS[163] AF25 + C47 220U_D2_2V_Y_LESR9M 1 2 C37 10U_0805_6.3V6M 1 2 C24 10U_0805_6.3V6M 1 2 C35 10U_0805_6.3V6M 1 2 C23 10U_0805_6.3V6M 1 2 C17 10U_0805_6.3V6M 1 2 C33 10U_0805_6.3V6M 1 2 C18 10U_0805_6.3V6M 1 2 + C46 220U_D2_2V_Y_LESR9M 1 2 C40 10U_0805_6.3V6M 1 2 C54 0.1U_0402_16V4Z 1 2 C52 0.1U_0402_16V4Z 1 2 C55 0.1U_0402_16V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A H_SWNG H_VREF PM_EXTTS#0 PM_EXTTS#1 DDR_CKE0_DIMMA DDR_CKE1_DIMMA DDR_CKE3_DIMMB DDR_CS1_DIMMA# DDR_CKE2_DIMMB DDR_CS0_DIMMA# DDR_CS3_DIMMB# DDR_CS2_DIMMB# CLK_MCH_3GPLL# CLK_MCH_3GPLL M_CLK_DDR3 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 M_CLK_DDR2 M_CLK_DDR0 M_CLK_DDR1 SMRCOMP_VOH SMRCOMP_VOL M_ODT1 SMRCOMP# M_ODT3 M_ODT0 M_ODT2 SMRCOMP V_DDR_MCH_REF SMRCOMP_VOL SMRCOMP_VOH MCH_SSCDREFCLK MCH_SSCDREFCLK# CLK_MCH_DREFCLK CLK_MCH_DREFCLK# CFG10 CFG11 CFG7 CFG5 CFG13 CFG9 CFG16 CFG19 CFG12 CFG6 CFG20 MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 MCH_ICH_SYNC# CLKREQ#_B H_DPRSTP# DPRSLPVR PM_EXTTS#1 PM_BMBUSY# H_THERMTRIP# PM_EXTTS#0 CL_CLK0 CL_DATA0 CL_RST# V_DDR_MCH_REF H_SCOMP# H_DSTBP#0 H_DSTBN#1 H_D#39 H_D#37 H_D#34 H_D#22 H_D#12 H_D#11 H_ADSTB#0 H_A#24 H_A#10 H_RS#0 H_DSTBN#0 H_D#58 H_D#54 H_D#4 H_D#13 H_D#20 H_ADSTB#1 H_A#7 H_A#3 H_A#11 H_DSTBP#2 H_D#6 H_D#25 H_D#1 H_A#16 H_REQ#0 H_D#44 H_A#19 H_A#17 H_RCOMP H_A#35 H_DSTBP#1 H_D#43 H_D#35 H_REQ#3 H_BNR# H_A#13 H_CPUSLP# H_SWNG H_HITM# H_DSTBN#3 H_DINV#1 H_D#62 H_D#57 H_D#56 H_D#60 H_A#14 H_RCOMP H_VREF H_HIT# H_D#38 H_D#17 H_A#31 H_DPWR# H_D#32 H_D#50 H_D#10 H_A#20 H_A#12 H_A#33 H_DSTBP#3 H_DINV#3 H_D#59 H_D#5 H_D#33 H_REQ#4 H_DEFER# H_D#55 H_D#47 H_D#45 H_D#28 H_D#27 H_D#19 H_D#16 CLK_MCH_BCLK# H_A#9 H_A#6 H_D#49 H_D#15 H_D#40 H_REQ#2 H_D#0 H_BR0# H_A#27 H_A#22 H_A#15 H_A#34 H_A#32 H_REQ#1 H_LOCK# H_DRDY# H_DINV#0 H_D#61 H_D#26 H_D#23 H_A#8 H_A#25 H_RS#2 H_D#7 H_D#14 H_D#8 H_D#30 CLK_MCH_BCLK H_A#28 H_RS#1 H_TRDY# H_DSTBN#2 H_D#63 H_D#52 H_D#48 H_D#36 H_D#31 H_D#29 H_A#4 H_A#30 H_A#29 H_DINV#2 H_D#41 H_D#24 H_D#21 H_D#18 H_D#9 H_BPRI# H_ADS# H_A#5 H_A#23 H_D#53 H_D#46 H_D#42 H_DBSY# H_A#21 H_A#18 H_SCOMP H_D#51 H_D#3 H_D#2 H_A#26 H_RESET# CLKREQ#_B DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 CL_VREF CL_VREF M_PWROK CFG8 PLT_RST# PM_PWROK CFG18 V_DDR_MCH_REF13,14,35 H_D#[0..63]5 H_CPUSLP#5 H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5 H_DSTBN#0 5 H_DSTBN#1 5 H_DSTBN#2 5 H_DSTBN#3 5 H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5 DDR_CKE0_DIMMA 13 DDR_CKE1_DIMMA 13 DDR_CKE2_DIMMB 14 DDR_CKE3_DIMMB 14 DDR_CS0_DIMMA#13 DDR_CS1_DIMMA#13 DDR_CS2_DIMMB#14 DDR_CS3_DIMMB#14 CLK_MCH_3GPLL 15 CLK_MCH_3GPLL#15 H_A#[3..35] 4 H_ADS#4 H_ADSTB#1 4 H_ADSTB#0 4 H_BPRI#4 H_BNR#4 H_DEFER#4 H_BR0#4 H_DBSY#4 CLK_MCH_BCLK 15 CLK_MCH_BCLK#15 H_DPWR#5 H_DRDY#4 H_HIT#4 H_HITM#4 H_LOCK#4 H_TRDY#4 M_CLK_DDR0 13 M_CLK_DDR1 13 M_CLK_DDR2 14 M_CLK_DDR3 14 M_CLK_DDR#0 13 M_CLK_DDR#1 13 M_CLK_DDR#2 14 M_CLK_DDR#3 14 M_ODT0 13 M_ODT1 13 M_ODT2 14 M_ODT3 14 MCH_SSCDREFCLK 15 MCH_SSCDREFCLK#15 MCH_CLKSEL015 MCH_CLKSEL115 MCH_CLKSEL215 DMI_TXP0 20 DMI_RXN0 20 DMI_RXP0 20 DMI_TXN0 20 CLKREQ#_B 15 MCH_ICH_SYNC#20 PM_BMBUSY#20 DPRSLPVR20,37 H_DPRSTP#5,19,37 PM_EXTTS#013 CL_CLK0 20 CL_DATA0 20 CL_RST#20 M_PWROK 20,30 H_RS#2 4 H_REQ#3 4 H_RS#1 4 H_RESET#4 H_REQ#2 4 H_RS#0 4 H_REQ#1 4 H_REQ#4 4 H_REQ#0 4 DMI_TXN1 20 DMI_TXN2 20 DMI_TXN3 20 DMI_TXP1 20 DMI_TXP2 20 DMI_TXP3 20 DMI_RXN1 20 DMI_RXN2 20 DMI_RXN3 20 DMI_RXP1 20 DMI_RXP2 20 DMI_RXP3 20 PM_EXTTS#114 CLK_MCH_DREFCLK 15 CLK_MCH_DREFCLK#15 H_THERMTRIP#4,19 DDR_A_MA1413 DDR_B_MA1414 PLT_RST#18,22 PM_PWROK20,30 +VCCP +VCCP +VCCP +3VS +1.8V +1.8V +1.8V +1.25VM_AXD Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE(1/6)-AGTL+/DMI/DDR2 Custom 7 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Layout Note: H_RCOMP / H_VREF / H_SWNG trace width and spacing is 10/20 Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20. NA lead free Near B3 pin within 100 mils from NB layout note: Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces For Calero: 80.6ohm For Crestline: 20ohm 0925_Stuff R43 and R46. 0927_Change from 20 ohm to 30 ohm. T13 R31 1K_0402_1% 1 2 R36 10K_0402_5% 1 2 T10 R33 1K_0402_1% 1 2 PM MISC NC DDR MUXINGCLK DMI CFGRSVD GRAPHICS VID ME U3B CRESTLINE_1p0 SM_CK_0 AV29 SM_CK_1 BB23 RSVD28 BF23 SM_CK_3 BA25 SM_CK#_0 AW30 SM_CK#_1 BA23 RSVD29 BG23 SM_CK#_3 AW25 SM_CKE_0 BE29 SM_CKE_1 AY32 SM_CKE_3 BD39 SM_CKE_4 BG37 SM_CS#_0 BG20 SM_CS#_1 BK16 SM_CS#_2 BG16 SM_CS#_3 BE13 RSVD34 BH39 SM_ODT_0 BH18 SM_ODT_1 BJ15 SM_ODT_2 BJ14 SM_ODT_3 BE16 SM_RCOMP BL15 SM_RCOMP# BK14 SM_VREF_0 AR49 SM_VREF_1 AW4 CFG_18 L32 CFG_19 N33 CFG_2 N24 CFG_0 P27 CFG_1 N27 CFG_20 L35 CFG_3 C21 CFG_4 C23 CFG_5 F23 CFG_6 N23 CFG_7 G23 CFG_8 J20 CFG_9 C20 CFG_10 R24 CFG_11 L23 CFG_12 J23 CFG_13 E23 CFG_14 E20 CFG_15 K23 CFG_16 M20 CFG_17 M24 PM_BM_BUSY# G41 PM_EXT_TS#_0 L36 PM_EXT_TS#_1 J36 PWROK AW49 RSTIN# AV20 DPLL_REF_CLK B42 DPLL_REF_CLK# C42 DPLL_REF_SSCLK H48 DPLL_REF_SSCLK# H47 DMI_RXN_0 AN47 DMI_RXN_1 AJ38 DMI_RXN_2 AN42 DMI_RXN_3 AN46 DMI_RXP_0 AM47 DMI_RXP_1 AJ39 DMI_RXP_2 AN41 DMI_RXP_3 AN45 DMI_TXN_0 AJ46 DMI_TXN_1 AJ41 DMI_TXN_2 AM40 DMI_TXN_3 AM44 DMI_TXP_0 AJ47 DMI_TXP_1 AJ42 DMI_TXP_2 AM39 DMI_TXP_3 AM43 RSVD10 AR37 RSVD12 AL36 RSVD11 AM36 RSVD13 AM37 RSVD22 BJ20 RSVD23 BK22 RSVD24 BF19 RSVD25 BH20 RSVD26 BK18 PM_DPRSTP# L39 SM_CK_4 AV23 SM_CK#_4 AW23 RSVD30 BC23 RSVD31 BD24 RSVD35 AW20 RSVD36 BK20 RSVD5 AR12 RSVD6 AR13 RSVD7 AM12 RSVD8 AN13 RSVD1 P36 RSVD2 P37 RSVD3 R35 RSVD4 N35 GFX_VID_0 E35 GFX_VID_1 A39 GFX_VID_2 C38 GFX_VID_3 B39 GFX_VR_EN E36 RSVD27 BJ18 SM_RCOMP_VOH BK31 SM_RCOMP_VOL BL31 THERMTRIP# N20 DPRSLPVR G36 RSVD9 J12 CL_CLK AM49 CL_DATA AK50 CL_PWROK AT43 CL_RST# AN49 CL_VREF AM50 RSVD37 C48 RSVD38 D47 RSVD39 B44 RSVD40 C44 RSVD32 BJ29 RSVD33 BE24 RSVD21 B51 NC_1 BJ51 NC_2 BK51 NC_3 BK50 NC_4 BL50 NC_5 BL49 NC_6 BL3 NC_7 BL2 NC_8 BK1 NC_9 BJ1 NC_10 E1 NC_11 A5 NC_12 C51 NC_13 B50 NC_14 A50 NC_15 A49 SDVO_CTRL_CLK H35 SDVO_CTRL_DATA K36 CLK_REQ# G39 RSVD14 D20 ICH_SYNC# G40 RSVD20 H10 RSVD41 A35 RSVD42 B37 RSVD43 B36 RSVD44 B34 RSVD45 C34 PEG_CLK# K45 PEG_CLK K44 TEST_1 A37 NC_16 BK2 TEST_2 R32 R47 20K_0402_5% 1 2 R32 3.01K_0402_1% 1 2 R45 221_0603_1% 1 2 R37 10K_0402_5% <> 1 2 C62 0.1U_0402_16V4Z 1 2 R49 2K_0402_1% 1 2 R41 1K_0402_1% 1 2 C59 0.01U_0402_16V7K 1 2 R48 0_0402_5% 1 2 C57 0.01U_0402_16V7K 1 2 C58 2.2U_0805_16V4Z 1 2 T8 R46 1K_0402_1% 1 2 R40 54.9_0402_1% 1 2 T6 R50 24.9_0402_1% 1 2 R42 392_0402_1% 1 2 T15 T5 R51 100_0402_1% 1 2 T44 T19 C63 0.1U_0402_16V4Z 1 2 C60 0.1U_0402_16V4Z 1 2 T12 C61 0.1U_0402_16V4Z 1 2 R35 30_0402_1% 1 2 T11 R44 1K_0402_1% 1 2 R43 1K_0402_1% 1 2 T18 T7 T4 T9 C56 2.2U_0805_16V4Z 1 2 T16 R38 10K_0402_5% 1 2 T20 T14 HOST U3A CRESTLINE_1p0 H_A#_10 G17 H_A#_11 C14 H_A#_12 K16 H_A#_13 B13 H_A#_14 L16 H_A#_15 J17 H_A#_16 B14 H_A#_17 K19 H_A#_18 P15 H_A#_19 R17 H_A#_20 B16 H_A#_21 H20 H_A#_22 L19 H_A#_23 D17 H_A#_24 M17 H_A#_25 N16 H_A#_26 J19 H_A#_27 B18 H_A#_28 E19 H_A#_29 B17 H_A#_3 J13 H_A#_30 B15 H_A#_31 E17 H_A#_4 B11 H_A#_5 C11 H_A#_6 M11 H_A#_7 C15 H_A#_8 F16 H_A#_9 L13 H_ADS# G12 H_ADSTB#_0 H17 H_ADSTB#_1 G20 H_BNR# C8 H_BPRI# E8 H_BREQ# F12 HPLL_CLK# AM7 H_CPURST# B6 HPLL_CLK AM5 H_D#_0 E2 H_REQ#_2 A11 H_REQ#_3 H13 H_D#_1 G2 H_D#_10 M10 H_D#_20 M3 H_D#_30 W3 H_D#_40 AB2 H_D#_50 AJ14 H_D#_60 AE5 H_D#_8 N8 H_D#_9 H2 H_DBSY# C10 H_D#_11 N12 H_D#_12 N9 H_D#_13 H5 H_D#_14 P13 H_D#_15 K9 H_D#_16 M2 H_D#_17 W10 H_D#_18 Y8 H_D#_19 V4 H_D#_2 G7 H_D#_21 J1 H_D#_22 N5 H_D#_23 N3 H_D#_24 W6 H_D#_25 W9 H_D#_26 N2 H_D#_27 Y7 H_D#_28 Y9 H_D#_29 P4 H_D#_3 M6 H_D#_31 N1 H_D#_32 AD12 H_D#_33 AE3 H_D#_34 AD9 H_D#_35 AC9 H_D#_36 AC7 H_D#_37 AC14 H_D#_38 AD11 H_D#_39 AC11 H_D#_4 H7 H_D#_41 AD7 H_D#_42 AB1 H_D#_43 Y3 H_D#_44 AC6 H_D#_45 AE2 H_D#_46 AC5 H_D#_47 AG3 H_D#_48 AJ9 H_D#_49 AH8 H_D#_5 H3 H_D#_51 AE9 H_D#_52 AE11 H_D#_53 AH12 H_D#_54 AJ5 H_D#_55 AH5 H_D#_56 AJ6 H_D#_57 AE7 H_D#_58 AJ7 H_D#_59 AJ2 H_D#_6 G4 H_D#_61 AJ3 H_D#_62 AH2 H_D#_63 AH13 H_D#_7 F3 H_DEFER# D6 H_DINV#_0 K5 H_DINV#_1 L2 H_DINV#_2 AD13 H_DINV#_3 AE13 H_DPWR# H8 H_DRDY# K7 H_DSTBN#_0 M7 H_DSTBN#_1 K3 H_DSTBN#_2 AD2 H_DSTBN#_3 AH11 H_DSTBP#_0 L7 H_DSTBP#_1 K2 H_DSTBP#_2 AC2 H_DSTBP#_3 AJ10 H_SCOMP W1 H_AVREF B9 H_DVREF A9 H_TRDY# B7 H_HIT# E4 H_HITM# C6 H_LOCK# G10 H_REQ#_0 M14 H_REQ#_1 E13 H_REQ#_4 B12 H_A#_32 C18 H_A#_33 A19 H_A#_34 B19 H_A#_35 N19 H_SWING B3 H_CPUSLP# E5 H_RCOMP C2 H_RS#_0 E12 H_RS#_1 D7 H_RS#_2 D8 H_SCOMP# W2 R34 30_0402_1% 1 2 T17 R39 54.9_0402_1% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A DDR_B_DQS#6 DDR_B_D63 DDR_B_D48 DDR_A_MA8 DDR_A_MA5 DDR_A_DQS#1 DDR_A_CAS# DDR_A_BS0 DDR_A_D6 DDR_A_D52 DDR_A_D35 DDR_A_D27 DDR_A_D26 DDR_A_D16 DDR_B_DQS0 DDR_B_DM5 DDR_B_D60 DDR_B_D53 DDR_B_D20 DDR_B_D17 DDR_B_D11 DDR_B_D10 DDR_A_MA12 DDR_A_DQS#5 DDR_A_DM7 DDR_A_D55 DDR_A_D5 DDR_A_D45 DDR_A_D29 DDR_A_D1 DDR_B_DQS7 DDR_B_CAS# DDR_B_D62 DDR_B_D19 DDR_A_MA13 DDR_A_DQS5 DDR_A_DM6 DDR_A_BS1 DDR_A_D48 DDR_A_D44 DDR_A_D20 DDR_A_D14 DDR_B_MA5 DDR_B_DQS#0 DDR_B_BS0 DDR_B_D50 DDR_B_D41 DDR_B_D23 DDR_A_D47 DDR_A_D39 DDR_A_D31 DDR_B_WE# DDR_B_MA1 DDR_B_DM2 DDR_B_DM0 DDR_B_D33 DDR_B_D24 DDR_A_MA4 DDR_A_DQS7 DDR_A_D40 DDR_A_D38 DDR_A_D37 DDR_A_D2 DDR_B_MA7 DDR_B_MA13 DDR_B_D55 DDR_B_D32 DDR_B_D29 DDR_B_D28 DDR_B_D21 DDR_A_MA11 DDR_A_DQS#4 DDR_A_DQS#0 DDR_A_DM5 DDR_A_BS2 DDR_A_D63 DDR_A_D50 DDR_A_D19 DDR_A_D17 DDR_B_D8 DDR_B_D61 DDR_A_DQS4 DDR_A_DM4 DDR_A_D62 DDR_A_D54 DDR_A_D36 DDR_A_D11 DDR_B_DQS#5 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_BS2 DDR_B_D54 DDR_B_D52 DDR_B_D25 DDR_A_MA6 DDR_A_MA2 DDR_A_D9 DDR_A_D4 SB_RCVEN# DDR_B_MA8 DDR_B_DQS6 DDR_B_DQS5 DDR_B_DM4 DDR_B_DM3 DDR_B_D5 DDR_B_D34 DDR_B_D14 DDR_B_D0 DDR_A_MA3 DDR_A_MA0 DDR_A_D34 DDR_A_D18 DDR_B_MA2 DDR_B_MA10 DDR_B_D42 DDR_B_D39 DDR_B_D38 DDR_B_D36 DDR_A_RAS# DDR_A_MA10 DDR_A_DQS#3 DDR_A_D60 DDR_A_D46 DDR_A_D42 DDR_A_D28 DDR_B_MA4 DDR_B_D7 DDR_B_D6 DDR_B_D46 DDR_B_D30 DDR_B_D18 DDR_A_DQS3 DDR_A_DQS0 DDR_A_DM0 DDR_A_D59 DDR_A_D58 DDR_A_D15 DDR_B_DM6 DDR_B_D57 DDR_B_D4 DDR_B_D35 DDR_B_D27 DDR_B_D2 DDR_B_D1 DDR_A_MA1 DDR_A_D43 DDR_A_D41 DDR_A_D24 DDR_B_MA9 DDR_B_MA12 DDR_B_MA11 DDR_B_DQS3 DDR_B_DQS2 DDR_B_DM1 DDR_B_D56 DDR_B_D37 DDR_B_D16 DDR_B_D12 DDR_A_WE# DDR_A_DQS1 DDR_A_D51 DDR_A_D22 DDR_A_D12 DDR_A_D0 DDR_B_DQS#2 DDR_B_DQS#1 DDR_B_D59 DDR_B_D51 DDR_B_D47 DDR_A_MA9 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D7 DDR_A_D61 DDR_A_D56 DDR_A_D32 DDR_A_D30 DDR_A_D21 DDR_B_RAS# DDR_B_BS1 DDR_B_D9 DDR_B_D45 DDR_B_D43 DDR_B_D40 DDR_B_D15 DDR_A_DQS#6 DDR_A_DM2 DDR_A_D53 DDR_A_D49 DDR_A_D10 DDR_B_MA0 DDR_B_DQS#7 DDR_B_D58 DDR_B_D44 DDR_B_D3 DDR_B_D13 DDR_A_MA7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DM3 DDR_A_DM1 DDR_A_D8 DDR_A_D57 DDR_B_MA6 DDR_B_MA3 DDR_B_DQS#4 DDR_B_DQS1 DDR_B_DM7 DDR_B_D49 DDR_B_D31 DDR_B_D26 DDR_B_D22 SA_RCVEN# DDR_A_D33 DDR_A_D3 DDR_A_D25 DDR_A_D23 DDR_A_D13 DDR_A_BS0 13 DDR_A_BS1 13 DDR_A_BS2 13 DDR_A_DQS[0..7] 13 DDR_A_DQS#[0..7] 13 DDR_A_MA[0..13] 13 DDR_A_RAS#13 DDR_A_D[0..63]13 DDR_B_BS0 14 DDR_B_BS1 14 DDR_B_BS2 14 DDR_B_DM[0..7] 14 DDR_B_DQS[0..7] 14 DDR_B_DQS#[0..7] 14 DDR_B_MA[0..13] 14 DDR_B_RAS#14 DDR_B_D[0..63]14 DDR_A_DM[0..7] 13 DDR_A_CAS#13 DDR_B_CAS#14 DDR_A_WE#13 DDR_B_WE#14 Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE((2/6)-DDR2 A/B CH Custom 8 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. DDR SYSTEM MEMORY B U3E CRESTLINE_1p0 SB_DQ_0 AP49 SB_DQ_1 AR51 SB_DQ_10 BA49 SB_DQ_11 BE50 SB_DQ_12 BA51 SB_DQ_13 AY49 SB_DQ_14 BF50 SB_DQ_15 BF49 SB_DQ_16 BJ50 SB_DQ_17 BJ44 SB_DQ_18 BJ43 SB_DQ_19 BL43 SB_DQ_2 AW50 SB_DQ_20 BK47 SB_DQ_21 BK49 SB_DQ_22 BK43 SB_DQ_23 BK42 SB_DQ_24 BJ41 SB_DQ_25 BL41 SB_DQ_26 BJ37 SB_DQ_27 BJ36 SB_DQ_28 BK41 SB_DQ_29 BJ40 SB_DQ_3 AW51 SB_DQ_30 BL35 SB_DQ_31 BK37 SB_DQ_32 BK13 SB_DQ_33 BE11 SB_DQ_34 BK11 SB_DQ_35 BC11 SB_DQ_36 BC13 SB_DQ_37 BE12 SB_DQ_38 BC12 SB_DQ_39 BG12 SB_DQ_4 AN51 SB_DQ_40 BJ10 SB_DQ_41 BL9 SB_DQ_42 BK5 SB_DQ_43 BL5 SB_DQ_44 BK9 SB_DQ_45 BK10 SB_DQ_46 BJ8 SB_DQ_47 BJ6 SB_DQ_48 BF4 SB_DQ_49 BH5 SB_DQ_5 AN50 SB_DQ_50 BG1 SB_DQ_51 BC2 SB_DQ_52 BK3 SB_DQ_53 BE4 SB_DQ_54 BD3 SB_DQ_55 BJ2 SB_DQ_56 BA3 SB_DQ_57 BB3 SB_DQ_58 AR1 SB_DQ_59 AT3 SB_DQ_6 AV50 SB_DQ_60 AY2 SB_DQ_61 AY3 SB_DQ_62 AU2 SB_DQ_63 AT2 SB_DQ_7 AV49 SB_DQ_8 BA50 SB_DQ_9 BB50 SB_BS_0 AY17 SB_BS_1 BG18 SB_BS_2 BG36 SB_CAS# BE17 SB_DM_0 AR50 SB_DM_1 BD49 SB_DM_2 BK45 SB_DM_3 BL39 SB_DM_4 BH12 SB_DM_5 BJ7 SB_DM_6 BF3 SB_DM_7 AW2 SB_DQS_0 AT50 SB_DQS_1 BD50 SB_DQS_2 BK46 SB_DQS_3 BK39 SB_DQS_4 BJ12 SB_DQS_5 BL7 SB_DQS_6 BE2 SB_DQS_7 AV2 SB_DQS#_0 AU50 SB_DQS#_1 BC50 SB_DQS#_2 BL45 SB_DQS#_3 BK38 SB_DQS#_4 BK12 SB_DQS#_5 BK7 SB_DQS#_6 BF2 SB_DQS#_7 AV3 SB_MA_0 BC18 SB_MA_1 BG28 SB_MA_10 BG17 SB_MA_11 BE37 SB_MA_12 BA39 SB_MA_13 BG13 SB_MA_2 BG25 SB_MA_3 AW17 SB_MA_4 BF25 SB_MA_5 BE25 SB_MA_6 BA29 SB_MA_7 BC28 SB_MA_8 AY28 SB_MA_9 BD37 SB_RAS# AV16 SB_RCVEN# AY18 SB_WE# BC17 DDR SYSTEM MEMORY A U3D CRESTLINE_1p0 SA_DQ_0 AR43 SA_DQ_1 AW44 SA_DQ_10 BG47 SA_DQ_11 BJ45 SA_DQ_12 BB47 SA_DQ_13 BG50 SA_DQ_14 BH49 SA_DQ_15 BE45 SA_DQ_16 AW43 SA_DQ_17 BE44 SA_DQ_18 BG42 SA_DQ_19 BE40 SA_DQ_2 BA45 SA_DQ_20 BF44 SA_DQ_21 BH45 SA_DQ_22 BG40 SA_DQ_23 BF40 SA_DQ_24 AR40 SA_DQ_25 AW40 SA_DQ_26 AT39 SA_DQ_27 AW36 SA_DQ_28 AW41 SA_DQ_29 AY41 SA_DQ_3 AY46 SA_DQ_30 AV38 SA_DQ_31 AT38 SA_DQ_32 AV13 SA_DQ_33 AT13 SA_DQ_34 AW11 SA_DQ_35 AV11 SA_DQ_36 AU15 SA_DQ_37 AT11 SA_DQ_38 BA13 SA_DQ_39 BA11 SA_DQ_4 AR41 SA_DQ_40 BE10 SA_DQ_41 BD10 SA_DQ_42 BD8 SA_DQ_43 AY9 SA_DQ_44 BG10 SA_DQ_45 AW9 SA_DQ_46 BD7 SA_DQ_47 BB9 SA_DQ_48 BB5 SA_DQ_49 AY7 SA_DQ_5 AR45 SA_DQ_50 AT5 SA_DQ_51 AT7 SA_DQ_52 AY6 SA_DQ_53 BB7 SA_DQ_54 AR5 SA_DQ_55 AR8 SA_DQ_56 AR9 SA_DQ_57 AN3 SA_DQ_58 AM8 SA_DQ_59 AN10 SA_DQ_6 AT42 SA_DQ_60 AT9 SA_DQ_61 AN9 SA_DQ_62 AM9 SA_DQ_63 AN11 SA_DQ_7 AW47 SA_DQ_8 BB45 SA_DQ_9 BF48 SA_BS_0 BB19 SA_BS_1 BK19 SA_BS_2 BF29 SA_CAS# BL17 SA_DM_0 AT45 SA_DM_1 BD44 SA_DM_2 BD42 SA_DM_3 AW38 SA_DM_4 AW13 SA_DM_5 BG8 SA_DM_6 AY5 SA_DQS_0 AT46 SA_DQS_1 BE48 SA_DQS_2 BB43 SA_DQS_3 BC37 SA_DQS_4 BB16 SA_DQS_5 BH6 SA_DQS_6 BB2 SA_DQS_7 AP3 SA_DM_7 AN6 SA_DQS#_0 AT47 SA_DQS#_1 BD47 SA_DQS#_2 BC41 SA_DQS#_3 BA37 SA_DQS#_4 BA16 SA_DQS#_5 BH7 SA_DQS#_6 BC1 SA_DQS#_7 AP2 SA_MA_0 BJ19 SA_MA_1 BD20 SA_MA_10 BC19 SA_MA_11 BE28 SA_MA_12 BG30 SA_MA_13 BJ16 SA_MA_2 BK27 SA_MA_3 BH28 SA_MA_4 BL24 SA_MA_5 BK28 SA_MA_6 BJ27 SA_MA_7 BJ25 SA_MA_8 BL28 SA_MA_9 BA28 SA_RAS# BE18 SA_RCVEN# AY20 SA_WE# BA19 T22 T21 5 5 4 4 3 3 2 2 1 1 D D C C B B A A ENABLT ENAVDD LCD_CLK LCD_DATA PEGCOMP CRT_R TV_CRMA TV_COMPS TV_LUMA CRT_G CRT_B 3VDDCDA 3VDDCCL CRT_HSYNC CRT_VSYNC LVDSA0+ LVDSA2+ LVDSA1+ LVDSA0- LVDSA2- LVDSA1- LVDSB1+ LVDSB2+ LVDSB0+ LVDSB1- LVDSB2- LVDSB0- LVDSAC+ LVDSAC- LVDSBC+ LVDSBC- BKLT_CTRL LCD_CLK17 LCD_DATA17 ENABLT17 ENAVDD17 CRT_R16 CRT_G16 CRT_B16 TV_COMPS16 TV_LUMA16 TV_CRMA16 3VDDCDA16 3VDDCCL16 CRT_HSYNC16 CRT_VSYNC16 LVDSA0+17 LVDSA2+17 LVDSA1+17 LVDSA0-17 LVDSA2-17 LVDSA1-17 LVDSB1+17 LVDSB2+17 LVDSB0+17 LVDSB1-17 LVDSB2-17 LVDSB0-17 LVDSAC+17 LVDSAC-17 LVDSBC+17 LVDSBC-17 +VCCP +3VS +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE((3/6)-VGA/LVDS/TV Custom 9 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. CFG9 0 = Normal mode 1 = Low Power mode (PCIE Graphics Lane Reversal) CFG[2:0] FSB Freq select Reserved Reserved ReservedCFG[15:14] Strap Pin Table ReservedCFG[18:17] (Lane number in Order) Others = Reserved 011 = FSB 667MHz 010 = FSB 800MHz 11 = Normal Operation 10 = All Z Mode Enabled 01 = XOR Mode Enabled * 1 = Reverse Lane 0 = Reverse Lane SDVO_CTRLDATA 1 = Enabled 1 = SDVO Device Present 0 = Normal Operation 0 = No SDVO Device Present (Default) * 0 = Disabled * 0 = DMI x 2 00 = Reserved * * * * 1 = PCIE/SDVO are operating simu. 0 = Only PCIE or SDVO is operational. * 1 = Normal Operation 1 = DMI x 4 0 = Reserved 1 = Mobile CPU CFG5 (DMI select) CFG19 (DMI Lane Reversal) CFG16 (FSB Dynamic ODT) CFG6 CFG7 (CPU Strap) CFG20 (PCIE/SDVO concurrent) CFG[11:10] CFG[13:12] (XOR/ALLZ) CFG8 (Low power PCIE) * For Calero: 255ohm For Crestline:1.3kohm For Calero: 1.5Kohm For Crestline:2.4kohm PEGCOMP trace width and spacing is 20/25 mils. CFG[19:18] have internal pull down CFG[17:3] have internal pull up LVDS PCI-EXPRESS GRAPHICS TVVGA U3C CRESTLINE_1p0 PEG_COMPI N43 PEG_COMPO M43 PEG_RX#_0 J51 PEG_RX#_1 L51 PEG_RX#_2 N47 PEG_RX#_3 T45 PEG_RX#_4 T50 PEG_RX#_5 U40 PEG_RX#_6 Y44 PEG_RX#_7 Y40 PEG_RX#_8 AB51 PEG_RX#_9 W49 PEG_RX#_10 AD44 PEG_RX#_11 AD40 PEG_RX#_12 AG46 PEG_RX#_13 AH49 PEG_RX#_14 AG45 PEG_RX#_15 AG41 PEG_RX_0 J50 PEG_RX_1 L50 PEG_RX_2 M47 PEG_RX_3 U44 PEG_RX_4 T49 PEG_RX_5 T41 PEG_RX_6 W45 PEG_RX_7 W41 PEG_RX_8 AB50 PEG_RX_9 Y48 PEG_RX_10 AC45 PEG_RX_11 AC41 PEG_RX_12 AH47 PEG_RX_13 AG49 PEG_RX_14 AH45 PEG_RX_15 AG42 PEG_TX#_0 N45 PEG_TX#_10 AC46 PEG_TX#_3 N51 PEG_TX#_4 R50 PEG_TX#_5 T42 PEG_TX#_6 Y43 PEG_TX#_7 W46 PEG_TX#_8 W38 PEG_TX#_9 AD39 PEG_TX#_1 U39 PEG_TX#_11 AC49 PEG_TX#_12 AC42 PEG_TX#_13 AH39 PEG_TX#_14 AE49 PEG_TX#_15 AH44 PEG_TX#_2 U47 PEG_TX_0 M45 PEG_TX_1 T38 PEG_TX_2 T46 PEG_TX_3 N50 PEG_TX_4 R51 PEG_TX_5 U43 PEG_TX_6 W42 PEG_TX_7 Y47 PEG_TX_8 Y39 PEG_TX_9 AC38 PEG_TX_10 AD47 PEG_TX_11 AC50 PEG_TX_12 AD43 PEG_TX_13 AG39 PEG_TX_14 AE50 PEG_TX_15 AH43 L_CTRL_CLK E39 L_CTRL_DATA E40 L_DDC_CLK C37 L_DDC_DATA D35 L_VDD_EN K40 LVDS_IBG L41 LVDS_VBG L43 LVDS_VREFH N41 LVDS_VREFL N40 LVDSA_CLK# D46 LVDSA_CLK C45 LVDSA_DATA#_0 G51 LVDSA_DATA#_1 E51 LVDSA_DATA#_2 F49 LVDSA_DATA_1 E50 LVDSA_DATA_2 F48 LVDSB_CLK# D44 LVDSB_CLK E42 LVDSB_DATA#_0 G44 LVDSB_DATA#_1 B47 LVDSB_DATA#_2 B45 LVDSB_DATA_1 A47 LVDSB_DATA_2 A45 L_BKLT_EN H39 TVA_DAC E27 TVB_DAC G27 TVC_DAC K27 TVA_RTN F27 TVB_RTN J27 TVC_RTN L27 CRT_BLUE H32 CRT_BLUE# G32 CRT_DDC_CLK K33 CRT_DDC_DATA G35 CRT_GREEN K29 CRT_GREEN# J29 CRT_HSYNC F33 CRT_TVO_IREF C32 CRT_RED F29 CRT_RED# E29 CRT_VSYNC E33 LVDSA_DATA_0 G50 LVDSB_DATA_0 E44 L_BKLT_CTRL J40 TV_DCONSEL_0 M35 TV_DCONSEL_1 P33 R57 1.3K_0402_1% 1 2 R53 10K_0402_5% 1 2 R54 10K_0402_5% 1 2 R56 2.2K_0402_5% 1 2 R52 24.9_0402_1% 1 2 R55 2.4K_0402_1% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A +1.25VM_A_SM +VCCP +V1.25VS_AXF +1.25VS +1.25VS_DMI +1.8V_SM_CK +3VS_HV +VCC_PEG +1.25VS_PEGPLL +1.25VS +1.25VM_AXD +1.25VM_A_SM_CK +3VS_PEG_BG +3VS +1.8V_TXLVDS +3VS +3VS_DAC_BG +3VS +3VS_DAC_CRT +3VS +3VS_TVDACA +3VS +3VS_TVDACB +3VS +3VS_TVDACC +1.8V +1.8V_LVDS +1.5VS +1.5VS_QDAC +3VS_TVDACA +3VS_TVDACB +3VS_TVDACC +1.25VS_PEGPLL +1.25VM_HPLL +1.5VS_TVDAC +1.8V_LVDS +1.5VS_QDAC +1.8V_TXLVDS +1.25VM_MPLL +1.25VS_DPLLB +1.25VM_HPLL +1.25VS_DPLLA +3VS_DAC_BG VCCSYNC +3VS +3VS_DAC_CRT +1.8V_TXLVDS +1.8V +1.25VM_HPLL +1.25VS +1.25VM_MPLL +1.25VS +VCCP +1.25VS_PEGPLL +1.25VS +1.25VS +V1.25VS_AXF +1.25VS +1.25VS_DMI +1.8V +1.8V_SM_CK +1.25VS_DPLLA +1.25VS_DPLLB +1.25VS +1.25VS +1.5VS +1.5VS_TVDAC +VCCP +3VS +VCCP_D +3VS_HV +VCC_PEG Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE(4/6)-PWR Custom 10 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. 20 mils 20mils 10mA 80mA 5mA 80mA 80mA 50mA 150mA 10mA 5mA 950mA 100mA 40mA 40mA 40mA 75mA 5mA 250mA 100mA 150mA 850mA 200mA 350mA 100mA 120mA 100mA 100mA 1200mA 250mA 1450mA 50mA 25mA 0925_Change C439 from 0.47uF to 4.7uF. 1022_Change R64, R79 from 0 ohm to 1uH/400mA inductor. C110 0.47U_0603_10V7K 1 2 C101 1U_0603_10V4Z 1 2 C79 10U_0805_10V4Z 1 2 C87 10U_0805_10V4Z 1 2 R59 BLM18PG181SN1D_0603 1 2 C76 4.7U_0805_10V4Z 1 2 C111 0.022U_0402_16V7K 1 2 C70 1U_0603_10V4Z 1 2 C99 1U_0603_10V4Z 1 2 C83 1U_0603_10V4Z 1 2 C67 0.1U_0402_16V4Z 1 2 R61 0_0603_5% 1 2 C72 4.7U_0805_10V4Z 1 2 C119 10U_0805_10V4Z 1 2 C439 4.7U_0603_6.3V6K 1 2 + C71 220U_6.3V_M 1 2 C68 10U_0805_10V4Z 1 2 R66 0_0603_5% 1 2 C109 0.47U_0603_10V7K 1 2 C100 10U_0805_10V4Z 1 2 C103 0.1U_0402_16V4Z 1 2 C112 0.1U_0402_16V4Z 1 2 C74 0.1U_0402_16V4Z 1 2 C107 10U_0805_10V4Z 1 2 R69 10U_FLC-453232-100K_0.25A_10% 1 2 C86 0.1U_0402_16V4Z 1 2 C113 0.022U_0402_16V7K 1 2 R70 MBK2012121YZF_0805 1 2 R73 MBK2012121YZF_0805 1 2 C106 0.1U_0402_16V4Z 1 2 R74 BLM18PG181SN1D_0603 1 2 D2 CH751H-40PT_SOD323-2 2 1 + C90 220U_6.3V_M 1 2 C73 0.022U_0402_16V7K 1 2 C115 0.022U_0402_16V7K 1 2 R79 1U_WIM32251R0KZF_10% 1 2 C64 0.1U_0402_16V4Z 1 2 C117 10U_0805_10V4Z 1 2 C98 10U_0805_10V4Z 1 2 POWER CRTPLLA PEGA SMTV D TV/CRTLVDS VTTLF PEG SM CK AXD AXF VTT DMI HV A CKA LVDS U3H CRESTLINE_1p0 VTT_19 T2 VTT_20 R3 VTT_21 R2 VTT_22 R1 VCCD_CRT M32 VCCA_PEG_BG K50 VCCA_PEG_PLL U51 VCCA_CRT_DAC_1 A33 VCCA_CRT_DAC_2 B33 VCCA_DPLLA B49 VCCA_DPLLB H49 VCCA_HPLL AL2 VCCA_LVDS A41 VCCA_MPLL AM2 VCCA_TVA_DAC_1 C25 VCCA_TVA_DAC_2 B25 VCCA_TVB_DAC_1 C27 VCCA_TVB_DAC_2 B27 VCCA_TVC_DAC_1 B28 VCCA_TVC_DAC_2 A28 VCCD_PEG_PLL U48 VTT_15 T7 VTT_16 T6 VTT_17 T5 VTT_18 T3 VTT_12 T11 VTT_13 T10 VTT_14 T9 VCCSYNC J32 VCCD_HPLL AN2 VTT_1 U13 VTT_2 U12 VTT_4 U9 VTT_5 U8 VTT_6 U7 VTT_7 U5 VTT_8 U3 VTT_9 U2 VTT_10 U1 VTT_11 T13 VTT_3 U11 VCCA_SM_CK_1 BC29 VCCA_SM_CK_2 BB29 VCCA_DAC_BG A30 VCCD_TVDAC L29 VTTLF1 A7 VTTLF2 F2 VTTLF3 AH1 VCC_RXR_DMI_1 AH50 VCC_RXR_DMI_2 AH51 VCC_SM_CK_1 BK24 VCC_SM_CK_2 BK23 VCC_SM_CK_3 BJ24 VCC_SM_CK_4 BJ23 VCCD_LVDS_1 J41 VCCD_QDAC N28 VCC_AXD_2 AU28 VCC_AXD_3 AU24 VCC_AXD_5 AT25 VCC_AXF_1 B23 VCC_AXF_2 B21 VCC_AXF_3 A21 VCCA_SM_1 AW18 VCCA_SM_2 AV19 VCCA_SM_3 AU19 VCCA_SM_4 AU18 VCCA_SM_5 AU17 VCCA_SM_7 AT22 VCCA_SM_8 AT21 VCCA_SM_9 AT19 VCC_DMI AJ50 VCC_TX_LVDS A43 VSSA_DAC_BG B32 VSSA_LVDS B41 VSSA_PEG_BG K49 VCC_HV_1 C40 VCC_HV_2 B40 VCC_PEG_1 AD51 VCCA_SM_10 AT18 VCCA_SM_11 AT17 VCCA_SM_NCTF_1 AR17 VCCA_SM_NCTF_2 AR16 VCCD_LVDS_2 H42 VCC_PEG_2 W50 VCC_PEG_3 W51 VCC_PEG_4 V49 VCC_PEG_5 V50 VCC_AXD_NCTF AR29 VCC_AXD_4 AT29 VCC_AXD_6 AT30 VCC_AXD_1 AT23 C102 0.1U_0402_16V4Z 1 2 C121 0.022U_0402_16V7K 1 2 R64 1U_WIM32251R0KZF_10% 1 2 R62 BLM18PG181SN1D_0603 1 2 R72 0_0805_5% 1 2 + C104 220U_6.3V_M 1 2 R60 10U_FLC-453232-100K_0.25A_10% 1 2 C78 10U_0805_10V4Z 1 2 R71 0_0603_5% 1 2 R78 BLM18PG181SN1D_0603 1 2 C65 0.022U_0402_16V7K 1 2 R68 0_0805_5% 1 2 C69 10U_0805_10V4Z 1 2 C96 10U_0805_10V4Z 1 2 C122 0.1U_0402_16V4Z 1 2 C81 0.1U_0402_16V4Z 1 2 R81 0_0603_5% 1 2 R75 10_0402_5% 1 2 R80 BLM18PG181SN1D_0603 1 2 C95 0.1U_0402_16V4Z 1 2 C85 0.1U_0402_16V4Z 1 2 R67 0_0805_5% 1 2 C105 10U_0805_10V4Z 1 2 C114 0.1U_0402_16V4Z 1 2 C97 0.1U_0402_16V4Z 1 2 C89 0.1U_0402_16V4Z 1 2 R58 0_0603_5% 1 2 C66 0.1U_0402_16V4Z 1 2 R77 100_0603_1% 1 2 C120 1U_0603_10V4Z 1 2 R63 0_0603_5% 1 2 C116 0.1U_0402_16V4Z 1 2 C77 2.2U_0805_16V4Z 1 2 C108 0.47U_0603_10V7K 1 2 C118 1000P_0402_50V7K 1 2 C84 10U_0805_10V4Z 1 2 C82 1000P_0402_50V7K 1 2 C75 0.47U_0603_10V7K 1 2 C93 1U_0603_10V4Z 1 2 C92 4.7U_0805_10V4Z 1 2 L1 BLM18PG121SN1D_0603 1 2 R65 0_0805_5% 1 2 C91 10U_0805_10V4Z 1 2 C88 0.022U_0402_16V7K 1 2 R76 0_0402_5% 1 2 C80 0.1U_0402_16V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VCCSM_LF1 VCCSM_LF7 VCCSM_LF2 VCCSM_LF3 VCCSM_LF6 VCCSM_LF4 VCCSM_LF5 +VCCP +VCCP +VCCP +VCCP +1.8V +VCCP +VCCP Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE((5/6)-PWR/GND Custom 11 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. VCC=1260mA VCC_AXG=7700mA VCC_AXG=7700mA 3720mA VCC=1260mA VCC_AXM=970mA VCC_AXM=970mA C145 0.1U_0402_16V4Z 1 2 C135 10U_0805_10V4Z 1 2 C142 0.22U_0402_10V4Z 1 2 C125 4.7U_0805_10V4Z 1 2 C141 0.1U_0402_16V4Z 1 2 C140 10U_0805_10V4Z 1 2 + C131 220U_6.3V_M 1 2 C143 0.22U_0402_10V4Z 1 2 C133 10U_0805_10V4Z 1 2 C1531U_0603_10V4Z 1 2 C136 10U_0805_10V4Z 1 2 C1500.22U_0603_10V7K 1 2 C146 0.1U_0402_16V4Z 1 2 C129 0.22U_0603_10V7K 1 2 + C126 220U_6.3V_M 1 2 C1490.22U_0603_10V7K 1 2 C134 0.01U_0402_16V7K 1 2 C1470.1U_0402_16V4Z 1 2 C132 10U_0805_10V4Z 1 2 POWER VCC NCTF VSS NCTF VSS SCB VCC AXM VCC AXM NCTF U3F CRESTLINE_1p0 VCC_NCTF_1 AB33 VCC_NCTF_20 AK37 VCC_NCTF_29 AP35 VCC_NCTF_42 U31 VCC_NCTF_9 AF33 VCC_NCTF_10 AF36 VCC_NCTF_11 AH33 VCC_NCTF_12 AH35 VCC_NCTF_13 AH36 VCC_NCTF_14 AH37 VCC_NCTF_15 AJ33 VCC_NCTF_17 AK33 VCC_NCTF_18 AK35 VCC_NCTF_19 AK36 VCC_NCTF_2 AB36 VCC_NCTF_24 AL33 VCC_NCTF_25 AL35 VCC_NCTF_3 AB37 VCC_NCTF_30 AP36 VCC_NCTF_31 AR35 VCC_NCTF_32 AR36 VCC_NCTF_38 T30 VCC_NCTF_39 T34 VCC_NCTF_40 T35 VCC_NCTF_41 U29 VCC_NCTF_4 AC33 VCC_NCTF_43 U32 VCC_NCTF_44 U33 VCC_NCTF_45 U35 VCC_NCTF_46 U36 VCC_NCTF_48 V33 VCC_NCTF_49 V36 VCC_NCTF_50 V37 VCC_NCTF_5 AC35 VCC_NCTF_6 AC36 VCC_NCTF_7 AD35 VSS_NCTF_1 T27 VSS_NCTF_2 T37 VSS_NCTF_3 U24 VSS_NCTF_4 U28 VSS_NCTF_5 V31 VSS_NCTF_6 V35 VSS_NCTF_8 AB17 VSS_NCTF_9 AB35 VSS_NCTF_10 AD19 VCC_NCTF_8 AD36 VSS_NCTF_7 AA19 VSS_NCTF_11 AD37 VSS_NCTF_12 AF17 VSS_NCTF_14 AK17 VSS_NCTF_16 AM24 VSS_NCTF_17 AP26 VSS_NCTF_19 AR15 VSS_NCTF_20 AR19 VSS_NCTF_21 AR28 VCC_NCTF_33 Y32 VCC_AXM_4 AK24 VCC_AXM_5 AK23 VCC_AXM_6 AJ26 VCC_AXM_7 AJ23 VCC_AXM_NCTF_1 AL24 VCC_AXM_NCTF_2 AL26 VCC_AXM_NCTF_3 AL28 VCC_AXM_NCTF_4 AM26 VCC_AXM_NCTF_5 AM28 VCC_AXM_NCTF_6 AM29 VCC_AXM_NCTF_7 AM31 VCC_AXM_NCTF_10 AP29 VCC_AXM_NCTF_11 AP31 VCC_AXM_NCTF_17 AR31 VCC_NCTF_34 Y33 VCC_NCTF_35 Y35 VCC_NCTF_36 Y36 VCC_NCTF_37 Y37 VSS_SCB1 A3 VSS_SCB2 B2 VSS_SCB3 C1 VSS_SCB4 BL1 VSS_SCB5 BL51 VSS_SCB6 A51 VCC_NCTF_26 AA33 VCC_NCTF_27 AA35 VCC_NCTF_28 AA36 VCC_NCTF_16 AJ35 VCC_NCTF_21 AD33 VSS_NCTF_13 AF35 VCC_NCTF_22 AJ36 VCC_AXM_3 AK29 VCC_AXM_NCTF_14 AL29 VCC_AXM_NCTF_15 AL31 VCC_AXM_NCTF_16 AL32 VSS_NCTF_15 AM17 VCC_AXM_NCTF_8 AM32 VCC_AXM_NCTF_9 AM33 VCC_NCTF_23 AM35 VSS_NCTF_18 AP28 VCC_AXM_NCTF_12 AP32 VCC_AXM_NCTF_13 AP33 VCC_AXM_NCTF_18 AR32 VCC_AXM_NCTF_19 AR33 VCC_AXM_2 AT31 VCC_AXM_1 AT33 VCC_NCTF_47 V32 C123 0.1U_0402_16V4Z 1 2 C138 1U_0603_10V4Z 1 2 POWER VCC CORE VCC SM VCC GFX VCC GFX NCTF VCC SM LF U3G CRESTLINE_1p0 VCC_5 AC32 VCC_6 AK32 VCC_7 AJ31 VCC_8 AJ28 VCC_9 AH32 VCC_10 AH31 VCC_11 AH29 VCC_12 AF32 VCC_2 AT34 VCC_4 AC31 VCC_SM_10 BA35 VCC_SM_20 BF33 VCC_SM_30 BJ34 VCC_SM_6 AW35 VCC_SM_7 AY35 VCC_SM_8 BA32 VCC_SM_9 BA33 VCC_SM_11 BB33 VCC_SM_12 BC32 VCC_SM_13 BC33 VCC_SM_14 BC35 VCC_SM_15 BD32 VCC_SM_16 BD35 VCC_SM_17 BE32 VCC_SM_18 BE33 VCC_SM_19 BE35 VCC_SM_2 AU33 VCC_SM_21 BF34 VCC_SM_22 BG32 VCC_SM_23 BG33 VCC_SM_24 BG35 VCC_SM_25 BH32 VCC_SM_26 BH34 VCC_SM_27 BH35 VCC_SM_28 BJ32 VCC_SM_29 BJ33 VCC_SM_3 AU35 VCC_SM_31 BK32 VCC_SM_32 BK33 VCC_SM_33 BK34 VCC_SM_34 BK35 VCC_AXG_NCTF_10 U17 VCC_AXG_NCTF_11 U19 VCC_AXG_NCTF_12 U20 VCC_AXG_NCTF_13 U21 VCC_AXG_NCTF_14 U23 VCC_AXG_NCTF_15 U26 VCC_AXG_NCTF_16 V16 VCC_AXG_NCTF_17 V17 VCC_AXG_NCTF_18 V19 VCC_AXG_NCTF_19 V20 VCC_AXG_NCTF_2 T18 VCC_AXG_NCTF_20 V21 VCC_AXG_NCTF_21 V23 VCC_AXG_NCTF_22 V24 VCC_AXG_NCTF_23 Y15 VCC_AXG_NCTF_24 Y16 VCC_AXG_NCTF_25 Y17 VCC_AXG_NCTF_26 Y19 VCC_AXG_NCTF_27 Y20 VCC_AXG_NCTF_28 Y21 VCC_AXG_NCTF_29 Y23 VCC_AXG_NCTF_3 T19 VCC_AXG_NCTF_30 Y24 VCC_AXG_NCTF_31 Y26 VCC_AXG_NCTF_32 Y28 VCC_AXG_NCTF_33 Y29 VCC_AXG_NCTF_34 AA16 VCC_AXG_NCTF_35 AA17 VCC_AXG_NCTF_36 AB16 VCC_AXG_NCTF_37 AB19 VCC_AXG_NCTF_38 AC16 VCC_AXG_NCTF_39 AC17 VCC_AXG_NCTF_4 T21 VCC_AXG_NCTF_40 AC19 VCC_AXG_NCTF_41 AD15 VCC_AXG_NCTF_42 AD16 VCC_AXG_NCTF_43 AD17 VCC_AXG_NCTF_44 AF16 VCC_AXG_NCTF_45 AF19 VCC_AXG_NCTF_46 AH15 VCC_AXG_NCTF_47 AH16 VCC_AXG_NCTF_48 AH17 VCC_AXG_NCTF_49 AH19 VCC_AXG_NCTF_5 T22 VCC_AXG_NCTF_50 AJ16 VCC_AXG_NCTF_51 AJ17 VCC_AXG_NCTF_52 AJ19 VCC_AXG_NCTF_53 AK16 VCC_AXG_NCTF_54 AK19 VCC_AXG_NCTF_55 AL16 VCC_AXG_NCTF_56 AL17 VCC_AXG_NCTF_57 AL19 VCC_AXG_NCTF_58 AL20 VCC_AXG_NCTF_59 AL21 VCC_AXG_NCTF_6 T23 VCC_AXG_NCTF_60 AL23 VCC_AXG_NCTF_61 AM15 VCC_AXG_NCTF_62 AM16 VCC_AXG_NCTF_63 AM19 VCC_AXG_NCTF_65 AM21 VCC_AXG_NCTF_66 AM23 VCC_AXG_NCTF_67 AP15 VCC_AXG_NCTF_68 AP16 VCC_AXG_NCTF_69 AP17 VCC_AXG_NCTF_7 T25 VCC_AXG_NCTF_70 AP19 VCC_AXG_NCTF_71 AP20 VCC_AXG_NCTF_72 AP21 VCC_AXG_NCTF_8 U15 VCC_AXG_NCTF_9 U16 VCC_SM_35 BL33 VCC_SM_4 AV33 VCC_SM_5 AW33 VCC_AXG_NCTF_1 T17 VCC_1 AT35 VCC_SM_1 AU32 VCC_AXG_1 R20 VCC_AXG_2 T14 VCC_AXG_3 W13 VCC_AXG_4 W14 VCC_AXG_5 Y12 VCC_AXG_6 AA20 VCC_AXG_7 AA23 VCC_AXG_8 AA26 VCC_AXG_9 AA28 VCC_AXG_10 AB21 VCC_AXG_11 AB24 VCC_AXG_12 AB29 VCC_AXG_13 AC20 VCC_AXG_14 AC21 VCC_AXG_15 AC23 VCC_AXG_16 AC24 VCC_AXG_17 AC26 VCC_AXG_18 AC28 VCC_AXG_19 AC29 VCC_AXG_20 AD20 VCC_AXG_21 AD23 VCC_AXG_22 AD24 VCC_AXG_23 AD28 VCC_AXG_24 AF21 VCC_AXG_25 AF26 VCC_AXG_27 AH20 VCC_AXG_28 AH21 VCC_AXG_29 AH23 VCC_AXG_30 AH24 VCC_AXG_NCTF_73 AP23 VCC_AXG_NCTF_74 AP24 VCC_AXG_NCTF_75 AR20 VCC_AXG_NCTF_76 AR21 VCC_AXG_NCTF_77 AR23 VCC_AXG_NCTF_78 AR24 VCC_AXG_NCTF_79 AR26 VCC_13 R30 VCC_AXG_31 AH26 VCC_AXG_33 AJ20 VCC_AXG_34 AN14 VCC_SM_LF1 AW45 VCC_SM_LF2 BC39 VCC_SM_LF3 BE39 VCC_SM_LF4 BD17 VCC_SM_LF5 BD4 VCC_SM_LF6 AW8 VCC_SM_LF7 AT6 VCC_AXG_26 AA31 VCC_AXG_32 AD31 VCC_3 AH28 VCC_AXG_NCTF_64 AM20 VCC_SM_36 AU30 VCC_AXG_NCTF_80 V26 VCC_AXG_NCTF_81 V28 VCC_AXG_NCTF_82 V29 VCC_AXG_NCTF_83 Y31 C130 0.1U_0402_16V4Z 1 2 C1510.47U_0603_10V7K 1 2 C1480.1U_0402_16V4Z 1 2 C124 0.22U_0603_10V7K 1 2 R82 0_0603_5% 1 2 C139 10U_0805_10V4Z 1 2 C128 0.22U_0402_10V4Z 1 2 + C137 220U_6.3V_M 1 2 C1521U_0603_10V4Z 1 2 C144 0.1U_0402_16V4Z 1 2 C127 10U_0805_10V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRESTLINE((6/6)-PWR/GND Custom 12 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. VSS U3J CRESTLINE_1p0 VSS_199 C46 VSS_200 C50 VSS_201 C7 VSS_202 D13 VSS_203 D24 VSS_204 D3 VSS_205 D32 VSS_206 D39 VSS_207 D45 VSS_208 D49 VSS_209 E10 VSS_210 E16 VSS_211 E24 VSS_212 E28 VSS_213 E32 VSS_214 E47 VSS_215 F19 VSS_216 F36 VSS_217 F4 VSS_218 F40 VSS_219 F50 VSS_220 G1 VSS_221 G13 VSS_222 G16 VSS_223 G19 VSS_224 G24 VSS_225 G28 VSS_226 G29 VSS_227 G33 VSS_228 G42 VSS_229 G45 VSS_230 G48 VSS_231 G8 VSS_232 H24 VSS_233 H28 VSS_234 H4 VSS_235 H45 VSS_236 J11 VSS_237 J16 VSS_238 J2 VSS_239 J24 VSS_240 J28 VSS_241 J33 VSS_242 J35 VSS_243 J39 VSS_245 K12 VSS_246 K47 VSS_247 K8 VSS_248 L1 VSS_249 L17 VSS_250 L20 VSS_251 L24 VSS_252 L28 VSS_253 L3 VSS_254 L33 VSS_255 L49 VSS_256 M28 VSS_257 M42 VSS_258 M46 VSS_259 M49 VSS_260 M5 VSS_261 M50 VSS_262 M9 VSS_263 N11 VSS_264 N14 VSS_265 N17 VSS_266 N29 VSS_267 N32 VSS_268 N36 VSS_269 N39 VSS_270 N44 VSS_271 N49 VSS_272 N7 VSS_273 P19 VSS_274 P2 VSS_275 P23 VSS_276 P3 VSS_277 P50 VSS_278 R49 VSS_279 T39 VSS_280 T43 VSS_281 T47 VSS_282 U41 VSS_283 U45 VSS_284 U50 VSS_287 W11 VSS_288 W39 VSS_289 W43 VSS_290 W47 VSS_291 W5 VSS_292 W7 VSS_293 Y13 VSS_294 Y2 VSS_295 Y41 VSS_285 V2 VSS_286 V3 VSS_296 Y45 VSS_297 Y49 VSS_298 Y5 VSS_299 Y50 VSS_300 Y11 VSS_301 P29 VSS_302 T29 VSS_303 T31 VSS_304 T33 VSS_305 R28 VSS_306 AA32 VSS_307 AB32 VSS_308 AD32 VSS_309 AF28 VSS_310 AF29 VSS_311 AT27 VSS_312 AV25 VSS_313 H50 VSS U3I CRESTLINE_1p0 VSS_1 A13 VSS_198 C41 VSS_2 A15 VSS_3 A17 VSS_4 A24 VSS_5 AA21 VSS_6 AA24 VSS_7 AA29 VSS_8 AB20 VSS_9 AB23 VSS_10 AB26 VSS_11 AB28 VSS_12 AB31 VSS_13 AC10 VSS_14 AC13 VSS_15 AC3 VSS_16 AC39 VSS_17 AC43 VSS_19 AD1 VSS_20 AD21 VSS_21 AD26 VSS_22 AD29 VSS_23 AD3 VSS_24 AD41 VSS_25 AD45 VSS_26 AD49 VSS_27 AD5 VSS_28 AD50 VSS_29 AD8 VSS_30 AE10 VSS_31 AE14 VSS_32 AE6 VSS_33 AF20 VSS_34 AF23 VSS_35 AF24 VSS_36 AF31 VSS_37 AG2 VSS_38 AG38 VSS_39 AG43 VSS_40 AG47 VSS_41 AG50 VSS_42 AH3 VSS_43 AH40 VSS_44 AH41 VSS_45 AH7 VSS_46 AH9 VSS_47 AJ11 VSS_48 AJ13 VSS_49 AJ21 VSS_50 AJ24 VSS_51 AJ29 VSS_52 AJ32 VSS_53 AJ43 VSS_54 AJ45 VSS_55 AJ49 VSS_56 AK20 VSS_57 AK21 VSS_58 AK26 VSS_59 AK28 VSS_60 AK31 VSS_61 AK51 VSS_62 AL1 VSS_63 AM11 VSS_64 AM13 VSS_65 AM3 VSS_66 AM4 VSS_67 AM41 VSS_68 AM45 VSS_69 AN1 VSS_70 AN38 VSS_71 AN39 VSS_72 AN43 VSS_73 AN5 VSS_74 AN7 VSS_75 AP4 VSS_76 AP48 VSS_77 AP50 VSS_78 AR11 VSS_79 AR2 VSS_80 AR39 VSS_81 AR44 VSS_82 AR47 VSS_83 AR7 VSS_84 AT10 VSS_85 AT14 VSS_86 AT41 VSS_87 AT49 VSS_97 AW1 VSS_100 AW24 VSS_101 AW29 VSS_102 AW32 VSS_103 AW5 VSS_104 AW7 VSS_105 AY10 VSS_106 AY24 VSS_107 AY37 VSS_108 AY42 VSS_109 AY43 VSS_110 AY45 VSS_111 AY47 VSS_112 AY50 VSS_113 B10 VSS_114 B20 VSS_115 B24 VSS_116 B29 VSS_117 B30 VSS_118 B35 VSS_119 B38 VSS_120 B43 VSS_121 B46 VSS_122 B5 VSS_123 B8 VSS_124 BA1 VSS_125 BA17 VSS_126 BA18 VSS_127 BA2 VSS_128 BA24 VSS_129 BB12 VSS_130 BB25 VSS_131 BB40 VSS_132 BB44 VSS_133 BB49 VSS_134 BB8 VSS_135 BC16 VSS_136 BC24 VSS_137 BC25 VSS_138 BC36 VSS_139 BC40 VSS_140 BC51 VSS_141 BD13 VSS_142 BD2 VSS_143 BD28 VSS_144 BD45 VSS_145 BD48 VSS_146 BD5 VSS_147 BE1 VSS_148 BE19 VSS_149 BE23 VSS_150 BE30 VSS_151 BE42 VSS_152 BE51 VSS_153 BE8 VSS_154 BF12 VSS_155 BF16 VSS_156 BF36 VSS_157 BG19 VSS_158 BG2 VSS_159 BG24 VSS_160 BG29 VSS_161 BG39 VSS_162 BG48 VSS_163 BG5 VSS_164 BG51 VSS_165 BH17 VSS_166 BH30 VSS_167 BH44 VSS_168 BH46 VSS_169 BH8 VSS_170 BJ11 VSS_171 BJ13 VSS_172 BJ38 VSS_173 BJ4 VSS_174 BJ42 VSS_175 BJ46 VSS_176 BK15 VSS_177 BK17 VSS_178 BK25 VSS_179 BK29 VSS_88 AU1 VSS_89 AU23 VSS_90 AU29 VSS_91 AU3 VSS_92 AU36 VSS_93 AU49 VSS_94 AU51 VSS_95 AV39 VSS_96 AV48 VSS_99 AW16 VSS_98 AW12 VSS_180 BK36 VSS_182 BK44 VSS_184 BK8 VSS_186 BL13 VSS_188 BL22 VSS_18 AC47 VSS_191 C12 VSS_193 C19 VSS_195 C29 VSS_197 C36 VSS_181 BK40 VSS_183 BK6 VSS_185 BL11 VSS_187 BL19 VSS_189 BL37 VSS_190 BL47 VSS_192 C16 VSS_194 C28 VSS_196 C33 5 5 4 4 3 3 2 2 1 1 D D C C B B A A V_DDR_MCH_REF M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR#0 M_CLK_DDR#1 DDR_CKE1_DIMMA DDR_CS0_DIMMA# DDR_A_MA1 DDR_A_MA10 DDR_A_MA3 DDR_A_MA9 DDR_A_MA7 DDR_A_MA12 DDR_A_MA5 DDR_A_WE# DDR_A_D8 DDR_A_D17 DDR_A_D16 DDR_A_D27 DDR_A_D26 DDR_A_DQS1 DDR_A_DQS0 DDR_A_DQS2 DDR_A_DM3 DDR_A_DM1 DDR_A_DM2 DDR_A_DM0 DDR_A_DQS4 DDR_A_DQS6 DDR_A_DQS7 DDR_CKE0_DIMMA DDR_A_MA8 DDR_CS1_DIMMA# DDR_A_MA11 DDR_A_MA2 DDR_A_MA0 DDR_A_MA4 DDR_A_MA6 DDR_A_CAS# DDR_A_BS1 DDR_A_RAS# DDR_A_D20 DDR_A_D21 DDR_A_D53 DDR_A_D52 DDR_A_D55 DDR_A_DM6 DDR_A_DM4 DDR_A_DM5 DDR_A_DM7 DDR_A_MA13 DDR_A_DQS5 DDR_A_BS0 DDR_A_BS2 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 M_ODT1 M_ODT0 DDR_A_D51 DDR_A_D54 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D42 DDR_A_D35 DDR_A_D22 DDR_A_D23 DDR_A_D12 DDR_A_D13 DDR_A_D15 DDR_A_D10 DDR_A_D9 DDR_A_D11 DDR_A_D14 DDR_A_D0 DDR_A_D1 DDR_A_D3 DDR_A_D2 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D18 DDR_A_D19 DDR_A_D31 DDR_A_D30 DDR_A_D28 DDR_A_D29 DDR_A_D25 DDR_A_D24 DDR_A_D36 DDR_A_D32 DDR_A_D37 DDR_A_D33 DDR_A_D39 DDR_A_D38 DDR_A_D34 DDR_A_D44 DDR_A_D40 DDR_A_D45 DDR_A_D41 DDR_A_D43 DDR_A_D46 DDR_A_D47 DDR_A_D60 DDR_A_D61 DDR_A_D57 DDR_A_D56 DDR_A_D58 DDR_A_D63 DDR_A_D59 DDR_A_D62 DDR_A_MA14 DDR_CKE1_DIMMA DDR_A_MA0 DDR_A_MA4 DDR_A_BS1 DDR_A_MA6 DDR_A_MA2 DDR_A_RAS# DDR_CS0_DIMMA# M_ODT1 DDR_CS1_DIMMA# M_ODT0 DDR_A_MA13 DDR_A_MA7 DDR_A_MA14 DDR_A_MA11 CLK_SMBDATA CLK_SMBCLK DDR_A_CAS# DDR_A_WE# DDR_A_BS0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3 DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12 DDR_A_BS2 DDR_CKE0_DIMMA DDR_A_DQS#[0..7]8 DDR_A_DQS[0..7]8 DDR_A_D[0..63]8 DDR_A_DM[0..7]8 DDR_A_MA[0..14]7,8 DDR_CKE0_DIMMA7 DDR_A_BS28 DDR_A_BS08 DDR_A_WE#8 DDR_A_CAS#8 M_ODT17 DDR_CS1_DIMMA#7 M_CLK_DDR0 7 M_CLK_DDR#0 7 DDR_CKE1_DIMMA 7 DDR_A_BS1 8 DDR_A_RAS#8 DDR_CS0_DIMMA#7 M_CLK_DDR#1 7 M_ODT0 7 V_DDR_MCH_REF 7,14,35 M_CLK_DDR1 7 PM_EXTTS#0 7 CLK_SMBCLK14,15 CLK_SMBDATA14,15 +1.8V +3VS +1.8V +1.8V +0.9V +0.9V Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 DDRII-SODIMM SLOT1 Custom 13 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Layout Note: Place these resistor closely JP34,all trace length Max=1.5" Layout Note: Pl ace near JP34 Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS SO-DIMM A SP07F001720 S SOCKET FOXCONN AS0A426-N4RN-7F DR2R H4 FOX_AS0A426-M4R-TR_200P C174 0.1U_0402_16V4Z 1 2 C168 0.1U_0402_16V4Z 1 2 C167 0.1U_0402_16V4Z 1 2 C162 0.1U_0402_16V4Z 1 2 RP3 56_0404_4P2R_5% 1 4 2 3 RP7 56_0404_4P2R_5% 1 4 2 3 R84 10K_0402_5% 1 2 RP10 56_0404_4P2R_5% 1 4 2 3 C171 0.1U_0402_16V4Z 1 2 RP6 56_0404_4P2R_5% 1 4 2 3 RP11 56_0404_4P2R_5% 1 4 2 3 RP5 56_0404_4P2R_5% 1 4 2 3 C158 2.2U_0805_16V4Z 1 2 C176 0.1U_0402_16V4Z 1 2 C166 0.1U_0402_16V4Z 1 2 RP12 56_0404_4P2R_5% 1 4 2 3 C161 2.2U_0805_16V4Z 1 2 C155 0.1U_0402_16V4Z 1 2 C157 2.2U_0805_16V4Z 1 2 C443 0.1U_0402_16V4Z 1 2 C180 0.1U_0402_16V4Z 1 2 RP8 56_0404_4P2R_5% 1 4 2 3 C163 0.1U_0402_16V4Z 1 2 C159 2.2U_0805_16V4Z 1 2 C178 0.1U_0402_16V4Z 1 2 C169 0.1U_0402_16V4Z 1 2 JP4 FOX_ASOA426-M4R-TR CONN@ VREF 1 VSS 3 DQ0 5 DQ1 7 VSS 9 DQS0# 11 DQS0 13 VSS 15 DQ2 17 DQ3 19 VSS 21 DQ8 23 DQ9 25 VSS 27 DQS1# 29 DQS1 31 VSS 33 DQ10 35 DQ11 37 VSS 39 VSS 41 DQ16 43 DQ17 45 VSS 47 DQS2# 49 DQS2 51 VSS 53 DQ18 55 DQ19 57 VSS 59 DQ24 61 DQ25 63 VSS 65 DM3 67 NC 69 VSS 71 DQ26 73 DQ27 75 VSS 77 CKE0 79 VDD 81 NC 83 BA2 85 VDD 87 A12 89 A9 91 A8 93 VDD 95 A5 97 A3 99 A1 101 VDD 103 A10/AP 105 BA0 107 WE# 109 VDD 111 CAS# 113 NC/S1# 115 VDD 117 NC/ODT1 119 VSS 121 DQ32 123 DQ33 125 VSS 127 DQS4# 129 DQS4 131 VSS 133 DQ34 135 DQ35 137 VSS 139 DQ40 141 DQ41 143 VSS 2 DQ4 4 DQ5 6 VSS 8 DM0 10 VSS 12 DQ6 14 DQ7 16 VSS 18 DQ12 20 DQ13 22 VSS 24 DM1 26 VSS 28 CK0 30 CK0# 32 VSS 34 DQ14 36 DQ15 38 VSS 40 VSS 42 DQ20 44 DQ21 46 VSS 48 NC 50 DM2 52 VSS 54 DQ22 56 DQ23 58 VSS 60 DQ28 62 DQ29 64 VSS 66 DQS3# 68 DQS3 70 VSS 72 DQ30 74 DQ31 76 VSS 78 NC/CKE1 80 VDD 82 NC/A15 84 NC/A14 86 VDD 88 A11 90 A7 92 A6 94 VDD 96 A4 98 A2 100 A0 102 VDD 104 BA1 106 RAS# 108 S0# 110 VDD 112 ODT0 114 NC/A13 116 VDD 118 NC 120 VSS 122 DQ36 124 DQ37 126 VSS 128 DM4 130 VSS 132 DQ38 134 DQ39 136 VSS 138 DQ44 140 DQ45 142 VSS 144 VSS 145 DM5 147 VSS 149 DQ42 151 DQ43 153 VSS 155 DQ48 157 DQ49 159 VSS 161 NC,TEST 163 VSS 165 DQS6# 167 DQS6 169 VSS 171 DQ50 173 DQ51 175 VSS 177 DQ56 179 DQ57 181 VSS 183 DM7 185 VSS 187 DQ58 189 DQ59 191 VSS 193 SDA 195 SCL 197 VDDSPD 199 DQS5# 146 DQS5 148 VSS 150 DQ46 152 DQ47 154 VSS 156 DQ52 158 DQ53 160 VSS 162 CK1 164 CK1# 166 VSS 168 DM6 170 VSS 172 DQ54 174 DQ55 176 VSS 178 DQ60 180 DQ61 182 VSS 184 DQS7# 186 DQS7 188 VSS 190 DQ62 192 DQ63 194 VSS 196 SAO 198 SA1 200 GND 203 GND 204 + C156 220U_6.3V_M 1 2 C444 0.1U_0402_16V4Z 1 2 C172 0.1U_0402_16V4Z 1 2 RP2 56_0404_4P2R_5% 1 4 2 3 C173 0.1U_0402_16V4Z 1 2 RP1 56_0404_4P2R_5% 1 4 2 3 C177 0.1U_0402_16V4Z 1 2 C160 2.2U_0805_16V4Z 1 2 RP4 56_0404_4P2R_5% 1 4 2 3 RP9 56_0404_4P2R_5% 1 4 2 3 C179 2.2U_0805_16V4Z 1 2 RP13 56_0404_4P2R_5% 1 4 2 3 C175 0.1U_0402_16V4Z 1 2 R85 56_0402_5% 1 2 R83 10K_0402_5% 1 2 C154 2.2U_0805_16V4Z 1 2 C165 0.1U_0402_16V4Z @ 1 2 C164 0.1U_0402_16V4Z @ 1 2 C170 0.1U_0402_16V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A DDR_B_DQS#4 DDR_B_D14 DDR_B_DQS4 DDR_B_BS2 DDR_B_MA2 DDR_CKE2_DIMMB DDR_B_D8 DDR_B_DM3 CLK_SMBDATA DDR_B_D53 DDR_B_D45 DDR_B_MA3 DDR_B_D32 DDR_B_D40 DDR_B_D6 DDR_B_MA7 DDR_B_D13 DDR_B_D1 DDR_B_DQS#0 DDR_CS3_DIMMB# M_ODT3 DDR_B_MA11 DDR_B_D47 DDR_B_WE# DDR_B_D7 DDR_B_D11 DDR_B_MA10 DDR_B_D55 DDR_B_D34 DDR_B_D41 DDR_B_DQS5 M_ODT2 DDR_B_DQS2 DDR_B_DQS#7 DDR_B_MA6 DDR_B_D9 DDR_B_D44 DDR_B_D63 DDR_B_DM7 DDR_B_BS0 DDR_B_MA5 DDR_B_D60 DDR_B_DQS#3 DDR_B_D10 DDR_B_D12 DDR_B_D18 DDR_B_D48 DDR_B_D33 DDR_B_DQS7 DDR_B_D42 DDR_B_D36 DDR_CKE3_DIMMB DDR_B_DQS0 DDR_B_D46 DDR_B_MA1 DDR_B_MA8 DDR_B_DQS#2 DDR_B_DQS#5 DDR_B_MA12 DDR_B_DQS3 DDR_B_RAS# DDR_B_MA4 DDR_B_DM5 DDR_B_D35 CLK_SMBCLK DDR_B_D43 DDR_B_D2 DDR_B_MA13 DDR_B_D37 DDR_B_DQS1 DDR_B_BS1 DDR_B_D62 DDR_B_DQS#6 DDR_B_D54 DDR_B_DM4 DDR_B_DQS6 DDR_B_DQS#1 DDR_B_D52 DDR_B_MA9 DDR_B_MA0 DDR_B_D3 DDR_B_D15 DDR_B_CAS# DDR_B_D19 DDR_CS2_DIMMB# DDR_B_DM0 DDR_B_DM1 DDR_B_D0 DDR_B_DM6 DDR_B_D56 DDR_B_D49 DDR_B_DM2 DDR_B_D50 DDR_B_D51 DDR_B_D38 DDR_B_D39 DDR_B_D31 DDR_B_D30 DDR_B_D27 DDR_B_D28 DDR_B_D20 DDR_B_D21 DDR_B_D17 DDR_B_D16 M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3 DDR_B_D5 DDR_B_D4 DDR_B_D23 DDR_B_D22 DDR_B_D26 DDR_B_D24 DDR_B_D25 DDR_B_D29 DDR_B_D61 DDR_B_D57 DDR_B_D58 DDR_B_D59 V_DDR_MCH_REF M_ODT3 DDR_CS3_DIMMB# M_ODT2 DDR_B_MA13 DDR_B_WE# DDR_B_MA14 DDR_B_MA4 DDR_B_MA7 DDR_B_MA9 DDR_B_MA2 DDR_B_MA11 DDR_B_MA5 DDR_B_MA12 DDR_B_MA6 DDR_B_MA8 DDR_B_MA1 DDR_B_BS0 DDR_B_CAS# DDR_B_MA0 DDR_B_RAS# DDR_B_MA3 DDR_B_MA10 DDR_B_BS2 DDR_CS2_DIMMB# DDR_B_BS1 DDR_CKE2_DIMMB DDR_B_MA14 DDR_CKE3_DIMMB DDR_B_DQS#[0..7]8 DDR_B_DQS[0..7]8 DDR_B_D[0..63]8 DDR_B_MA[0..14]7,8 DDR_B_DM[0..7]8 DDR_CKE3_DIMMB 7 DDR_CS2_DIMMB#7 V_DDR_MCH_REF 7,13,35 CLK_SMBCLK13,15 CLK_SMBDATA13,15 DDR_B_WE#8 DDR_B_BS1 8 DDR_B_RAS#8 DDR_B_CAS#8 M_ODT37 DDR_CKE2_DIMMB7 DDR_CS3_DIMMB#7 DDR_B_BS28 DDR_B_BS08 M_ODT2 7 M_CLK_DDR2 7 M_CLK_DDR#2 7 M_CLK_DDR3 7 M_CLK_DDR#3 7 PM_EXTTS#1 7 +1.8V +3VS +3VS +1.8V +1.8V +0.9V +0.9V Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 DDRII-SODIMM SLOT2 14 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. SO-DIMM B Layout Note: Pl ace near JP10 Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS Layout Note: Place these resistor closely JP10,all trace length Max=1.5" SP07000BZ00 S SOCKET FOXCON AS0A426-N8RN-7F H8 DDR2R FOX_AS0A426-N8RN-7F_200P RP22 56_0404_4P2R_5% 1 4 2 3 C199 0.1U_0402_16V4Z 1 2 C184 2.2U_0805_16V4Z 1 2 C203 0.1U_0402_16V4Z 1 2 C201 0.1U_0402_16V4Z 1 2 RP24 56_0404_4P2R_5% 1 4 2 3 C198 0.1U_0402_16V4Z 1 2 RP19 56_0404_4P2R_5% 1 4 2 3 C194 0.1U_0402_16V4Z 1 2 C204 0.1U_0402_16V4Z 1 2 C185 2.2U_0805_16V4Z 1 2 RP21 56_0404_4P2R_5% 1 4 2 3 C183 2.2U_0805_16V4Z 1 2 R87 10K_0402_5% 1 2 RP16 56_0404_4P2R_5% 1 4 2 3 C195 0.1U_0402_16V4Z 1 2 C182 0.1U_0402_16V4Z 1 2 C181 2.2U_0805_16V4Z 1 2 C188 0.1U_0402_16V4Z 1 2 C200 0.1U_0402_16V4Z 1 2 C192 0.1U_0402_16V4Z 1 2 RP20 56_0404_4P2R_5% 1 4 2 3 RP26 56_0404_4P2R_5% 1 4 2 3 RP14 56_0404_4P2R_5% 1 4 2 3 C190 0.1U_0402_16V4Z 1 2 C197 0.1U_0402_16V4Z 1 2 C193 0.1U_0402_16V4Z 1 2 R88 56_0402_5% 1 2 JP5 FOX_AS0A426-N8RN-7F CONN@ VREF 1 VSS 3 DQ0 5 DQ1 7 VSS 9 DQS0# 11 DQS0 13 VSS 15 DQ2 17 DQ3 19 VSS 21 DQ8 23 DQ9 25 VSS 27 DQS1# 29 DQS1 31 VSS 33 DQ10 35 DQ11 37 VSS 39 VSS 41 DQ16 43 DQ17 45 VSS 47 DQS2# 49 DQS2 51 VSS 53 DQ18 55 DQ19 57 VSS 59 DQ24 61 DQ25 63 VSS 65 DM3 67 NC 69 VSS 71 DQ26 73 DQ27 75 VSS 77 CKE0 79 VDD 81 NC 83 BA2 85 VDD 87 A12 89 A9 91 A8 93 VDD 95 A5 97 A3 99 A1 101 VDD 103 A10/AP 105 BA0 107 WE# 109 VDD 111 CAS# 113 NC/S1# 115 VDD 117 NC/ODT1 119 VSS 121 DQ32 123 DQ33 125 VSS 127 DQS4# 129 DQS4 131 VSS 133 DQ34 135 DQ35 137 VSS 139 DQ40 141 DQ41 143 VSS 145 DM5 147 VSS 149 DQ42 151 DQ43 153 VSS 155 DQ48 157 DQ49 159 VSS 161 NC,TEST 163 VSS 165 DQS6# 167 DQS6 169 VSS 171 DQ50 173 DQ51 175 VSS 177 DQ56 179 DQ57 181 VSS 183 DM7 185 VSS 187 DQ58 189 DQ59 191 VSS 193 SDA 195 SCL 197 VDDSPD 199 VSS 2 DQ4 4 DQ5 6 VSS 8 DM0 10 VSS 12 DQ6 14 DQ7 16 VSS 18 DQ12 20 DQ13 22 VSS 24 DM1 26 VSS 28 CK0 30 CK0# 32 VSS 34 DQ14 36 DQ15 38 VSS 40 VSS 42 DQ20 44 DQ21 46 VSS 48 NC 50 DM2 52 VSS 54 DQ22 56 DQ23 58 VSS 60 DQ28 62 DQ29 64 VSS 66 DQS3# 68 DQS3 70 VSS 72 DQ30 74 DQ31 76 VSS 78 NC/CKE1 80 VDD 82 NC/A15 84 NC/A14 86 VDD 88 A11 90 A7 92 A6 94 VDD 96 A4 98 A2 100 A0 102 VDD 104 BA1 106 RAS# 108 S0# 110 VDD 112 ODT0 114 NC/A13 116 VDD 118 NC 120 VSS 122 DQ36 124 DQ37 126 VSS 128 DM4 130 VSS 132 DQ38 134 DQ39 136 VSS 138 DQ44 140 DQ45 142 VSS 144 DQS5# 146 DQS5 148 VSS 150 DQ46 152 DQ47 154 VSS 156 DQ52 158 DQ53 160 VSS 162 CK1 164 CK1# 166 VSS 168 DM6 170 VSS 172 DQ54 174 DQ55 176 VSS 178 DQ60 180 DQ61 182 VSS 184 DQS7# 186 DQS7 188 VSS 190 DQ62 192 DQ63 194 VSS 196 SA0 198 SA1 200 GND 201 GND 202 R86 10K_0402_5% 1 2 C187 2.2U_0805_16V4Z 1 2 RP15 56_0404_4P2R_5% 1 4 2 3 C202 0.1U_0402_16V4Z 1 2 C186 2.2U_0805_16V4Z 1 2 RP25 56_0404_4P2R_5% 1 4 2 3 C196 0.1U_0402_16V4Z 1 2 C206 0.1U_0402_16V4Z 1 2 C189 0.1U_0402_16V4Z 1 2 C191 0.1U_0402_16V4Z 1 2 C205 2.2U_0805_16V4Z 1 2 RP23 56_0404_4P2R_5% 1 4 2 3 RP17 56_0404_4P2R_5% 1 4 2 3 RP18 56_0404_4P2R_5% 1 4 2 3 5 5 4 4 3 3 2 2 1 1 D D C C B B A A FSA SSCDREFCLK R_MCH_DREFCLK R_MCH_DREFCLK# CLK_SMBCLK CLK_SMBDATA FSB FSA R_CPU_BCLK R_CPU_BCLK# R_MCH_BCLK R_MCH_BCLK# FSC PCI_CLK1 27_SEL SSCDREFCLK# CLK_48M_ICH CLK_14M_ICH CLK_PCI_ICH CLK_DEBUG_PORT CLK_SMBDATA CLK_SMBCLK PCI_LANCLK PCI2_TME CLK_DEBUG_PORT CLK_XTAL_OUT CLK_XTAL_IN ITP_EN 27_SEL PCI2_TME FSC FSB CLK_PCI_LAN CLK_PCI_EC ITP_EN R_PCIE_ICH R_PCIE_ICH# R_MCH_3GPLL R_MCH_3GPLL# R_CLK_PCIE_MCard R_CLK_PCIE_MCard# R_CLKREQ#_G R_PCIE_SATA R_PCIE_SATA# PCI2_TME CLK_LPC_DEBUG CLK_DEBUG_PORT CPU_BSEL05 MCH_CLKSEL0 7 H_STP_PCI#20 H_STP_CPU#20 CLK_SMBCLK 13,14 CLK_CPU_BCLK#4 CLK_CPU_BCLK 4 CLK_MCH_BCLK#7 CLK_MCH_BCLK 7 CLK_SMBDATA 13,14 CLK_14M_ICH20 CLK_48M_ICH20 VGATE 20,37 CLKREQ#_B7 CLKSATAREQ#20 CLK_PCI_EC30 MCH_SSCDREFCLK 7 MCH_SSCDREFCLK#7 CLK_MCH_DREFCLK 7 CLK_MCH_DREFCLK#7 ICH_SMBDATA20,22 ICH_SMBCLK20,22 CLK_PCI_LAN23 CPU_BSEL25 MCH_CLKSEL2 7 CPU_BSEL15 MCH_CLKSEL1 7 CLK_PCIE_ICH 20 CLK_PCIE_ICH#20 CLK_MCH_3GPLL 7 CLK_MCH_3GPLL#7 CLK_PCIE_MCARD#22 CLK_PCIE_MCARD 22 MINI_CLKREQ#22 CLK_ENABLE 30 CK_PWRGD 20 CLK_PCI_ICH18 CLK_PCIE_SATA 19 CLK_PCIE_SATA#19 CLK_14M_DEBUG30 CLK_LPC_DEBUG30 CLK_DEBUG_PORT_L22,29 +VCCP +3VS_CK505 +3VS_CK505 +3VS +1.25VS_CK505 +1.25VS +1.25VS_CK505 +1.25VS_CK505 +3VS +3VS +3VS +3VS +3VS +VCCP +VCCP +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Clock generator 15 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. CLKSEL1 PCI MHz SRC MHz CPU MHz CLKSEL2 FSLA CLKSEL0 FSLC FSLB Place close to U4 1= Enable SRC0 & 27MHz For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# For 27_SEL, 0 = Enable DOT96 & SRC1, For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed SB, MINI PCI 100 1 0 100 1 200 33.30 33.30 1661 0 1 1000 133 33.3 Routing the trace at least 10mil 1 = Overclocking of CPU and SRC NOT allowed R1086 R1107 R1098 R1113 R1135 R1139 R1128 R1128 Stuff Stuff No Stuff No Stuff 667MHz CPU Driven No Stuff Stuff 800MHz * (Default) R1107 R1135 R1083 R1074 R1086 R1098 R1113 R1139 R1083 R1128 R1098 R1074R1086 R1107 R1113 R1139 R1135R1135 R1139 R1083 R1074 FSB Frequency Selet: CLRP4,CLRP5 for 667/800 FSB select SHORT CLRP5, NO SHORT CLRP4 -- CPU option SHORT CLRP4, NO SHORT CLRP5 -- FSB 667 For Layout request: 1. Change MINI_CLKREQ# from pin 32 to pin 43. 2. Change CLK_PCIE_MCARD from SRC9 to SRC6. 1015_Change CLRP1 and CLRP2 type like the same as PJP4. R132 0_0402_5% 1 2 R10939_0402_5% 1 2 R129 0_0402_5% @ 1 2 R130 0_0402_5% 1 2 R11739_0402_5% 1 2 R128 0_0402_5% 1 2 R119 0_0402_5% 1 2 R131 0_0402_5% 1 2 R412 0_0402_5% @ 1 2 R12033_0402_1% 1 2 C213 0.1U_0402_16V4Z 1 2 R93 56_0402_5% 1 2 R113 0_0402_5% 1 2 C222 4.7P_0402_50V8C@ 1 2 C441 39P_0402_50V8J 1 2 R137 0_0402_5%@ 1 2 R97 2.2K_0402_5% 1 2 C215 0.1U_0402_16V4Z 1 2 R140 10K_0402_5% @ 1 2 R138 10K_0402_5% @ 1 2 R111 1K_0402_5%@ 1 2 CLRP2 PAD-OPEN 2x2m 2 1 C227 4.7P_0402_50V8C@ 1 2 Y1 14.31818MHZ_16P 1 2 R116 0_0402_5% @ 1 2 C214 10U_0805_10V4Z 1 2 R103475_0402_1% 1 2 R126 0_0402_5% 1 2 R110 10K_0402_5% 1 2 G D S Q4 2N7002_SOT23-3 2 1 3 R99 0_0402_5% 1 2 R10739_0402_5% 1 2 R92 FBMA-L11-201209-221LMA30T_0805 1 2 R134 10K_0402_5% 1 2 R124 10K_0402_5% 1 2 C220 5P_0402_50V8C@ 1 2 G D S Q3 2N7002_SOT23-3 2 1 3 R98 1K_0402_5% 1 2 R344 0_0402_5% 1 2 R10539_0402_5% 1 2 R121 1K_0402_5%@ 1 2 R123 0_0402_5% 1 2 CLRP1 PAD-OPEN 2x2m 2 1 R122 0_0402_5% 1 2 C212 0.1U_0402_16V4Z 1 2 C208 0.1U_0402_16V4Z 1 2 C216 680P_0402_50V7K 1 2 R104475_0402_1% 1 2 R108 475_0402_1% 1 2 R90 2.2K_0402_5% C218 680P_0402_50V7K 1 2 R10639_0402_5% 1 2 R115 0_0402_5% 1 2 C211 680P_0402_50V7K 1 2 C221 4.7P_0402_50V8C@ 1 2 R89 FBMA-L11-201209-221LMA30T_0805 1 2 R96 0_0402_5% 1 2 C219 0.1U_0402_16V4Z 1 2 R139 10K_0402_5% 1 2 R367 0_0402_5%@ 1 2 R118 0_0402_5% 1 2 R40033_0402_1% @ 1 2 C210 0.1U_0402_16V4Z 1 2 C207 10U_0805_10V4Z 1 2 * Internal Pull-Up Resistor ** Internal Pull-Down Resistor U4 ICS9LPRS355_TSSOP64 X1 60 X2 59 USB_48MHZ/FSLA 10 GND 19 VDDPLL3 16 PCI1/CR#_B 3 FSLB/TEST MODE 57 PCI3 5 VDDSRC_IO 26 SDATA 63 GND48 11 VDD48 9 PCI2/TME 4 SRC6 41 SRC7#/CR#_E 43 PCI_STOP# 38 GNDSRC 23 GNDCPU 52 SRC7/CR#_F 44 SRC9# 31 SRC8#/ITP# 46 SRC8/ITP 47 SRC10# 35 CPU0 54 PCI0/CR#_A 1 PCI4/27_Select 6 VDDSRC_IO 36 VDDPLL3_IO 20 VDD96_IO 12 VDD_PCI 2 GNDSRC 42 GND 15 SCLK 64 NC 48 GNDPCI 8 CPU_STOP# 37 PCIF5/ITP_EN 7 SRC9 30 CPU1#_F 50 SRC11#/CR#_G 32 SRC11/CR#_H 33 REF0/FSLC/TEST_SEL 62 CPU0# 53 CPU1_F 51 VDDREF 61 GNDREF 58 VDDSRC_IO 45 SRC10 34 VDDCPU_IO 49 SRC4# 28 SRC1/SE1/27MHz_NonSS 17 SRC2/SATA 21 SRC2#/SATA# 22 VDDCPU 55 GNDSRC 29 SRC1#/SE2/27MHz_SS 18 SRC0/DOT96 13 SRC3/CR#_C 24 SRC3#/CR#_D 25 SRC6# 40 SRC4 27 VDDSRC 39 SRC0/DOT96# 14 CK_PWRGD/PD# 56 C231 18P_0402_50V8J 1 2 C229 5P_0402_50V8C@ 1 2 R102 1K_0402_5%@ 1 2 C225 4.7P_0402_50V8C@ 1 2 R136 10K_0402_5% 1 2 R133 0_0402_5% 1 2 C230 18P_0402_50V8J 1 2 R125 1K_0402_5% 1 2 R95 0_0402_5% 1 2 R114 1K_0402_5% 1 2 R135 10K_0402_5% @ 1 2 PJP9 SHORT PAD 1 2 R94 0_0402_5% 1 2 C217 10U_0805_10V4Z 1 2 R127 0_0402_5% 1 2 R91 2.2K_0402_5% C209 680P_0402_50V7K 1 2 R112 0_0402_5% 1 2 A A B B C C D D E E 1 1 2 2 3 3 4 4 TVGND CRMA_CL LUMA_CL CRT_VSYNC_R TVCOMPS TVCRMA TVLUMA CRTL_R CRTL_G COMPS_CL CRT_R CRT_VSYNCRFL +CRTVDD CRTL_B 3V_DDCDA CRT_G 3V_DDCCL CRT_HSYNCRFL CRTHSYNC CRTVSYNC CRT_B CRT_HSYNC_R CRTL_R CRTL_G CRTL_B CRT_R9 CRT_G9 CRT_B9 CRT_HSYNC9 CRT_VSYNC9 3VDDCDA 9 3VDDCCL 9 TV_LUMA9 TV_CRMA9 TV_COMPS9 +3VS +CRTVDD +5VS +R_CRT_VCC +5VS +CRTVDD Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 CRT & TVout Connector 16 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. CLOSE TO JP3 S-Video +R_CRT_VCC , +CRTVDD (40mils) CRT CONNECTOR TV-Out Connector Place close to JP6 DC230001300 CONN SUYIN 030107FR007G317ZR 7P S_VIDEO SUYIN_030107FR007G317ZR_7P 1015_Change bead type for meet EMI request. L4 FBMA-L10-201209-121LMT_0805 1 2 L7 MBC1608121YZF_0603 1 2 C247 330P_0402_50V7K 1 2 C238 10P_0402_50V8J 1 2 R1454.7K_0402_5% JP7 SUYIN_030107FR007G317ZR CONN@ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 GND 8 GND 9 R151 0_0402_5% 1 2 F1 1.1A_6VDC_FUSE 2 1 JP6 SUYIN_070546FR015S200ZR CONN@ 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 16 17 D7 RB411D_SOT23 2 1 C244 270P_0402_50V7K 1 2 C234 10P_0402_50V8J 1 2 C232 0.1U_0402_16V4Z 1 2 C243220P_0402_50V8J 1 2 L2 FBMA-L10-201209-121LMT_0805 1 2 D6 DAN217_SC59@ 2 3 1 R143 75_0402_5% 1 2 D5 DAN217_SC59 @ 2 3 1 L9 MBC1608121YZF_0603 1 2 C242220P_0402_50V8J 1 2 R149 2.2K_0402_5% R156 75_0402_5% 1 2 R141 75_0402_5% 1 2 R1444.7K_0402_5% C245 270P_0402_50V7K 1 2 D3 NZQA5V6AXV5T1_SOT533-5 @ 2 1 5 4 3 C248 330P_0402_50V7K 1 2 C246 270P_0402_50V7K 1 2 R154 0_0402_5% 1 2 R146 0_0402_5% 1 2 C240 10P_0402_50V8J 1 2 C237 10P_0402_50V8J 1 2 U5 74AHCT1G125GW_SOT353-5 A 2 Y 4 OE# 1 G 3 P 5 L5 FBM-L11-160808-800LMT_0603 1 2 U6 74AHCT1G125GW_SOT353-5 A 2 Y 4 OE# 1 G 3 P 5 L8 MBC1608121YZF_0603 1 2 C233 10P_0402_50V8J 1 2 D4 DAN217_SC59 @ 2 3 1 C249 330P_0402_50V7K 1 2 R152 0_0402_5% 1 2 R155 75_0402_5% 1 2 G D S Q6 2N7002_SOT23-3 2 1 3 R157 75_0402_5% 1 2 C235 10P_0402_50V8J 1 2 C24110P_0402_50V8J 1 2 R153 0_0402_5% 1 2 R150 2.2K_0402_5% R142 75_0402_5% 1 2 G D S Q5 2N7002_SOT23-3 2 1 3 C239 0.1U_0402_16V4Z 1 2 C236 10P_0402_50V8J 1 2 L3 FBMA-L10-201209-121LMT_0805 1 2 R147 0_0402_5% 1 2 L6 FBM-L11-160808-800LMT_0603 1 2 R158 0_0805_5% 1 2 R148 0_0402_5% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A LVDSA2- LVDSA2+ LVDSA0- LVDSA0+ LVDSA1- LVDSA1+ INVTPWM DI SPLAYOFF# DAC_BRIG LVDSAC- LVDSAC+ LCD_CLK LCD_DAT LVDSB0- LVDSB0+ LVDSBC- LVDSBC+ LVDSB1- LVDSB1+ LVDSB2- LVDSB2+ DI SPLAYOFF# LCD_CLK LCD_DATA +5V_WEBCAM +5V_WEBCAM USB20_R_N6 USB20_R_P6 LVDSB0+9 LVDSB0-9 LVDSBC+9 LVDSBC-9 LVDSB1+9 LVDSB1-9 LVDSB2+9 LVDSB2-9 LVDSA2- 9 LVDSA0+ 9 LVDSA2+ 9 LVDSA0- 9 LVDSA1- 9 LVDSA1+ 9 LVDSAC- 9 LVDSAC+ 9 INV_PWM 30 LCD_CLK 9 LCD_DATA 9 DAC_BRIG 30 ENABLT9 BKOFF#30 ENAVDD9 USB20_N6 20 USB20_P6 20 WEBCAM_ON/OFF#30 +5VALW +LCDVDD +3VS +LCDVDD +3VS INVPWR_B+ +LCDVDD +3VS INVPWR_B+ B+ +LCDVDD +3VS +5VS +5VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 LCD CONN. 17 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. LVDS CONN LVDS connector SP02000EA00 S W-CONN ACES 88242-4001 40P P1 ACES_88242-4001_40P Avoid Panel display garbage after power on. C252680P_0402_50V7K 1 2 R164 100K_0402_5% 1 2 C250 0.1U_0402_16V4Z 1 2 G D S Q7 SI2301BDS-T1-E3_SOT23-3 2 1 3 L11 FBMA-L11-201209-221LMA30T_0805 1 2 J2 JOPEN 1 2 D8 CH751H-40PT_SOD323-2 2 1 C258 4.7U_0805_10V4Z 1 2 C253680P_0402_50V7K 1 2 C257 4.7U_0805_10V4Z 1 2 J3 JOPEN 1 2 R159 2.2K_0402_5% 1 2 JP8 ACES_88242-4001 CONN@ 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 21 21 23 23 25 25 27 27 29 29 31 31 33 33 35 35 37 37 39 39 2 2 4 4 6 6 8 8 10 10 12 12 14 14 16 16 18 18 20 20 22 22 24 24 26 26 28 28 30 30 32 32 34 34 36 36 38 38 40 40 GND 41 GND 42 R160 2.2K_0402_5% 1 2 C254 680P_0402_50V7K 1 2 C255 680P_0402_50V7K 1 2 R162 4.7K_0402_5% 1 2 G D S Q8 2N7002_SOT23-3 2 1 3 D9 CH751H-40PT_SOD323-2 2 1 R163 47K_0402_5% 1 2 C256 680P_0402_50V7K 1 2 G D S Q9 2N7002_SOT23-3 2 1 3 C259 0.047U_0402_16V7K L10 0_0805_5% @ 1 2 R161 100_0402_5% 1 2 R308 100K_0402_5% 1 2 C260 0.22U_0402_10V4Z 1 2 R298 100K_0402_5% 1 2 G D S Q35 SI2301BDS-T1-E3_SOT23-3 @ 2 1 3 C251 0.1U_0402_16V4Z 1 2 L23 WCM-2012-900T_4P 1 1 4 4 3 3 2 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A PCI_PIRQB# PCI_GNT0# PCI_AD16 PCI_AD8 PCI_DEVSEL# PCI_AD19 PCI_AD3 PCI_CBE#0 PCI_REQ3# PCI_AD5 PCI_AD28 PCI_AD10 PCI_AD4 PCI_STOP# PCI_REQ1# PCI_AD30 PCI_CBE#1 PCI_AD25 PCI_AD22 PCI_AD7 PCI_PIRQA# PCI_PLTRST# PCI_FRAME# PCI_PCIRST# PCI_AD24 PCI_AD12 PCI_AD1 PCI_REQ0# PCI_AD13 PCI_AD11 PCI_AD0 PCI_CBE#2 PCI_AD21 PCI_AD18 PCI_IRDY# PCI_CBE#3 PCI_AD26 PCI_AD23 PCI_PIRQD# PCI_AD2 PCI_TRDY# PCI_SERR# PCI_AD15 PCI_PAR PCI_AD31 PCI_AD27 PCI_AD20 PCI_AD6 CLK_PCI_ICH PCI_PERR# PCI_GNT3# PCI_AD29 PCI_AD17 PCI_AD14 PCI_AD9 PCI_PIRQC# PCI_PLOCK# PCI_PME# PCI_REQ3# PCI_PIRQD# PCI_DEVSEL# PCI_TRDY# PCI_FRAME# PCI_STOP# PCI_PLOCK# PCI_IRDY# PCI_PERR# PCI_SERR# PCI_PIRQA# PCI_PIRQC# PCI_PIRQB# PCI_PIRQE# PCI_PIRQH# PCI_PIRQG# PCI_PIRQF# PCI_PIRQE# PCI_PIRQH# PCI_PIRQG# PCI_PIRQF# CLK_PCI_ICH PCI_REQ1# PCI_REQ0# PCI_REQ2# PCI_REQ2# PCI_GNT0# PCI_RST# PLT_RST# PCI_PIRQA# PCI_PIRQF# PCI_AD[0..31]23 PCI_FRAME#23 PCI_PERR#23 PCI_PME#23,30 PCI_TRDY#23 PCI_STOP#23 CLK_PCI_ICH 15 PCI_SERR#23,30 PCI_PIRQA# PCI_REQ0#23 PCI_GNT0#23 PCI_CBE#3 23 PCI_DEVSEL#23 PCI_IRDY#23 PCI_CBE#2 23 PCI_CBE#1 23 PCI_PAR 23 PCI_CBE#0 23 PCI_RST#23,29,30 PLT_RST#7,22 PCI_PIRQ#23 +3VS +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 ICH8(1/4)-PCI/INT 18 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Place closely pin B10 0 1 1 Boot BIOS Location PCI PCI_GNT0#SPI_CS#1 0 1 Boot BIOS Strap * LPC SPI1 * A16 swap override Strap PCI_GNT3#High= Default Low= A16 swap override Enble R184 8.2K_0402_5% 1 2 R173 8.2K_0402_5% 1 2 R185 8.2K_0402_5% 1 2 R419 0_0402_5% 1 2 R177 8.2K_0402_5% 1 2 C261 10P_0402_50V8J 1 2 R188 8.2K_0402_5% 1 2 R183 8.2K_0402_5% 1 2 R174 0_0402_5% 1 2 PCI Interrupt I/F U7B ICH8M REV 1.0 AD0 D20 AD1 E19 AD2 D19 AD3 A20 AD4 D17 AD5 A21 AD6 A19 AD7 C19 AD8 A18 AD9 B16 AD10 A12 AD11 E16 AD12 A14 AD13 G16 AD14 A15 AD15 B6 AD16 C11 AD17 A9 AD18 D11 AD19 B12 AD20 C12 AD21 D10 AD22 C7 AD23 F13 AD24 E11 AD25 E13 AD26 E12 AD27 D8 AD28 A6 AD29 E8 AD30 D6 AD31 A3 REQ0# A4 GNT0# D7 REQ1#/GPIO50 E18 GNT1#/GPIO51 C18 REQ2#/GPIO52 B19 GNT2#/GPIO53 F18 REQ3#/GPIO54 A11 GNT3#/GPIO55 C10 C/BE0# C17 C/BE1# E15 C/BE2# F16 C/BE3# E17 IRDY# C8 PAR D9 PCIRST# G6 DEVSEL# D16 PERR# A7 PLOCK# B7 SERR# F10 STOP# C16 TRDY# C9 FRAME# A17 PLTRST# AG24 PCICLK B10 PME# G7 PIRQA# F9 PIRQB# B5 PIRQC# C5 PIRQD# A10 PIRQH#/GPIO5 B3 PIRQG#/GPIO4 F12 PIRQF#/GPIO3 G11 PIRQE#/GPIO2 F8 R172 8.2K_0402_5% 1 2 R182 8.2K_0402_5% 1 2 R180 8.2K_0402_5% 1 2 R187 8.2K_0402_5% 1 2 R179 8.2K_0402_5% 1 2 R176 8.2K_0402_5% 1 2 R165 1K_0402_5% @ 1 2 R186 10_0402_5% 1 2 R168 8.2K_0402_5% 1 2 R167 8.2K_0402_5% 1 2 R171 8.2K_0402_5% 1 2 R170 8.2K_0402_5% 1 2 T23 R175 8.2K_0402_5% 1 2 R181 8.2K_0402_5% 1 2 R178 0_0402_5% 1 2 R169 8.2K_0402_5% 1 2 R166 8.2K_0402_5% 1 2 R420 0_0402_5%@ 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A H_INIT# H_IGNNE# H_NMI H_STPCLK# H_DPRSTP# H_DPRSTP_R# H_SMI# H_FERR# H_PWRGOOD KB_RST# H_FERR# GATEA20 H_DPRSTP# H_DPSLP# ICH_RTCX1 SM_INTRUDER# ICH_INTVRMEN HDA_SDOUT SATA_RXP0_C SATA_RXN0_C SATA_TXP0_C SATA_TXN0_C SATA_TXP0 SATA_TXN0 CLK_PCIE_SATA# CLK_PCIE_SATA LPC_AD0 LPC_AD3 LPC_AD2 LPC_AD1 LPC_FRAME# H_A20M# GATEA20 H_INTR KB_RST# IDE_HDD14 IDE_HDD15 IDE_HDD13 IDE_HDD10 IDE_HDD12 IDE_HDD11 IDE_HDD9 IDE_HDD6 IDE_HDD8 IDE_HDD7 IDE_HDD4 IDE_HDD5 IDE_HDD3 IDE_HDD2 IDE_HDD1 IDE_HDD0 I DE_HDA1 I DE_HDA2 I DE_HDA0 I DE_HDCS1# I DE_HDCS3# IDE_HDIOR# I DE_HDIOW# IDE_HDACK# I DE_HIORDY IDE_HIRQ I DE_HIORDY IDE_HIRQ IDE_HDREQ ICH_RTCX2 HDA_BITCLK ACZ_SDIN0 HDARST# HDA_SYNC ICH_RTCRST# ICH_INTVRMEN SM_INTRUDER# THRMTRIP_ICH# ICH_RTCX1 ICH_RTCX2 LAN100_SLP SATA_LED# H_DPSLP# GLAN_COMP LAN100_SLP LPC_DRQ0# H_DPSLP#5 H_DPRSTP#5,7,37 H_FERR#4 H_PWRGOOD 5 H_IGNNE#4 H_INIT#4 H_NMI 4 H_SMI#4 H_STPCLK#4 H_THERMTRIP#4,7 SATA_RXN0_C22 SATA_RXP0_C22 SATA_TXN022 SATA_TXP022 CLK_PCIE_SATA#15 CLK_PCIE_SATA15 LPC_AD[0..3] 22,29,30 LPC_FRAME#22,29,30 H_A20M#4 GATEA20 30 H_INTR 4 KB_RST#30 IDE_HDD[0..15] 22 IDE_HDA0 22 IDE_HDA1 22 IDE_HDA2 22 IDE_HDCS1#22 IDE_HDCS3#22 IDE_HDACK#22 IDE_HDIOW#22 IDE_HDIOR#22 I DE_HIORDY 22 IDE_HIRQ 22 IDE_HDREQ 22 ACZ_BITCLK24 ACZ_RST#24,30 ACZ_SDIN024 ACZ_SYNC24 ACZ_SDOUT24 SATA_LED#28 LPC_DRQ#0 30 +3VS +VCCP +VCCP +RTCVCC +RTCVCC +3VS +1.5VS BATT1.1 +3VL +RTCVCC Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 ICH8(2/4)_LAN,HD,IDE,LPC Custom 19 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Within 500 mils placed within 2" from ICH8M within 2" from R1557 Low = Internal VR Disabled High = Internal VR Enabled(Default) ICH_INTVRMEN ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) ICH_LAN100_SLP Low = Internal VR Disabled High = Internal VR Enabled(Default) ICH8M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05) W=20mils W=20mils W=20mils W=20mils 0925_Change C262 and C263 from 12pF to 15pF. CLRP3 SHORT PADS 1 2 T25 PAD C263 15P_0402_50V8J 1 2 R190 10K_0402_5% 1 2 C262 15P_0402_50V8J 1 2 R206 33_0402_5% 1 2 R213 1K_0402_5% 1 2 R192 0_0402_5% @ 1 2 D10 DAN202U_SC70 2 3 1 R211 27.4_0402_1% 1 2 R196 56_0402_5% 1 2 R200 56_0402_5% @ 1 2 R194 10K_0402_5% 1 2 R191 1M_0402_5% 1 2 R205 33_0402_5% 1 2 C267 1U_0603_10V4Z 1 2 R193 330K_0402_1% 1 2 R210 8.2K_0402_5% 1 2 C265 3900P_0402_50V7K 1 2 C442 4.7U_0603_6.3V6K 1 2 Y2 32.768KHZ_12.5P_Q13MC30610018 OUT 4 IN 1 NC 3 NC 2 R212 0_0402_5% 1 2 RTC LAN / GLAN IHDA SATA IDE LPC CPU U7A ICH8M REV 1.0 RTCX1 AG25 RTCX2 AF24 INTVRMEN AF25 INTRUDER# AD22 GLAN_CLK B24 LAN_RSTSYNC D22 LAN_RXD0 C21 LAN_RXD1 B21 LAN_RXD2 C22 LAN_TXD0 D21 LAN_TXD1 E20 LAN_TXD2 C20 HDA_BIT_CLK AJ16 HDA_SYNC AJ15 HDA_RST# AE14 HDA_SDIN0 AJ17 HDA_SDIN1 AH17 HDA_SDIN2 AH15 HDA_SDOUT AE13 SATALED# AF10 SATA0RXN AF6 SATA0RXP AF5 SATA0TXN AH5 SATA0TXP AH6 SATA1RXN AG3 SATA1RXP AG4 SATA1TXN AJ4 SATA1TXP AJ3 SATA_CLKN AB7 SATA_CLKP AC6 SATARBIAS# AG1 SATARBIAS AG2 DA0 AA4 DA1 AA1 DA2 AB3 DCS1# Y6 DCS3# Y5 DD0 V1 DD1 U2 DD2 V3 DD3 T1 DD4 V4 DD5 T5 DD6 AB2 DD7 T6 DD8 T3 DD9 R2 DD10 T4 DD11 V6 DD12 V5 DD13 U1 DD14 V2 DD15 U6 DDREQ W5 IORDY Y1 IDEIRQ Y3 DDACK# Y2 DIOW# W3 DIOR# W4 FWH0/LAD0 E5 FWH1/LAD1 F5 FWH2/LAD2 G8 FWH3/LAD3 F6 LDRQ0# G9 LDRQ1#/GPIO23 E6 FWH4/LFRAME# C4 A20GATE AF13 A20M# AG26 DPRSTP# AF26 DPSLP# AE26 FERR# AD24 CPUPWRGD/GPIO49 AG29 IGNNE# AF27 INIT# AE24 INTR AC20 RCIN# AH14 SMI# AG28 NMI AD23 STPCLK# AA24 THRMTRIP# AE27 RTCRST# AF23 GLAN_DOCK#/GPIO13 AH21 GLAN_COMPO C25 GLAN_COMPI D25 HDA_SDIN3 AD13 SATA2TXN AE4 SATA2RXN AF2 SATA2TXP AE3 SATA2RXP AF1 TP8 AA23 HDA_DOCK_EN#/GPIO33 AE10 HDA_DOCK_RST#/GPIO34 AG14 LAN100_SLP AD21 R201 0_0402_5% 1 2 R189 330K_0402_1% 1 2 JBATT1 SUYIN_060003FA002TX00NL~D CONN@ + 1 - 2 R208 33_0402_5% 1 2 C266 3900P_0402_50V7K 1 2 R199 20K_0402_5% 1 2 R195 0_0402_5% @ 1 2 R209 4.7K_0402_5% 1 2 R204 56_0402_5% 1 2 C264 1U_0603_10V4Z 1 2 R203 47_0402_5% 1 2 R207 24_0402_1% 1 2 R202 24.9_0402_1% 1 2 R197 10M_0402_5% 1 2 R198 56_0402_5% @ 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CL_CLK0 CL_DATA0 CL_VREF0_ICH CL_VREF1_ICH MCH_ICH_SYNC# USB_OC#8 USB_OC#9 ICH_PCIE_WAKE# XDP_DBRESET# PM_BMBUSY# H_STP_PCI# ICH_SUSCLK ICH_LOW_BAT# LINKALERT# LINKALERT# ICH_SMBCLK ME_EC_DATA1 ICH_RI# ICH_RI# SI RQ VGATE SST_CTL SB_SPKR CLK_48M_ICH CLK_14M_ICH SLP_S4# SLP_S5# SLP_S3# PM_PWROK CLK_14M_ICH USB_OC#7 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#2 CLK_PCIE_ICH CLK_PCIE_ICH# DMI_IRCOMP USB20_N0 USB20_N1 USB20_P1 USB20_P0 USBRBIAS IDE_RESET# CLKSATAREQ# ICH_LOW_BAT# PWRBTN_OUT# M_PWROK DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 GPIO27 R_STP_CPU# ICH_PCIE_WAKE# GPIO18 GPIO20 GPIO22 GPIO39 ME_EC_CLK1 SB_SPKR ICH_SMBDATA USB20_N2 USB20_P2 PCIE_C_TXP1 PCIE_C_TXN1 PCIE_RXP1 PCIE_RXN1 USB_OC#3 OCP# EC_RSMRST# PM_SLP_M# SUS_STAT# EC_RMRST# THERM_SCI# USB_OC#0 CK_PWRGD EC_LID_OUT# EC_SCI# EC_SMI# ME_EC_DATA1 ME_EC_CLK1 GPIO18 GPIO22 GPIO20 S4_STATE# GPIO38 GPIO39 GPIO38 CLKSATAREQ# SI RQ IDE_RESET# PM_BMBUSY# ICH_RSVD MCH_ICH_SYNC# OCP# SPI_MISO WL_OFF# SPI_MOSI SPI_CS1# SPI_CS0# SPICLK USB_OC#1 USB_OC#8 USB_OC#9 USB_OC#7 USB_OC#2 USB_OC#4 USB_OC#3 USB_OC#5 USB_OC#6 USB_OC#0 USB_OC#1 CLKRUN# CLKRUN# DPRSLPVR XDP_DBRESET# PM_PWROK EC_RMRST# XDP_DBRESET#4 PM_BMBUSY#7 H_STP_PCI#15 H_STP_CPU#15 ICH_PCIE_WAKE#22 DMI_RXP0 7 DMI_RXN0 7 DMI_TXP0 7 DMI_TXN0 7 CL_CLK0 7 CL_DATA0 7 CL_RST#7 MCH_ICH_SYNC#7 DPRSLPVR 7,37 SIRQ30 SB_SPKR24 CLK_48M_ICH 15 CLK_14M_ICH 15 SLP_S3#30 SLP_S5#30 SLP_S4#30 PM_PWROK 7,30 PWRBTN_OUT#30 CLK_PCIE_ICH#15 CLK_PCIE_ICH 15 USB20_N1 27 USB20_P1 27 USB20_N0 27 USB20_P0 27 IDE_RESET#22 CLKSATAREQ#15 M_PWROK 7,30 DMI_RXP1 7 DMI_RXN1 7 DMI_TXP1 7 DMI_TXN1 7 DMI_RXP2 7 DMI_RXN2 7 DMI_TXP2 7 DMI_TXN2 7 DMI_RXP3 7 DMI_RXN3 7 DMI_TXP3 7 DMI_TXN3 7 USB20_N2 27 USB20_P2 27 PCIE_TXN122 PCIE_RXP122 PCIE_RXN122 PCIE_TXP122 THERM_SCI#30 ICH_SMBCLK15,22 ICH_SMBDATA15,22 OCP#4 EC_RSMRST#30 VGATE15,37 WL_OFF#22 USB_OC#027 USB_OC#227 CK_PWRGD 15 EC_LID_OUT#30 EC_SCI#30 EC_SMI#30 USB20_P4 27 USB20_N4 27 ALW_PWRGD 34 USB20_P6 17 USB20_N6 17 +3VALW +3VS +3VALW +3VALW +1.5VS +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 ICH8(3/4)_PM,USB,GPIO Custom 20 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. Place closely pin AG9 Within 500 mils Within 500 mils low-->default High -->No boot WLAN To MB. To USB/B. To USB/B. To Card Reader/B. To WEBCAM. R218 1K_0402_5% 1 2 T45 PAD R396 100K_0402_5% 1 2 R239 10K_0402_5% 1 2 PCI-Express Direct Media Interface USB SPI U7D ICH8M REV 1.0 PERN1 P27 PERP1 P26 PETN1 N29 PETP1 N28 PERN2 M27 PERP2 M26 PETN2 L29 PETP2 L28 PERN3 K27 PERP3 K26 PETN3 J29 PETP3 J28 PERN4 H27 PERP4 H26 PETN4 G29 PETP4 G28 PERN5 F27 PERP5 F26 PETN5 E29 PETP5 E28 PERN6/GLAN_RXN D27 PERP6/GLAN_RXP D26 PETN6/GLAN_TXN C29 PETP6/GLAN_TXP C28 DMI0RXN V27 DMI0RXP V26 DMI0TXN U29 DMI0TXP U28 DMI1RXN Y27 DMI1RXP Y26 DMI1TXN W29 DMI1TXP W28 DMI2RXN AB26 DMI2RXP AB25 DMI2TXN AA29 DMI2TXP AA28 DMI3RXN AD27 DMI3RXP AD26 DMI3TXN AC29 DMI3TXP AC28 DMI_CLKN T26 DMI_CLKP T25 DMI_ZCOMP Y23 DMI_IRCOMP Y24 OC0# AJ19 OC1#/GPIO40 AG16 OC2#/GPIO41 AG15 OC3#/GPIO42 AE15 OC4#/GPIO43 AF15 OC5#/GPIO29 AG17 OC6#/GPIO30 AD12 OC7#/GPIO31 AJ18 USBP0N G3 USBP0P G2 USBP1N H5 USBP1P H4 USBP2N H2 USBP2P H1 USBP3N J3 USBP3P J2 USBP4N K5 USBP4P K4 USBP5N K2 USBP5P K1 USBP6N L3 USBP6P L2 USBP7N M5 USBP7P M4 USBRBIAS# F2 USBRBIAS F3 SPI_CLK C23 SPI_CS0# B23 SPI_CS1# E22 SPI_MOSI D23 SPI_MISO F21 OC8# AD14 OC9# AH18 USBP8P M1 USBP8N M2 USBP9N N3 USBP9P N2 R228 10K_0402_5% 1 2 R233 10K_0402_5% 1 2 R231 8.2K_0402_5%@ 1 2 R226 10K_0402_5% @ 1 2 T43PAD R391 10K_0402_5% 1 2 R250 10K_0402_5% @ 1 2 R395 100K_0402_5% 1 2 T48 PAD T28 PAD R232 8.2K_0402_5% 1 2 R216 2.2K_0402_5% 1 2 C270 0.1U_0402_16V4Z 1 2 R220 10_0402_5%@ 1 2 T31PAD R225 10K_0402_5% 1 2 R244 8.2K_0402_5% 1 2 R235 8.2K_0402_5%@ 1 2 C2720.1U_0402_16V4Z 1 2 C271 0.1U_0402_16V4Z 1 2 R422 10K_0402_5% 1 2 R221 10K_0402_5% 1 2 R214 10K_0402_5% 1 2 R241 10K_0402_5% 1 2 T40PAD R243 3.24K_0402_1% 1 2 R242 8.2K_0402_5% 1 2 R381 0_0402_5% 1 2 T29PAD R392 10K_0402_5% 1 2 T46 PAD R388 10K_0402_5% 1 2 R246 1K_0402_5%@ 1 2 R390 10K_0402_5% 1 2 R248 10K_0402_5%@ 1 2 R245 10K_0402_5% @ 1 2 T47 PAD T30 PAD C269 4.7P_0402_50V8C@ 1 2 R428 0_0402_5% 1 2 R230 10K_0402_5% 1 2 R398 100K_0402_5%@ 1 2 R223 10K_0402_5% 1 2 C2730.1U_0402_16V4Z 1 2 R251 22.6_0402_1% 1 2 R238 3.24K_0402_1% 1 2 R240 453_0402_1% 1 2 R227 10K_0402_5% @ 1 2 R394 8.2K_0402_5% 1 2 R389 10K_0402_5% 1 2 T26PAD R386 10K_0402_5% 1 2 R237 10K_0402_5%@ 1 2 T27 PAD T42PAD R217 2.2K_0402_5% 1 2 R229 0_0402_5% 1 2 R380 10K_0402_5% 1 2 R234 100_0402_5% 1 2 SATA SMB SYS GPIO GPIO GPIO Clocks Power MGT Controller Link MISC U7C ICH8M REV 1.0 SATA0GP/GPIO21 AJ12 SATA1GP/GPIO19 AJ10 SATA2GP/GPIO36 AF11 SATA3GP/GPIO37 AG11 SMBCLK AJ26 SMBDATA AD19 LINKALERT# AG21 SMLINK0 AC17 SMLINK1 AE19 SUS_STAT#/LPCPD# F4 SYS_RESET# AD15 BMBUSY#/GPIO0 AG12 TACH1/GPIO1 AJ8 TACH2/GPIO6 AJ9 TACH3/GPIO7 AH9 GPIO8 AE16 GPIO12 AC19 SMBALERT#/GPIO11 AG22 TACH0/GPIO17 AG8 GPIO18 AH12 SCLOCK/GPIO22 AG10 SATACLKREQ#/GPIO35 AG13 STP_PCI#/GPIO15 AE20 STP_CPU#/GPIO25 AG18 SLOAD/GPIO38 AF9 SDATAOUT0/GPIO39 AJ11 CLKRUN#/GPIO32 AH11 SDATAOUT1/GPIO48 AD10 WAKE# AE17 SERIRQ AF12 THRM# AC13 VRMPWRGD AJ20 CLK14 AG9 CLK48 G5 SUSCLK D3 SLP_S3# AG23 SLP_S4# AF21 SLP_S5# AD18 PWROK AE23 DPRSLPVR/GPIO16 AJ14 BATLOW# AE21 PWRBTN# C2 LAN_RST# AH20 RSMRST# AG27 RI# AF17 S4_STATE#/GPIO26 AH27 QRT_STATE0/GPIO27 AH25 QRT_STATE1/GPIO28 AD16 TP7 AJ22 CK_PWRGD E1 CLPWROK E3 SLP_M# AJ25 GPIO20 AE11 CL_CLK0 F23 CL_CLK1 AE18 CL_DATA0 F22 CL_DATA1 AF19 CL_VREF0 D24 CL_VREF1 AH23 CL_RST# AJ23 ME_EC_ALERT/GPIO10 AJ24 WOL_EN/GPIO9 AG19 EC_ME_ALERT/GPIO14 AF22 MEM_LED/GPIO24 AJ27 SPKR AD9 TP3 AJ21 MCH_SYNC# AJ13 R249 24.9_0402_1% 1 2 R387 10K_0402_5% 1 2 R247 453_0402_1% 1 2 T41PAD R236 10K_0402_5%@ 1 2 R385 10K_0402_5% 1 2 R215 8.2K_0402_5% 1 2 R224 10K_0402_5% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A ICH_V5REF_SUS VCCSUS1_5_ICH_2 VCCSUS1_5_ICH_1 ICH_VCCDMIPLL VCCCL1_05_ICH ICH_VCC1_5 ICH_VCCSATAPLL ICH_VCCGLANPLL VCC_LAN1_05_INT_ICH_1 VCC_LAN1_05_INT_ICH_2 ICH_V5REF_RUN ICH_V5REF_RUN ICH_V5REF_SUS ICH_VCCGLAN1_5 ICH_VCCGLAN3_3 +VCCP +1.25VS +VCCP +3VS +3VALW +3VS +RTCVCC +1.5VS +3VS +3VALW +3VALW +3VS +3VS +3VS +3VS +1.5VS +1.5VS +1.5VS +1.5VS +3VS +1.5VS +1.5VS +5VS +3VS +3VALW +5VALW +1.5VS +1.5VS +3VS +1.5VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 ICH8(4/4)_POWER&GND Custom 21 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. (SATA) (DMI) 40 mils 20 mils 20 mils 20 mils 6mA 3mA 770mA VCC1_5_A=1120mA VCC1_5_A=1120mA 50mA 10mA VCC1_5_A=1120mA VCC1_5_A=1120mA 12mA 27mA 74mA 1mA 1170mA 26mA 40mA 14mA VCC3_3=310mA VCC3_3=310mA VCC3_3=310mA VCC3_3=310mA VCC3_3=310mA 24mA 4mA VCCSUS3_3=141mA VCCSUS3_3=141mA 12mA 1004_Change R252 from 0603 to 0805 package. C279 10U_0805_10V4Z 1 2 C307 0.1U_0402_16V4Z 1 2 T35 C274 0.1U_0402_16V4Z 1 2 C286 4.7U_0805_10V4Z 1 2 T34 R255 10_0402_5% 1 2 C293 0.1U_0402_16V4Z 1 2 + C278 220U_6.3V_M 1 2 C281 2.2U_0805_16V4Z 1 2 C300 1U_0603_10V4Z 1 2 C277 0.1U_0402_16V4Z 1 2 C290 0.1U_0402_16V4Z 1 2 U7E ICH8M REV 1.0 VSS[001] A23 VSS[002] A5 VSS[003] AA2 VSS[004] AA7 VSS[005] A25 VSS[006] AB1 VSS[007] AB24 VSS[008] AC11 VSS[009] AC14 VSS[010] AC25 VSS[011] AC26 VSS[012] AC27 VSS[013] AD17 VSS[014] AD20 VSS[015] AD28 VSS[016] AD29 VSS[017] AD3 VSS[018] AD4 VSS[019] AD6 VSS[020] AE1 VSS[021] AE12 VSS[022] AE2 VSS[023] AE22 VSS[024] AD1 VSS[025] AE25 VSS[026] AE5 VSS[027] AE6 VSS[028] AE9 VSS[029] AF14 VSS[030] AF16 VSS[031] AF18 VSS[032] AF3 VSS[033] AF4 VSS[034] AG5 VSS[035] AG6 VSS[036] AH10 VSS[037] AH13 VSS[038] AH16 VSS[039] AH19 VSS[040] AH2 VSS[041] AF28 VSS[042] AH22 VSS[043] AH24 VSS[044] AH26 VSS[045] AH3 VSS[046] AH4 VSS[047] AH8 VSS[048] AJ5 VSS[049] B11 VSS[050] B14 VSS[051] B17 VSS[052] B2 VSS[053] B20 VSS[054] B22 VSS[055] B8 VSS[056] C24 VSS[057] C26 VSS[058] C27 VSS[059] C6 VSS[060] D12 VSS[061] D15 VSS[062] D18 VSS[063] D2 VSS[064] D4 VSS[065] E21 VSS[066] E24 VSS[067] E4 VSS[068] E9 VSS[069] F15 VSS[070] E23 VSS[071] F28 VSS[072] F29 VSS[073] F7 VSS[074] G1 VSS[075] E2 VSS[076] G10 VSS[077] G13 VSS[078] G19 VSS[079] G23 VSS[080] G25 VSS[081] G26 VSS[082] G27 VSS[083] H25 VSS[084] H28 VSS[085] H29 VSS[086] H3 VSS[087] H6 VSS[088] J1 VSS[089] J25 VSS[090] J26 VSS[091] J27 VSS[092] J4 VSS[093] J5 VSS[094] K23 VSS[095] K28 VSS[096] K29 VSS[097] K3 VSS[099] K7 VSS[100] L1 VSS[101] L13 VSS[102] L15 VSS[103] L26 VSS[104] L27 VSS[105] L4 VSS[106] L5 VSS[107] M12 VSS[108] M13 VSS[109] M14 VSS[110] M15 VSS[111] M16 VSS[112] M17 VSS[113] M23 VSS[114] M28 VSS[115] M29 VSS[116] M3 VSS[117] N1 VSS[118] N11 VSS[119] N12 VSS[120] N13 VSS[121] N14 VSS[122] N15 VSS[123] N16 VSS[124] N17 VSS[125] N18 VSS[126] N26 VSS[127] N27 VSS[128] N4 VSS[129] N5 VSS[130] N6 VSS[131] P12 VSS[132] P13 VSS[133] P14 VSS[134] P15 VSS[135] P16 VSS[136] P17 VSS[137] P23 VSS[138] P28 VSS[139] P29 VSS[140] R11 VSS[141] R12 VSS[142] R13 VSS[143] R14 VSS[144] R15 VSS[145] R16 VSS[146] R17 VSS[147] R18 VSS[148] R28 VSS[149] R4 VSS[150] T12 VSS[151] T13 VSS[152] T14 VSS[153] T15 VSS[154] T16 VSS[155] T17 VSS[156] T2 VSS[157] U12 VSS[158] U13 VSS[159] U14 VSS[160] U15 VSS[161] U16 VSS[162] U17 VSS[163] U23 VSS[164] U26 VSS[165] U27 VSS[166] U3 VSS[167] U5 VSS[168] V13 VSS[169] V15 VSS[170] V28 VSS[171] V29 VSS[172] W2 VSS[173] W26 VSS[174] W27 VSS[175] Y28 VSS[176] Y29 VSS[177] Y4 VSS[178] AB4 VSS_NCTF[01] A1 VSS_NCTF[02] A2 VSS_NCTF[03] A28 VSS_NCTF[04] A29 VSS_NCTF[05] AH1 VSS_NCTF[06] AH29 VSS_NCTF[07] AJ1 VSS_NCTF[08] AJ2 VSS_NCTF[09] AJ28 VSS_NCTF[10] AJ29 VSS_NCTF[11] B1 VSS_NCTF[12] B29 VSS[179] AB23 VSS[180] AB5 VSS[181] AB6 VSS[182] AD5 VSS[183] U4 VSS[098] K6 VSS[184] W24 T37 R253 CHB1608U301_0603 1 2 D11 CH751H-40PT_SOD323-2 2 1 C296 1U_0603_10V4Z 1 2 C291 0.1U_0402_16V4Z 1 2 C303 0.1U_0402_16V4Z 1 2 D12 CH751H-40PT_SOD323-2 2 1 C283 10U_0805_10V4Z 1 2 C302 0.1U_0402_16V4Z 1 2 C285 10U_0805_10V4Z 1 2 R258 CHB1608U301_0603 @ 1 2 C282 0.01U_0402_16V7K 1 2 C294 0.1U_0402_16V4Z 1 2 C289 0.1U_0402_16V4Z 1 2 C309 2.2U_0805_16V4Z 1 2 C287 0.1U_0402_16V4Z 1 2 R2590_0402_5%@ 1 2 R256 CHB1608U301_0603 1 2 C297 10U_0805_10V4Z 1 2 C292 0.1U_0402_16V4Z 1 2 C298 1U_0603_10V4Z 1 2 T33 C288 0.1U_0402_16V4Z 1 2 C275 0.1U_0402_16V4Z 1 2 C280 10U_0805_10V4Z 1 2 C284 1U_0603_10V4Z 1 2 C445 1U_0603_10V4Z 1 2 C301 0.1U_0402_16V4Z 1 2 T36 R257 CHB1608U301_0603 1 2 C311 1U_0603_10V4Z @ 1 2 C295 0.1U_0402_16V4Z 1 2 R254 100_0402_5% 1 2 T32 R252 MBV2012301YZF_0805 1 2 C304 0.1U_0402_16V4Z 1 2 C310 4.7U_0805_10V4Z @ 1 2 C305 0.1U_0402_16V4Z 1 2 T38 C276 0.1U_0402_16V4Z 1 2 CORE VCCA3GP ATXARX IDE USB CORE PCI GLAN POWER VCCP_CORE VCCPSUS VCCPUSB U7F ICH8M REV 1.0 V5REF[1] A16 V5REF[2] T7 V5REF_SUS G4 VCC1_5_B[01] AA25 VCC1_5_B[02] AA26 VCC1_5_B[03] AA27 VCC1_5_B[04] AB27 VCC1_5_B[05] AB28 VCC1_5_B[06] AB29 VCC1_5_B[07] D28 VCC1_5_B[08] D29 VCC1_5_B[09] E25 VCC1_5_B[10] E26 VCC1_5_B[11] E27 VCC1_5_B[12] F24 VCC1_5_B[13] F25 VCC1_5_B[14] G24 VCC1_5_B[15] H23 VCC1_5_B[16] H24 VCC1_5_B[17] J23 VCC1_5_B[18] J24 VCC1_5_B[19] K24 VCC1_5_B[20] K25 VCC1_5_B[21] L23 VCC1_5_B[22] L24 VCC1_5_B[23] L25 VCC1_5_B[24] M24 VCC1_5_B[25] M25 VCC1_5_B[26] N23 VCC1_5_B[27] N24 VCC1_5_B[28] N25 VCC1_5_B[29] P24 VCC1_5_B[30] P25 VCC1_5_B[31] R24 VCC1_5_B[32] R25 VCC1_5_B[33] R26 VCC1_5_B[34] R27 VCC1_5_B[35] T23 VCC1_5_B[36] T24 VCC1_5_B[37] T27 VCC1_5_B[38] T28 VCC1_5_B[39] T29 VCC1_5_B[40] U24 VCC3_3[01] AF29 VCCDMIPLL R29 VCC1_5_A[01] AE7 VCC1_5_A[02] AF7 VCC1_5_A[03] AG7 VCC1_5_A[04] AH7 VCC1_5_A[05] AJ7 VCCSATAPLL AJ6 VCC3_3[02] AD2 VCC1_5_A[06] AC1 VCC1_5_A[07] AC2 VCC1_5_A[08] AC3 VCC1_5_A[09] AC4 VCC1_5_A[10] AC5 VCCUSBPLL D1 VCCLAN1_05[1] F17 VCCLAN1_05[2] G18 VCC1_05[01] A13 VCC1_05[02] B13 VCC1_05[03] C13 VCC1_05[04] C14 VCC1_05[05] D14 VCC1_05[06] E14 VCC1_05[07] F14 VCC1_05[08] G14 VCC1_05[09] L11 VCC1_05[10] L12 VCC1_05[11] L14 VCC1_05[12] L16 VCC1_05[13] L17 VCC1_05[14] L18 VCC1_05[15] M11 VCC1_05[16] M18 VCC1_05[17] P11 VCC1_05[18] P18 VCC1_05[19] T11 VCC1_05[20] T18 VCCLAN3_3[1] F19 VCCLAN3_3[2] G20 VCCHDA AC12 VCCSUSHDA AD11 V_CPU_IO[1] AC23 V_CPU_IO[2] AC24 VCC3_3[07] AA3 VCC3_3[08] U7 VCC3_3[09] V7 VCC3_3[10] W1 VCC3_3[11] W6 VCC3_3[12] W7 VCC3_3[13] Y7 VCC3_3[15] B15 VCC3_3[16] B18 VCC3_3[17] B4 VCC3_3[18] B9 VCC3_3[19] C15 VCC3_3[20] D13 VCC3_3[21] D5 VCC3_3[22] E10 VCC3_3[23] E7 VCC3_3[24] F11 VCCRTC AD25 VCCSUS3_3[02] AC18 VCCSUS3_3[03] AC21 VCCSUS3_3[04] AC22 VCCSUS3_3[05] AG20 VCCSUS3_3[06] AH28 VCCSUS3_3[07] P6 VCCSUS3_3[08] P7 VCCSUS3_3[09] C1 VCCSUS3_3[10] N7 VCCSUS3_3[11] P1 VCCSUS3_3[12] P2 VCCSUS3_3[13] P3 VCCSUS3_3[14] P4 VCCSUS3_3[15] P5 VCCSUS3_3[16] R1 VCCSUS3_3[17] R3 VCCSUS3_3[18] R5 VCC1_5_A[11] AC10 VCC1_5_A[12] AC9 VCC1_5_A[13] AA5 VCC1_5_A[14] AA6 VCC1_5_A[15] G12 VCC1_5_A[16] G17 VCCSUS1_05[1] J6 VCCSUS1_05[2] AF20 VCC1_5_A[20] F1 VCC1_5_A[21] L6 VCC1_5_A[22] L7 VCC1_5_A[23] M6 VCC1_5_A[24] M7 VCCSUS3_3[01] C3 VCC3_3[14] A8 VCC1_5_A[25] W23 VCC1_05[22] U18 VCC1_05[27] V17 VCC1_05[25] V14 VCC1_05[23] V11 VCC1_05[21] U11 VCC1_05[28] V18 VCC1_05[26] V16 VCC1_05[24] V12 VCCGLAN1_5[4] B27 VCCGLAN1_5[2] A27 VCCGLAN1_5[5] B28 VCCGLAN1_5[3] B26 VCCGLAN1_5[1] A26 VCCGLAN3_3 B25 VCCGLANPLL A24 VCC3_3[06] AF8 VCC3_3[03] AC8 VCC3_3[05] AE8 VCC3_3[04] AD8 VCCSUS3_3[19] R6 VCC1_5_A[17] H7 VCCSUS1_5[1] AC16 VCC1_5_A[19] AD7 VCC1_5_A[18] AC7 VCCSUS1_5[2] J7 VCC_DMI[2] AE29 VCC_DMI[1] AE28 VCCCL1_05 G22 VCCCL3_3[2] G21 VCCCL3_3[1] F20 VCCCL1_5 A22 VCC1_5_B[45] W25 VCC1_5_B[43] V24 VCC1_5_B[41] U25 VCC1_5_B[46] Y25 VCC1_5_B[44] V25 VCC1_5_B[42] V23 C299 0.1U_0402_16V4Z 1 2 C306 4.7U_0805_10V4Z 1 2 C308 10U_0805_10V4Z 1 2 A A B B C C D D E E F F G G H H 1 1 2 2 3 3 4 4 SEC_CSEL IDE_HDD4 IDE_HDD6 IDE_HDD3 IDE_HDD2 IDE_HDD5 IDE_HIORDY IDE_HDD0 IDE_HDA1 IDE_HIRQ IDE_HDA0 IDE_HDIOW# IDE_HDCS1# IDE_ACT# SATA_RXP0_C SATA_RXN0_C PDIAG# IDE_HDD11 IDE_HDD8 IDE_HDREQ IDE_HDD15 IDE_HDD12 IDE_HDIOR# IDE_HDACK# IDE_HDD14 IDE_HDCS3# IDE_HDD13 IDE_HDA2 IDE_HDD9 IDE_HDD10 LPC_AD0 LPC_AD2 LPC_AD3 LPC_AD1 PLT_RST# ICH_PCIE_WAKE# CLK_PCIE_MCARD# WL_D_OFF# CLK_PCIE_MCARD PCIE_C_RXP1 PCIE_C_RXN1 PCIE_RXN1 PCIE_RXP1 WL_LED# PLT_RST# MINI_CLKREQ#_MC PCIE_TXN1 PCIE_TXP1 IDE_HDD7 IDE_HDD1 SATA_TXP0 SATA_RXN0 SATA_RXP0 SATA_TXN0 WL_LED# IDE_HDD[0..15] 19 PLT_RST#7,18 IDE_HDIOW#19 IDE_HDA119 IDE_HDA019 IDE_HIORDY19 IDE_HDCS1#19 IDE_HIRQ19 SATA_RXN0_C 19 SATA_RXP0_C 19 SATA_TXP0 19 SATA_TXN0 19 IDE_HDA2 19 IDE_HDCS3#19 IDE_HDREQ 19 IDE_HDACK#19 IDE_HDIOR#19 IDE_RESET#20 LPC_AD[0..3] 19,29,30 LPC_FRAME#19,29,30 CLK_DEBUG_PORT_L15,29 ICH_SMBCLK 15,20 ICH_SMBDATA 15,20 CLK_PCIE_MCARD15 CLK_PCIE_MCARD#15 MINI_CLKREQ#15 ICH_PCIE_WAKE#20 PCIE_RXN120 PCIE_RXP120 PCIE_TXN120 PCIE_TXP120 WL_LED#28 WL_OFF#20 +5VS +5VS +5VS +5VS +3VS_HDD +5VS +1.5VS_MINI +1.5VS +3VS_MINI +1.5VS_MINI +3VS_MINI +3VALW +3VALW +3VS +5VS +5VS +3VS +3VS_HDD +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 HDD/ODD/Mini Card CONN. 22 42Wednesday, October 24, 2007 2007/03/26 2007/08/29 Compal Electronics, Inc. HDD Connector CD-ROM Connector Near CONN side. Pleace near HD CONN Pleace near HD CONN (JP23) Mini-Express Card---WLAN Mini Card STANDOFF Placea caps. near ODD CONN. DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA SUYIN_127043FR022G204ZL_22P_NR DC030001P00 WAFER OCTEK CDR-50JD1 50P P0.822P SATA OCTEK_CDR-50JD1_50P SP01000P700 S H-CONN ACES 88914-5204 52P P0.8 EC029000100 MINICARD_STANDOFF_8 7/13 Update HX footprint C325 1U_0603_10V4Z @ 1 2 R260 0_0402_5%@ 1 2 C327 0.1U_0402_16V4Z 1 2 C326 0.01U_0402_16V7K 1 2 R266 0_0402_5% 1 2 R262 100K_0402_5% 1 2 L13 FBMA-L11-201209-102LMA10T 1 2 R265 470_0402_5% 1 2 H20 HOLEA 1 C313 1U_0603_10V4Z 1 2 R269 0_0402_5% DEBUG@ 1 2 JP10 SUYIN_800194MR050S102ZU CONN@ 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 21 21 23 23 25 25 27 27 29 29 31 31 33 33 35 35 37 37 39 39 41 41 43 43 45 45 47 47 49 49 2 2 4 4 6 6 8 8 10 10 12 12 14 14 16 16 18 18 20 20 22 22 24 24 26 26 28 28 30 30 32 32 34 34 36 36 38 38 40 40 42 42 44 44 46 46 48 48 50 50 G 53 G 54 R270 0_0402_5% DEBUG@ 1 2 C331 4.7U_0805_10V4Z 1 2 C321 0.01U_0402_16V7K 1 2 C317 10U_0805_10V4Z 1 2 R411 100K_0402_5% 1 2 R2630_0805_5%@ 1 2 R272 0_0402_5% DEBUG@ 1 2 JP11 FOX_AS0B226-S40N-7F~D 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 21 21 23 23 25 25 27 27 29 29 31 31 33 33 35 35 37 37 39 39 41 41 43 43 45 45 47 47 49 49 51 51 GND1 53 2 2 4 4 6 6 8 8 10 10 12 12 14 14 16 16 18 18 20 20 22 22 24 24 26 26 28 28 30 30 32 32 34 34 36 36 38 38 40 40 42 42 44 44 46 46 48 48 50 50 52 52 GND2 54 C319 0.1U_0402_16V4Z 1 2 C314 10U_0805_10V4Z 1 2 C332 0.1U_0402_16V4Z@ 1 2 C312 0.1U_0402_16V4Z 1 2 JP9 SUYIN_127043FR022G204ZL_NR CONN@ GND 1 A+ 2 A- 3 GND 4 B- 5 B+ 6 GND 7 V33 8 V33 9 V33 10 GND 11 GND 12 GND 13 V5 14 V5 15 V5 16 GND 17 Reserved 18 GND 19 V12 20 V12 21 V12 22 GND 23 GND 24 R267 0_0402_5% DEBUG@ 1 2 D31 CH751H-40PT_SOD323-2 2 1 R274 0_0402_5% 1 2 C324 0.1U_0402_16V4Z @ 1 2 C323 1000P_0402_50V7K @ 1 2 R261 33_0402_5% 1 2 C316 0.01U_0402_16V7K 1 2 R264 10K_0402_5% 1 2 C318 0.1U_0402_16V4Z 1 2 C330 0.1U_0402_16V4Z 1 2 C329 0.01U_0402_16V7K 1 2 C320 0.1U_0402_16V4Z 1 2 L12 FBMA-L11-201209-102LMA10T 1 2 H19 HOLEA 1 C328 4.7U_0805_10V4Z 1 2 R273 0_0402_5% 1 2 R271 0_0402_5% DEBUG@ 1 2 R268 0_0402_5% DEBUG@ 1 2 + C322 330U_V_2.5VK_R9 @ 1 2 C315 10U_0805_10V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CLK_PCI_LAN PCI_AD[0..31] PCI_AD17 PCI_CBE#0 PCI_AD30 PCI_AD23 PCI_AD19 LAN_IDSEL PCI_AD13 PCI_AD11 PCI_AD2 PCI_FRAME# PCI_AD18 PCI_AD5 PCI_IRDY# PCI_AD25 PCI_AD22 PCI_AD15 PCI_RST# PCI_AD3 PCI_CBE#1 PCI_AD10 PCI_AD8 PCI_SERR# PCI_STOP# PCI_AD27 PCI_AD1 PCI_AD0 PCI_REQ0# PCI_AD6 PCI_AD4 PCI_PERR# PCI_AD17 PCI_AD12 PCI_AD9 PCI_AD7 PCI_PIRQ# PCI_DEVSEL# PCI_AD28 PCI_AD16 PCI_AD14 PCI_GNT0# PCI_CBE#2 PCI_PAR PCI_TRDY# PCI_CBE#3 PCI_AD31 PCI_AD26 PCI_AD29 PCI_AD24 PCI_PME# PCI_AD21 PCI_AD20 CLK_PCI_LAN LAN_EECLK LAN_EEDO LAN_EEDI LAN_EECS RXIN-/MDI1- RXIN+/MDI1+ V_12P RXIN-/MDI1- RXIN+/MDI1+ TXD-/MDI0- TXD+/MDI0+ MDO0+ MDO1- MDO1+ TXD+/MDI0+ TXD+/MDI0+ RXIN-/MDI1- TXD-/MDI0- TXD-/MDI0- RXIN+/MDI1+ MCT0 MCT1 TIP RING LAN_X1 LAN_X2 CTRL25 ACTIVITY#_R ACTIVITY# LINK_100# LINK_100#_R TIP RING ACTIVITY# ACTIVE# LINK_100# LINK# R_MDO1+ R_MDO1- R_MDO0+ R_MDO0- MDO0- MDO1+ MDO1- R_MDO1+ R_MDO1- R_MDO0- R_MDO0+ MDO0+ MDO0- RJ45_GND ACTIVE# LINK# PCI_AD[0..31]18 PCI_REQ0#18 PCI_GNT0#18 PCI_RST#18,29,30 PCI_PAR18 PCI_FRAME#18 PCI_TRDY#18 PCI_DEVSEL#18 PCI_STOP#18 PCI_SERR#18,30 PCI_IRDY#18 PCI_PERR#18 PCI_PIRQ#18 PCI_CBE#118 PCI_CBE#218 PCI_CBE#018 PCI_CBE#318 CLK_PCI_LAN15 PCI_PME#18,30 +3VA_LAN +3VALW +3VS V2.5_LAN V2.5_LAN +3VALW V2.5_LAN +3VALW +3VA_LAN +3VALW +3VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 LAN-8100CL 23 42Wednesday, October 24, 2007 2007/03/26 2007/08/29 Compal Electronics, Inc. close to chip close to magnetic RJ11 For EMI, locate close to LAN chip JM34F2*-N5125-7F JM34F2A-M5125-7F SP020008Y00 S W-CONN ACES 88266-02001 2P P1.25 ACES_88266-02001_2P Footprint can not match part number. Cloase to JP12. R282 15K_0402_5% 1 2 U10 NS0013_16P RD+ 1 RD- 2 CT 3 CT 6 TD+ 7 TD- 8 TX- 9 TX+ 10 CT 11 CT 14 RX- 15 RX+ 16 R291 49.9_0402_1% 1 2 R289 10K_0402_5% 1 2 C334 680P_0402_50V7K 1 2 R287 49.9_0402_1% 1 2 Y3 25MHZ_20P_1BG25000CK1A 1 2 C336 27P_0402_50V8J 1 2 L21 WCM-2012-900T_4P 1 1 4 4 3 3 2 2 R278 0_0603_5% 1 2 RJ45 / LED RJ11 JP12 JM34F2-M5125-7FCONN@ TX2- 5 TX2+ 4 RX2+ 7 RX2- 8 TX1+ 1 TX1- 2 RX1+ 3 RX1- 6 Green LED+ 9 Green LED- 10 Yellow LED- 12 Yellow LED+ 11 SGND2 16 SGND1 15 RJ11_1 13 RJ11_2 14 R290 49.9_0402_1% 1 2 D27 PACDN042Y3R_SOT23-3 @ 2 3 1 C358 220P_1808_3KV 1 2 R277 300_0603_5% 1 2 C353 0.1U_0402_16V4Z 1 2 C349 0.1U_0402_16V4Z 1 2 PCI I/F Power LAN I/F U8 RTL8100CL_LQFP128 AD0 104 AD1 103 AD2 102 AD3 98 AD4 97 AD5 96 AD6 95 AD7 93 AD8 90 AD9 89 AD10 87 AD11 86 AD12 85 AD13 83 AD14 82 AD15 79 AD16 59 AD17 58 AD18 57 AD19 55 AD20 53 AD21 50 AD22 49 AD23 47 AD24 43 AD25 42 AD26 40 AD27 39 AD28 37 AD29 36 AD30 34 AD31 33 C/BE#3 44 IDSEL 46 C/BE#2 60 FRAME# 61 IRDY# 63 TRDY# 67 DEVSEL# 68 STOP# 69 PERR# 70 SERR# 75 PAR 76 C/BE#1 77 C/BE#0 92 ISOLATE# 23 EECS 106 RTSET 127 RTT3/CRTL18 125 PME# 31 LED0 117 LED1 115 LED2 114 X2 122 INTA# 25 RST# 27 CLK 28 GNT# 29 REQ# 30 TXD+/MDI0+ 1 TXD-/MDI0- 2 RXIN+/MDI1+ 5 RXIN-/MDI1- 6 AUX/EEDI 109 EESK 111 NC/VSS 9 NC/AVDDH 10 NC/HSDAC+ 11 NC/VSS 13 NC/MDI2+ 14 NC/MDI2- 15 NC/M66EN 88 NC/MDI3+ 18 NC/MDI3- 19 NC/GND 22 NC/VDD18 24 NC/GND 48 NC/GND 62 CLKRUN# 65 NC/SMBCLK 72 NC/GND 73 NC/SMBDATA 74 NC/VDD18 110 NC/GND 112 NC/GND 118 NC/HV 120 NC/HG 123 NC/LG2 124 NC/LV2 126 NC/VDD18 45 NC/VDD18 64 VDD33 41 VDD33 56 VDD33 71 VDD33 84 VDD33 94 VDD33 107 AVDD33/AVDDL 3 AVDD33/AVDDL 20 AVDD33/AVDDL 7 VDD25/VDD18 54 VDD25/VDD18 78 VDD25/VDD18 99 AVDD25/HSDAC- 12 CTRL25 8 GND/VSS 4 GND/VSS 17 GND/VSSPST 21 GND 35 GND/VSSPST 38 GND/VSSPST 51 GND 52 GND/VSSPST 66 GND 80 GND/VSSPST 81 GND/VSSPST 91 GND 100 GND/VSSPST 101 GND/VSSPST 119 GND/VSS 128 VDD33 26 X1 121 NC/VDD18 116 VDD25/VDD18 32 LWAKE 105 EEDO 108 NC/LED3 113 NC/AVDDL 16 C344 0.1U_0402_16V4Z 1 2 C352 0.1U_0402_16V4Z 1 2 C348 0.01U_0402_16V7K 1 2 C351 0.1U_0402_16V4Z 1 2 C343 0.1U_0402_16V4Z 1 2 C345 0.1U_0402_16V4Z 1 2 C341 0.01U_0402_16V7K 1 2 C342 4.7U_0805_10V4Z 1 2 R279 0_0603_5% 1 2 C356 10P_0402_50V8J 1 2 R276 3.6K_0402_5% 1 2 R286 49.9_0402_1% 1 2 C337 27P_0402_50V8J 1 2 C355 0.1U_0402_16V4Z 1 2 U9 AT93C46-10SU-2.7_SO8 CS 1 SK 2 DI 3 DO 4 VCC 8 NC 7 NC 6 GND 5 L22 WCM-2012-900T_4P 1 1 4 4 3 3 2 2 C340 1U_0603_10V4Z 1 2 C339 0.1U_0402_16V4Z 1 2 R283 5.6K_0603_1% 1 2 R288 0_0603_5% 1 2 C359 0.1U_0402_16V4Z 1 2 R285 100_0402_5% 1 2 R293 0_0402_5% 1 2 JP13 ACES_88266-02001 CONN@ 1 1 2 2 G2 4 G1 3 R280 75_0402_5% 1 2 C347 0.1U_0402_16V4Z 1 2 R284 75_0402_5% 1 2 R275 300_0603_5% 1 2 C335 680P_0402_50V7K 1 2 R292 10_0402_5% 1 2 D28 PACDN042Y3R_SOT23-3 @ 2 3 1 C354 0.1U_0402_16V4Z 1 2 C350 0.1U_0402_16V4Z 1 2 C357 220P_1808_3KV 1 2 C346 0.1U_0402_16V4Z 1 2 C338 1000P_1206_2KV7K 1 2 Q10 2SB1188T100R_SC62-3 1 2 3 R281 1K_0402_5% 1 2 C333 0.1U_0402_16V4Z 1 2 A A B B C C D D E E 1 1 2 2 3 3 4 4 ACZ_BITCLK MIC_INL MIC_INR ACZ_BITCLK VC_REFA VC_REFA VREF_LO VREF_HI ACZ_RST# LINE_OUTL LINE_OUTR DI BP_C HP_OUTL EAPD HP_OUTR SENSE DIBN_C MIC_EXTL MIC_EXTR MONO_IN1 SB_SPKR MONO_INR GNDA 26 SUSP#30,31,33,35,36 ACZ_RST#19,30 DIB_P25 LINE_OUTL 26 LINE_OUTR 26 HP_DET#26 HP_OUTR 26 HP_OUTL 26 ACZ_SYNC19 ACZ_SDOUT19 ACZ_BITCLK19 ACZ_SDIN019 MIC_IN_R 26 EXTMIC_DET#26 DIB_N25 MIC_EXT_R 26 MIC_EXT_L 26 SB_SPKR20 +5VALW +VDDA_CODEC +3VS +3VAMP_CODEC +VDDA_CODEC +3VDD_CODEC +3VAMP_CODEC +3VDD_CODEC +MICBIASC +MICBIASC +VDDA_CODEC Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 AMOM_codec Custom 24 42Wednesday, October 24, 2007 2007/03/26 2006/03/10 Compal Electronics, Inc. NC NC NC PORT-A <Earphone OUT> HP_DET# ON 0(LOW) NC MIC Disable Disable Enable ON ON CODEC POWER GNDAGND W=40Mil 250mA (3.33V) MIC_DET LINEOUT ON ON OFF OFF OFF OFF OFF OFF EQ 0(LOW) 0(LOW) 0(LOW) ON Enable Place decoupling caps near the power pins of SmartAMC device. For Layout: AUDIO CODEC In order for the modem wake on ring feature to function, the CODEC must be powered by a rail that is not removed when the system is in standby. 0925_Add LPF to reduce INT. MIC noise. 0927_Modify PC Beep circuit. R311 10K_0402_5%@ 1 2 R294 MBV2012301YZF_0805 1 2 C369 0.1U_0402_16V4Z 1 2 C364 10U_0805_10V4Z 1 2 C380 0.1U_0402_16V4Z 1 2 R429 1K_0402_5% 1 2 R305 0_0402_5% 1 2 R423 0_0805_5% @ 1 2 C378 10U_0805_10V4Z 1 2 C449 0.1U_0402_16V4Z 1 2 U21 CX20561-12Z_LQFP48_7X7 VDD_IO 9 DVDD_1-8 4 SDATA_OUT 5 BIT_CLK 6 SDATA_IN 8 DVDD_3-3 3 SYNC 10 RESET# 11 SENSEA 13 STEREO_L 30 STEREO_R 31 AVDD_26 26 MIC_L 20 MIC_R 21 RESERVED_22 22 RESERVED_23 23 FLY_P 39 FLY_N 37 VREF_FILT 24 RESERVED_32 32 PORTC_L 16 PORTC_R 17 MICBIASB 19 MICBIASC 18 DMIC_CLOCK 1 AVEE 36 PORTD_L 27 PORTD_R 28 AVSS_38 38 DVSS_41 41 EAPD/GPIO0 47 S/PDIF 48 DMIC_1/2 2 AVDD_40 40 PC_BEEP 12 RESERVED_33 33 GPIO1 46 PORTA_L 34 PORTA_R 35 AVSS_25 25 PORTB_R 15 PORTB_L 14 MONO 29 DVDD_44 44 DVSS_7 7 DIB_P 43 DIB_N 42 GPIO2 45 C375 2.2U_0805_10V6K 1 2 R295 MBV2012301YZF_0805 1 2 R309 5.1K_0402_1% 1 2 C365 0.1U_0402_16V4Z 1 2 C382 0_0402_5% 1 2 R304 2.2K_0402_5% 1 2 C373 0.01U_0603_16V7K 1 2 C370 10U_0805_10V4Z 1 2 C446 10U_0805_10V4Z 1 2 R300 47_0402_5% @ 1 2 R42110K_0402_5%@ 1 2 C372 2.2U_0805_10V6K 1 2 R299 33_0402_5% 1 2 C451 1U_0603_10V4Z 1 2 C383 0.1U_0402_16V4Z 1 2 C363 0.1U_0402_16V4Z 1 2 R312 0_1206_5% 1 2 C377 1U_0603_10V4Z 1 2 C447 0.1U_0402_16V4Z 1 2 C368 0.1U_0402_16V4Z 1 2 R302 620_0402_5% 1 2 C366 0.1U_0402_16V4Z 1 2 C376 2.2U_0805_10V6K 1 2 C367 0.1U_0402_16V4Z 1 2 T39 C450 1U_0603_10V4Z 1 2 C374 33P_0402_50V8K @ 1 2 C452 10U_0805_10V4Z 1 2 R301 0_0402_5% 1 2 R303 2.2K_0402_5% @ 1 2 R337 20K_0402_1% 1 2 R310 5.1K_0402_1% 1 2 R296 4.7K_0402_5% C371 2.2U_0805_10V6K 1 2 R313 0_1206_5% 1 2 C360 0.1U_0402_16V4Z 1 2 C362 0.1U_0402_16V4Z 1 2 U11 APE8805A-33Y5P_SOT23-5 VIN 1 GND 2 SHDN# 3 BP 4 OUT 5 R306 143_0402_1% 1 2 C448 10U_0805_10V4Z 1 2 C381 0.1U_0402_16V4Z 1 2 C379 0.1U_0402_16V4Z 1 2 C361 0.1U_0402_16V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A BRIDGE_CC DVdd RX1_1 RING_1 QBASE EIF TXO TAC1_TIP TIP_1 PWR+ DIBN_HS DIBP_HS RXI VC_LSD RAC1 TAC1 BRIDGE_CC2 RAC1_RING TXF EIC DIBP DI BN DIB_N24 DIB_P24 GND AGND_LSD AGND_LSD AVdd GND GND AGND_LSD AGND_LSD AGND_LSD AGND_LSD AGND_LSD GND Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 AMOM-CX20548 25 42Wednesday, October 24, 2007 2007/03/26 2007/07/26 Compal Electronics, Inc. Description Initial Release April 26, 2005 DateREV Revision History 0 R810 and C810 must be placed near pin 6 (RXI) and there should be no vias on the(RXI)net. 2 470 pF470 pF 3 Note: MC8 and MC9 can be optionally populated here or behind the RJ-11 connector. Changed MC8 and MC9 pads. No schematic changes. PCB updated to -005. Added MR11 and MR12. PCB updated to -007. November 3, 2005 November 18, 2005 Omit Optional CX20548 4.01 4 AVL update only. January 3, 2006 April 20, 2006 1 Added MR13. PCB updated to -009. August 18, 2005 No changes to schematic. PCB updated to -003. Updated footprints and corrected via spacing errors. MC11 0.1uF cap_0402_01uf MR5 280 RES_1206_280 MQ4 MMBTA42 MC10 0.01uF cap_0603_001uf MC4 0.1uF cap_0402_01uf MR9 280 RES_1206_280 MFB2 5335R13-005 MQ1 MMBTA42 MT1 MODEM-SMAR 1 2 3 4 MJ2 @ 1 2 MR7 9.1 res_1206_91 MR1 6.81M res_0805_681m MC3 0.1uF cap_0402_01uf MC8 MU1 GPIO 13 TEST 12 EIC 11 VC 3 RAC 4 TAC 5 RXI 6 TXF 7 TXO 8 EIO 10 EIF 9 AVDD 2 DIBP 14 PWR 15 DIBN 16 DVDD 1 EP 17 MC12 150pF CAP_0402_150PF MJ3 @ 1 2 MC13 150pF CAP_0402_150PF MR11 3.01 res_0402_301 ML1 @ 1 4 2 3 MQ3 MMBTA42 MC2 0.1uF cap_0402_01uf MR8 56 5% RES_0603_56@ MQ2 MMBTA42 MC1 0.047uF 100.0V MRV1 MBR2 MMBD3004S MR10 280 RES_1206_280 MR12 3.01 res_0402_301 MR6 280 RES_1206_280 MR3 6.81M MC6 47P_0402_50V8J CAP_0402_47PF MJ1 @ 1 2 MR4 110 5% MFB1 5335R13-005 MJ5@ 1 2 MR2 237K MC7 @ MR13 100_0402_5% RES_0402_100 MJ4@ 1 2 MC5 0.1uF cap_0402_01uf MBR1 MMBD3004S MC9 A A B B C C D D E E 1 1 2 2 3 3 4 4 L_SPKR+ L_SPKR- L_SPKL- LINE_C_OUTR L_SPKL+ LINE_C_OUTL EC_MUTE# PL PR MICEXT_L MICEXT_R R_SPKR+ R_SPKL- R_SPKR- R_SPKL+ SPKR+ SPKR- SPKL+ SPKL- AGND AGND MICIN_R HP_DET# EXTMIC_DET# MIC_EXT_R MIC_EXT_L SPKR+ SPKR- SPKL+ SPKL- R_SPKR+ R_SPKR- R_SPKL+ R_SPKL- HP_OUTR HP_OUTL OUT_R OUT_L LINE_OUTL24 LINE_OUTR24 EC_MUTE#30 EXTMIC_DET#24 HP_DET#24 MIC_IN_R24 MIC_EXT_L24 MIC_EXT_R24 HP_OUTL24 HP_OUTR24 +5VS +5VAMP +5VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 AMP & Audio Jack 26 42Wednesday, October 24, 2007 2007/03/26 2007/08/29 Compal Electronics, Inc. MIC EXT In Keep 10 mil width 16 dB HeadPhone Out/Line Out SPEAKER MIC INT In-R SP02000D000 S W-CONN ACES 85204-04001 4P P1.25 0302_Change Audio Jack. R318 100K_0402_5% 1 2 C393 0.047U_0603_16V7K 1 2 R418 110_0402_1% 1 2 D14 SM05_SOT23 @ 2 3 1 R320 0_0603_5% 1 2 D29 SM05_SOT23 @ 2 3 1 U13 P3017THF D0 TSSOP 20P GND4 1 GND3 11 GND2 13 GND1 20 VDD 16 PVDD1 15 RIN- 17 BYPASS 10 NC 12 LOUT- 8 LOUT+ 4 ROUT- 14 ROUT+ 18 RIN+ 7 LIN- 5 LIN+ 9 GAIN0 2 GAIN1 3 PVDD2 6 SHUTDOWN 19 GND5 21 L16 MBC1608121YZF_0603 1 2 R425 100_0402_5% 1 2 C384 10U_0805_10V4Z 1 2 R314 0_1206_5% 1 2 L19 MBC1608121YZF_0603 1 2 R316 100K_0402_5% 1 2 C398470P_0402_50V7K 1 2 L25 MBC1608121YZF_0603 1 2 C391 0.047U_0603_16V7K 1 2 C399470P_0402_50V7K 1 2 R325 MBC1608121YZF_0603 1 2 C401470P_0402_50V7K 1 2 R417 110_0402_1% 1 2 JP16 SUYIN_010030FR006G105ZR CONN@ 1 2 3 4 5 6 R424 100_0402_5% 1 2 C396 0.047U_0603_16V7K 1 2 R321 MBC1608121YZF_0603 1 2 L26 MBC1608121YZF_0603 1 2 R319 100K_0402_5% @ 1 2 C395 0.047U_0603_16V7K 1 2 C404470P_0402_50V7K 1 2 C386 0.1U_0402_16V4Z 1 2 L24 MBC1608121YZF_0603 1 2 R326 MBC1608121YZF_0603 1 2 R322 MBC1608121YZF_0603 1 2 C389 47P_0402_50V8J @ 1 2 D13 SM05_SOT23 @ 2 3 1 D30 SM05_SOT23 @ 2 3 1 C390 47P_0402_50V8J @ 1 2 C397 0.47U_0603_10V7K 1 2 JP28 ACES_85204-02001 CONN@ 1 1 2 2 G1 3 G2 4 L20 MBC1608121YZF_0603 1 2 C394 47P_0402_50V8J@ 1 2 L27 MBC1608121YZF_0603 1 2 JP17 SUYIN_010030FR006G105ZR CONN@ 1 2 3 4 5 6 JP15 E&T_3801-04 CONN@ 1 1 2 2 3 3 4 4 L18 MBC1608121YZF_0603 1 2 C387 47P_0402_50V8J @ 1 2 L17 MBC1608121YZF_0603 1 2 C388 47P_0402_50V8J @ 1 2 C385 0.1U_0402_16V4Z 1 2 R315 100K_0402_5% @ 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A SYSON# SYSON# USB_OC#2 USB_OC#020 USB20_N120 USB20_P120 USB20_N020 USB20_P020 USB_OC#2 20 SYSON#31,35 USB20_P420 USB20_N420 USB20_P220 USB20_N220 +5VALW +5VALW +USB_VCCA +USB_VCCA +5VS +5VALW +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 USB CONN. 27 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. USB Port DC233000U00 CONN SUYIN 020173MR004S558ZL 4P USB SUYIN_020173MR004S558ZL_4P SP02000DX00 S W-CONN ACES 87213-1000G 10P P1.0 ACES_87213-1000G_10P D15 PSOT24C_SOT23-3 @ 2 3 1 C408 1000P_0402_50V7K 1 2 JP18 ACES_87213-1000G CONN@ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 GND1 11 GND2 12 U14 RT9711PS_SO8 GND 1 IN 2 FLG 5 OUT 6 OUT 8 IN 3 EN# 4 OUT 7 JP19 SUYIN_020133MB004S580ZL-C CONN@ 1 1 2 2 3 3 4 4 GND 5 GND 6 GND 7 GND 8 JP29 ACES_88020-12101 CONN@ 1 1 3 3 5 5 7 7 9 9 11 11 2 2 4 4 6 6 8 8 10 10 12 12 GND 13 GND 14 GND 15 GND 16 GND 17 GND 18 + C406 220U_6.3V_M 1 2 C407 0.1U_0402_16V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A ON/OFFBTN# WL_BTN# ON/OFFBTN_LED# WL_LED# TP_DATA ON/OFFBTN# ON/OFF EC_ON 51ON# TP_BTN# TP_LED# ON/OFFBTN_LED# WL_LED#_LIGHT WL_LED# TP_LED#_LIGHT SYSON LID_SW# TP_CLK NUM_LED#29,30 WL_BTN#30 EC_ON30 51ON#34 ON/OFF 30 TP_BTN#30 BAT_LED#30 SATA_LED#19 WL_LED#22 TP_LED#30 CAPS_LED#29,30 SYSON30,31,35 ON/OFFBTN_LED#29,30 LID_SW#30 TP_DATA 30 TP_CLK 30 +3VS +3VALW +5V +3VALW +3VALW +3VS +3VALW +3VALW +3VS +3VS +3VS +3VS +3VS +5V +5VALW +5V Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 LED/SW 28 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. T/P Board Power ON/OFF TP ON/OFF AMBERBLUE TouchPAD ON/OFF LED Wireless ON/OFF LED(Left 4) POWER LED(Left 1) Battery Charge LED(Left 2) BLUE HDD LED(Left 3) BLUE BLUE AMBER BLUE M/B to SB(Caps Lock LED) M/BtoS/B On (WL_ON#=L)-> Blue Off (WL_ON#=H)-> Amber On (TP_LED#=L)-> Blue Off (TP_LED#=H)-> Amber SP01000H300 S H-CONN ACES 85201-0405N 4P P1.0 ACES_85201-0405N_4P SN100000F00 S TACT SW SMT1-05-A SPST HCH H1.5 4P SW_SMT1-05-A_4P SP02000D000 S W-CONN ACES 85204-02001 2P P1.25 ACES_85204-02001_2P SP01000H400 S H-CONN ACES 85201-1005N 10P P1.0 ACES_85201-1005N_10P D21, D25, D23 Footprint can not match part number. 0426_Change all LED power source from 5V to 3V. 1015_Remove U22 and U23. D16 LTST-C191TBKT-5A_BLUE_0603 2 1 C414 100P_0402_50V8J @ 1 2 Orange Blue D21 LTST-C195TBKFKT_BLUE/ORG 2 4 1 3 G D S Q34 2N7002_SOT23-3 2 1 3 R332 4.7K_0402_5% 1 2 D24 PACDN042Y3R_SOT23-3 2 3 1 R340 10K_0402_5% 1 2 R335 33_0402_5% 1 2 R384 10K_0402_5% 1 2 R341 10K_0402_5% 1 2 SW1 SMT1-05-A_4P 3 2 1 4 5 6 G D S Q19 2N7002_SOT23-3 2 1 3 G D S Q33 SI2301BDS-T1-E3_SOT23-3 2 1 3 R339 330_0402_5% 1 2 JP21 ACES_85204-02001 CONN@ 1 1 2 2 G1 3 G2 4 R336 10K_0402_5% 1 2 C413 100P_0402_50V8J @ 1 2 D20 LTST-C191TBKT-5A_BLUE_0603 2 1 Orange Blue D23 LTST-C195TBKFKT_BLUE/ORG 2 4 1 3 R329 75_0402_5% 1 2 D18 LTST-C191TBKT-5A_BLUE_0603 2 1 C412 0.1U_0402_16V4Z @ 1 2 G D S Q20 2N7002_SOT23-3 2 1 3 D17 DAN202U_SC70 2 3 1 R338 33_0402_5% 1 2 R331 75_0402_5% 1 2 Q18 DTC124EK_SC59 O 1 G 3 I 2 G D S Q22 2N7002_SOT23-3 2 1 3 R333 75_0402_5% 1 2 G D S Q21 2N7002_SOT23-3 2 1 3 R330 4.7K_0402_5% 1 2 JP20 ACES_85201-1005N CONN@ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 GND 11 GND 12 JP22 ACES_85201-0405N CONN@ 1 1 2 2 3 3 4 4 G1 5 G2 6 C409 1000P_0402_50V7K 1 2 R334 330_0402_5% 1 2 FWR# FRD# SPI_CLK_R SPI_SO SPI_FWR# SPI_FSEL# HOLD# SPI_HOLD#_0 SPI_SO_JP52 SPI_SI_JP52 NUMLED# CAPSLED# ON/OFFBTNLED# VCC1PWRGD SPI_CLK_JP52 SPI_CS#_JP52 SPI_SI_JP52 SPI_HOLD#_0 SPI_CLK_JP52 SPI_CS#_JP52 SPI_SO_JP52 FWR# SPI_CLK FSEL# FRD# NUMLED# ON/OFFBTNLED# CAPSLED# VCC1PWRGD HOLD# SMB_EC_CK130,38 SMB_EC_DA130,38 SPI_CLK30 FRD#30 FWR#30 FSEL#30 PCI_RST#18,23,30 LPC_AD019,22,30 LPC_AD119,22,30 LPC_AD219,22,30 LPC_AD319,22,30 LPC_FRAME#19,22,30 CLK_DEBUG_PORT_L15,22 VCC1_PWRGD30 CAPS_LED#28,30 NUM_LED#28,30 ON/OFFBTN_LED#28,30 +3VALW +3VALW +3VALW B+ +3VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 BIOS ROM 29 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. 20mils SPI ROM LPC Debug Port Connect pin3 & 23 together and pin 24 to GND in 6/29. SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH WIESO_G6179-100000_8P R343 100K_0402_5% 1 2 R351 0_0402_5%@ 1 2 R348 0_0402_5% 1 2 R352 0_0402_5%@ 1 2 R342 100K_0402_5% 1 2 R222 0_0402_5%@ 1 2 U16 AT24C16AN-10SI-2.7_SO8 A0 1 A1 2 SDA 5 SCL 6 VCC 8 A2 3 GND 4 WP 7 JP23 ACES_87216-2404_24P @ Ground 1 LPC_PCI_CLK 2 Ground 3 LPC_FRAME# 4 +V3S 5 LPC_RESET# 6 +V3S 7 LPC_AD0 8 LPC_AD1 9 LPC_AD2 10 LPC_AD3 11 VCC_3VA 12 PWR_LED# 13 CAPS_LED# 14 NUM_LED# 15 VCC1_PWRGD 16 SPI_CLK 17 SPI_CS# 18 SPI_SI 19 SPI_SO 20 SPI_HOLD# 21 Reserved 22 Reserved 23 Reserved 24 R350 0_0402_5%@ 1 2 R349 0_0402_5%@ 1 2 R356 0_0402_5%@ 1 2 R353 0_0402_5%@ 1 2 C416 0.1U_0402_16V4Z 1 2 R346 0_0402_5% 1 2 R345 0_0402_5% 1 2 C415 0.1U_0402_16V4Z 1 2 R347 0_0402_5% 1 2 &U17 SST25LF080B_SO8-200mil R357 0_0402_5%@ 1 2 U17 WIESON G6179 8P SPI@ S 1 VCC 8 Q 2 HOLD 7 VSS 4 D 5 C 6 W 3 R410 3.3K_0402_5% 1 2 R399 0_0402_5%@ 1 2 ECAGND LPC_LFRAME# SI RQ LPC_LAD2 LPC_LAD1 LPC_LAD3 LPC_LAD0 PCI_RST# EC_SCI# CLK_PCI_EC KSI0 KSI1 KSI6 KSI5 KSI7 KSI4 KSO15 KSO12 KSO13 KSO14 KSO4 KSO8 KSO6 KSO3 KSO0 KSO1 KSO9 KSO2 KSO7 KSO5 KSO11 KSO10 SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 FWR# FSEL# FRD# SPI_CLK TP_CLK TP_DATA M/B_ID BATT_OVP INV_PWM FAN_PWM DAC_BRIG I REF ON/OFF UTX URX NUM_LED# CAPS_LED# SYSON SLP_S3# SLP_S5# EC_SMI# LID_SW# SUSP# PWRBTN_OUT# PCI_PME# CRY1 M/B_ID EC_RSMRST# BKOFF# ADP_IN EC_MUTE# FSTCHG BAT_LED# ACIN TP_LED# ACZ_RST# SLP_S4# ECRST# PM_PWROK URX UTX ACOFF ECAGND BATT_TEMP VCC1_PWRGD KSI3 KSI2 GATEA20 KB_RST# KSI0 KSO7 KSI2 KSO13 KSO2 KSO14 KSO5 KSI1 KSI4 KSO12 KSO0 KSO15 KSO4 KSO8 KSI3 KSO1 KSO6 KSO3 KSI7 KSI5 KSO11 KSO10 TP_CLK TP_DATA SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 CLK_LPC_DEBUG PCI_RST# LPC_AD1 LPC_AD2 LPC_FRAME# LPC_DRQ#0 LPC_AD3 LPC_AD0 SI RQ TP_BTN# THERM_SCI# WL_BTN# ON/OFFBTN_LED# CLK_ENABLE KSI5 KSO11 KSO0 KSO1 KSI0 KSI7 KSO13 KSO2 KSI2 KSO4 KSO8 KSO15 KSO10 KSO3 KSO5 KSI4 KSO7 KSO14 KSI3 KSO6 KSO12 KSI6 KSI1 KSO9 EC_ON VR_ON M_PWROK SUSP# LID_SW# WL_BTN# CRY2 ACIN AI R_AC PCI_SERR# LPC_FRAME#19,22,29 SIRQ20 LPC_AD119,22,29 LPC_AD219,22,29 LPC_AD019,22,29 LPC_AD319,22,29 CLK_PCI_EC15 PCI_RST#18,23,29 EC_SCI#20 SMB_EC_DA129,38 SMB_EC_CK129,38 SMB_EC_CK24 SMB_EC_DA24 FRD#29 FWR#29 FSEL#29 SPI_CLK 29 TP_CLK 28 TP_DATA 28 BATT_TEMP 38 BATT_OVP 33 INV_PWM 17 FAN_PWM 4 DAC_BRIG 17 IREF 33 ON/OFF28 NUM_LED#28,29 CAPS_LED#28,29 SYSON 28,31,35 SLP_S3#20 SLP_S5#20 EC_SMI#20 LID_SW#28 SUSP#24,31,33,35,36 PWRBTN_OUT#20 PCI_PME#18,23 EC_RSMRST#20 BKOFF#17 EC_ON 28 EC_MUTE#26 FSTCHG 33 BAT_LED#28 VR_ON 37 ACIN 33 TP_LED#28 ACZ_RST#19,24 SLP_S4#20 ADP_I 33 ACOFF 33 VCC1_PWRGD 29 GATEA2019 KB_RST#19 CLK_LPC_DEBUG 15 LPC_DRQ#0 19 TP_BTN#28 THERM_SCI#20 WL_BTN#28 ON/OFFBTN_LED#28,29 CLK_ENABLE 15 EC_LID_OUT#20 M_PWROK 7,20 PM_PWROK 7,20 CLK_14M_DEBUG 15 AIR_AC 33,38 WEBCAM_ON/OFF#17 PCI_SERR#18,23 +EC_AVCC +3VALW_EC +EC_AVCC +3VALW_EC +5VALW +3VALW_EC +3VALW +5V +3VS +5VALW +3VALW +3VALW_EC +3VS +5VS +3VALW +3VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 EC KB926/KB conn 30 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. EC DEBUG port VCC 3.3V+/-5% Ra 100K+/-5% Board ID Rb V AD_BID min V typ AD_BID V AD_BID max 0 1 2 3 4 5 6 7 0 0V 0V 0V 8.2K+/-5% 18K+/-5% 33K+/-5% 56K+/-5% 100K+/-5% 200K+/-5% NC 0.216V 0.436V 0.712V 1.036V 1.453V 1.935V 2.500V 1.650V 1.185V 0.819V 0.503V 0.250V 3.300V 2.200V 0.875V 1.264V 1.759V 2.341V 3.300V 0.289V 0.538V Ra Rb For EMI FOR LPC SIO DEBUG PORT SP01000FF00 85201-24051 24P P1.0 ACES_85201-24051_24P Board ID SI : 3 (Same as IBL80 spartan 1.0) C427 15P_0402_50V8J 1 2 Y4 32.768KHZ_12.5P_1TJS125DJ2A073 OUT 4 IN 1 NC 3 NC 2 C424 15P_0402_50V8J @ 1 2 JP26 ACES_85205-0400 @ 1 1 2 2 3 3 4 4 R365 4.7K_0402_5% 1 2 R382 0_0805_5% 1 2 R404 10K_0402_5% 1 2 JP25 ACES_85201-24051 CONN@ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 GND1 25 GND2 26 R383 10K_0402_5% @ 1 2 J1 JOPEN 1 2 CP6 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 C428 0.1U_0402_16V4Z 1 2 C438 0.1U_0402_16V4Z C@ 1 2 R354 100K_0402_5% 1 2 R393 10K_0402_5% 1 2 C425 0.1U_0402_16V4Z 1 2 R363 4.7K_0402_5% 1 2 C426 15P_0402_50V8J 1 2 R364 4.7K_0402_5% 1 2 JP24 ACES_85201-2005 @ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 16 16 17 17 18 18 15 15 20 20 19 19 R368 20M_0402_5%@ 1 2 R36110K_0402_5% 1 2 R397 0_0402_5% 1 2 R36210K_0402_5% 1 2 C421 1000P_0402_50V7K 1 2 CP5 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 R402 10K_0402_5% 1 2 C420 0.1U_0402_16V4Z 1 2 R359 47K_0402_5% 1 2 R360 4.7K_0402_5% 1 2 R355 100K_0402_5% 1 2 CP4 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 CP3 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 R366 4.7K_0402_5% 1 2 R358 33_0402_5% @ 1 2 L14 0_0603_5% 1 2 CP1 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 C423 0.01U_0402_16V7K 1 2 C422 0.1U_0402_16V4Z 1 2 C440 100P_0402_50V8J 1 2 C419 1000P_0402_50V7K 1 2 L15 0_0603_5% 1 2 LPC & MISC Int. K/B Matrix SM Bus GPIO GPIO AD Input PWM Output DA Output PS2 Interface SPI Device Interface SPI Flash ROM GPO GPI U18 KB926QFB1_LQFP128_14X14 GA20/GPIO00 1 KBRST#/GPIO01 2 SERIRQ# 3 LFRAME# 4 LAD3 5 PM_SLP_S3#/GPIO04 6 LAD2 7 LAD1 8 VCC 9 LAD0 10 GND 11 PCICLK 12 PCIRST#/GPIO05 13 PM_SLP_S5#/GPIO07 14 EC_SMI#/GPIO08 15 LID_SW#/GPIO0A 16 SUSP#/GPIO0B 17 PBTN_OUT#/GPIO0C 18 EC_PME#/GPIO0D 19 SCI#/GPIO0E 20 INVT_PWM/PWM1/GPIO0F 21 VCC 22 BEEP#/PWM2/GPIO10 23 GND 24 EC_THERM#/GPIO11 25 FANPWM1/GPIO12 26 ACOFF/FANPWM2/GPIO13 27 FAN_SPEED1/FANFB1/GPIO14 28 FANFB2/GPIO15 29 EC_TX/GPIO16 30 EC_RX/GPIO17 31 ON_OFF/GPIO18 32 VCC 33 PWR_LED#/GPIO19 34 GND 35 NUMLED#/GPIO1A 36 ECRST# 37 CLKRUN#/GPIO1D 38 KSO0/GPIO20 39 KSO1/GPIO21 40 KSO2/GPIO22 41 KSO3/GPIO23 42 KSO4/GPIO24 43 KSO5/GPIO25 44 KSO6/GPIO26 45 KSO7/GPIO27 46 KSO8/GPIO28 47 KSO9/GPIO29 48 KSO10/GPIO2A 49 KSO11/GPIO2B 50 KSO12/GPIO2C 51 KSO13/GPIO2D 52 KSO14/GPIO2E 53 KSO15/GPIO2F 54 KSI0/GPIO30 55 KSI1/GPIO31 56 KSI2/GPIO32 57 KSI3/GPIO33 58 KSI4/GPIO34 59 KSI5/GPIO35 60 KSI6/GPIO36 61 KSI7/GPIO37 62 BATT_TEMP/AD0/GPIO38 63 BATT_OVP/AD1/GPIO39 64 ADP_I/AD2/GPIO3A 65 AD3/GPIO3B 66 AVCC 67 DAC_BRIG/DA0/GPIO3C 68 AGND 69 EN_DFAN1/DA1/GPIO3D 70 IREF/DA2/GPIO3E 71 DA3/GPIO3F 72 CIR_RX/GPIO40 73 CIR_RLC_TX/GPIO41 74 AD4/GPIO42 75 SELIO2#/AD5/GPIO43 76 SCL1/GPIO44 77 SDA1/GPIO45 78 SCL2/GPIO46 79 SDA2/GPIO47 80 KSO16/GPIO48 81 KSO17/GPIO49 82 PSCLK1/GPIO4A 83 PSDAT1/GPIO4B 84 PSCLK2/GPIO4C 85 PSDAT2/GPIO4D 86 TP_CLK/PSCLK3/GPIO4E 87 TP_DATA/PSDAT3/GPIO4F 88 FSTCHG/SELIO#/GPIO50 89 BATT_CHGI_LED#/GPIO52 90 CAPS_LED#/GPIO53 91 BATT_LOW_LED#/GPIO54 92 SUSP_LED#/GPIO55 93 GND 94 SYSON/GPIO56 95 VCC 96 SDICS#/GPXOA00 97 SDICLK/GPXOA01 98 SDIDO/GPXOA02 99 EC_RSMRST#/GPXO03 100 EC_LID_OUT#/GPXO04 101 EC_ON/GPXO05 102 EC_SWI#/GPXO06 103 ICH_PWROK/GPXO06 104 BKOFF#/GPXO08 105 WL_OFF#/GPXO09 106 GPXO10 107 GPXO11 108 SDIDI/GPXID0 109 PM_SLP_S4#/GPXID1 110 VCC 111 ENBKL/GPXID2 112 GND 113 GPXID3 114 GPXID4 115 GPXID5 116 GPXID6 117 GPXID7 118 SPIDI/RD# 119 SPIDO/WR# 120 VR_ON/XCLK32K/GPIO57 121 XCLK1 122 XCLK0 123 V18R 124 VCC 125 SPICLK/GPIO58 126 AC_IN/GPIO59 127 SPICS# 128 C417 0.1U_0402_16V4Z 1 2 R403 10K_0402_5% 1 2 C418 0.1U_0402_16V4Z 1 2 CP2 100P_1206_8P4C_50V8 2 3 4 5 6 7 8 1 A A B B C C D D E E 1 1 2 2 3 3 4 4 SUSP# RUNON SUSP SUSP RUNON SYSON SYSON# SUSP SUSP SYSON# SUSP SUSP SUSP SUSP SUSP#24,30,33,35,36 SYSON28,30,35 SYSON#27,35 SUSP35 +5VALW +5VS +5VALW +3VS +3VALW B+ +5VALW +5VS +3VS +1.8V +1.5VS +1.25VS +VCCP +0.9V +VCCP +VCC_CORE +VCCP +1.5VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 DC/DC Interface 31 42Wednesday, October 24, 2007 2007/03/26 2006/07/26 Compal Electronics, Inc. Discharge circuit +5VALW to +5VS Transfer +3VALW to +3VS Transfer For Card reader/B stand off. G D S Q25 2N7002_SOT23-3 2 1 3 FM10 1 CF5 1 H11 HOLEA 1 G D S Q28 2N7002_SOT23-3 2 1 3 FM7 1 CF3 1 C437 0.1U_0402_16V4Z 1 2 C433 0.1U_0402_16V4Z 1 2 R376 470_0402_5% 1 2 R379 470_0402_5% 1 2 H16 HOLEC 1 H8 HOLEA 1 R378 470_0402_5% 1 2 H26 HOLEC 1 G D S Q29 2N7002_SOT23-3 2 1 3 R370 470_0402_5% 1 2 G D S Q27 2N7002_SOT23-3 2 1 3 G D S Q30 2N7002_SOT23-3 2 1 3 H25 HOLEA 1 R369 330K_0402_5% 1 2 H17 HOLEC 1 H27 HOLEA 1 R372 100K_0402_5% 1 2 H15 HOLEC 1 R374 470_0402_5% 1 2 G D S Q23 2N7002_SOT23-3 2 1 3 G D S Q31 2N7002_SOT23-3 2 1 3 G D S Q24 2N7002_SOT23-3 2 1 3 R377 470_0402_5% 1 2 H12 HOLEA 1 H2 HOLEA 1 H7 HOLEA 1 FM2 1 R373 470_0402_5% 1 2 H24 HOLEA 1 H23 HOLEC 1 FM9 1 CF4 1 CF7 1 C432 10U_0805_10V4Z 1 2 FM5 1 H21 HOLEC 1 FM4 1 H3 HOLEA 1 G D S Q26 2N7002_SOT23-3 2 1 3 C436 0.1U_0402_16V4Z 1 2 H1 HOLEA 1 H9 HOLEA 1 H6 HOLEA 1 U20 AO4422_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 H18 HOLEC 1 C430 10U_0805_10V4Z 1 2 G D S Q32 2N7002_SOT23-3 2 1 3 R371 100K_0402_5% 1 2 H10 HOLEA 1 C431 0.1U_0402_16V4Z 1 2 C434 10U_0805_10V4Z 1 2 H5 HOLEA 1 CF1 1 FM6 1 U19 AO4422_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 C435 0.01U_0402_16V7K 1 2 CF2 1 CF8 1 CF6 1 FM8 1 C429 10U_0805_10V4Z 1 2 R375 470_0402_5% 1 2 FM1 1 A A B B C C D D 1 1 2 2 3 3 4 4 ADPIN AC_LED 33 VIN +3VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P Custom 32 42Wednesday, October 24, 2007 <Issued_Date> <Deciphered_Date> DC CONN PQ38 TP0610K-T1-E3_SOT23 2 1 3 PL1 SMB3025500YA_2P 1 2 PCN1 ACES_88334-057N 1 1 3 3 4 4 5 5 2 2 PR157 100_0402_5% 1 2 PC4 1000P_0402_50V7K 1 2 PC1 100P_0402_50V8J 1 2 PC2 1000P_0402_50V7K 1 2 PC3 100P_0402_50V8J 1 2 A A B B C C D D 1 1 2 2 3 3 4 4 PACIN MB39A126 PACIN CS FSTCHG MB39A126 MB39A126 ADP_I_A CS PACIN ACOFF# ACOFF# FSTCHG30 BATT_OVP30 IREF 30 ADP_I30 PACIN 34 SUSP#24,30,31,35,36 ACOFF 30 ACIN 30 BATT_DET38 AC_LED32 MAINPWON34 AIR_AC30,38 VIN P4 P2 BATT B+ VIN +3VLP +3VALW +5VALW BATT +5VALW CHG_B+ CHG_B+ VREF VIN VIN 1.24VREF P2 P2 BATT +3VALW +3VALW +5VS +5VALW Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date Charger Custom Wednesday, October 24, 2007 Compal Electronics, Inc. 4233 CV=12.6V (6/12 CELLS LI-ION) CC=3.08A (6/12 CELLS LI-ION) 3.2V CPU Recovery at 47 +-3 degree C PH1 under CPU botten side : CPU thermal protection at 90 +-3 degree C PQ2 FDS6675BZ_SO8 3 6 5 7 8 2 4 1 PU4B LM358ADT_SO8 + 5 - 6 0 7 P 8 G 4 PC27 47P_0402_50V8J 1 2 PR24 100K_0402_1% 1 2 PR7 0.02_2512_1% 1 2 PR31 340K_0402_1% 1 2 PH1 10K_TH11-3H103FT_0603_1% 1 2 PR168 0_0402_5% 1 2 PD5 1SS355_SOD323-2 1 2 PU1 MB39A126PFV-ER_SSOP24 -INC2 1 OUTC2 2 +INE2 3 -INE2 4 +INC2 24 GND 23 CS 22 VCC 21 ACOK 5 VREF 6 ACIN 7 -INE1 8 +INE1 9 OUTC1 10 SEL 11 -INC1 12 OUT 20 VH 19 XACOK 18 RT 17 -INE3 16 FB123 15 CTL 14 +INC1 13 PR1 100K_0402_1% 1 2 PR5 47K_0402_5% 1 2 PR35 10K_0402_5% 1 2 PC13 0.22U_0603_16V7K 1 2 PC11 0.22U_0603_16V7K 1 2 PC20 10U_1206_25V6M 1 2 PR8 150K_0402_5% 1 2 G D S PQ6 RHU002N06_SOT323-3 2 1 3 PC6 0.22U_0603_16V7K 1 2 PR23 100K_0603_1% 1 2 PU4A LM358ADT_SO8 + 3 - 2 0 1 P 8 G 4 PC25 10P_0402_50V8J 1 2 PQ3 FDS6675BZ_SO8 3 6 5 7 8 2 4 1 PC26 0.047U_0402_16V7K 1 2 PD4 RLZ4.3B_LL34 1 2 PC7 0.1U_0603_25V7K 1 2 PR164 150K_0402_1% 1 2 PR21 150K_0402_1% 1 2 PC30 0.01U_0402_25V7K 1 2 PR11 3K_0402_5% 1 2 PR18 681K_0402_1% 1 2 PQ4 DTA144EUA_SC70-3 2 1 3 PC16 0.1U_0603_25V7K 1 2 PR159 100K_0402_5% @ 1 2 PR26 33K_0402_1% 1 2 PR16 28.7K_0603_1%~D 1 2 PR160 47_1206_5% 1 2 G D S PQ7 RHU002N06_SOT323-3 @ 2 1 3 PR25 10K_0402_1% 1 2 PC15 0.01U_0402_25V7K 1 2 PR15 10K_0402_1% 1 2 PU2A LM393DG_SO8 + 3 - 2 O 1 P 8 G 4 G D S PQ8 RHU002N06_SOT323-3 2 1 3 PC8 2200P_0402_50V7K 1 2 PR22 10K_0402_1% 1 2 PC24 0.1U_0603_25V7K 1 2 PR146 1K_0402_5% 1 2 EC31QS04 PD1 1 2 PC17 0.22U_0603_16V7K 1 2 PR13 0_0402_5% 1 2 PR19 1K_0402_1% 1 2 PL2 SMB3025500YA_2P 1 2 PR33 47K_0402_1% 1 2 PR162 150K_0402_1% 1 2 PC28 22P_0402_25V8K 1 2 PR28 10K_0603_0.1% 1 2 PC132 1000P_0402_50V7K 1 2 PC29 0.01U_0402_25V7K 1 2 PR161 2.55K_0402_1% 1 2 PR4 200K_0402_5% 1 2 PC133 0.22U_0603_10V7K 1 2 PL3 16UH_SIL1045R-160_4.1A_30% 1 2 PC19 10U_1206_25V6M 1 2 G D S PQ39 RHU002N06_SOT323-3 2 1 3 PC14 0.1U_0603_25V7K 1 2 PR17 0.02_1206_1% 1 2 PC12 4700P_0402_25V7K 1 2 PC9 4.7U_1206_25V6K 1 2 PR27 2.15K_0402_1% 1 2 G D S PQ37 RHU002N06_SOT323-3 @ 2 1 3 PR14 100K_0402_1% 1 2 PU3 LMV431ACM5X_SOT23-5 NC 2 REF 4 NC 1 CATHODE 3 ANODE 5 PC22 0.1U_0402_10V7K 1 2 PD3 RB751V-40_SOD323-2 1 2 PC18 2200P_0402_50V7K 1 2 PC23 1500P_0402_50V7K 1 2 PR163 15K_0402_1% 1 2 PR12 10K_0402_1% 1 2 PD2 RB751V-40_SOD323-2 1 2 PR30 49.9K_0402_1% 1 2 PR32 499K_0402_1% 1 2 PR3 47K_0402_5% 1 2 PR158 100K_0402_5% @ 1 2 PQ11 DTC115EUA_SC70-3 2 1 3 PC10 4.7U_1206_25V6K 1 2 PQ10 FDS4435BZ_SO8 1 6 5 7 8 2 4 3 G D S PQ13 RHU002N06_SOT323-3 2 1 3 PR2 10K_0402_5% 1 2 PR10 100K_0402_5% 1 2 G D S PQ9 RHU002N06_SOT323-3 2 1 3 PC5 47P_0402_50V8J 1 2 PC21 10U_1206_25V6M 1 2 PR29 10K_0402_5% 1 2 PQ1 FDS6675BZ_SO8 3 6 5 7 8 2 4 1 PR20 47K_0402_1% 1 2 PQ5 DTC115EUA_SC70-3 2 1 3 PR9 10K_0402_5% 1 2 PR34 105K_0402_1% 1 2 PR167 47K_0402_1% 1 2 G D S PQ12 RHU002N06_SOT323-3 2 1 3 PR6 47K_0402_1% 1 2 A A B B C C D D E E 1 1 2 2 3 3 4 4 DH_3.3V_B BST_3.3V_B BST_5V_B DH_3.3V 2VREF_1999 DH_5V_B LX_3.3V BST_5V MAINPWON LX_5V DH_5V BST_3.3V DL_5V DL_3.3V 2VREF_1999 51ON#28 PACIN 33 MAINPWON 33 ALW_PWRGD 20 B++ +3VALWP VL +5VALWP VL B++ B++ B++ 2VREF_1999 +3VLP VL VL B+ 2VREF_1999 +3VLP Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date 3.3VALWP / 5VALWP Wednesday, October 24, 2007 <Issued_Date> <Deciphered_Date> Compal Electronics, Inc. 4234 PR40 47_0402_5% 1 2 PC33 2200P_0402_50V7K 1 2 PD6 CHP202UPT_SOT323-3 2 3 1 PC31 0.1U_0603_50V4Z 1 2 PC46 0.047U_0603_16V7K 1 2 PR54 @3.57K_0402_1% 1 2 PR45 @499K_0402_1% 1 2 PR51 47K_0402_5% 1 2 G D S PQ19 RHU002N06_SOT323-3 2 1 3 PR46 @499K_0402_1% 1 2 PC34 10U_1206_25V6M 1 2 PU5 MAX8734AEEI+_QSOP28 LX5 15 DL5 19 BST5 14 DH5 16 OUT5 21 FB5 9 SHDN# 6 ON5 4 GND 23 ILIM5 11 DH3 26 LX3 27 TON 13 DL3 24 OUT3 22 FB3 7 PGOOD 2 SKIP# 12 ON3 3 REF 8 PRO# 10 VCC 17 V+ 20 ILIM3 5 BST3 28 LDO3 25 LD05 18 N.C. 1 PQ15 AO4468_SO8 3 6 5 7 8 2 4 1 PR53 0_0402_5% 1 2 PC40 4.7U_0805_10V4Z 1 2 PR49 0_0402_5% 1 2 PC36 2200P_0402_50V7K 1 2 PC37 4.7U_1206_25V6K 1 2 PR59 100K_0402_5% 1 2 PQ16 AO4468_SO8 3 6 5 7 8 2 4 1 PL6 10U_LF919AS-100M-P3_4.5A_20% 1 2 PR48 @10.2K_0402_1% 1 2 PR55 499K_0603_1% 1 2 PC39 1U_0805_16V7K 1 2 PC42 0.1U_0603_25V7K 1 2 PC44 0.22U_0603_10V7K 1 2 PR43 0_0402_5% 1 2 G D S PQ17 RHU002N06_SOT323-3 2 1 3 PR57 0_0402_5% 1 2 PC45 4.7U_0805_10V4Z 1 2 PR39 0_0402_5% 1 2 PR56 300K_0402_5% 1 2 PR41 0_0402_5% 1 2 PR42 0_0402_5% 1 2 + PC43 220U_6.3VM_R15 1 2 PC32 0.1U_0603_50V4Z 1 2 PR50 @0_0402_5% 1 2 PQ36 AO4468_SO8 3 6 5 7 8 2 4 1 PQ26 TP0610K-T1-E3_SOT23 2 1 3 PQ35 AO4468_SO8 3 6 5 7 8 2 4 1 PC35 0.1U_0603_16V7K 1 2 PR58 0_0402_5% 1 2 PR44 0_0402_5% 1 2 + PC41 220U_6.3VM_R15 1 2 PC38 0.1U_0603_50V4Z 1 2 PR52 @10K_0402_5% 1 2 PL5 10U_LF919AS-100M-P3_4.5A_20% 1 2 PL4 FBM-L11-322513-151LMAT_1210 1 2 PR156 100K_0402_5% 1 2 PR47 0_0402_5% 1 2 G D S PQ18 RHU002N06_SOT323-3 2 1 3 PR154 100K_0402_5% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A 1.8V_B+ BOOT1_1.8V LX_1.8V BOOT_1.8V LG_1.8V UG_1.8V SUSP31 SYSON28,30,31 SYSON#27,31 SUSP#24,30,31,33,36 V_DDR_MCH_REF7,13,14 +5VALW B+ +1.8VP +5VALW +1.8V +0.9VP +1.8V +VCCP +1.8VP +1.05V_VCCP +1.25VSP +1.25VS +5VALWP +3VALW +5VALW +3VALWP +3VLP +3VL +0.9VP +0.9V +1.5VS +1.5VSP +5VALW +1.25VSP +1.5VS Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 1.8VP/0.9VSP/2.5VSP 35 42Wednesday, October 24, 2007 <Issued_Date> <Deciphered_Date> Compal Electronics, Inc. (100mA,20mils ,Via NO.= 1) (6A,240mils ,Via NO.=12) (7A,280mils ,Via NO.= 14) (500mA,40mils ,Via NO.= 1)(4.5A,180mils ,Via NO.= 9) (3A,120mils ,Via NO.= 6) (2A,80mils ,Via NO.= 4) (6A,240mils ,Via NO.=12) 1005_Add PR169 to separate V_DDR_MCH_REF from PU8. PU6 SC411MLTRT_MLPQ16_4X4 FB 3 PGD 4 VOUT 1 VCCA 2 NC 5 VSSA 6 VDDP 9 BST 13 DH 12 PGND 7 DL 8 LX 11 ILIM 10 NC 14 EN/PSV 15 TON 16 TP 17 PR62 1M_0402_5% 1 2 PU8 G2992F1U_SO8 VOUT 4 NC 5 GND 2 VREF 3 VIN 1 VCNTL 6 NC 7 NC 8 TP 9 PC59 1U_0603_10V6K 1 2 PC67 10U_1206_6.3V7K 1 2 PR150 59K_0402_1% 1 2 PC128 47P_0402_50V8J 1 2 PC54 1000P_0402_50V7K 1 2 PR69 18.2K_0402_1% 1 2 PR70 27K_0603_0.1% 1 2 PC129 10U_1206_6.3V6M 1 2 PC51 0.1U_0402_16V7K 1 2 PR68 @4.7_1206_5% 1 2 PR66 100K_0402_5% 1 2 PR149 33.2K_0402_1% 1 2 PQ22 FDS6690AS_NL_SO8 3 6 5 7 8 2 4 1 PC66 0.1U_0402_16V7K 1 2 PC52 0.1U_0402_16V7K 1 2 PC68 @0.1U_0402_16V7K 1 2 PR65 0_0402_5% 1 2 G D S PQ20 RHU002N06_SOT323-3 2 1 3 PR73 @0_0402_5% 1 2 PR148 0_0402_5% 1 2 PC127 0.01U_0402_16V7K@ 1 2 PC130 22U_1206_6.3V6M 1 2 PC55 @2200P_0402_25V7K 1 2 PR72 1K_0402_1% 1 2 PJP5 PAD-OPEN 4x4m 1 2 PC56 0.1U_0402_16V7K 1 2 PR61 10_0402_5% 1 2 + PC50 220U_6.3VM_R15 1 2 PU13 APL5913-KAC-TRL_SO8 GND 1 VOUT 3 POK 7 EN 8 VCNTL 6 VIN 5 VOUT 4 FB 2 VIN 9 PR169 0_0603_5% @ 1 2 PR60 0_0402_5% 1 2 PC47 680P_0402_50V7K 1 2 PC49 10U_1206_25V6M 1 2 PQ21 AO4468_SO8 3 6 5 7 8 2 4 1 PC58 @680P_0603_50V7K 1 2 PD7 1SS355_SOD323-2 1 2 PC126 1U_0603_6.3V6M 1 2 PR147 0_0402_5%@ 1 2 PC63 10U_0805_10V4Z 1 2 PC64 10U_0805_10V4Z @ 1 2 PL8 1UH_MPLC0730L1R0_10.6A_20% 1 2 PJP1 PAD-OPEN 4x4m 1 2 PJP2 PAD-OPEN 3x3m 1 2 PJP8 PAD-OPEN 3x3m 1 2 PR67 1K_0402_1% 1 2 PJP7 PAD-OPEN 4x4m 1 2 PR71 10K_0603_0.1% 1 2 PR64 0_0402_5% 1 2 PJP4 PAD-OPEN 2x2m 2 1 PC60 33P_0402_50V8J 1 2 PC57 1U_0603_10V6K 1 2 PC65 1U_0603_16V6K 1 2 PL7 FBMA-L11-322513-151LMA50T_1210 1 2 PJP3 PAD-OPEN 4x4m 1 2 PJP6 PAD-OPEN 4x4m 1 2 PC48 2200P_0402_50V7K 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A BST_1.5V LX_1.5V UG1_1.5V LG_1.5V UG_1.5V LG_1.05V SUSP# BST_1.05V LX_1.05V UG1_1.05V UG_1.05V SUSP#24,30,31,33,35 VCCP_POK B+++ +1.5VSP B+ +1.05V_VCCP +5VALWP Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 1.2V_VP/1.5VSP/1.05VP 36 42Wednesday, October 24, 2007 2006/11/23 2007/11/23 Compal Electronics, Inc. PR77 29.4K_0402_1% 1 2 PR87 0_0402_5% 1 2 PC69 @2200P_0402_50V7K 1 2 PR78 0_0402_5% 1 2 PC79 @1000P_0402_50V7K 1 2 PR84 0_0402_5% 1 2 PQ25 FDS6690AS_NL_SO8 3 6 5 7 8 2 4 1 PC82 @1000P_0402_50V7K 1 2 PQ24 AO4468_SO8 3 6 5 7 8 2 4 1 SP8K10S FD5 2N SOP8 PQ23 D2 2 G2 8 G1 3 D1/S2/K 5 D2 1 D1/S2/K 7 S1/A 4 D1/S2/K 6 + PC75 220U_6.3VM_R15 1 2 PC131 0.1U_0603_16V7K 1 2 PR85 16.5K_0402_1% 1 2 PU9 TPS51124RGER_QFN24_4x4 GND 3 TONSEL 4 VO1 1 VFB1 2 VFB2 5 VO2 6 EN2 8 DR VL1 19 TRIP1 17 V5FILT 15 VBST1 22 V5IN 16 TRIP2 14 DR VL2 12 LL2 11 PGOOD2 7 DR VH2 10 DR VH1 21 EN1 23 LL1 20 PGND1 18 VBST2 9 PGOOD1 24 PGND2 13 P PAD 25 PC81 4.7U_0805_10V6K 1 2 PR89 0_0402_5% 1 2 PR82 0_0402_5% 1 2 PC71 @2200P_0402_50V7K 1 2 PC70 10U_1206_25V6M 1 2 PC80 1U_0603_10V6K 1 2 PL9 FBMA-L11-322513-151LMA50T_1210 1 2 PC78 0.1U_0603_25V7K 1 2 PC76 4.7U_0805_6.3V6K 1 2 PR79 0_0402_5% 1 2 PR81 0_0402_5% 1 2 PC74 4.7U_0805_6.3V6K 1 2 PR83 0_0402_5% 1 2 PR88 3.3_0402_5% 1 2 PR74 73.2K_0402_1% 1 2 PL10 2.2UH_PCMC063T-2R2MN_8A_20% <BOM Structure> 1 2 + PC73 220U_6.3VM_R15 1 2 PR80 0_0402_5% 1 2 PL14 3.3UH_SIQB74B-3R3PF_5.9A_20% 1 2 PC72 4.7U_1206_25V6K 1 2 PR76 75K_0402_1% 1 2 PC77 0.1U_0603_25V7K 1 2 PR86 18.2K_0402_1% 1 2 PR75 75K_0402_1% 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VCC LX2_CPU DH2_CPU BSTM2 CPU POUT BSTM1 CPU BST1_CPU LX1_CPU +VCC_CORE CC1_CPU DL1_CPU DH11_CPU DL2_CPU BST2_CPU CSN2_CPU VSSSENSE DL1_CPU VCCSENSE FB1_CPU DL2_CPU CSP1_CPU CSN1_CPU CSP2_CPU DPRSLPVR7,20 CPU_VID35 CPU_VID55 CPU_VID15 CPU_VID65 CPU_VID05 CPU_VID45 H_DPRSTP#5,7,19 CPU_VID25 VR_ON30 H_PSI#5 VGATE15,20 CLK_EN# VSSSENSE5 H_PROCHOT#4 VCCSENSE 5 +3VS +5VS B+ CPU_B+ +VCC_CORE CPU_B+ Title Size Document Number Rev Date:Sheet of 1.0 +CPU_CORE Custom 37 42Wednesday, October 24, 2007 Compal Electronics, Inc. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D NTC NTC NTC PR129 10K_0402_5% 1 2 PR111 0_0402_5% 1 2 PC91 0.01U_0402_25V7K 1 2 PD12 B340A_SMA2 1 2 PL13 0.36UH_PCMC104T-R36MN1R17_30A_20% 1 2 PC109 0.22U_0603_16V7K 1 2 PR116 100_0402_5% 1 2 PR108 88.7K_0402_1% 1 2 PC103 @0.022U_0402_16V7K 1 2 PR120 @3K_0603_1% 1 2 PR109 3.48K_0402_1% 1 2 + PC134 100U_25V_M 1 2 PR94 10_0402_5% 1 2 PC111 0.1U_0402_16V7K 1 2 PQ32 FDS6676AS_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 PR121 @3K_0603_1% 1 2 PC97 1U_0603_16V6K 1 2 PR105 2.1K_0603_1% 1 2 PR99 0_0402_5% 1 2 + PC95 100U_25V_M 1 2 PQ31 FDS6676AS_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 PR119 1.91K_0402_1% 1 2 PH3 10KB_0603_5%_ERTJ1VR103J 1 2 PC94 2200P_0402_50V7K 1 2 PR128 @0_0402_5% 1 2 PC102 0.22U_0603_16V7K 1 2 PR122 0_0402_5% 1 2 PR118 3.65K_0402_1% 1 2 PC96 1000P_0402_50V7K 1 2 PQ28 FDS6676AS_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 PR1140_0402_5% 1 2 PR101 2.2_0603_5% 1 2 PR127 100_0402_5% 1 2 PR102 0_0402_5% 1 2 PQ29 FDS6676AS_SO8 S 1 S 2 S 3 G 4 D 8 D 7 D 6 D 5 PC106 470P_0402_50V8J 1 2 PR125 0_0402_5% 1 2 PR133 3.48K_0402_1% 1 2 PL12 0.36UH_PCMC104T-R36MN1R17_30A_20% 1 2 PH4 @470KB_0402_5%_ERTJ0EV474J 1 2 PC110 2200P_0402_50V7K 1 2 PC112 680P_0603_50V7K 1 2 PR123 0_0402_5% 1 2 PC104 4700P_0402_25V7K 1 2 PC99 470P_0402_50V8J 1 2 PD11 B340A_SMA2 1 2 PH2 10KB_0603_5%_ERTJ1VR103J 1 2 PR107 4.7_1206_5% 1 2 PR117 2K_0402_1% 1 2 PC90 2.2U_0603_6.3V6K 1 2 PR131 4.7_1206_5% 1 2 PU12 MAX8770GTL+_TQFN40 FB 12 CSP2 14 GND 18 CCV 9 CCI 10 REF 11 CSP1 17 CSN2 15 CSN1 16 CLKEN 1 BST2 20 GNDS 13 DPRSTP 40 D2 33 D1 32 D0 31 BST1 30 Vcc 19 TIME 7 THRM 6 VRHOT 5 POUT 4 PSI 3 PWRGD 2 TON 8 PGND2 23 VDD 25 DL2 24 DL1 26 DH2 21 PGND1 27 D6 37 D4 35 D5 36 D3 34 LX2 22 LX1 28 DH1 29 DPRSLPVR 39 SHDN 38 TP 41 PR115 @3K_0603_1% 1 2 PR100 0_0402_5% 1 2 PC105 1000P_0402_50V7K 1 2 PR104 0_0402_5% 1 2 PC107 10U_1206_25V6M 1 2 PC108 10U_1206_25V6M 1 2 PC93 10U_1206_25V6M 1 2 PR96 200K_0402_5% 1 2 PR124 20K_0402_1% 1 2 PR98 0_0402_5% 1 2 PQ27 SI7840DP-T1-E3_SO8 3 5 2 4 1 PL11 FBMA-L18-453215-900LMA90T_1812 1 2 PR103 0_0402_5% 1 2 PC98 0.22U_0603_16V7K 1 2 PR97 0_0402_5% 1 2 PR132 2.1K_0603_1% 1 2 PR95 13K_0402_5% 1 2 PR112 0_0402_5% 1 2 PC113 0.22U_0603_16V7K 1 2 PR106 0_0402_5% 1 2 PC101 680P_0603_50V7K 1 2 PC100 0.22U_0603_16V7K 1 2 PQ30 SI7840DP-T1-E3_SO8 3 5 2 4 1 PR130 2.2_0603_5% 1 2 PC92 10U_1206_25V6M 1 2 PR110 499_0402_1% 1 2 PR126 @10K_0402_5% 1 2 A A B B C C D D 1 1 2 2 3 3 4 4 SMB_EC_CK1 SMB_EC_DA1 EC_SMC EC_SMD AIR_AC SMB_EC_CK1 29,30 SMB_EC_DA1 29,30 BATT_TEMP 30 BATT_DET 33 AIR_AC 30,33 BATT 1.24VREF +3VL VIN VIN Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P BATTERY CONN Custom 3842Wednesday, October 24, 2007 <Issued_Date> <Deciphered_Date> Compal Electronics, Inc. PC124 0.047U_0402_16V7K 1 2 PU2B LM393DG_SO8 + 5 - 6 O 7 P 8 G 4 PR165 133K_0402_1% 1 2 PR144 10K_0603_0.1% 1 2 PD10 RLZ4.3B_LL34 1 2 PCN2 TYCO_C-1746706_6P BATT+ 6 TS 2 SMD 5 GND 1 SMC 4 RES 3 PR151 @1K_0402_5% 1 2 PC122 1000P_0402_50V7K 1 2 PR139 100_0402_5% 1 2 PR153 1K_0402_5% 1 2 PR166 10K_0402_5% 1 2 PD9 @SM24.TC_SOT23-3 2 3 1 PR152 6.49K_0402_1% 1 2 PR141 10K_0402_1% 1 2 PD8 @SM05_SOT23 2 3 1 PR138 100_0402_5% 1 2 PC123 0.01U_0402_50V4Z 1 2 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 Changed-List History-1 39 42Wednesday, October 24, 2007 2006/02/28 2007/02/28 Compal Electronics, Inc. Version change list (P.I.R. List) Power section Page 1 of 1 3 4 13 14 12 8 Item Reason for change PG#Modify List Date Phase 11 1 2 9 5 6 7 10 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 HW Changed-List History-1 40 42Wednesday, October 24, 2007 2007/03/26 2007/02/28 Compal Electronics, Inc. Version Change List ( P. I. R. List ) for HW Circuit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 27 26 29 24 28 25 Change itemItem Page Phase Date Change R296 2.2K to 4.7K and Reserved R303 24 Follow conexant new design rule 8/6 SI-->PV Add R424 R425 100ohm on MIC_EXT_R and MIC_EXT_L 26 Follow conexant new design rule 8/6 Fine tune R298 C260 value 17 Reduce surge current on power on 8/6 Change PIRQ from F to A 18 Choose R419 then control PIRQ A 8/14 SI-->PV SI-->PV SI-->PV Connect PCI_SERR# to EC GPIO pin.18 Connect PCI_SERR# to EC GPIO pin. 8/31 SI-->PV Modify PC BEEP circuit. 20 8/31 SI-->PV Modify PC BEEP circuit. For support Intel Penryn CPU.Reserve R426 and R427 for support Intel Penryn CPU. 9/304 SI-->PV For ESD request. 28 Add U22 and U23 for ESD request. 9/3 SI-->PV Change C391, C393, C395, C396 from 0.47uF to 0.047uF. Add R417 and R418 to fine-tune Vp-p. For ESD request. 26 26 Change C391, C393, C395, C396 from 0.47uF to 0.047uF. Add R417 and R418 to fine-tune Vp-p. 20 Add U22 and U23 for ESD request. For EMI request. 26 Add L24~L27 9/7 9/5 9/7 9/7 SI-->PV SI-->PV SI-->PV SI-->PV 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 HW Changed-List History-1 41 42Wednesday, October 24, 2007 2007/03/26 2007/02/28 Compal Electronics, Inc. Version Change List ( P. I. R. List ) for HW Circuit Item Change item Page Phase 1 2 3 4 Date 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 33 32 30 36 34 31 35 37 38 Solve Vref miss when entry S3 mode. Solve wave ripple on CRT and TV. Stuff R43 and R46.7 10 9/25 PV-->MV Change C439 from 0.47uF to 4.7uF.9/25 PV-->MV Solve RTC timing too exceed.Change C262 and C263 from 12pF to 15pF.18 9/25 PV-->MV Reduce INT.MIC noise.24 Add LPF (R429 and C452).9/25 PV-->MV PV-->MV Solve pop noise when entry or resume from S3.24 Modify PC Beep (C373, R302, R306) circuit.9/27 PV-->MV Solve EMI fail for Memory module.7 Change R34/R35 from 20 ohm to 30 ohm.9/27 PV-->MV Remove U22 and U23.28 Remove U22 and U23.10/15 35Solve S3 resume fail when use Micron DDR module.10/05Add PR169 to separate V_DDR_MCH_REF from PU8. ICH 1.5V power rail 700mA current requirement.Change R252 package from 0603 to 0805.21 10/04 PV-->MV PV-->MV For EMI request.16 Change L2, L3, L4 to FBMA-L10-201209-121LMT_0805.10/15 PV-->MV To avoid too easy to open solder for CLRP2.15 Change CLRP1 and CLRP2 type like the same as PJP4.10/15 PV-->MV 10 Change R64, R79 from 0 ohm to 1uH/400mA inductor.10/22Solve acoustic noise issue.PV-->MV 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date:Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-4031P 1.0 HW Changed-List History-1 42 42Wednesday, October 24, 2007 2007/03/26 2007/02/28 Compal Electronics, Inc. Version Change List ( P. I. R. List ) for HW Circuit Item Change item Page Phase Date 1 2 3 4 5 6 7 8 9 10 11
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