2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 241 Low Power Design of Bulk Driven Operational Transconductance Amplifier Priti Gupta1, Suman Lata Tripathi2 ME Scholar, NITTTR, Chandigarh Associate Professor, Lovely Professional University, Jalandhar 1 2 Abstract: An operational transconductance-amplifier (OTA) is basically designed for low voltage and low power applications. Bulk driven technique is applied at the input of the proposed OTA that allows the OTA to operate at the minimum supply voltage. Bulk driven transistor removes the threshold voltage limit of the transistor. The proposed technique provides OTA with the rail-to-rail input range with minimum supply voltage. In this paper, the bulk driven technique is used to provide low power consumption in the operational transconductance amplifier with improvement in the transconductance of the amplifier. The CMOS technology 45nm is used for the designing of the proposed OTA circuit. Measurement results indicate that the proposed OTA circuit operated with 0.7 V supply voltage requires the 60.15% of lower power consumption compared to the basic OTA circuit with slightly affecting the other parameters such as transconductance, leakage current, noise and leakage power. Keyword: Moore’s Law, CMOS technology, Bulk driven Transistor. I INTRODUCTION The Operational transconductance amplifier  is the favorable active building block of analog circuits and system. The Operational Transconductance amplifier (OTA) is an amplifier (OTA) is an amplifier whose differential input voltage produces an output current. It is a voltage controlled current source (VCCS). The OTA is like to a standard operational amplifier in that it has comparatively high impedance differential input stage and that it can be used with negative feedback. Reducing [2-5], power consumption in portable applications has made lower supply voltages increasingly common in systems with large digital content. Fast , high-gain, Operational Transconductance Amplifier (OTAs) are an integral part of switched-capacitor (SC) circuits. It is a voltage controlled current source that takes the difference of the two voltages as the input for the current conversion. There is an additional input for a current to control the amplifiers transconductance. OTAs, are useful analog building blocks that allow the amplification and filtering of signals with lower power consumption . The Symbol of the OTA is shown in fig.1. Figure 1 Schematic Symbol for OTA Iabc input bias current is used to control the transconductance of the amplifier. Iabc is called amplifier bias current of the amplifier. Iabc is directly proportional to the amplifier's transconductance. This feature is useful for the electronic control of amplifier gain. Previously the OTA circuit does not use Ibias terminal and diodes as shown in Figure 1. Later According to the requirement these terms are included. The first terminal, anodes of the diodes is combined together. Cathode of the first diode is connected to the non-inverting terminal (Vin+) and cathode of the second diode is connected to the inverting terminal (Vin-). Biasing of the diode is done with the help of applying current (Ibias) to the anodes terminal. Ibias and Iabc terminal provides two additional achievements in the OTA circuit. The operational transconductance amplifier (OTA) is voltage to current converter circuit. In the ideal condition OTA, the output current linearly follows the differential input voltage. The express of the output current Iout is given as follows -V (V I )g (1) Where Vin+ & Vin- represents the voltage at the noninverting input and inverting input terminals respectively and gm represents the amplifier transconductance. The amplifier's output voltage is expressed as: V = I R (3) The voltage gain is the ratio of output voltage divided by differential input voltage, expressed as: G = 978-1-5090-4724-6/17/$31.00 ©2017 IEEE =R . g (4) 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India A. Operational Transconductance Amplifier Operational Transconductance amplifier has many applications in the integrated circuit such as in the designing of low power circuit. It is used in designing of active filters, portable devices, sensor implementation and hearing aid implementation. There are many performance parameters that are considered while designing the circuits of Operational Transconductance amplifier. B. Power Consumption Power consumption is the basic constraints of any type of integrated circuit(IC). There is a trade-off between power and performance of any kind of integrated circuit(IC). The system cost is directly related to power. In power dissipation, power is converted into heat and then radiated away from the device. If an IC is consuming more power, then a better cooling mechanism would be required to keep the circuit in normal conditions. Due to this generated heat, device may get damaged on continuous use. There is three type of the Power dissipation in CMOS circuits. Static Power Dissipation Static power dissipation depends on logical states of the circuits and it is independent of switching activities. The static power dissipation of a circuit is defined in terms of device leakage current and the supply voltage. Total static power dissipation is(5) P =I V Where Isat is the current that flows through the circuit when there is no switching event and V DD is the supply voltage. Short Circuit Power Dissipation Short-circuit power dissipation in CMOS inverter occurs for finite rise and fall times of input voltage waveforms. A direct current path is formed, when both NMOS and PMOS transistors are turned on in the circuit simultaneously for a short duration of time during switching, this causes a direct current path between powers supply and ground. During , switching, the current does not contribute to the charging and discharging of capacitance and current components that flow through both PMOS and NMOS transistor are called short circuit components. Dynamic Power Dissipation Dynamic power dissipation is the result of power dissipation during switching activity. The dynamic power dissipation in CMOS circuits is mainly occurs during the charging and discharging of load capacitance. Consider the simple CMOS inverter and assume that a step voltage with negligible rise and fall 242 time is applied. When input voltage switches from 0 to VDD, the load capacitance is being discharged through NMOS transistor as the NMOS transistor starts conducting and PMOS transistor is turned off. Thus, the current in load capacitance is equal to the instantaneous drain current of the NMOS transistor. C. Slew Rate The slew Rate of an amplifier circuit is defined as the maximum rate of change of the output voltage with respect to time. Slew Rate is usually expressed in units of V/µs. Slew Rate = () (6) D CMRR (Common Mode Rejection Ratio) The Common Mode Rejection Ratio of a differential amplifier defines the ability of the device to reject common-mode signals. Common-mode signals appear simultaneously and in-phase on both inputs of the amplifiers. The CMRR should be kept high to amplify differential signal in the presence of a possibly large common-mode input. The CMRR of the OTA should be as high as possible. CMRR= Ad/Ac = 20log10(Ad/Ac ) dB (7) II TECHNOLOGY SCALING With the advancement in very large scale integrated circuit technology, the requirement of the more efficient integrated circuit is increasing now a days. The requirement of the low power IC’s is increasing with the increasing demand of battery operated electronics products and portable devices in the electronic market. The battery operated devices must be designed to work on less power consumption because batteries provide limited power supply to the devices. The battery life of the portable devices affects with the higher power consumption in the devices. The , demand of these devices depends on various factor such that higher speed, lower delay, low area, low power consumption, small silicon area, longer battery life and high reliability. Today , leakage power has become a key issue in processor hardware and software design. The major component of leakage, the sub-threshold current, exponentially increasing with decreasing device dimensions. So, the Leakage current, is a primary concern for low power, high performance digital CMOS circuits design. III BULK DRIVEN TECHNOLOGY 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India Operational transconductance  amplifiers (OTAs) are key building blocks in analog microelectronics. Rail to rail operation is achieved through different type of techniques. One of the most common power reduction techniques is bulk driven technology. Bulk driven technique  is used for the low power application. Bulk driven transistor is same as to the gate driven transistor but only difference that ac input signal in applied to the bulk terminal for the creation of conduction between source and drain terminal shown in Figure 2. Bulk driven transistor requires the lower amount of the threshold voltage than the gate driven transistor. 243 IV PROPOSED OTA DESIGN The basic two stage Operational Transconductance amplifier is implemented with the 45nm technology is shown in Figure 3. The basic 2 stage operational transconductance amplifier is differential pair circuit. It uses the current mirror concept. Transistors that uses the current mirror circuit are designed for the having same aspect ratio. It means that the width and length of the transistors should be same. So that it follows the current mirror law and both the transistors should have same drain current Id. The Ibias is 50 µA used for designing of operational Transconductance Amplifier. The bulk driven technology is used to reduce the threshold voltage requirement for the Transistor. It also provides facility of the rail to rail input range. It means that we can input operating range from the 0.7V to 0.35V without affecting the performance parameter of OTA Figure 2. Bulk-driven NMOS transistor, (a) circuit operation; (b) cross section Bulk-driven circuits are typically used to handle the issues of poor signal swing in such cases . The limit of the minimum threshold voltage is increased with the Bulk driven technology that is the advancement in the gate driven technology where voltage supply requirement is limited by the threshold voltage. The result of this concept is that bulk-driven transistor operates on the same principle as junction-field-effecttransistor (JFET) is operated in its depletion mode. For , illustration purposes, a cross sectional view of the bulk-driven transistor are shown in Fig. 3(b). This operation reduces the threshold limit of the gate –driven MOSFETs where the bulk-to-source junction can be either positive, zero or negative biased while still acting as the high impedance node on condition that the junction parasitic lateral and vertical BJTs are not fully turned on. PMOS devices can be used as bulk-driven transistors [12-13]. Figure 4 Basic Two stage Operational Transconductance Amplifier schematic The proposed bulk driven OTA is implemented with the help of 45nm technology shown in Figure 5. The Supply Voltage is given to the bulk terminal and bias voltage is given to the gate terminal. The specification of the transistor is W= 45nm, and L= 120nm. Ibias current is 50µA for designing of the two stage Operational Transconductance amplifier. 978-1-5090-4724-6/17/$31.00 ©2017 IEEE 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 244 Figure 7. Power Consumption waveform of the two state OTA Noise performance of the bulk driven two stage operational transconductance amplifier is shown in Figure 8. Figure 5 Bulk Driven Operational Transconductance Amplifier circuit schematic The circuit is designed with the help of supply voltages range from 0.7V to 0.35 V at operating frequency of 100 MHz. The transient response for the proposed OTA is shown in Figure 6. Where Net13 represents the input waveform and Vout is the amplified output waveform. Figure 8 Noise waveform of the two state OTA Figure 6 Transient response of operational Transconductance Amplifier Figure 7 shows the power consumption waveform of two state bulk driven Operational Transconductance Amplifier for 0.7V Supply voltage. Figure 9 Waveform of leakage current the two state OTA 978-1-5090-4724-6/17/$31.00 ©2017 IEEE 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 245 show that power consumption of the bulk driven operation amplifier is lower than the other the basic OTA. Transconductance of the bulk driven operational transconductance amplifier is higher that the basic operational transconductance amplifier but the slew rate of the bulk driven is slightly lower than the basic operational transconductance amplifier. VI CONCLUSIONS Figure 10 Layout of the 2 stage Basic Operational Transconductance Amplifier Figure 9 shows the leakage current wave form the two stage operational transconductance amplifier. Leakage power is calculated from the value of the leakage current. It is observed from the waveform in Figure 10 is that the value of the leakage current and leakage power is reduced in the bulk driven operational transconductance amplifier. Figure 10, 11 indicates the layout of the basic two stage operational transconductance amplifier and bulk driven two stage operational transconductance amplifier. From the Table I it is shown that power consumption is reduced by 60.15% in the bulk driven operational transconductance amplifier compared to the conventional Operational Transconductance amplifier circuit without degrading the performance parameter of the circuit such as leakage current and leakage power and transconductance. But other parameter such as noise and slew rate is slightly degraded which is shown in fig. 12. The leakage current obtained for the proposed bulk driven operational transconductance amplifier is better than conventional operational tranconductance amplifier but Speed of the bulk driven operational transconductance amplifier transistor is lower than that of the conventional operational transconductance amplifier. Finally there is the trade of between the power and speed. For the low power application bulk driven operational transconductance amplifier is better choice A. TABLE I Comparative Analysis of Basic OTA with bulk driven OTA Figure 11 Layout of the 2 stage Bulk driven Operational Transconductance Amplifie V SIMULATION RESULT Table I shows the simulated result of 2 stage Operational Transconductance amplifier for Basic operational Transconductance amplifier comparing with the bulk driven Transconductance amplifier. The proposed OTA is implemented on 45nm CMOS technology. Table 1 OTA Parameter Basic Two stage OTA Bulk-Driven Two stage OTA Power consumption(p W) 39.15 15.6 Noise(V/µsec) 2.14X10-10 2.65X10-10 Leakage Current(nA) 3.31 3.106 Leakage power(nW) 7.65 7.13 Transconducta nce (mA/V) 15.36X10-9 27.3X10-9 Slew rate(mV/µsec) 693.3 637.2 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 45 40 Power Consumption 35 30 Slew Rate 25 20 Transconductanc e 15 10 5 0 Basic OTA Bulk Driven OTA Figure 12 Performance Parameter of Basic OTA with the Bulk driven OTA REFERENCES  Danupat Duangmalai, Khanittha Kaewdang, “A linear tunable wide input range CMOS OTA”, International Technical Conference of IEEE, Vol. 2, pp. 816-819,Oct. 2014.  W.G. Jung, “IC Op-Amp Cookbook” Howard W. Sams, pp. 440, First Edition, 1974. T. Stockstad, H. Yoshizawa, “A 0.9-V 0.5-rail-to-rail CMOS operational amplifier”, IEEE Journal of Solid-State Circuits,Vol. 37, pp.286–292, Mar. 2002.  L. H. C. Ferreira, T. C. Pimenta, and R. L. Moreno, ―An ultra-low voltage ultra-low-power CMOS miller OTA with rail-to-rail input/output swing,ǁ IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.54, no. 10, pp. 843–847, Oct. 2007.  Shouri Chatterjee, Yannis Tsividis,and Peter Kinget, “0.5-V Analog Circuit Techniques and their Application in OTA and Filter Designǁ IEEE Journal Of Solid-State Circuits, Vol. 40, No. 12, December 2005.  Siddharth Seth, Boris Murmann, “Settling Time and Noise Optimization of a Three-Stage Operational Transconductance Amplifier”, IEEE Transaction on Circuit and Systems, Vol. 61, No. 10, pp. 689-698, March 2014.  Joel Gak, Matías R. Miguez, Alfredo Arnaud, “Nanopower OTAs with Improved Linearity and Low Input Offset Using Bulk Degeneration”, IEEE Transaction on Circuit and Systems, Vol. 60, No. 5, pp. 1186-1174, May 2013.  Omar Abdelfattah, Gordon W. Roberts, Ishiang Shih, YiChi Shih, “An Utlra- Low Voltage CMOS Process-Insensitive Self-Biased OTA with Rail-to-Rail Input Range”,IEEE Transaction on Circuit and Systems, Vol. 62, No. 10, pp. 23802390, Oct. 2015.  Cristina Azcona, Belén Calvo, Santiago Celma, Nicolás Medrano, Pedro A. Martínez, “Low-Voltage LowPowerCMOS Rail-to-Rail Voltage-to-Current Converter”, IEEE Transactions on Circuits and SystemsI: Regular Papers, Vol. 60, No. 9, pp. 2333-2342, Sept. 2013.  Alfio Dario Grasso, Davide Marano, Gaetano Palumbo, Salvatore Pennisi, “Design Methodology of Subthreshold Three Stage CMOS OTAs Suitable for Ultra-Low Power LowArea and High Driving Capability”, IEEE Transaction on Circuits and Systems-1,Vol. 62, No. 06, pp. 1453-1462, June 2015.  L. Ferreira, S. Sonkusale, “A 60-dB gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process”, IEEE Transaction on Circuits and Systems -1, Vol. 61, No. 6, pp. 1609-1617, Jun. 2014. 246  S. O. Cannizzaro, A. D. Grasso, R. Mita, G. Palumbo, S. Pennisi, “Design procedures for three-stage CMOS OTA with Nested-Miller compensation ”, IEEE Transaction on Circuit and Systems -1, Vol. 54, No. 5, pp. 933–940, May 2007.  L. Zuo, S. Islam, “ Low - Voltage bulk inmproved transconductance”, IEEE Transaction on Circuit and SystemsI, Reg Papers, Vol. 60, No. 8, pp. 2084-2091, Aug. 2013.