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the internal losses to a value of r\d s: 0-28 mW/mA per facet.
The leakage currents, while reducing the slope efficiency to
some extent, more strongly affect the lasing threshold. This is
mostly due to the fact that the leakage currents strongly saturate when the lasing junction saturates and therefore appear
essentially only as a constant offset in the lasing threshold.
The dL/dl curve shows no evidence of any rollover in the light
output with increasing drive, which further indicates that
there are no current-dependent leakage paths above threshold.
In summary, equivalent circuit modelling has been used to
generate full derivative characteristics for the DCPBH laser
structure. Excellent agreement is seen between the experimental data and the characteristics predicted by the model with
minimal fitting of parameters.
D. E. ACKLEY*
Lytel Incorporated
Somerville, NJ 08876, USA
22nd September 1987
* Now with Siemens Research and Technology Laboratories, 105
College Rd. East, Princeton, NJ 08540, USA
References
1
MITO,
I., KITAMURA,
M., KOBAYASHI,
KE., a n d KOBAYASHI, KO.:
'Double channel planar buried heterostructure laser diode with
effective current confinement', Electron. Lett., 1982, 18, pp.
953-954
2
KUINDERSMA, P. i., VALSTER, A., and BAKS, w.: '1-3/an buried hetero-
structure laser diodes under high electrical stress: leakage currents
and aging behavior', IEEE J. Quantum Electron., 1985, QE-21, pp.
726-736
3 RENNER, D., COLLAR, A. J., GREEN, P. D., a n d HENSHALL, G. D . : ' H i g h -
power operation of DCPBH lasers emitting at l-52//m wavelength', Electron. Lett., 1985, 21, pp. 1006-1007
4
DUTTA, N. K., WILT, p. D., and NELSON, R. J. : 'Analysis of leakage
currents in 1-3nm InGaAsP real-index-guided lasers', IEEE J.
Lightwave Technoi, 1984, LT-2, pp. 201-208
5 NAGEL, L. w.: 'SPICE2: A computer program to simulate semiconductor circuits'. Electron. Res. Lab., Univ. California, Berkeley,
CA, Ref. ERL-M520, 1975
6 PAOLI, T. L., and BARNES, D. A. : 'Saturation of the junction voltage
in stripe-geometry (AlGaAs) double heterostructure junction
lasers', Appl. Phys. Lett., 1976, 23, pp. 714-716
7
DUTTA, N. K., NELSON, R. j . , WRIGHT, p. D., and CRAFT, D. c.: 'Cri-
terion for improved linearity of 1-3/an InGaAsP-InP buried heterostructure lasers', IEEE J. Lightwave Technoi., 1984, LT-2, pp.
150-164
8
Some of these devices have shown anomalies in the form of
a double hump in the substrate-current/gate voltage curves at
high values of Vd, the second hump occurring at high gate
voltages.4 It was further found that the effect is
unidirectional—reversing source and drain gives a single
hump, or vice versa. This indicates that the effect is nonsymmetrical, and has been ascribed to a weak or nonoverlap of
the gate with one of the junctions. A model has been proposed
in which the double hump stems from the strong field in the
weak overlap region,5 which arises from too large a carrier
concentration at high values of Vg in this weak nonoverlap
region that is not under gate control. This high field gives rise
to avalanche injection near the source junction and a substrate current. Although simulations show that this is possible,
and measurements have shown that current is injected into
the gate, no direct evidence has been published of the localisation of interface damage at the source end of the transistor
during stressing under high current density conditions.
In this letter the effect of stress on the double peak is
reported. It is shown that high field stressing under conditions
of strong source field lead to interface damage at the source
end, detectable by a threshold voltage increase, localised close
to the source junction. This is further confirmed by the
increase in the second Isub/Vg peak.
VALSTER, A., MEULEMAN, L. J., KUINDERSMA, P. I., a n d DONGEN, T. W . :
'Improved high-frequency-response of InGaAsP double-channel
buried heterostructure lasers', Electron. Lett., 1986,22, pp. 16-17
Experimental and results: The devices consisted of silicon
transistors of gate lengths between 11 to 1-5/xm fabricated on 8-15ficm substrates. The oxide had a thickness of
250 A. The thickness of the polysilicon gate was around
0-42 /mi, and m 0-3 fim spacers at either side. The arsenic nimplant dose was 1013/cm~2. The asymmetry is achieved by
implanting at a 7° angle, to avoid channelling effects. Simulation using the 2-D simulation programme TITAN6 was used
to confirm that the resulting structure was asymmetrical.
Stressing was carried out in the source weak overlap mode
(weak overlap at the source end), with Vd = 7 V and Vg = 16 V.
In the measurement of the damage, use was made of the space
charge region created by the applied drain voltage during the
ldJVg characterisation phase to localise the position of the
damage from the n + junctions.1 This is done with the weak
overlap both at the source (to be called SWO) and at the
drain (to be called DWO). The measurements were carried out
using the HP 4145 semiconductor parameter analyser. The
drain voltage conditions of aging were chosen such that hot
carrier damage at the drain junction is negligible even under
maximum aging conditions (i.e. Vg = Vd/2).
Fig. 1 shows the threshold voltage change after aging
(under the conditions of stress SWO, and Vg = 15-5, Vd = 6-5)
in both SWO and DWO modes, with drain voltage as the
variable. It can be seen that for SWO there is practically no
H-MOS
HOT ELECTRON DEGRADATION IN THE
SOURCE OF ASYMMETRICAL LDD
STRUCTURES
Indexing terms: Semiconductor devices and materials, Hot
electron effects
Hot carrier stressing has been carried out on LDD n-MOS
transistors with gate overlap asymmetry, under conditions of
strong source field (Vg > Vd). It is shown that, under these
conditions, the device actually suffers hot carrier stressing at
the source end of the transistor resulting directly from this
high source field.
110
0
Introduction: In the effort to reduce hot carrier degradation
effects arising from the high field region between drain and
source in silicon n-MOS transistors,1 several structures have
been proposed, such as double doped drain (DDD)2 and
lightly doped drain (LDD).3 These structures have in common
a modification of the region between the inversion channel
and the drain junction obtained through local ion implantations into and/or near the source and drain regions in order to
reduce high lateral fields and therefore hot carrier effects.
1356
(1267T1
Fig. 1 Threshold voltage shifts after stressing
SWO, Vg = 15-5 V, Vd = 6-5 V) in the forward (SWO) and reverse
(DWO) directions for different values of Vd
difference in threshold voltage for different values of Vd, indicating that the damage is outside the space charge region of
the drain. For DWO, however, there is a gradual decrease of
dVt with increasing drain voltage, indicating that the drain
voltage increasingly screens the damaged area. This confirms
ELECTRONICS LETTERS 3rd December 1987 Vol. 23 No. 25
that damage has indeed been created in the weak overlap area
when this area is at the source during stressing. It should be
noted that no damage was observed under the conditions of
Vg = 16 V and Vd = OV, indicating that the negligible FowlerNordheim tunnelling across the gate oxide is not responsible
for the source damage.
It has already been shown by simulations that the effect of
placing a fixed packet of charge at the source edge causes an
increase in field in this region,7 which leads to an increase in
the source-related second hump in the substrate current. Fig.
2 shows the effect on the l^bl^g characteristics of aging in
the SWO mode, with Vd = 6-5, F9 = 16V. The curves have
TAKEDA, E., KUME, H., NAKAGOME, Y., MANIKO, T., SHIM1ZO, A., a n d
ASAI, s.: 'An As-P (n + n~) double diffused drain MOSFET for
VLSI's', ibid., 1983, ED-30, p. 652
CHEN, T. Y., WU, A. T., KO, P. K., HU, C. M., a n d RAZOUK, R. K.\
'Asymmetrical characteristics in LDD and minimum overlap
MOSFET's', IEEE Electron Device Lett., 1986, EDL-7, pp. 16-19
KO, p. K., CHUN, T. Y., wu, A. T., and HU, c.: 'The effects of weak
gate-to-drain (source) overlap on MOSFET characteristics'.
IEDM Proceedings, 1986, pp. 292-295
GERODOLLE, A., MARTIN, s., and
MARROCCO, A.: 'A finite element
method applied to 2-D MOS process simulation and defect diffusion: the programme TITAN'. NASECODE IV, Dublin, Ireland,
19-21 June 1985
HUANG, T.-Y., SZETO, C , CHAN, J. Y., LEWIS, A. G., MARTIN, R. A.,
SHAW, j . , and KOYANAGI, M.: 'Stress-induced double-hump sub-
strate in MOSFET's', IEEE Electron Device Lett., 1986, EDL-7, p.
664
-10
DEPOLARISATION IN Ti : LiNbO3
WAVEGUIDES AND ITS EFFECT ON
CIRCUIT DESIGN
Indexing terms: Integrated optics, Optical waveguides
Ti: LiNbO 3 waveguides are analysed to determine their
depolarisation properties. Depolarisation in 3 cm-long x-cut
crystals is consistently — 30 to — 35 dB, suggesting there is an
inherent mechanism limiting the crosstalk to this level. Substantial improvement in crosstalk can only be achieved by
placing polarising elements at the sample ends.
180
1126/21
Fig. 2 Substrate-current/gate-voltage characteristics before stressing,
and after stressing at Vg = 16, Vd = 6-5 V for weak overlap at source
(SWO)
been taken at given fixed times of stressing. It can be seen that
the second peak of the substrate current increases with aging,
in agreement with the model and with the results of Fig. 1.
The first peak decreases slightly due to the charge at the
source which acts as a resistance, and thus decreases both the
channel current and, consequently, the substrate current. It
should be noted that, although increases in the second hump
with aging have previously been reported,7 this has been done
by stress damaging the drain conventionally, and inverting the
transistor for the lsub/Vg curves. In this case the transistor is
stressed and measured in the same configuration, and the
change in substrate current results directly from source hot
carrier damage.
Acknowledgments: The authors would like to thank the device
fabrication team of CNET, Grenoble, in particular Dr. D.
Bois, for the transistors measured. Thanks are also expressed
to A. Zylberstejn for helpful discussions. Partial support for
this work from the EEC ESPRIT (SPECTRE) project no. 554
is gratefully acknowledged.
B. S. DOYLE
M. BOURCERIE
P. LECLAIRE
A. BOUDOU
28th September 1987
BULL Company
Avenue Jean-Jaures
Les Clayes sous Bois, 78340 France
P. DARS
CNET
Chemin du Vieux Chene
Meylan, 38243 France
References
1
2
FAIR, R. B., and SUN, R. c : Threshold voltage instability in
MOSFET's due to channel hot-hole emission', IEEE Trans., 1981,
ED-28, pp. 83-94
OGURA, S., TSANG, P. J., WALKER, W. W., CRITCHLOW, D. L., a n d
SHEPARD, J. F.: 'Design and characteristics of lightly doped drainsource (LDD) insulated gate field-effect transistor', ibid., 1980,
ED-27, p. 1359
ELECTRONICS LETTERS 3rd December 1987 Vol. 23
Introduction: The need for accurate polarisation control in
Ti: LiNbO3 integrated optical circuits has resulted in a great
deal of research on integrated optical polarisers.1"5 An equally
important issue which has received less attention is depolarisation in Ti: LiNbO3 waveguides. This issue is the subject of
this work. The data presented in this letter suggest there is an
inherent mechanism limiting the polarisation extinction in
Ti: LiNbO3 waveguides to 30-35 dB for 3 cm-long x-cut
samples. This problem can be overcome by placing a short
proton-exchanged waveguide at the output of the sample, in
which case the polarisation extinction increases to 55-60 dB.
Waveguide fabrication and characterisation: Six x-cut samples
were fabricated in this study. The Ti-diffused waveguides were
designed to support a single, well-guided TE and TM mode at
0-82 fxm. The fabrication parameters (Ti thickness = 40 nm,
width = 5//m, temperature = 1025°C, time = 4-5 h) and the
substrate length (3 cm) were the same for all samples. The
effect of lithographic processing was examined by using the
lift-off technique on three samples and wet chemical etching
on the other samples and using both MEBES and PGgenerated masks. In addition, waveguides were fabricated on
optical-grade LiNbO3 substrates purchased from two
vendors.
The Ti: LiNbO3 waveguides were characterised at 0-82 /an.
Power was coupled into and out of the waveguides using 20 x
strain-free objectives. A Glann-Thompson polariser was used
to polarise the input light while a second polariser was used to
analyse the waveguide output. The polarisation crosstalk was
determined by exciting the waveguides with the TE mode and
then dividing the output TM mode power by the output TE
mode power. Similar measurements were performed for TM
mode excitation.
The dynamic range of the polarisation crosstalk measurements was 63 dB and was limited by the Glann-Thompson
polarisers. The crosstalk introduced by the strain-free objectives was below the resolution of the experimental set-up.
When standard commercial objectives were used instead of
the strain-free objectives, the dynamic range of the measurement system was reduced to 35-40 dB. To demonstrate a measurement resolution greater than 60 dB, proton-exchanged
LiNbO;, channel waveguides were used. The protonexchanged waveguides were fabricated by exchanging in pure
No. 25
1357
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