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significantly less abrupt. The saturation region has a more
ideal shape, but with lower drive currents of 2.25 mA because
of the additional series resistance of the lightly doped region.
With the lower n+ drain implant, simulation suggests further
improvement in the breakdown voltage of up to approximately 1 V. This improves the saturation characteristic and
rate of breakdown at the expense of lower drive currents
decreased by a further 6%.
To increase drive currents requires a thinner gate oxide.
When the gate oxide of the device in Fig. 3 is reduced to
140A,a 29% increase in drive current is predicted, but at the
expense of a reappearance of the kink effect, indicating partial
depletion because of the higher film doping required to maintain the threshold voltage at 0.6 V.
Fig. 4 shows the predicted effect of reducing carrier lifetimes
from
to lO-’s on both non-LDD and LDD devices. As
the carrier lifetimes decrease the breakdown voltage is seen to
rise, an effect predicted by theory. Thus to increase the breakdown voltage by for instance 1 V, in the non-LDD transistor,
requires reducing carrier lifetimes by approximately two
orders of magnitude to a t most lO-’s. In practice gold impurities are normally added to reduce carrier lifetimes3 but to
obtain lifetimes of lO-’s requires the gold impurity concentration to be comparable to the film doping, which in turn
reduces the effective film doping. As a result the threshold
voltage suffers, requiring higher film doping and degrading the
transistors breakdown voltage. In addition the leakage current
caused by generation of carriers from the gold centres will be
appreciable.
Procurement Executive, Ministry of Defence (RSRE) are also
acknowledged.
9th April I990
G. A. ARMSTRONG
W. D. FRENCH
Department of Electrical Engineering
The Queen’s University ofBelfast
Belfast BTY 5 A H , United Kingdom
References
1
2
‘Subthreshold slope of thin-film SO1 MOSFETs’,
IEEE Electron Device Lert., 1986,EDL-7, (4),p. 244
COLINGE, J. P.: ’Reduction 01 kink effect in thin-film SO1
MOSFETs’, IEEE Electron Device L e t t , 1988. EDL-9, (2). p. 97
COLINGE, J P.:
3 GROVE,
A. s.: ‘Physics and technology of semiconductor devices’
(Wiley, 1967)
YOUNG, K. K., and BURNS,
I. A.: ‘Avalanche induced drain source
breakdown in silicon-on-insulator n-MOSFETs’, IEEE Trans.,
1988, ED-35,(4),pp. 42-31
5 SELBEKHERR,
s.: ‘The status of minimos’, in BOARD, K. (Ed.): ‘Simulation 01 semiconductor devices and processes’ (Pinebridge Press,
1986), Vol. 2
6 ARMSTRONG, G. A., THOMAS, N. J., and DAVIS, J. R.: ‘Characterisation
of negative resistance and bipolar latchup in thin film SO1 transistors by two-dimensional numerical simulation’. Proc. IEEE
SOSjSOI Technology Conf., Nevada, 1989, pp. 4 4 4 5
7 SZE, s. M.: ‘Physics of semiconductor devices’ (Wiley, New York,
1981)
8 mum, s.: ‘Design and characteristics of the lightly doped drainsource (LDD) insulated gate fieldxffect transistor’, IEEE Trans.,
1980,ED-27, (a), pp. 1359-1368
4
MONOLITHICALLY INTEGRATED
In,.,,Gao.4,As/ln,.,.AI,.,,As
(ON InP)
MSM/HFET PHOTORECEIVER GROWN BY
MBE
Indexing terms: Semiconductor devices and materials, Optical
receivers
carrier
lifetimes , s
m
u
Fig. 4 Dependence of simulated breakdown uoltage on carrier lfetime
0.5pm LDD and non-LDD transistors for different levels of drain
implant dose
0+ Drain implant dose 5 x l O ” c n ~ ’at SOkeV
046 Drain implant dose 5 x I0”cm~’at 5OkeV
Conclusions: The application of two-dimensional simulation
as an aid in the design of a 0.5pm gate length n-channel SO1
MOSFET, with a target threshold voltage of 0 . 6 V was presented. This involves the two-dimensional simulation of the
breakdown characteristics of ultra thin film SO1 transistors.
The simulation predicts that a breakdown voltage in excess of
3.5 V can be achieved for an SO1 film thickness of loo0 A, if a
lightly doped drain is employed. By reducing the doping in
the n + drain region, even higher breakdown voltages are predicted. The LDD also improves the shape of the currentvoltage characteristic and reduces the rate of breakdown, but
at the expense of a decrease in drive current, as well as an
increase in fabrication complexity. Trends to reduce gate
oxide thickness below 200A are expected to re-introduce
problems because of the kink effect, caused by the need for
higher film doping to maintain a fixed threshold voltage.
Control of the breakdown voltage by reducing carrier lifetimes is possible, but would present major difficulties in practice.
Acknowledgments: The authors wish to thank J. R. Davis of
British Telecom Research Laboratories for many helpful discussions. The partial financial support from the United
Kingdom Science and Engineering Research Council and the
1198
High speed results on In,.,,Ga, L,AsjIno.52Al,,
&*AS(on InP)
planar doped heterojunction-FETs and 1.3-1.6~m
wavelength-compatible metal-semiconductor-metal photodetector devices fabricated from a vertically stacked device
design with the FET overlaying the detector structure are
reported. A cut-off frequency lor unity current gain of
30GHz was achieved with a I h m gatelength. The photodetector at 7V bias had a photoresponse and dark current of
0.48 A/W and 24nA, respectively. At 1OV bias the FWHM of
the impulse response was 65 ps. A simple near-planar monolithically integrated photoreceiver was successfully fabricated
requiring no special processing or regrowth steps.
A monolithically integrated photoreceiver taking advantage of
the low loss and reduced dispersion between 1.3-1.6pm wavelength is desirable for high speedflong distance fibre optic
links. The metal-semiconductor-metal (MSM)/heterojunction
FET (HFET) photoreceiver utilising the Ina,s3Gaa.4,
As/In,.,,AI,.,,As
materials system is a promising technology
for taking advantage of this transmission window. The MSM
photodetector is a planar device which has demonstrated
good performance characteristics and yield because of its
inherently low capacitance and ease of fabrication, making it
ideal far optoelectronic integration.
A recent demonstration of this concept used metal organic
chemical vapour deposition and a design with the photodetector overlying the HFET structure.’ Patterned substrates
and selective etches were required to achieve a planar process.
Another approach involved a structure stacked in the reverse
order (FET overlays the MSM) grown by chemical beam
epitaxy using the In,,,Ga,.,,As/InP
materials system? This
order of stacking eliminates the need for patterned substrates
and selective etches, but requires good vertical isolation
between the device structures.
The integration approach described in this letter is a
mixture of the two previous approaches, combining the
ELECTRONICS LEUERS
19th July 1990
Vol. 26 No. 15
In,.,,Ga,.,,As/In,
,,AI,.,,As
materials system with the latter
‘reversed-stacked’ structure. The epitaxial layers were grown
by MBE. A planar-doped structure is used for the HFET. A
Ino.5zAlo.48Asbuffer layer provides the vertical isolation
between the MSM and the HFET structure. The device struc~
layer, followed
ture consists of a 0.3pm lno.52Alo4 8 A buffer
absorbing layer, a 0.2pm
by, a 0.5pm In,.,,Ga,.,,As
In,.,,[Ga,A1, -x]0.47A~layer linearly graded between x = 1
and x = 0, and a 0.15pm ln,,.52Alo..,8As isolation and
Schottky formation layer. The HFET then follows with a
5008, In,.,,Ga,.,,As
channel layer, a 40A Ino.52Alo.48As
spacer layer, a 7 x 1 0 1 2 c n ~planar
2
doped silicon electron
supplying layer, a 200A In,. ,AI,.,,As layer for Schottky forcap layer doped
mation, and finally the l00A In,.,,Ga,.,,,As
to 4 x 10’8cm-3 with silicon. The devices were fabricated
utilising conventional contact photolithography and lift-off
processes. Sputtered SiN is used to passivate the devices and
to allow crossover interconnections. No trench isolation step
was used to reduce interference between the active devices.
The inset of Fig. 1 shows a simplified cross-section of the
photoreceiver structure.
3120
l
5
O
7
with negligible substrate leakage and trap effects. This demonstrates that the Ino.5zAlo.48Asbuffer layer provides sufficient
isolation between the HFET and the deeper 0 5 p m
In,,,Ga,.,,As
absorption layer (- 1.0 x 1 0 i 6 c m ~ ’N , - N,)
for the MSM. A maximum cut-off frequency for unity current
gain of 30GHz measured on a 1 x 100prn’ device further
demonstrates the isolation of the HFET from the MSM structure.,
d r a i n - s o u r c e voltage , V
q
Fig. 3 Current-voltage curves
1 x 20pm’ gate HFET
90
Fig. 4 shows the simple MSM/HFET/load resistor photoreceiver circuit. A 30 x 30pm2 MSM is connected to the
1 x 35pm2 gate of an HFET. The circuit was intended for
low-speed testing, and has a 6.5 kR load resistor. The output
was taken from the source of the HFET, through a 2 0 0 n
resistor to a 50R scope input, thus dividing the output amplitude by five. Fig. 5 shows a clean eye diagram of the circuit
30
0
8
4
blas
12
voltage,V
2C
16
ii‘.,’J
--
Fig. 1 Photocurrent-voltage curve for M S M photodetector
Inset shows cross-sectionof structure
Fig.
1 shows the photocurrent-voltage
curves of a
50 x 50pmZ photodetector with finger width and spacing of
1.5 and 3.0pm, respectively, measured using 1.3pm wavelength excitation. The photodetector response saturated at
7 V bias and demonstrated little increase in responsivity
with further increase of bias. This is unlike the unpassivated
photodetectors where significant gain was observed., The
photoresponse at 7 V is 0.48 A/W with a corresponding dark
current of 24 nA which increases to 600 nA at 20 V.
The measured capacitance of the MSM device was dominated by the large area pads. A MSM with a laterally isolated
active region (i.e., no epilayer beneath the pads) was a better
indication of the intrinsic capacitance of the photodetector
integrated into the receiver circuit where the first metal area is
minimised. The measured capacitance decreased from 2W
250fF without bias to 4&50fF at 20V bias owing to depletion under the metal pads and fingers.
Impulse response measurements were performed using the
5ps output of a pulse-compressed, modelocked, Nd : YAG
laser at a wavelength of 1.06pm.Fig. 2 shows the impulse
response with a FWHM of 65ps observed at IOV bias.
I-V characteristics of a 1 pm heterojunction FET at room
temperature are shown in Fig. 3. The maximum extrinsic
transconductance is 325 mS/mm. The data show good pinchoff and little kink-effect indicating good carrier confinement
-
;.;;U
Fig. 4 Micrograph of MSMIHFETIloud resistor photoreceiver circuit
ly
m
Vl
e-
@:
30
20
10
200
LOO
600
time, p s
800
1000
rn
Fig. 5 Eye diagram of photoreceiver circuit
100 Mbit/s pseudo-random NRZ input signal
Fig. 2 Pulse response at 10 V bias for M S M photodetector
ELECTRONICS LETTERS
19fh July 1990 Vol. 26
No. 15
1199
with a 100 Mbit/s pseudorandom NRZ input signal. The calculated capacitance at the gate of the HFET is about 0,5pF,
giving an R C time constant of 3.111s. This time constant,
clearly seen in the rise and fall times, limits the response time
of this test circuit.
In conclusion we have achieved high speed results on
Ino.,,Gao.4,As/Ino.,,AIo.48As(on InP) based planar doped
HFETs and MSM photodetectors which were fabricated from
a stacked structure using Ino.~zAlo.48As
for vertical isolation.
The operation of a simple near-planar monolithically integrated photoreceiver was successfully demonstrated.
The authors wish to thank Tom Kerr of Northeast Semiconductor, Inc. for assistance in the early part of this work.
H. T. GRIEM
H. S . FUJI
T. J. WILLIAMS
J. P. HARRANG
18th April 1990
R. R. DANIELS
S . RAY
M. J. LAGASSE
D. L. WEST
where the As represent SAW amplitudes defined such that
I A 12/2 is the power of the wave in question, subscript t refers
to waves leaving the SPUDT and i to waves incident on the
SPUDT. Additional subscripts 1 and 2 refer to the acoustic
ports (port 1 being the 'forward' port). I and V are the current
and voltage at the electrical port, respectively. The acoustic
ports are taken to be at reference positions which are possible
locations for the transducers, as defined earlier.'
A relationship for P I , (eqn. 3 below) is first derived, which
is the amplitude of the wave emerging at the forward acoustic
port when unit voltage is applied to the SPUDT. From power
I P,, 1' = G,, where G , is the
conservation3 we have IP,, 1'
parallel conductance of the SPUDT. Since P I , and P,, are
the output wave amplitudes when unit voltage is applied we
must have I P,,/P,, I = D at the centre frequency, where D is
the directivity defined earlier.' From eqn. 3 in Reference 1, we
have D2 = (1 + R)/(1 - R) and the above equations give
+
Ipi3 I2 = fG,(l
Boeing Aerospace & Electronics
PO Box 3999, MIS 7556 Seattle, W A 98124-2499, U S A
References
HONG, W. P., CHANG, G. K., BHAT, R., GIMLETT, J. L., NGUYEN, C. K.,
SASAKI, G., and KOZA, M.: 'High-performance AI, 481n0.s2As/
Ga,.,,ln, ,,As MSM-HEMT receiver OEIC grown by MOCVD
on patterned InP substrates', Electron. Lett., 1989, 25, pp. 15611563
YANG, L, SLIDBO, A. s., TSANG, w. T.,GARBINSKI,e. A., and CAMAUDA,
R. M.:ICCBE, Houston, Texas, Dec. 1989, TA7
GRIEM, H. T., RAY, S., FREEMAN, J. L., and WEST, D. L.: 'Long(14-1.6pm)
wavelength
In,,.52.410
,,As/In,.,,(Ga,Al, -Jo.4,As/Ino.s3
Ga,.,,As
metalsemiconductor-metal photodetector', Appl. Phys. Lett., 1990, %,
pp. 1067-1068
HARRANG, 1. P., D*NIEL$ R. R., FUJI, H.S., G W , H. T., and RAY, S.:
'High performance InAIAs/InGaAS HFET compatible with
opticaldetector integration: submitted to Electron Dev. Lett.
PERFORMANCE TRADE-OFFS IN SAW
G ROUP-TYPE SPU DTs
Indexing t e r m : Ultrasonics, Surface-acoustic-wave devices
The centre-frequency conversion and reflection coefficients of
a SPUDT can be deduced from the directivity if the electrical
load is designed either for minimum conversion loss or for
zero acoustic reflection.A 3dB conversion loss is obtainable,
with zero acoustic reflection, if the directivity is 3 dB.
(1)
'31
1200
p32
p33
(2)
where R is the grating reflection coefficient in the absence of
the transducers.' Now consider the phase of P , , , and consider
first a single transducer with no gratings. The transducer is
assumed to have a symmetric structure and to be free of electrode interactions. Assuming the wave amplitude A bas the
same phase as the surface-wave potential c$",and referring the
phase to the centre of the transducer, it can be shown that P I ,
is imaginary. This follows from Reference 4 with the observation that the electrostatic charge density is real and symmetric
and hence its Fourier transform p,(k,) is real. Consider one
transducer in a SPUDT, the waves being caused by other
transducers and gratings with the same phase at the centre
frequency. P I , must be imaginary for the SPUDT. Consequently, eqn. 2 gives
P;, = - f G a ( l
+ R)
(3)
Consider a SPUDT connected to an electrical source or load
with impedance Z, = R, j X . Two values for Z, are considered, the first electrically matches the transducer. Since the
SPUDT admittance is P,,, for this case Z, = l/P:,. The
centre frequency conversion coefficient is readily deduced
because all the available power applied to the electrical port
emerges as SAW power. The two SAW powers are in the ratio
0'. The conversion coefficient for the wave launched at port 1
is therefore
+
c = P~.,,/P, = D ~ / ( +
D ~1)
(4)
For an acoustic wave incident on port 1, the reflection coeffcient is, from eqn. 1,
Si,
In a previous letter' it was shown that the centre-frequency
directivity of the group-type SPUDT' is given by a simple
formula dependent only on the properties of the reflective
gratings in the device. In this letter this result is extended to
show that other important properties are also given by simple
formulae dependent only on the directivity. These are the conversion and reflection coefficients for an electrically matched
SPUDT and the conversion coefficient for a SPUDT with an
electrical load so that the acoustic reflection coefficient is zero.
As in the previous work' it is assumed that the device is
lossless and that the transducers have symmetric structures
and negligible electrode interactions. The gratings are positioned with a kL/8 displacement so as to reinforce waves in
the forward direction, and velocity shifts are ignored. The
device performance is considered only at the centre frequency.
The results are valid for SPUDTs in which the transducer
designs or grating reflectivities are varied along the device in
order to tailor the frequency response.
The SPUDT performance is conveniently expressed in
terms of the P-matrix used by H a r t ~ n a n n defined
,~
by
+ R)
=
A,i/Aji = Pi1
+ 2p:,/(p3, + l / Z d
(5)
where P I , is the acoustic reflection coefficient when the
SPUDT is shorted. In this situation the transducers do not
reflect because they are assumed to be free of electrode interactions, hence P , , = R. It also holds that Z, = l/P:3, and the
real part of P,, is G,. Using these relations and eqn. 3 gives
SI, = f ( R - 1) = - l / ( D 2
+ 1)
(6)
where the second form follows from eqn. 3 of Reference 1.
The second value of Z, to be considered is that which gives
zero acoustic reflection coefficient at port 1. The reflection
coefficient of eqn. 5 remains valid, so for zero reflection
ZL =
-p11/(2p:3
+ p11p33)
where P , , = R and P , , is given by eqn. 3. Writing the
SPUDT admittance as P,, = G, j B
+
Z,
=
R/(G, - j B R )
(7)
-
As expected, this gives Z , = l/P;3 when the SPUDT
approaches complete directionality ( R 1). For a bidirectional transducer (R = 0), zero reflection is obtainable only when
ELECTRONICS LETTERS
19th Julv 1990 Vol. 26 No. 15
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