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4oo
400
r
E l
E
E
2200
E
-
v
Ln
00
00
15
30
gatevoltagev !
I
gs
Fig. 1 DC'1 , -V,, and transfer lk-gn,-V chararreristics
InAIGaAs/ln&As HEMTs with gute Ie&h of 0.8pm
of
quaternary
0 Id$- V'a
h ld\-g,".v,,,:
Vd. = 2v
parameters and power gain, the current-gain cutoff frequency fr
and the maximum oscillation frequency f,, were determined, and
the results are shown in Fig. 2. An f, of 35GHz and an fmT of
76GHz were obtained for this 0.8pn-long gate InAlGaAs QHEMT.
I
'"h
0
I
10 '0
IO"
frequency Hz
FEE
Microwave characteristics of quurernary InAIGaAs/InGoAs
109
Fig. 2
HEMTs with gate length of 0 . 8 p
P.H. Hao, L.C. Wang and B.J. Wu
After characterising the DC and R F performance of this InAIGaAsilnGaAs Q-HEMT, we evaluated the device reliability.
Unpassivated Q-HEMTs were continuously biased at V , = 2V
and Vzs=: 4 5 V conditions. After 36h of stress at room temperature, as revealed in Fig. 3, Q-HEMTs demonstrated almost no
change in I,!, (300mA/mm), and the associated gm drop was only
2.5% from its original value. The Schottky barrier height (+J and
ideality t'dctor (n) remained unchanged after this 36h biasing
stress. However, in the results reported for the unpdssived conventional InAIAshGaAs HEMT [2], a significant I , drop was
observed after stress. We also evaluated the temperature dependence of the Schottky diode (from 23 lo 170°C). The gate leakage,
Vx, = --2V, remained almost constant (from 0.6 to
biased
0.78mAimm) within this temperature range, and the associated nvalue was slightly increased from !.IS to 1.19.
In summary. quaternary InA1GaAs:InGdAs HEMTs have been
rxperimrntally fabricated and investigated. These Q-HEMTs
achieved similar DC and R F performance as compared to conventional InAlAs/InGaAs HEMTs. However, the device has superior
1106
..-
r
Low resistance (-10-6 Qcm21ohmic contact
to n-GaAs processed a t 175°C
Indexing terms: Gallium arsenide. Ohmic contacts
-
A low resistance (10-6Rcm2)
AdGeIPd ohmic contact processed
at 175°C has been developed to n-GaAs ( n
IOi8cm-'). The
ohmic contact formation mechanism can be rationalised in terms
of the solid phase regrowth (SPR) principle and the interdiffusion
of Au and Ge.
Introduction: Since the early 1980s. a series of ohmic contacts
based on the solid phase regrowth (SPR) [I,21 principle have been
developed for n-type and p-type GaAs and AIGaAs. Among these
contact schemes, the GelPdin-GaAs contact system developed by
Marshall ef al. in 1985 [3] has attracted much attention and played
an important role in novel GaAs-based device fabrication owing
to its superior electrical properties and smooth interfacial morphology 14, 51. The ohmic contact formation mechanism of the
W P d contact has been discussed in [6] in terms of the SPR
process and is characterised by the following:
ELECTRONICS LETTERS
22nd June 1995
.
I
Vol. 31
No. 13
" ,l.,j",,ll~,ly,v
,* U".,-
--
~~-~--
(i) A limited solid phase reaction occurs between the Pd layer and
the GaAs substrate to form a thin metastable Pd,GaAs ( x = 4)
layer at low temperature (5 1Do"C).
r
t
When annealed at elevated temperatures, another solid phase
reaction begins a t the Ge/Pd interface to form PdGe until all the
Pd is consumed
(11)
-~
~~
~~~
(iu) The excess Ge for the formation of PdGe drives the Pd,GaAs
layer at the metal-semiconductor interface to decompose, resulting
in a regrown Ge-doped n+ GaAs layer. Following the solid phase
regrowth of the n+-GaAslayer, the excess Ge is transported to the
contact-semiconductor interface and epitaxially grows on the
regrown GaAs layer. as a result of a solid phase epitaxy process
173.
4
6
8
annealing time. h
Fig. 1 Confact resistivities of samples C and D against annealing timr
at 175 "C
0
The final contact structure is PdGelepi-Gelregrown n--GaAs/nGaAs substrate. The contact is, therefore, a tunnelling ohmic contact as well as a heterostructure ohmic contact.
Contact resistivities p<of the order of IIPRcm' or lower on nGaAs (n = 10'*cm ') have been reported for the G d P d contact
annealed at 250°C or above [SI. In contrast, high contact resistivities (2 LO 4Clcm?)were obtained for the GeRd contact annealed at
temperatures < 225°C. However, there may be a practical need for
device fabrications to have low resistance ohmic contacts processed at low temperatures (e.g. 5 200°C. which is much lower than
the processing temperatures for the conventional Au-Ge based
contacts). We report the feasibility of forming low resistance Ge/
Pd-based contacts processed at temperatures < 200°C. We have
achieved p, of = 1O6Qcm' for the modified Ge/Pd contact
annealed at -175°C.
*
2
time to obtain ohmic behaviour of contactLannealed at 175°C
Results m d discussions: Table 1 summarises the electrical properties of all the samples annealed at 175°C. Ohmic behaviour for
sample A was not obtained until the annealing time was increased
to IOh. The contact resistivity for sample A is of the order of high
10~4Rcm'for this annealing condition (175°C. ]Oh). It is about
two orders of magnitude higher than that for sample A annealed
;it 325°C for 30min. In contrast, it took -2h for sample C to
become ohmic at 175°C. It is clear that shorter annealing times
are required for samples of thinner Pd layers to achieve ohmic
behaviour. This suggests a kinetics-controlled nature of the solid
phase regrowth process leading to the ohmic behaviour of samples
A and C. Also shown in Table I, the capping of GeiPd contacts
with Au layers (i.e. samples B and D) reduces the time to obtain
ohmic behaviour and lowers the final contact resistivities.
From Table I. it is clear that contacts of thinner Pd layers are
more practical from a low temperature processing point of view.
Fig. 1 shows the contact resistivity against the annealing time at
175°C for samples C and D. The contact resistivity of sample D
was -10~hQcm2
after annealing for > 30min. To the best of our
knowledge, 175°C is the lowest processing temperature reported
for ohmic contacts with p< of -10-6Qcm2 on n-GaAs. In contrast,
the lowest contact resistivity of sample C annealed at 1 7 5 T is
-10 4i2cm', two orders of magnitude higher than that of sample
D. Fig. 1 also indicates that sample D is stable a t 175°C.
The reactions that lead to the low contact resistivities of samples B and D processed at such low temperature (175°C) can be
rationalised as below:
As discussed in the Introduction, the final contact layer structure of sample A annealed at temperatures > 250°C is PdGe/epiGelregrown n+-GaAsln-GaAs substrate. The overall resistance
between the contact surface (i.e. PdGe) and the n-GaAs substrate
is low since the resistivities of PdGe and epi-Ge are low and the
contact resistivity between the epi-Ge and the regrown n+-GaAs is
small. Comparing the experimental results shown in Table I and
Fig. I. it is believed that the SPR process, i.e. the decomposition
of the Pd,GaAs layer and the solid phase regrowth of an n+-GaAs
layer, is a kinetics-controlled process and occurs at 175°C. The
amount of time required for completion of the SPR process
depends on the thickness of the Pd layer. Contacts of thicker Pd
layers require more time to become ohmic when annealed a t
175°C. However, the solid phase transport of the excess Ge
through the PdGe layer and the epitaxy of Ge are not expected at
175°C [7]. Thus. the final layer structures for samples A and C
annealed at 175°C for IOh are both Ge(amorphous)/PdGe/
regrown n+-GaAsln-GaAs Substrate. The resistivity of the amorphous Ge layer is expected to he high. which results in a high
overall contact resistivity between the contact surface (amorphous
Ge) and the n-GaAs substrate. To reduce the overall contact
resistance, the amorphous Ge layer needs to be transported and
epitaxially grows on the regrown n+-GaAs layer or the conductivity of the amorphous Ge layer needs to be enhanced. The former
case can be achieved by annealing samples at higher temperatures
(> 250"C), and the latter case can be achieved by capping samples
with an Au layer and annealing them a t IOW temperatures ( 5
200°C). Au and Ge do not form compounds below their eutectic
temperature [9], however, significant interdiffusion between Au
and Ge has been observed at temperatures r: -250°C [IO]. It is
highly likely that the final layer structures of samples B and D
annealed at 175°C will be both AulGe:AulPdGe/ n+-GaAsinGaAs. where Ge:Au denotes the incorporation of Au in the Ge
layer. It is believed that the incorporation of Au in the amorphous
Ge layer increases the conductivity of amorphous Ge. Therefore,
the overall contact resistance between the sample surface (i.e. Auj
and n-GaAs is significantly reduced. Based on this model, a lowering of the processing temperature (e.g. 150°C) to obtain a low
contact resistance may be feasible by further reducing the thickness of the Pd layer. Vel-ification of this model is currently under
investigation.
ELECTRONICS LETTERS
No. 13
Contact fahricurions: The substrates for this study were semi-insulating GaAs (100) wafers with Si-doped surface layers (-10i8cm j,
0.2p1, -lOOnlO) prepared by metal organic chemical vapour
deposition (MOCVD). Prior to contact deposition. the substrates
were cleaned using organic solvents followed by a rinse in deionised (DI) water. The native oxide was then removed using
HCI:H,O (1:l by volume) followed by a DJ water rinse and blown
dry with nitrogen. The following contact structures were prepared
on the substrates mentioned above in a multi-pocket electron
beam evaporator with a base pressure of -5 x I O 8 torr: (A)
Ge(1 lOOA)/Pd(5OOAl. (BI Au(IOOOA)/Ge(l IOOA)/Pd(500A), (C)
Ge(SOOA)lPd(1 OOA) and 11)) Au( IOOOA)iGe(50OAj/Pd(IOOA),
with Pd layers deposited adjacent to the GaAs substrates. The
contacts were annealed in a conventional tube furnace in flowing
nitrogen gas at temperatures ranging from 175 to 325°C for
3Omin to 10h. The contact resistivities of the contacts were
obtained using transmission line model (TLM) [8] measurement.
Table 1: Summary of electrical properties of samples A
~
D
annealed at 175°C
5 30min
To = time to achieve ohmic hehavior when annealed at 175°C.
= final specific contacl resistivity annealed at 175°C for IOh
p.
22nd June 1995
Vol. 31
1107
Acknowledgments: The authors at Texas A&M University
acknowledge the support of NSF and the Ultra program from
ARPA via ONR. The authors thank T. F. Kuech for the supply
of the MOCVD-grown substrates used in this study.
0 IEE 1995
Eleclronrcs Letters Online No: 19450704
28 February 1995
P.H. Hao and L.C. Wang (Mail-stop-3128, Department of Electrical
Engineerihg, Texas A&M Univrrsity, College Station, T X 77843-3128,
USA)
B.J. Wu (3M Science Research Laboratory, 3M Center Bldg.. 20l.lN35,SI. Puul, M N 55144-1000, USA)
References
and WANG. L.c.: 'Solid-phase regrowth of
compound semiconductor by reaction-driven decomposition of
intermediate phases', J. Muter. Res., 1988, 3. pp. 914-921
WANG.
L.c.: 'The develepment of solid-phase regrowth on GaAs
and its appkations' in KVAM, E.P., KING, A.H., MIL.LS, M.J., SANDS,
T.D.. and VITEK, v. (Eds.): 'Materials Research Society Symp. Proc.,
Vol. 139: Defect-interface interaction' (Materials Research Society.
1994). pp. 93-104
MARSHALL. E.D., CHEN. W . X . WU, C.S.. LAU. S.S.. and KUECH.T.1.:
'Non-alloyed ohmic contact to n-GaAs by solid epitaxy', Appl.
Ph-vs. Lett., 1985, 47. pp. 298-300
MARSHALL. E.D.,
ZHANG, 8.. WANG. L.C., JIAO, P.F., CHEN, W.X.,
SAWADA. T., LAU. s.s.. KAVANAGH. K.L.,and KUECH. T.F.:
'Nonalloyed
ohmic contacts to n-GaAs by solid-phase epitaxy of Ge'. J. Appl.
Phvs., 1987,62, pp. 942-941
WANO. L . C , WAKG,X.Z., HSU, S.N., I,AU, S.S., L1N.P.S.D.. SANDS,T.,
SCHWARL.
s.A., PLUMTON, D.L , and KIIECH.T.F.: 'An investigation of
the Pd-In-Ge nonspiking ohmic contact IO n-GaAs using
transmission line measurement, Kelvin, and the Cox and Strack
structures', J. AppL Phys.. 1991. 69, pp. 4364-4372
YU. L.s., WANG.L.C., MARSHALL, ED.. LAU, s.s., and KUECH,T.F.: 'The
temperature dependence of contact resistivity of the GeiPd and the
Si/Pd nonalloyed contact scheme on n-GaAs', J Appl. Phys., 1989,
65, pp. 1621-1625
LAU. h.S , and VAN DER WEC. W.€ : 'Solid phdX epitaxy' in POATE,
J.M., TU. K.N., and MAYER, J.M. (Eds.): 'Thin films: Interdiffusion
and reactions' (John Wiley & Sons, Inc., New York, 1978), Chap.
12, p p 436-441
BERCII.R.
H.H.:'Models for contacts to planar devices'. Solid State
Electr'on., 1972, 15, pp. 145-158
MASSALSKI, T.B. (Ed.): 'Binary alloy phase diagrams' (ASM
International, Materials Park, Ohio, 1990). 2nd Edn.
10 PALMSTRBM. C.J.
MORGAN, D V..
and HON'ES, M.J.: 'Contact
degradation of GaAs transferred electron devices'. Nucl. Insrrum.
Mrthod,s. 1978. 150. DD. 305--31I
SANDS. T.. MARSHALL, E.D.
..
The condition number is based on L = Ilk'l, + I/V '(IF, where Vis
the matrix of closed-ioop eigenvectors. Byers and Nash [3] have
applied sophisticated optimisation methods to the problem of minimising L. Byers and Nash [3] minimise L for robust eigenvalue
assignment. The algorithm of [Z] is effective in achieving a minimisation of L when the gain is replawd by unity in J , however, it is
very much slower in doing so than that of [3]. The algorithm of [2]
sacrifices speed in return for ease of implementation; it does not
require the first derivatives of the objective function to be explicitly specified. We show that the algorithm of [2] delivers a state
feedback controller which assigns desired distinct closed-loop
eigenvalues to the closed-loop system and is robust to rounding
errors in the elements of the controller. The algorithm uses commercially available routines that are supported by error indicators.
Demonstration: Consider the system given by
-0.5257 0.8544 0.5596 0.5901 0.0259 0.6213 0.7227 0.56170.9831 0.0643 0.1249 0.3096 0.5174 0.3455 0.8977 0.4882
0.6489 o m 7 9 0.7279 0.252 0.39li 0.7066 0.242n 0.7795
A=
0.9923 0.9262 0.2678 0 . 6 2 5 2 0.2114
0
0.5211
0,4338 0.9677
0.5667 0.5465 0 . 1 1 7 0.5064 0.2870 0.7901 0.9809
0
0
0
0
IJ
0
- o
U
ii
n
0.8672 0.6117 0 . 4 2 3 6 0.6503 O.SOfi!r 0.8187
0.2891 0.0881 0.523:l 0.4257
o
0.4409 0.559; 0.2462-
0.Y230
0
0
0
0
0
0.3960
0.0366
0
0
0
0
,"
0.8325
0.6105
0.1871
0
0
0
0
,"]
0
An 'optimal' state feedback controller is sought which assigns the
closed-loop eigenvalues to (4.1778, -0.5628, -1.2715kjO.3923,
-4.6297kj0.5605, --0.51I3kjO. I01 3 I.
We minimise the objective functions J and L starting from
32
-26
-9
15
-4.5
IS
-89
63
25
24
-in
31.5
-24
2
18
-I4
11
5
10
2.5
NAG routine E04JAF (quasi-Newton) with NAG routine
FOIAAF (approximate inversion) gives the results shown in Table
I.
State feedback robust to rounding errors
M.M. Zaytoun and T.J. Owens
lndexing terms: Multivuriublr control systems, Nonlinear
pro,qramming, State feedback
Value obtaining
Minimising J
Minimising L
J
2286
21799
L
64.96
20.81
I1 KII?
35.19
1335.81
An algonthm for delivenng a stdte feedback controller that
assigns desired distinct closed-loop eigenvalues to the closed-loop
3ystem and IS robust to rounding errors in the elements of the
mntroller I $ demonstrdted
Introduction: In [I], a parameterisation of multi-input eigenvalue
assignment. which allows not only for the case of distinct open
and closed-loop eigenvalues but also for the case of common
open-loop and closed-loop eigenvalues was shown to provide a
framework for optimal control by nonlinear programming. In [2].
this frainework was used to provide an algorithm for minimising
the product, denoted by J , of the condition number of the closedloop system and the state feedback gain. The measure of gain
taken is the Frobenius norm 11. /IF
Note that if X E RmX".
In Table 2, the absolute and percentage errors in the assigned
closed-loop eigenvalues owing to rounding the above two control-
1108
ELECTRONICS LETTERS 22nd June 1995 Vol. 31
No. 13
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