A Novel Deep-Impurity-Level Assisted Tunneling Technology for Enhanced Interband Tunneling Probability RunDong Jia, QianQian Huang, ChunLei Wu, Yang Zhao, JiaXin Wang, Ru Huang * Institute ofMicroelectronics, Peking University, Beijing 100871, China * Email: ruhuang@pku.edu.cn Abstract In this work, a novel deep-impurity-Ievel assisted tunneling technology with enhanced band to band tunneling (BTBT) probability is proposed and experimentally demonstrated. Through implanting deep level impurities in the tunnel junction, continuous deep level states can be introduced to facilitate the BTBT process for significant BTBT probability boosting. Compared with conventional tunnel diodes, the fabricated deep-impurity-Ievel assisted tunnel diodes exhibit 7.8x and 23x current enhancement in P++/N+ and N++/P+ tunnel diodes respectively, showing its great potential for future current enhancement in tunnel FETs. 2. Device Physics and Fabrication 2.1 Device Physics Fig. 1 shows the schematic band diagram of tunnel junction with deep level impurities implantation proposed in this work. Deep level impurities implanted can introduce continuous states at deep impurity level (DL) across the tunnel junction [7], and the DL can assist the BTBT process with enhanced tunneling probability. As shown in Fig. 1, the whole DL assisted tunneling process can be divided into two steps: electrons tunnel from valence band to DL and further tunnel trom DL to conduction band, finally forming the tunneling current. 1. Introduction Tunnel FET (TFET) possessing sub-60mV/dec subthreshold slope based on band-to-band tunneling (BTBT) mechanism, is one of the most promising candidates for future low power application [1-2]. In TFET, the source tunnel junction is the crucial architecture for the achievable BTBT current, thus enabling tunnel diode as the effective structure to investigate the BTBT probability. However, most of experimental tunnel diodes have shown low current due to a low BTBT probability, especially for Si devices [2-4]. Introducing localized deep level states in tunnel junction is recently proposed and simulated in 2D material tunnel system as an effective method for BTBT probability boosting [5]. However, the physics of deep level states in BTBT process are still not c1ear, and the states are expected to be generated by introducing localized defects through transition-metal vacancy or chalcogenide vacancy in 2D materials [6], which is difficult to be controlled and realized in experiments, especially for conventional bulk materials. In addition, the defects are localized in a limited region, leading to the limited BTBT probability enhancement. In this work, instead of introducing localized defects, continuous deep level states by introducing controllable deep level impurities is proposed for large tunneling current enhancement. The novel deep-impurity-Ievel assisted tunneling technology is discussed in detail and experimentally demonstrated in Si-based tunnel diodes. Current enhancement up to 7.8x and 23x has been achieved in P++/N+ and N++/P+ tunnel diodes respectively, showing its distinct advantages for BTBT probability improvement. 978-1-4673-9719-3/16/$31.00 ©2016 IEEE Fig. 1. Schematic illustration of the band diagram of p++/N+ tunnel diodes with deep level impurities. The DL assisted tunneling process consists of electrons tunneling from valence band to DL and tunneling from DL to conduction band. To c1arity the advantages of DL assisted tunneling process more c1early, BTBT probability is investigated by comparison with conventional tunneling probability. In conventional BTBT probability (T), (1) herein, exponential term is the effective tunneling barrier height Eb, and Eb equals to bandgap width Eg for conventional tunnel diode. However, in DL assisted tunneling process, the effective tunneling barrier heights in two steps no longer equal to bandgap width. For step 1, the effective barrier height that electrons face is the energy difference between valence band and DL, and can be denoted as lic/)!. For step 2, the effective barrier height is the energy difference between DL and conduction band, and can be denoted as E'il2. The DL assisted tunneling probability can be expressed as follow: T' = T. X T2 OC eXP Therefore, the ratio of T' l )j l -E,O and x T eXP -E,O) j (2) is (3) Since sum of the two effective barrier heights equals EI>' the above equation (3) can be calculated out that T'/T>1, as shown in Fig. 2, which indicates the enhanced total tunneling probability of DL assisted BTBT compared with conventional tunneling process. 0.50 r-------..., of Ixl019 and lxl021 cm-3 respectively. Following is the implantation of deep level impurities, and Argentum is chosen to be implanted with density of lxlO17cm-3 in our experiment. The tunnel diodes were then annealed for 5s at 1050 °C to activate these dopants, followed with contact and metallization. The N++;P+ tunnel diodes with Nickel as deep level impurities were also fabricated. The doping density of As+ and BF/ impurities are designed to be lxl021 and lx1019cm-3 respectively. The density of Nickel is 1x I017cm-3. Conventional tunnel diodes without deep level impurities implantation were also fabricated in this experiment for further comparison. 0.45 Isolation process 0.40 N+ implantation (P+, 130keV, 2e14) P++ implantation(BFt , 33keV, le16) 0.35 Deep level impurities implantation 0.30 (Ag+, 33keV, 2.5ell) 0.25 0.20 Fig. RTA lOSO'C Ss '-------!.�..<:...---..- DL assisted tunneling process Contact and Metallization conventional tunneling process 2. Comparison between the exponential term of DL assisted tunneling process and conventional tunneling process. lncreased exponential term indicates enhanced BTBT tunneling Fig. 4. Process flow of p++/N+ tunnel diode with deep level impurities. probability. 3. Discussion 2.2 Device Fabrication Both p++/N+ and N++;P+ tunnel diodes were fabricated on Si<lOO> substrate, as illustrated in Fig. 3. Deep level impurities are designed to be implanted in the junction region. The process tlow of P++/N+ tunnel diodes is shown in Fig. 4. After isolation, phosphorus and BF/ are implanted successively with doping density Fig. 3 Schematic illustration of (a) the with deep level impurities and (b) deep level impurities in this work. P++/N+ tunnel diode N++;P+ tunnel diode with Measured I-V characteristics of P++/N+ DL assisted tunnel diode and conventional tunnel diode are given in Fig. 5. From the comparison results, considerable current enhancement up to 7.8x is achieved. This is attributed to the enhanced BTBT probability in DL assisted tunneling process. Fig. 5. Measured I-V characteristics of DL assisted and conventional P++/N+ tunnel diodes at room temperature. The current is enhanced by 7.8x in DL assisted tunnel diode due to enhanced BTBT probability. Temperature dependence of I-V characteristics is further measured to verify its mechanism. With the decreased temperature, the bandgap of silicon relatively increases, leading to the decreased tunneling probability and current for tunnel diode, as shown in Fig. 6. Instead, the thermal injection current in conventional MOSFET has the negative current dependence on temperature. Therefore, the observed positive correlation coefficient of current and temperature in Fig. 6 further confirms the BTBT mechanism in fabricated DL assisted tunnel diodes. Furthermore, in order to prove that the current enhancement is induced by DL assisted effect rather than trap assisted tunneling process, low temperature electrical characteristics of DL assisted and conventional tunnel diodes are compared in Fig. 7. Low temperature measurements can suppress the trap assisted tunneling process. The DL assisted tunnel diode can still achieve higher current than conventional tunnel diodes at 77K, which indicates that the current enhancement is caused by the enhanced BTBT probability by DL assisted tunneling process. which is more significant than the improvement through Argentum induced DL assisted tunneling in P++IN+ tunnel diodes. This is related to the different deep levels induced by Nickel and Argentum. DL induced by Nickel is eIoser to the intrinsic fermi level, resulting in the higher T'/T and thus higher total tunneling probability. 10" ;t 10" · Measured @ 300K 10' Fig. " 0 0 VN (V) 2 3 8. Measured I-V characteristics of DL assisted and conventional N++/P+ tunnel diodes. 4. Summary _. - nK 100K -.(;_. 200K 250K _. 1 V (V) N o Fig. 6. 2 _. 300K 3 In this work, a novel deep-impurity-Ievel assisted tunnel diode with high BTBT probability is discussed in detail and experimentally demonstrated. By introducing continuous deep level states through impuntles implantation to facilitate tunneling process in silicon, BTBT probability and current are considerably enhanced. Temperature characteristics further confrrm the dominant BTBT mechanism in the deep-impurity-Ievel assisted tunnel diode. This BTBT probability boosting technology shows great potential for future current improvement in tunnel FETs. Measured temperature dependence ofl- V characteristics Acknowledgments in DL assisted tunnel diode. - - This work was partly supported by NSFC (61421005), 863 Project (2015AAO I6501), and China Postdoctoral Science Foundation. The authors would like to thank the staff of National Microl Nano Fabrication Laboratory of Peking University for their assistance in the device fabrication. ++ + 0 - OL assisted P /N diode ++ + 11'- conventional P /N diode References [1] G. Dewey et al.,IEDM,p. 785 (2011). [2] Q. Huang et al. ,TEDM,p.382 (2011). [3] F. Mayer et al., TEDM,p. 163,2008. o Fig. 2 3 VN (V) 7. Low temperature electrical characteristics of DL assisted and conventional tunnel diodes. Electrical characteristics of N++/P+ tunnel diodes are also measured. As show in Fig. 8, compared with conventional tunnel diode, 23x current enhancement is achieved through Nickel induced DL assisted tunneling, [4] K. Boucart et al., EDL,p. 656,2009. [5] X. Jiang et al., LEDM,p.309 (2015). [6] S. Tongay et al., Sci. Rep.,p.1 (2013). [7] A. G. Milnes, Deep Tmpurities in Semiconductors, Wiley,1973. [8] S. M. Sze, Physics of Semiconductor Devices, Third Edition,Wiley,2007.

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