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Патент USA US3036240

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May 22, 1962
Filed Nov. 6, 1959
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United States Patent Office
Patented May 22, 1962
one common core K, consisting of ferromagnetic ma
Johann 0. Kleinschmidt, Korntal, Wnrttemberg, Ger
terial. The windings are so dimensioned that whichever
circuit is conductive will magnetize the core. If, for ex
ample, the transistor T1 is conductive or unblocked, then
a current will be ?owing from ground 0V, via the emit
ter-collector path of T1, via the winding of W1, and via
the operating resistor R1, towards the line of the nega
tive operating potential —V1. The current ?owing in the
winding W1 will enforce a certain condition of saturation
many, assignor to International Standard Electric Cor
poration, New York, N.Y., a corporation of Delaware
Filed Nov. 6, 1959, Ser. No. 851,387
Claims priority, application Germany Nov. 7, 1958
3‘ Claims. (Cl. 307-88)
The present‘ invention relates to a bistable trigger cir 10 in the core K. The voltage drop across R1 will cause a
cuit comprising two operating circuits, of which one is
relatively small current to ?ow across the voltage-divid
conductive while the‘ other is non-conductive, and in par
ing circuit consisting of the voltage-dividing resistors
ticular to a transistorized ?ip~?op circuit. Such types of
R3 and R5, so that the base electrode on the transistor T2
trigger circuits are well known from the ?elds of com
will remain positively biased. Accordingly, the transistor
puting machines. However, they bear the disadvantage 15 T2 will remain blocked. This operating condition will
that in the event of an absence of the operating voltages,
remain until, for example, the circuit arrangement is trig
gered into the other condition by the application of a
negative pulse to the base electrode of the transistor T2.
the informations which are. stored in the ?ip-?op will go
astray. For this reason, in the case of data-processing
systems, in addition to the ?ip-?op storage circuits, such
If T2 is controlled in such a way that a current will
as counting chains, shifting registers, and the like, perma 20 now be flowing via the emitter-collector path of T2, via
nent storage devices are provided permitting the trans
the winding W2 and the operating resistor R2, then by the
ference of a de?ned initial condition to the ?ip-?op cir
voltage drop across R2, which is immediately transferred
cuits. In cases where such types of permanent storage
via the coupling capacitor C1 to the base of the transistor
devices are not already available, control leads or lines
T1, the transistor T1 will be blocked. During this relaxa
are provided for enabling an erasing of the ?ip-?op stor
tion or triggering process, as soon as the current in the
ages, so that a de?ned initial condition can be achieved.
Winding W2 suf?ciently predominates over the current
In this way, however, the disadvantage that the last stored
?owing in the winding W1, the core K will be resaturated
information will go astray cannot be avoided.
in the other sense. If the operating voltage is now dis
The present invention is based on the problem of im
connected, then the condition of remanence of the core
proving the afore-mentioned ?ip-?op circuits with as little 30 will indicate in what operating condition the trigger cir
as possible additional investment in circuitry, in such a
cuit had been prior to the disconnection of the operating
way that, upon reinsertion of the operating voltage, they
voltage. Upon reconnecting or reinserting the operating
will reassume the original circuit condition, so that it
will no longer be necessary to store the last stored infor
voltage, the trigger circuit is at ?rst in an unstable condi
tion, that is, neither of the two circuits is conducting its
mation into a special permanent storage device prior to 35
complete or full current. With respect to the circuit
the disconnection of the operating voltage, and to cause
this permanent storage device to perform the resetting of
the ?ip-?op circuit in accordance with the stored infor
mation subsequently to the insertion of the operating
which had been blocked prior to the disconnection, the
core will represent a high impedance, as soon as the
current in this circuit and in the core winding produces
a ?eld tending to resaturate the core, in other words,
is trying to shift the core from the saturation condition
According to the invention, this problem is solved by
into the area of a high permeability. With respect to
inserting into each of the two operating circuits one of
the other circuit, however, the core represents a small
two oppositely wound windings with a common ferromag
impedance, because in this circuit no current ?ow is
netic core having an approximately rectangular hysteresis
necessary to further drive the core into the saturation
loop, in such a way that the information stored in the
condition. This asymmetry of the trigger circuit forces
trigger circuit upon disconnection of the operating volt
it to return to the condition which is assumed prior to
age will remain in the core, and upon reinsertion of the
the disconnection.
operating voltage, the trigger circuit will reassume that
particular operating condition corresponding to the in
formation as stored in the core.
A trigger circuit con
structed in this way according to the invention, bears
the advantage that the storing and reading processes
which were hithereto necessary for avoiding losses of
information are avoided.
The invention is illustrated in the accompanying draw
ings, in which:
A particularly advantageous ampli?cation of this effect
50 can be achieved by providing two further windings which
are inserted into the connections between the control elec
trodes and the lead-in conductors of the control lines.
The arrangement is such that the circuit which tends to
resaturate the core upon insertion or connection of the
55 operating voltage is blocked by the voltage as induced in
the additional winding. In the embodiment of FIG. 2,
these additional windings are denoted by the references
FIG. 1 is a schematic diagram of a transistorized flip
W3 and W4. The base electrode of the transistor T1 is
?op circuit embodying the invention; and
its control electrode and is connected via the winding
FIG. 2 is a schematic diagram of a modi?ed form of
W3 with the control line S1, and the base electrode of the
the ?ip-?op circuit shown in FIG. 1.
transistor T2 is connected via the winding W.,, with the
Referring to FIG. 1, a transistorized ?ip-?op circuit is
control line S2.
shown comprising the transistors T1 and T2, as Well as
If, for example, prior to the disconnection of the oper
their respective operating resistors R1 and R2. The base
ating voltage, the transistor T1 had been conductive or
electrodes of the transistors T2 andT1 are connected re
spectively via the resistors R5 and R6 to a positive poten
unblocked, and the operating voltage is reinserted again,
then the current ?ow which is eifected through the winding
W1 is no longer capable of resaturating the core. HoW
ever, if in the unstable initial condition, the transistor T2
connected between the collector of transistor T1 and the
has a greater conductivity at ?rst, the current via the
operating resistor R1, and a winding W2 is connected be
winding W2 could initiate a resaturation. In the course
tween the collector of transistor T2 and its operating re~
of this, however, a blocking signal with respect to the
tial +V2, and respectively via RC-circuits C1R4 and C2R3
with the operating resistors R2 and R1. A winding W1 is
sistor R2. These windings are Wound in opposite sense on
transistor T2 is induced in the control winding W4. At
the same time, an opposite signal adapted to trigger the
transistor T1 into the conductive or unblocked condition
is induced in the winding W3.
The described embodiments relate to ltransistorized ?ip
?op circuits. The invention, however can also be ad
vantageously applied to other circuits, such as tube cir—
While I have described above the principles of my in
transistor whose ?rst electrode is not connected to said
winding, whereby, upon disconnecting said source, the
information as stored in said trigger circuit will remain
in said core, and upon reconnecting said source, said
trigger circuit will resume that particular operating con
dition that corresponds to the information as stored in
said core.
2. A bistable trigger circuit, as claimed in claim 1,‘
vention in connection with speci?c apparatus, it is to be
in which ‘the two windings on the core are connected
by way of example and not as a limitation to the scope of
my invention as set forth in the objects thereof and in
resistors of the transistors.
clearly understood that this description is made only 10 respectively between the collectors and the operating
the accompanying claims.
What is claimed is:
l. A bistable trigger circuit comprising two transistors
connected to form a ?ip-?op circuit, said circuit compris
ing a ferro-magnetic core with an approximately rec
tangular hysteresis loop, a pair of oppositely wound wind
?rst velectrode of the other of said transistors, a source
, of potential, a pair of operating resistors connected respec
tively between the other ends of said windings and said
source, and separate means connecting each junction of 25
a winding and a resistor to a second electrode of the
tween the bases and the control leads of two; transistors.
References Cited in the ?le of this patent
ings on said core, means connecting one of said windings
to a ?rst electrode of one of said transistors, means con
necting the other of said windings toa corresponding
3. A bistable trigger circuit, as claimed in claim 2,
,further comprising a control lead for each transistor,
and in which the‘ ferro-magnetic core isv provided with
two further windings which are respectively inserted be
Pittman et al. ________ __ Aug. 21, 1956?
Bruce et al. .4 ________ _; Nov.‘27, 1956
Jensen ______________ __ Dec. 118, 1956
Collins _._---’_________ _._ Feb.-24, 1959
Paull ________ _.'.'_ ____ _._ Nov. ‘17, 1959
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