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Патент USA US3050705

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Aug. 21, 1962
R. M. TURNER
3,050,694
CORRECTION CIRCUIT FOR DUAL SINUSOID GENERATOR
Filed March 14, 1961
2 Sheets-Sheet 1
Üz
Fiel
V'
ROBERT M.TURNER
BY
i
_
` 'Agent
Aug. Z1, 1962
R. M. TURNER
3,050,694
CORRECTION CIRCUIT FOR DUAL SINUSOID GENERATOR
Filed March 14, 1961
2 Sheets-Sheet -2
FIGZA
INVENToR.
ROBERT M_TURNER
BY
_
E
` Ägent
.ted
BÑStL?Q/íi
@attent
Patented Aug. 2l, 1962
1
Z
3,050,694
The constraint equation set to be imposed on the sys
tem defined by equation set (l) may be defmed as:
CORRECTION CîiRCUlT FÜR DUAL SINUSUED
GENERATÚR
Robert M. Turner, Los Altos, Catir., assigner to Lock
heed Aircraft Corporation, Burbank, Calif.
Filed Mar. 14, 1961, Ser, No. 95,649
3 Claims. (Cl. 33t-AS)
The present invention relates to a sinusoid generator
and more particularly to a correction circuit for a dual
sinusoid generator to provide hivhly accurate sine and
cosine wave forms.
Prior systems `for generation of sinusoidal signals have
had the primary disadvantage of being irequency sensitive.
That is, While at lower `frequencies the sine and cosine
signals maybe relatively exact, at higher frequencies there
This equation set is written such that ej equals zero for
all j. Since the xr are considered to l‘be independent varia
bles or driving functions, any deviation of the ej »from zero
must be due to incorrect values obtained `from y1“ in the
solution of set (l) (where u=0 for y, and l for ají).
Since it is desirable to consider all of the ej simulta
neously, the minimization of a non-negative -function E
of ej is taken where
is considerable deviation from `the desired sine and cosine
signals.
q
(3)
E=
prior systems iby employing one non-negative constraint
t Esl2
j:
The present invention obviates .the disadvantage of these
For any given value of xr and yi“ the change required
in each of the yi“ making up E may be found by consider
relationship Vwhich is instantaneous and another non-nega
tive constraint relationship which is .taken over a finite
ing E as a surface of Euclidean N space.
period of time. These non-negative constraint relation~
giving the direction of greatest change E is the gradient
The vector
ships are subjected to a minimization procedure, and the
vector V E and is defined -by the relation
vector giving the direction of greatest decrease in error is 25
q
De,
26:0, l
employed. In this manner a correction circuit for a
(4)
í=1, 2, . . . n
sinusoid generator is provided wherein the error is main~
tained ata minimum and as a result the sine and cosine
It is then possible to assign to each Ayi“, where Ayì‘l is
signals have very small deviation in amplitude and are
defined as »the correction term to be added to the y1“ ob
extremely accurate in frequency and in phase relationship 30 tained from the solution of set (l), the value
over a relatively large frequency range.
Accordingly, an object of the present invention is to
gel
fo r [u=(),
l
provide a correction circuit for a sinusoid generator which
egt/iu
t=1, 2, . . .n
utilizes a minimum of components and is highly reliable.
Another object of the present invention is `to provide 35 That is, to each yi“ is added -a value proportional to the
component of - V E in the yîu direction. KJ- is a weight
a sinusoid generator providing highly accurate sine and
fOl[
ing factor determined by the importance attached to .the
particular ej. in .the present invention the >gradient is de
termined and the corrections added continuously and in
cosine wave forms.
A further object of the present invention is to provide
a correction circuit lfor a sinusoid generator which is
frequency insensitive.
40 this manner no sequential series of steps is taken along one
gradient before the next is determined.
Since these corrections Iare added directly and continu
ously to the positional values of yi“, each member of the
corrected differential equation set becomes:
A `further object of `the present invention is to provide
a correction circuit for a sinusoid generator wherein the
vector giving the most rapid decrease of error is employed.
A still 4further object of the present invention is to pro
vide a correction circuit for a sinusoid generator which
employs both an instantaneous constraint and a constraint
taken over a finite period of time.
The specific nature of the invention, as well as other
It should be particularly noted that Ay, is not the inte
object7 uses and advantages thereof, will clearly appear
Ifrom the following description and `from the accompanying 50 gral of Ay, as each arises independently from Equation 5.
For purpose of definition, differential equation set (6) is
drawing in which:
referred to as the EP correction of equation set (l). The
FIGURE 1 is a schematic illustration of the sinusoid
subscript P denotes that the correction is inserted so as
generator and correction circuit of the present invention.
FIGURES 2A through 2D are diagrams showing the er
ror signals for purpose of intuitive analysis of the present
invention.
In order to more completely understand the unique
characteristics of the present invention the .following
mathematical analysis is considered necessary:
to change the instantaneous position of the variable.
The method of correction is in general quite diñicult
to implement on an analog computer due to the forma
tion of algebraic loops in the generation of the error
terms. However, it is to be particularly noted that it is
possible to consider each Ayi“ .to raise from a change in
the defining rate of yi“ which may be expressed by the re
The basic n first order differential equation set describ
ing a physical system may :be written as:
lation:
d
n
(7) ït(Ayt“)=~§_J-1`Ki€s i for liu-:0, 1
j:
Öyi“
71:1, 2, . . . 'n
This will likewise give to each y1“ a correction in the
65 desired direction since
which may be rewritten as
where y] is the derivative with respect to time and x1, x2
etc. are independent or driving functions.
70
3,050,694.
¿9
Therefore each member of the corrected differential
equation set becomes
The constraint relations defined in Equations 17 and 20
provide instantaneous constraints. The el constraint rela
tion (Equation 17) is eífective in stabilizing the system;
however, it has been experimentally determined that
Ayl and Ayg corrections obtained from the el minimiza
tion are not suiiicient to eliminate a bias or offset error in
For purpose of deiinition, differential equation set (8) is
el yas illustrated by the curve shown in FIGURE ZB. A
referred to as the ER correction of equation set (1). The
subscript R denotes that the correction is inserted so as to
continuous offset is detrimental because there will always
be an amplitude error in either or both the sine or cosine
change the instantaneous rate of the variable.
Both Ep and ER corrections are applied in the system
of the present invention. In this case, Equation 8 be
signals.
By minimizing the square of the integral of E2 by the
Ep scheme [see Equations 3, 4 and 5], particularly simple
comes
(9)
correction terms for ¿1]1 and 112 are formed which com
pletely eliminate the bias error. The terms 111,71 and A112
are formed by the relationship existing in Equation 2
and this renders it possible to employ the e1 previously
calculated from y1 and y2 to provide information about «J1
and y2.
The square of the integral of e2 is:
271’=f1(x1,x2, - - . xpn'iyz, - - - yn)+Ay1+At'/1
In summary, Equation 5 shows that corrections may
arise for all functions and their derivatives which occur
explicity in the constraint equations. Equations 6, 7, 8
and 9 show how the corrections may y‘be added to systems
defined by equation set (l).
In the generator system shown in FIGURE 1 it is de
sired to generate sin rp and cos o signals where the fre
20
quency of these signals is determined by the (p input
voltage and the amplitude of these signals is determined
by the initial condition set by the voltage A applied to 25
the input of integrator 13. By deñnition cos (p and sin ga
Minimizing Equation 23 with respect to y‘l and §22 by
the Ep scheme [see also Equation 5] Ay'l is defined as
are as follows:
(10)
(11)
and the derivative of y1 and y2 with respect to time pro 30 Assuming 1p as being a constant, then
Vides:
The equations which define forced oscillation of the 35
generator system in FIGURE 1 are as follows:
(14)
(15)
121:-153’2
tÍ2=<l5y1
= -Kylfeldt
It is necessary to solve Equations 14 and 15 as ac
curately as possible which necessitates the use of con
straints which are meaningful to the system. That is, it
is `desirable to obtain corrections for 171, y1, 172 and y2.
One such system constraint is defined in terms of
y1 and y2 and may be obtained `from the trigonometric
relationship
(16)
which exists when exact sine and cosine waves are being
generated.
By combining Equations 8, 9 and 14 a sys
tem constraint defined in terms of y1 and y2 may be de
íined as:
`
By employing a similar procedure A172 is defined as
(27)
At'l2=-Ky2ff1df
Experimental evidence verifies that these values of Ayl
and Ayz [Equations 26 and 27] provide the necessary
correction regardless of whether gb is a constant or is a
variable as to both sign and/or `amplitude.
The corrected system equations of the present invention
are obtained by adding y1 and y2 according to the ER
method and y1 and y2 according to the Ep method and
by utilizing the forced oscillation system Equations 14
and l5. Therefore, by substituting these parameters into
Equation `9 the corrected system equations are:
(17)
y12+y22-1=€1
where e1 is the amplitude error.
A secOnd system constraint deiined in terms of 121 and
y‘z may be determined from the trigonometric relation
'y1
which also exists when exact sine or cosine waves are
‘being generated. The derivative of Equation 18 is
(19)
dii-_tan 91:' ‘p
_
1
_
=
-
9124-22
=_`__
from which is obtained the relation
(20)
To provide a solution of Ayl and Ay2 the partial deriva
tive of e1 with respect to y12 and 3122, respectively, of
Equation 17 results upon substitution in Equation 5 in
the relationships:
(21)
(22)
In FIGURE 1 of the drawing is illustrated the dual
sinusoid generator and correction circuit of the present
invention which is the implementation of corrected system
60 Equations 28 and 29. In this drawing is illustrated a
conventional dual sinusoid generator denoted by reference
numeral 11 and the correction circuit denoted by refer
ence numeral 12.
Dual sinusoid generator includes in
tegrator 13, dual channel multiplier 14, integrator 15
and inverter 161. The circuit parameters of these elements
forming the sinusoid generator are selected to correspond
with Equations 14 and 15 wherein the frequency of
oscillation is determined by a voltage applied to dual
channel multiplier 14 denoted by g3 and the amplitude is
determined by a voltage A applied to the input of inte
grator 13.
Assuming multiplier 14- has an attenuation factor of
1GO, then to prevent closed loop circuit attenuation each
integrator is provided with a gain factor of 100. It can
therefore be seen that the 100y2 input to multiplier 14 will
result in a ~y2v3 Output. The negative sign is due to the
3,050,694
d
inversion characteristics of a multiplier. From Equation
14 it can be seen that -cbyz equals y1 and when integrated
and amplified by integrator 15 results in -~l00y1 which
provides the cosine output by definition. The negative
sign is due tothe inversion characteristics of an integrator.
'Ilhis -100y2 output is multiplied by (b and attenuated by
multiplier 14 resulting in an qbyl output which from Equa
tion l5 is equal to ¿zj/2. Inverter 16 is provided merely
to invert y2 to _y2 so that when `applied to the input of
integrator 13, which inverts the input signal, results in a
100322 output and the circuit lwill therefore provide sus
tained forced oscillations. Due to the inherent character
istics of sinusoid generators of this type there is devia
tion from the exact sine and cosine Wave forms which
are desired.
The correction circuit 12 which is employed to correct
this deviation or error of the sine `and cosine wave forms
includes dual channel multiplier 17, dual channel multi
6
higher frequencies the error signal at point “a” of FIG
URE 1 may vary about a finite voltage as illustrated in
FIGURE 2B. This may occur, for example, when the
output of integrator 15 is -99y1 rather than -100y1 as
desired. To prevent this undesirable condition, the volt
lage ‘at point “a” is integrated which results in a voltage
at point “b” of FIGURE l similar to that shown in FIG
URE 2C. The voltage at point “a” is then added to the
voltage at point “b” which results in a voltage at point
“c” of FIGURE 1 similar to that shown in FIGURE 2D.
This -large correction voltage is applied to the integrators
which rapidly increases the --99y1 signal to _100)11.
In actual operation, curves such as shown in FIGURES
2B, 2C and 2D do not occur since the integration func
tion never permits the error signal to vary about a finite
voltage yand the voltage at point “a” will be as shown in
FIGURE 2A at all frequencies of operation.
Operation of the present invention in the frequency
range of from about .i1 to about 50 cycles per second and
tegrator 25 and inverter 27. The sine output of integrator 20 at vamplitudes of from about `0 to about 100 volts with
an output current of about 25 milliamps have resulted in
13 is applied to the A and B inputs of multiplier 17 and
plier 1S', summing amplifier 19, summing amplifier 21, in
amplitude deviations of less than .1 percent, frequency
deviation of less than .5 percent and a phase angle de
viation between the sine and cosine signals of less than
18 and a voltage having a constant amplitude of +100 are 25 il degrees.
It is to be understood in connection with this invention
applied to the respective inputs of summing amplifier 19.
that the embodiments shown are only exemplary, and that
It should be noted `that the 100 terms of the AB products
the cosine output of integrator 15 is applied to the A
and B inputs of multiplier 18. The inverted AB output
of multiplier 17, the inverted AB output of multiplier
various modifications can be made in construction and
of multipliers 1’7 and 18 is not 100Z since there is a
arrangement
the scope of the invention as defined
100 attenuation factor in each multiplier. It can be
readily seen from Equation 17 that the summation of 30 in the appended claims.
What is claimed is:
these inputs is 100(----y12-U22-\-1)=--100e1 and upon in
l. A sinusoid generator comprising a first integrator, a
version by the amplifier the output thereof is
second integrator, a dual channel multiplier and an in
100(y12-|-yZ2--1)=+l00e1. The output of summing am
verter, the output of said first integrator connected to
the one input of said multiplier, one output of said multi
plier connected to the input of said second integrator, the
output of said second integrator connected to another
of integrator 2S is inverted by inverter 27 resulting in a
input
of said multiplier, the other output of said multi
+1001 e1 output which is appiied to the input of summing
plier connected to the input of said inverter, the output
amplifier 21. The inputs of summing amplifier 21 are
summed and inverted resulting in a -100e1--100fe1 out 40 of said inverter connected to the input of said first in
tegrator, whereby forced oscillations of said sinusoid gen
put. From the constraint relations of Equation 21, 22,
erator provide sine Wave signals at the output of said first
26 and 27 it can be seen that the sine and cosine terms
integrator `and cosine Wave signals at the output of said
must be introduced into the output of summing amplifier
second integrator, an error correction circuit for said
21. For the sine term, this is accomplished by »apply
ing the output of summing amplifier 21 to the C input of 45 sinusoid generator comprising means detecting the instan
taneous amplitude error between said sine wave signals
multiplier 17. The AC output of multiplier 17 is there
and cosine Wave signals, means integrating the `detected
fore +100e1y2+l00y2fe1 which is equal to -AyZ-Agïz
plifier 19 is applied to the input of summing amplifier 21
and is also applied to the input of integrator 25 which
inverts and provides an output of _100]61. The output
(see Equations 22 and 27, respectively) and is applied to
instantaneous amplitude error between said since Wave
From this it can be seen that the error correction which
cosine wave signals.
signal and said cosine wave signal, means applying the
the G input of integrator which is summed with ~g72~ It
will be noted that due to the inversion characteristics of 50 instantaneous amplitude error and the integrated instan
taneous amplitude error to the inputs ofI said first and
integrator 13 it is necessary that the signs of Equations
second integrators thereby reducing said instantaneous
9 and 29 be reversed and the AC output of multiplier 17
and integrated amplitude errors between said sine and
therefore has the proper signs for summation with y2.
is applied to the G input of integrator 13` corresponds with 55 2. A sinusoid generator comprising a first integrator,
a Second integrator, a dual channel multiplier and an in
corrected system Equation 29 with inverted signs. To
verter, the output `of said first integrator connected to the
introduce the cosine term, the output of summing amplifier
one input of `said multiplier, one output of said multiplier
21 is applied to the C input of multiplier 18 which re
connected to the input of said second integrator, the out
sults in an AC product output of -100e1y1-100y1fe1
which is equal to -i-Ayl-t-Ayl (see equations 21 and 26, 60 put of `said second integrator connected to another input
of said multiplier, the other output 4of said multiplier con
respectively). This AC output is applied to the G input
nected to 4the input ‘of `said inverter, the output of said
inverter connected to the input of said first integrator,
whereby ‘forced oscillations of said sinusoid »generator pro
input of integrator 1S corresponds with corrected system
vide sine wave signals at the output of said first integrator
Equation 28.
65 and cosine lwave signals at the output of said second inte`
An intuitive analysis of the present invention is as
grator, an error correction circuit for said sinusoid gen
follows: In FIGURE 2A is shown a typical or desired
erator comprising first -means `operatively connected to
error signal at point “a” of FIGURE 1. Obviously, if
the output of ysaid first integrator for squaring said sine
the sine and cosine Waves were exact, there would be
wave signals, second means operatively connected to the
no signal at point “a” land consequently the Voltage would
of integrator 15 wherein it is summed With Úi or -q'iy2~
Therefore, this error correction which is applied to the G
remain zero as a function of time. It has been found that
at relatively low frequencies of operation the voltage at
output of said second integrator `for squaring said cosine
wave signals, first summing means operatively connected
to the outputs of said first and second means for summin-g
“a” would be similar to that shown in FIGURE 2A by
`said squared sine and cosine signals and subtracting a con
use of only the instantaneous correction scheme wherein
the integration of el was not performed. However, at 75 stant signal having a predetermined amplitude thereby
3,050,694
providing error signals, integrating means operatively con
nected »to lthe output of said íirst summing means for inte
gnating said error signals, second summing means opera
tively connected to .the outputs of said lirst summing means
:and to the out-put of integrating `means for summing sai
error signals and said integrated error signals, means op
eratively interconnecting 4the output of said second sum
ming means to the inputs of said first and second inte
grators of said sinusoid generator thereby reducing said
error signals.
3. A sinusoid generator comprising a first integrator, a
second integrator, a dual channel multiplier and an in
8
output of said second integrator for squaring said cosine
wave signals, `first summing means operatively connected
to the outputs of said first and second means for surn
»ming said squared sine and cosine signals and subtracting
a constant signal having a predetermined amplitude there
by providing error signals, inteffrating means operatively
`connected to «the output ‘of said ñrst summing means for
integrating said error signals, second summing means op->
eratively connected tto the outputs of said iirst summing
means .and to the output of integrating means for surn
rning said error signals and said integrated error signals,
said first means ibeing operatively connected .to the output
verter, the output of said first integrator connected to the
of said integrating means for obtaining the product of said
one input of said multiplier, o-ne output of said multiplier
error and integrated error signals and said sine wave
connected to the input of said second integrator, the out 15 signals, -means applying said product to the input of said
put of said second integrator connected to another input
first integrator, said second means being operatively con
of sri-id multiplier, »the other output of said multiplier
nected to the output of said integrating means for obtain
connected to the input of said inverter, the output of said
ing the product of said error and integrated error signals
inverter connected to the input of said first integrator,
and said cosine wave signals, means applying said last
whereby forced oscillations of said sinusoid generator pro 20 mentioned product to the input of said second integrator.
vide sine Wave signals at the `output of said ñi‘st integrator
and cosine wave signals at the output of said second inte
grator, yan error `correction circuit- for said sinusoid gen
erator comprising first means operatively conneoted to
References Cited in the tile of this patent
UNITED STATES PATENTS
the output of `said tir-st yintegrator for squaring said si-ne 25 2,896,162
wave signals, second means operatively connected to the
Berger et al ____________ __ July 2l, 1959
2,907,400
Svi/afford _________ __
2,980,332
Brouillette et al ________ __ Apr. 18, 1961
_ Oct. 6, 1959
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