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Патент USA US3060360

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Oct. 23, 1962
J. RYWAK
TIMING DELAY AND RESET CIRCUIT
Filed March 7, 1960
345414)’
77/145 ——
5-542
3,060,350
3,060,350
United States Patent 0 ” ice ~
Patented Oct. 23., 1962
2
1
Representative values of the elements employed in the
3,060,350
TIMING DELAY AND RESET CIRCUIT
John Rywak, Belleville, Ontario, Canada, assignor to
Northern Electric Company, Limited, Montreal, Que
circuit are as follows:
Resistor:
8 ___________________ .... 0.12K.
bec, Canada, a corporation of Canada
Filed Mar. 7, 1960, Ser. No. 13,170
*9 ___________________ __
12K.
10 ___________________ _. 0.27K.
3 Claims. (Cl. 317—-148.5)
12 __________________ __ 3.3K.
1 ____________________ _. 0 to 14K.
This invention relates to timing circuits and more par
Capacitor 2 _______________ ... 50 mf.
ticularly to circuits for delaying the energizing of a cur 10 Coil 4 ___________________ __ 2.8K. (D.C' resistance).
rent responsive device and the rapid reset of the device
Potentials derived when the representative resistance val
after the operation thereof.
ues are employed:
It is frequently desirable to provide a timing interval
between the operation and release of a current responsive
device. This is conventionally accomplished by asso 15
ciating a resistor capacitor network with the control wind
ing of the device. Inaccuracies in the timing of the op
E
+20v01ts.
Switch 11
Closed
eration and release of the device appear in the utilization
of these prior circuits occurring from the fact that the
point at which the energizing current must be reduced 20
to permit the release of the electromagnetic element varies
0
0
fact that with capacitors of a practical size, the slope
(1)
of the voltage versus current curve for the release of the
eration and release of a current responsive device in
Open
Initial Final, Initial,
over a wide range on successive operations, and from the
device is small.
It is an object of this invention to provide a timing
circuit having a predetermined interval between the op
Switch 11
Final
V-
V.
10.7
10.7
10.7
10.7
0
0
19.6
19.6
0
1 Rises instantaneous from 0 to 19.6 volts.
In the operation of the circuit upon the closing of
which the variations in the timing of the operation and
switch 11, unidirectional device 5 conducts so that ca
release of a current responsive device is reduced.
It is another object of this invention to provide a tim
pacitor 2 charges, unidirectional device 6 remaining non
conductive. With the representative resistance values
listed heretofore, reference point 14 becomes positive with
respect to reference point 13 simultaneously with the
ing circuit having the foregoing characteristics, having
means by which the release of the current responsive de
vice is accelerated.
A further object of this invention is to provide a time
delay circuit having the foregoing characteristics in which
the disengagement of the contacts of the current respon
sive device is accelerated.
:It is another object of this invention to provide a tim
closing of switch 11. Transistor 7 is therefore cut 011
and diode 5 becomes conducting so that capacitor 2
charges. After a predetermined time interval, controlled
by the adjustment of variable resistor 1, the potential of
the reference point “e” rises to a value required for the
operation of the current responsive device 3.
ing circuit having the foregoing characteristics in which
Upon the opening of switch 11, the potential of the
the delay interval is eifective immediately after the re
lease of the current responsive device.
These and other objects of this invention are attained
reference point 14 falls below the potential of reference
point 13 which allows transistor 7 to be forward biased
in one embodiment of the invention by providing a re
ing allows the potential at reference point “e” to fall be
so as to conduct.
The action of the transistor 7 conduct
sistor-capacitor timing network, in which is included the 45 low the potential at reference point 13 so that diode 5
control winding of a current responsive device and a uni
directional element, poled so that the capacitor is charged
when the circuit is energized, a transistor circuit con
again becomes non-conducting.
When the switch 11 is suddenly opened, unidirectional
device 6 arrests the negative voltage swing due to the
inductance of control coil 4.
nected across the capacitor and a voltage dividing circuit
The voltage dividing network, comprised of resistors
50
connected to the input of the transistor.
9 and 10, which held transistor 7 non-conducting when
A better understanding of the invention may be at
switch 11 was closed, now allows the transistor to go into
tained by referring to the following drawings, in which:
FIG. 1 illustrates a circuit schematic in which the in
saturated conduction and through resistor 8 rapidly dis
charges capacitor 2. The purpose of resistor 8 is to
vention is represented, and
55 limit the peak discharge current to a safe value for tran
FIG. 2 illustrates a graph for the voltage-time dis
sistor 7.
charge of the energy in the timing circuit during the re
What is claimed is:
lease of the current responsive device.
1. A timing circuit adapted to delay the operation of a
Considering the drawings, there is shown a time delay
current responsive device after the application of a source
network comprising adjustable resistor 1, capacitor 2, 60 of voltage through a controlling switch and to rapidly
a current responsive device 3 having control coil 4 and
contacts 4’, unidirectional devices 5, 6.
reset the device after the removal of such source voltage
comprising in combination: a charging circuit consisting
Connected across the capacitor 2 is the transistor 7,
of a controlling switch, in series with a ?rst resistor, a
collector resistor S and biasing resistors 9, 10. Also
current responsive device having in parallel therewith a
shown in this drawing is switch 11 and resistor 12.
65 series combination of a resistor, a diode poled in the for
3,060,350
{'3
4,
ward direction and a capacitor; a discharging circuit con
sisting of a transistor having a second resistor connected
3. A timing circuit in accordance with claim 2 having in
combination in the timing circuit ‘an adjustable resistor.
at one end to the base electrode of the transistor, a third
resistor connected at one end to the collector electrode,
the other end of such second and third resistors being
connected to one terminal of the capacitor with the emitter
electrode of the transistor connected to the other ter
minal of the capacitor; a transistor biasing resistor con
References Cited in the ?le of this patent
UNITED STATES PATENTS
2,718,613
Harris ______________ __ Sept. 20, 1955
2,867,754
O’Bleness ____________ __ Jan, 6, 1959
nected between the junction point of the switch and the
2,906,926
Bauer ______________ __ Sept. 29, 1959
?rst resistor and to the base electrode of the transistor.
10 2,942,123
Schuh ______________ __ June 21, 1960
2. A timing circuit in accordance with claim 1 in which
OTHER REFERENCES
the said circuit responsive device consists of a control
winding with a unidirectional element connected across
“Core Driver” (W. L. Stahl and W. R. Vincent), IBM
the control winding poled to ‘be non-conducting when an
Technical Disclosure Bulletin, page 26, volume 2, No. ‘1,
energizing pulse is applied to the energizing circuit.
15 June 1959.
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