close

Вход

Забыли?

вход по аккаунту

?

Патент USA US3069628

код для вставки
Dec. 18, 1962
R. w. PFAFF
3,069,618
LIMIT CIRCUIT
Filed Aug. 19, 1959
Powsn
suPPL
2 Sheets-Sheet 1
45
‘"3
FIG. 3
wy».
Dec. 18, 1962
3,069,618
R. W. PFAFF
LIMIT CIRCUIT
Filed Aug. 19, 1959
2 Sheets-Sheet 2
37 CONTROL LED
CIRCUIT
63
'04 coNT‘aoL
VO LTAG E
souRcE’“
FIC-3.4
¿434
IOI
coNTRok
qnRculT
/
/
60
37\coNTRoLLED
` CIRCUIT
|04
FIG. 5
i
coNTRoL
vo LTAG E ’
souRcl-z
\
w
_n
.LT FR noLCLI TECF m
NCGCm.R
Mw.
o6
OL
u
B
Y G ER
OB ER
Tn,
mwu
MFTAï
P.
V
United States Patent Office
3,069,618
Patented Dec. 18, 1962
l
2
3,069,618
the cathodes connected to a line 25, which is a positive
line when the tubes 22 and 23 are conducting, and a line
26 is the negative line at this time and is connected to a
LlMlT CIRCUHT
Robert W. fait, Cleveland, Ohio, assigner to The Reli
ance Eiectric & Engineering Company, a corporation
Cî
of’ Ühio
Filed Aug. 19, 1959, Ser. No. 834,852
17 Claims. (Cl. 323-22)
The invention relates in general to electrical limit cir
cuits and more particularly to electrical systems, wherein
a limit circuit, such as a current limit circuit is provided
center tap 27 of the transformer secondary 24. A grid
circuit 28 may control these tubes 22 and 23.
The rectifier circuit 17 also includes another pair of
tubes 29 and Sil having their cathodes connected to the
ends of the secondary 24 and their anodes connected to
the line ‘25 to make this line negative relative to line 26
upon conduction of tubes 29 and 30. A grid circuit 31
may control these tubes 29 and 30. A current feedback
resistor 32 may be connected in the line 25 in series with
the load 19.
Whenever an electrical condition, such as current, becomes
The controlled circuit 12 also includes a grid control
excessive.
Electrical systems have been used wherein current limit 15 circuit 34 of which only a part thereof is shown to il
lustrate electronic tubes 35 and 36. This grid control cir
circuits have been provided, but, in the past, many of these
cuit 34 has first and second control terminals ‘37 and 33
circuits have been dependent upon electron tube devices
and is constructed and arranged that when the first con
with the necessary limitation on life of such electron
trol terminal 87 is positive, the tube 35 controls the out
tubes which is unsatisfactory for commercial uses. Also,
in many electrical circuits energizing a load from a voltage 20 put at a first output terminal 39 to control the grid cir
cuit 28, in turn controlling tubes 22 and 23 to energize
source, the energization means may be a rectifier supply
the load 19 in a ñrst polarity, which is positive on line
ing a direct current load from an alternating current
25. When the first control terminal 37 is negative rela
source and, in such case, ordinarly only a single polarity
tive to terminal 38 then the electronic tube 36 controls
of the load is possible. Also in other forms of direct
through a second output terminal 40 the second grid cir
current loads, the load is capable of a single polarity, but
cuit 31 and, in turn, controls the tubes 29 and 30 to make
one which can have a counter electromotive force, which
line 26 positive relative to line 25. The grid control cir
under some conditions can cause current to iiow in the
cuit 34 may have any number of internal circuit structures
opposite direction. ln such cases, limitation of an elec
to accomplish this function.
trical condition such as current, has been very difficult.
A power supply 44 may supply DC. or operating volt
Accordingly, an object of the present invention is to 30
ages to the voltage control circuit 11 and to the limit cir
provide a current limit circuit which may be used on a
cuit ll3. This power supply 44 has an output at terminals
rectifier to limit current of either positive or negative
45 and 4_6 across which are connected resistors 47, 48, 49,
polarities.
and 50. These resistors act as a Voltage divider to estab
‘Still another object of the invention is to provide a limit
circuit which may take over control from another control 35 lish proper operating voltages for the voltage control cir
cuit 11 and the limit circuit 13. The voltage control cir
circuit normally controlling energization means for a
cuit il has first and second input terminals 51 and 52
load.
which are connected by lines 53 and 54 to a tachometer
Still another object of the invention is to provide a
generator 55. The tachometer generator 55 is driven from
current limit circuit to limit the magnitude of current in
the armature 19 and the voltage thereof preferably op
either of two directions and as determined by a condition
poses that of a reference voltage source within the voltage
of the load.
control circuit 11. This means that only a small differ
Still another object of the invention is to provide a limit
to take over control of energization means for a load
circuit utilizing transistors to minimize heating and main
tenance problems.
ence voltage, either positive or negative, is used as a con
trol voltage. This voltage control circuit 11, which may
Still another object of the invention is to provide a cur 45 be considered as a first control circuit, incorporates means
for amplifying this small D.C. input Voltage and supply
rent limit circuit utilizing transistors of opposite types so
ing it at a first output terminal 57, which output is relative
that the transistors are alternatively conductive for positive
to a second output terminal 52, the same as the second
and negative load currents.
input terminal. The voltage control circuit 11 may have
Other objects and a fuller understanding of this inven
a fairly low internal impedance between the first and sec
tion may be had by referring to the following description
ond output termianls 57 and 52, such as provided by an
and claims, taken in conjunction with the accompanying
electronic tube 58 and cathode follower impedance 59. A
drawings, in which:
resistor 6l) is one form of a symmetrical impedance which
FIGURE l is a schematic diagram of the preferred em
may be used to interconnect the first output terminal 57
bodiment of the invention;
of the voltage control circuit 11 and the first control
FIGURES 2 to 5 are further schematic diagrams of
terminal 37 of the grid control circuit 34. A rectifier 61
modifications of the invention; and
connects the first output terminal 57 to a terminal 62 at
FIGURE 6 is a graph of circuit conditions.
the junction of the resistors 47 and 48. The junction of
FlGURE l shows a schematic diagram of an electrical
resistors 48 and 49 is connected to the second terminal
system 10, which includes generally a voltage control cir
52 which is connected by a common line 63 to the second
cuit 11 normally controlling a controlled circuit 12 and
control terminal 38 and to a terminal 64 of the load 19.
subject to overriding control by a limit circuit 13, which
The terminals 45 and 46 of the power supply 44 supply
has an input from a control voltage source 14. The con
D.C. operating voltages to the Voltage control circuit 11
trolled circuit 12 in the embodiment shown in FIGURE
at terminals 65 and 66, respectively, and a resistor ‘67
l includes a rectifier circuit 1'7 energized from an alter
connects terminal 66 to the control circuit terminal 68,
nating current source 18 and supplying rectified energy to
which is connected to the junction of resistors 48 and 49.
a direct current load 19 which has been shown as a
The limit circuit 13 in this embodiment of the inven
motor armature. This motor may have a field 2d ener
tion is utilized as a current limit circuit and includes con
gized from a separate supply source 21. The rectifier
trol elements which are shown as first and second tran
circuit 17 is representative of many forms of rectifier cir
sistors 71 and 72. The transistors 71 and 72 are of
cuits usable with this invention and is shown as including
opposite types and may be complementary symmetry
electric tubes or valves 22 and 23 with the anodes thereof
transistors with transistor 71 being of the P type or PNP
connected to ends of a transformer secondary 24 and with
accents
3
4
type and transistor 72 being of the N type or NPN type.
The íirst transistor 7l has base, emitter and collector
electrodes 73, 74 and 75, respectively, and the transistor
72 likewise has base, emitter and collector electrodes 76,
77 and 7S, respectively. The base 73 is connected to
terminal 62 and the base 7o is connected to terminal o8.
The emitters 74 and 77 are interconnected through pro
tective diode rectiiiers 83 and Si; and by a line Sil' `which
is connected to a potentiometer tap @l on the potentiom
eter or control voltage source
The protective recti
iiers
and 39 are optional, if circuit considerations
require, to protect the transistors from excessive reverse
voltages. The collectors 75 and 73 are connected to
gether by a line 32 and are connected to a ñrst output
terminal 33 of the current limit circuit i3 through a
resistor S4. The resistor 34, and a capacitor
form an
antihunt circuit which decreases the sensitivity and the
tendency to hunt of the entire electrical system lll. The
resistor S4 and capacitor
are connecte i in series be
tween the first output terminal 331 and a second output
terminal 86 of the current limit circuit E3. One end of
the potentiometer i4 is connected by a line S7 to the line
Z5 of the armature circuit and the oticr end of this
potentiometer 14 is connected to the common line 63
which interconnects the second terminals 52., @o and 33
and may be considered a ground or common line.
reference voltage source of resistors 43 and ¿i9 establishes
a positive reference "oltage on the base 73 and a nega
tive reference voltage on the base 76. The control source
lll obtains a current limit signal from the current feed
back resistor
"n Vh is positive at the potentiometer
tap
whe
' te relative to line 26.
is posit
line "
' is posaive relative to line
a
Con
the
is negative relative to the c Anmon
During
in
inal operation of the system ld,
is positive relative
line Titi, there is a posi
tive polarity of Íeedb.l el; voltage or current imit signal
at potentiometer tap SJ.. l‘ l ..
, this current limit
when line
\ docs not exceed the p ositive reference voltage ob
tained from resistor d3, and hence, the first tra istor 'il
is in a non-conducting state. V.Jhon the current in the
1
load il@ becomes excessive, the voltag e drop across the
current feedback resistor
becomes high enough that
the voltage at .e potentiometer te p
l the refer
exceeds
ence voltage across the resistor d .
voltage applied ir
Ästor 7l is su ._ t
tra thc
of
sistor
col 7i,
rthis means that the
e emitter-l as circu
to csta‘
hence, coi
T'n conducti
of the iirst
tor current is passed out
current limit circuit
current flows to the left,
viewed in lll-@URE l, thro h the resistor 6@ and
returns to the common line 63- tlnough the voltage con
tre-l circuit il, such as thr ugh the resistors 5?“, 67 and
This flow of current through the resistor 6_3 makes
The electrical system itl provides control of the motor
the 'ñrst control terminal 3? more positive and the grid
i9 and electronic reversing of this motor armature by 30 control circuit
is such that making this terminal more
controlled conduction of tubes 22 and
or tubes Z9 and
positive decreases the output of the tubes ZZ and 2’.
Sti. When the control terminal 37 is positive relative to
Accordingly, the current in the load i9 is limited to a pre
control terminal 33, the tubes 2?; and Z3 are conductive,
set value as determined by the setting of the potentiome
and hence, line 25 is positive relative to line 2e, so that
ter
the motor armature lil will run in one direction. When
When the tubes 29 and 3l? are conducting to make line
the control terminal 37 is negative relative to terminal
26 positive relative to line
the current in the load 19
38, tubes Z9 and Fail are conductive to make line 2e posi
may be limited to a pre-set value by the transistor 72. in
tive relative to line 2S, and hence, the motor armature
the limit circuit
in this case, the potentiometer tap
19 Will run in the opposite direction. Variable amounts
811 is negative relative to the common line 63 and this
of positive and negative polarities on the control terminal
negative current limit signal opposes the negative refer
37 establish varying degrees of energization of the motor
ence voltage from resistor 639 in the emitter-base circuit
armature i9. The tachometer r¿generator 5S establishes
of transistor 72. When the load current exceeds the pre
a feedback voltage in accordance with a condition of the
set value, the current li .iii signal will exceed the reference
load, in this case speed, and this feedback voltage is
voltage from resistor dit, causing conduction of the tran
applied to the input terminals 5l. and 52 of the voltage
sistor 72, and hence, collector current flows from the lirst
control circuit 1l. rl‘his small feedback Voltage is arn
output terminal £3 of the current limit circuit 1.3 into the
pliñed in the voltage control circuit lll and applied through
collector 7B of the transistor 72. This flow of current is
the resistor dll to the control terminal 37. The voltage
to the right in the resistor d@ to make the first control
control circuit ll and the grid control circuit 34- form
termin 37 more negative. This more negative potential
a voltage regulating circuit, governed by the feedback
controls the tube 36 and the grid circuit 3l, so that tubes
Operation
from the tachometer generator 55. With positive polarity
on line 2S, the armature 19 runs in one direction, and
the generator 55 has one polarity, for example, positive.
2% and
have a decreased output to the load £9. Ac
cordingly, the current of this polarity is also limited to a
pre-set value.
This establishes a positive polarity on control terminal
S7 and the grid circuit 34 is of the type which acts through
tube 36 to decrease the output of the tubes 2.2 and 23
FlGURE 2 is a modiiicd electrical system ldd which
includes a first control circuit Mil, a controlled circuit
i512, a limit circu. @il and a control voltage source lGll.
when this positive potential increases. When the line Z6
n'st control circuit lill may be similar to the voltage
is positive, armature i9 runs in the opposite direction,
rol circuit ll of FÍGURE l and similarly the con
and the generator 55 also has the opposite polarity, for
trolled circuit .TttlZ may be similar to the controlled cir
example, negative. This establishes a negative polarity (El) cuit .TtZ and the control voltage source lille may be similar
on control terminal 37 and the grid control circuit 35.1,
to the control voltage source
The limit circuit 103
through tube 3d decreases the output of the tubes 29 and
is similar to the limit circuit 21,3 of FÍGURE l, but the
3i) when this negative potential increases. rlhus, circuits
transistors 7l. and 72 are connected in a different circuit
11 and l2 act as a voltage regulator circuit for normal
ari gement. The diode rectifiers 8S and S9' are again
operating conditions of the system lll. rl`hus, this volt
used as protective rectiñers to protect the transistors
age circuit l1 normally controls the load lll for both
from harmful reverse voltages and their use again may not
positive and negative polarities thereof. Should the cur
be necessary under certain circuit conditions. The transis
rent in the load increase to an unsafe value for either
tors 7l and 72 are again connected in a common base
the load 19 or the rectifier circuit ll7, the limit circuit
circuit arrangement through reference voltage means
13 will become effective to limit the current, ri`his limit
(ivlich includes ’first and second reference voltage sources
circuit 13 will limit both positive and negative polarities
and N6. The First reterence voltage source ltlâ has
of current in the load i9. The resistors
and 49 act
positive,
intermediate ._
'Je tern" -‘s i157, lui-5,
as a reference Voltage source with a positive terminal 62,
and le?, respectively, and the second reference voltage
a negative terminal 68 and an intermediate terminal 52
connected to the common second terminals. Thus, this
5 source
lilo has positive, intermediate and negative
3,069,618
5
6
terminals 110, 111 and 112. The base 73 is connected
to the positive terminal 110 and the base 76 is connected
to the negative terminal 112. The intermediate terminal
111 is connected to the common line 63.
The emitter
connected to a potentiometer tap 133 of a potentiometer
1341 which in turn is connected across the terminals 113
and 114 of the control voltage source 104. The positive
terminal 130 is connected through the rectifier 89 to the
77 is connected to conduct current through the protective
diode rectifier 89 to the positive terminal 107 and the
negative terminal 109 is connected to conduct current
through the protective diode rectiñer SS to the emitter
emitter of the collector 72 and similarly the negative
terminal 132 is connected through the rectifier 88 to the
emitter of the transistor 71.
The reference voltage sources 125 and 126 have been
74. The intermediate terminal 10S is connected to a
shown as being variable, and either of these or the poten
Íirst output terminal 113 of the control voltage source 10 tiometer _134 may be varied to change the pre-set condi
104. A second output terminal 114 of this control volt
tion at which current limit occurs. The system 120 of
age source 104 is connected to the common line 63. The
collectors 75 and 78 are interconnected and connected
FÃGURE 3 operates in a manner similar to the circuit
of FlGURE 2 in that when the positive limit signal volt
to the limit circuit output terminal 83. This latter con
age at the potentiometer tap exceeds the bias in the base
nection may be made through an antihunt circuit Slt-85, 15 emitter circuit from the reference voltage source 126,
if desired, as in FIGURE l.
the transistor 71 conducts and the collector current is
In operation, the system 100 of FlGURE 2 operates
aided by the voltage from the reference voltage source
in a manner similar to the system of FIGURE 1 in that
125 to again make the terminal 37 more positive to de
the first control circuit 101 normally may be in control
crease the positive polarity output from the controlled
of the controlled circuit 102 except when positive or 20 circuit 102. Conversely, when the terminal 113 becomes
negative polarities of the control voltage from the source
too negative, this voltage exceeds the reference voltage
1041 exceed a pre-set value. The reference voltage source
source 126 on the transistor 72 to cause it to conduct,
105 has been shown as being variable and represents one
and hence, terminal 37 becomes more negative to decrease
way in which the pre-set condition may be changed.
the negative polarity output of the controlled circuit 102.
When terminal 113 becomes positive beyond the pre 25
FIGURE 4 shows an electrical system 140 which in
set value relative to the common line ‘63, then this posi
cludes a limit circuit 143 and wherein the transistors 71
tive potential exceeds the voltage of the reference sources
and 72 are connected in a common-emitter circuit arrange
applied to transistor' 71, and hence, this transistor con
ment'rather than the common base circuit arrangements
ducts. In this circuit of FEGURE 2, the left halt of both
of FIGURES l to 3. The protective diode rectiñers S8
sources 105 amn 106 are in the base-emitter circuit, and 30 and S9 are again used, if desired, in the base-emitter cir
cuits of the transistors 71 and 72 to protect these transistors
hence, the voltage from the control voltage source 104
against too high a reverse voltage. The reference volt
must exceed the sum of these two reference voltages.
age sources 125 and 126 are again used and the reference
After the transistor 71 commences to conduct, the emit
voltage source 125 applies reference voltages to the bases
ter-collector current is provided primarily by the volt
age of the control voltage source 1041l and is opposed only 35 of the transistors 71 and 72 and the reference voltage
source 126 applies reference voltages to the emitters of
by that voltage from the left half of the voltage source
these transistors. The intermediate terminal 131 of refer
105; hence, this means that a larger voltage is available
ence voltage source 126 is connected to the common line
to provide the emitter-collector current through resistor
63 and the intermediate terminal 128 of the reference
60 than is available in FlGURE 1. r1`his is an advantage
in using two reference voltage sources rather than one as 40 source 125 is connected to the potentiometer tap 133. The
collectors of transistors 71 and 72 are interconnected and
in FIGURE l. Again, this transistor load current flows
connected to the control terminal 37.
through the resistor 60 making terminal 37 more positive,
In operation, the circuit of FIGURE 4 is such that when
and hence, the controlled circuit 102 is such that it de
the potentiometer tap 133 becomes more negative than
creases. the positive polarity output thereof. rlfhis may
be a circuit similar to the controlled circuit 12 of FIG 45 a pre-set value as determined by the voltages of the left
half of reference sources 125 and 126, the net result of
URE 1 which decreases the output to the load 19. The
the voltages in the base-emitter circuit of transistor 71
control voltage source 104 may derive a voltage in ac
cordance with a condition of the load, the same as in
FIGURE 1.
is negative on the base to cause conduction thereof. This
causes collector current iiow from transistor 71 to make
When a negative polarity of voltage from the control 50 terminal 37 more positive to decrease the output of the
controlled circuit 102, Conversely, when the potentiom
eter
tap 133 becomes more positive than a pre-set value,
tive voltage at terminal 113 exceeds the voltages from the
the net result of the voltages in the base-emitter circuit is
right half of the reference voltage sources 105 and 106
positive on the base of the transistor 72 causing conduc
to cause conduction in the base-emitter circuit of transis 55
tion thereof, and hence, terminal 37 becomes more nega
tor 72. This turns on the transistor 72 providing col
tive to decrease the negative polarity output of the con
lector current into the transistor and making terminal
trolled circuit 102.
37 more negative to decrease the negative polarity output
FIGURE 5 is a still further rnodilication showing an
of the controlled circuit 102.
electrical system 150 including a limit circuit 153 incor
voltage source 104 exceeds a pre-set limit then this nega
FIGURE 3 is a circuit diagram of another modifica 60 porating the transistors 71 and 72 again in a common
tion of the invention showing an electrical system 120
emitter circuit arrangement. The emitters of both tran
again incorporating the control circuit 101, the controlled
circuit 102 and the control voltage source 104. A limit
circuit 123 is provided which includes the transistors
sistors 71 and 72 are connected directly to the common
line 63 and the voltage source 126 is used with the diode
rectiñers 83 and 89 applying positive and negative poten
71 and 72, the diodes 88 and 89, and reference voltage 65 tials, respectively, to the base electrodes of the transistors
sources 125 and 126.
The reference voltage source 125
includes positive, intermediate and negative terminals
127, 128 and 129, respectively, and the reference voltage
71 and 72. A reference voltage source 154 is included hav
ing positive, intermediate and negative terminals 155, 156
and 157, respectively. The positive terminal 155 is con
nected to the collector of the transistor 72 and the negative
tive terminals 130, 131, and 132, respectively. The inter 70 terminal 157 is connected to the collector of transistor 71.
mediate terminal 128 is connected to the control terminal
The intermediate terminal 156 is connected to the control
37 of the controlled circuit 102 and the positive and nega
terminal 37 of the controlled circuit 102.
tive terminals 127 and 129 of this reference voltage source
In operation, the potentiometer tap 133 supplies a posi
125 are connected to the collectors of the transistors 72
tive or a negative input signal to the limit circuit 153 and
and 71, respectively. Theintermediate terminal 131 is 75 when this potentiometer 133 becomes more negative than
source 126 also includes positive, intermediate and nega
3,069,618
9
10
load exceeds a given amount in a positive direction said
current limit signal exceeds said reference voltage applied
and a positive current limit signal in opposition and in
circuit with said first transistor emitter and base elec
to said first transistor to cause said first transistor to con
trodes and said first rectifier to conduct current there
duct and pass current to said current limit circuit output
through upon a current limit signal of positive polarity
exceeding a positive reference voltage, means connect
ing said reference voltage means and a negative current
means to decrease the positive polarity output of said
energization means to said load, and whereby when said
current in said load exceeds a given amount in a negative
direction said current limit signal exceeds said reference
voltage applied to said second transistor to cause said
second transistor to conduct and pass current from said
limit signal in opposition and in circuit with said second
transistor emitter and base electrodes and said second
rectifier to conduct current therethrough upon a current
limit signal of negative polarity exceeding a negative ref
tive polarity output of said energization means to said
load.
4. An electrical control sys-tem, including, in combi
erence voltage, and means connecting said transistor col
lectors together and to said current limit circuit first out
put terminal, whereby when the current in said load ex
ceeds a given amount in a positive direction said current
nation, a load, a voltage source, means connecting said
limit signal exceeds said reference voltage applied to said
load to be energized in positive and negative polarities
first transistor to cause said first transistor to conduct
from said source and having first and second control ter
minals, a current limit circuit having first and second
input and first and second output terminals, means inter
connecting said second terminals of said current limit
circuit, means connecting said current limit circuit first
output terminal to said energization means first input ter
minal, means applying a current limit signal to the input
terminals of sm'd current limit circuit in accordance with
current in said load, said current limit circuit including 25
and pass current through said impedance to make said
energization means first terminal more positive to de
crease the positive polarity output of said energization
first and second complementary symmetry transistors, first
more negative to decrease the negative polarity output
current limit circuit output means to decrease the nega
means to said load, and whereby when said current in
said load exceeds a given amount in a negative direction
said current limit signal exceeds said reference voltage
applied to said second transistor to cause said second
transistor to conduct and pass current through said im
pedance to make said energization means first terminal
of said energization means to said load,
and second rectifiers and reference voltage source means,
6. An electrical control system, including, in combina
said first transistor being a PNP type and said second
tion, a load, a voltage source, means connecting said
transistor being an NPN type, each of said transistors
having base, emitter and collector electrodes, means con 30 load to be energized in positive and negative polarities
from said source and having first and second control ter
necting said reference voltage means and a positive cur
minals, a first control circuit having first and second out
rent limit signal in opposition and in circuit with said
put terminals, a symmetrical impedance interconnecting
first transistor emitter and base electrodes and said first
said first terminals of said first control circuit and said
rectifier to conduct current therethrough upon a current
energization means, a feedback circuit connected to
limit signal of positive polarity exceeding a positive ref
erence voltage, means connecting said reference voltage
means and a negative current limit signal in opposition and
in circuit with said second transistor emitter and base elec
trodes and said second rectifier to conduct current there
supply a feedback signal in accordance with a condition
of said load to said first control circuit, the input irn
pedance of said energization means exceeding the output
impedance of said first control circuit, a current limit con
through upon a current limit signal of negative polarity 40 trol circuit having first and second input and first and sec
ond output terminals, said second terminals being corn
exceeding a negative reference voltage, and means con
mon, said current limit circuit first output terminal being
necting said transistor collectors together and to said
connected to the junction of said impedance and said en
current limit circuit first output terminal, whereby when
ergization means first input terminal, means applying
the current in said load exceeds a given amount in a
positive direction said current limit signal exceeds said 45 a current limit signal to the input terminals of said cur
rent limit circuit in accordance with current in said load,
reference voltage applied to said first transistor to cause
said first transistor to conduct and pass current to said
current limit circuit first output terminal to decrease the
said current limit circuit including first and second com
plementary symmetry transistors, first and second rectifiers
and reference voltage source means, said first transistor
positive polarity output of said energization means to said
load, and whereby When said current in said load exceeds 50 being a PNP type and said second transistor being an
NPN type, each of said transistors having base, emitter
a given amount in a negative direction said current limit
and collector electrodes, means connecting said reference
signal exceeds said reference voltage applied to said sec
voltage means and a positive current limit signal in op
ond transistor to cause said second transistor to conduct
position and in circuit with said first transistor emitter
and pass current from said current limit circuit first out
put terminal to decrease the negative polarity output of 55 and base electrodes and said first rectifier to conduct cur
rent therethrough upon a current limit signal of positive
put of said energization means to said load.
polarity exceeding positive reference voltage means,
5. An electrical control system, including, in combina
tion, a load, a voltage source, means connecting said load
means connecting said reference voltage means and a
negative current limit signal in opposition and in circuit
said source and having first and second control terminals, 60 with said second transistor emitter and base electrodes and
said second rectifier to conduct current therethrough upon
a symmetrical impedance connected to said first terminal
a current limit signal of negative polarity exceeding nega
of said energization means, a current limit circuit having
tive reference voltage means, and means connecting said
first and second input and first and second output termi
transistor collectors together and to said current limit cir
nals, said second terminals being common, said current
limit circuit first output terminal being connected to the 65 cuit first output terminal, whereby said first control cir
cuit normally controls said load through said impedance
junction of said impedance and said energization means
and said energization means until the current in said load
first input terminal, means applying a current limit sig
exceeds a given amount in a positive direction whereupon
nal t0 the input terminals of said current limit circuit in
said current limit signal exceeds said reference voltage
accordance with current in said load, said current limit
circuit including first and second complementary sym 70 applied to said first transistor to cause said ñrst transistor
to conduct and pass current through said impedance to
metry transistors, first and second rectifiers and reference
to be energized in positive and negative polarities from
make said energization means first terminal more posi
tive to decrease the positive polarity output of said ener
gization means to said load, and whereby when said cur
of said transistors having base, emitter and collector elec
trodes, means connecting said reference voltage means 75 rent in said load exceeds a given amount in a negative
voltage source means, said first transistor being a PNP
type and said second transistor being an NPN type, each
aces ,ein
l l.
12
direction said current limit signal exceeds said reference
put impedance of said energization means exceeding the
voltage applied to said second transistor to cause said
second transistor to conduct and pass current through
said impedance to make said energization means ñrst ter
output impedance of said voltage control circuit, a cur
rent limit circuit having ñrst and second input and first
and second output terminals, said second terminals be
ing common, said current limit circuit first output termi
nal being connected to the junction oi"- said impedance
and said energization means first control terminal, means
appiying a current limit signal to the input terminals of
minal more negative to decrease the negative polarity out
put of said energization means to said load.
7. An electrical control system, including, in combina
tion, a load, a voltage source, means connecting said
load to be energized in positive and negative polarities
said current limit circuit in accordance with current in said
from said source and having 'iirst and second control
terminals, a voltage control circuit having first and sec
load, said current li‘ciît circuit including first and second
complementary symmetry transistors, first and second rec
tiiiers and ñrst and second reference DC. voltage sources,
said iirst transistor being a PNP type and said second
transistor being an 'NPN type, positive, negative and in
ond output terminals, a symmetrical impedance inter
connecting said first terminals of said voltage control cir
cuit and said energization means, a voltage feedback cir
cuit connected to supply a feedback voltage in accordance
with a condition ci said load to said voltage control cir
cuit, the input impedance of said energization means ex
ceeding the output impedance or“ said voltage control
circuit, a current limit circuit having first and second in
put and ñrst and second output terminals, said second
terminals being common, said current limit circuit first
output terminal being connected to the junction of said
impedance and said energization means iirst input termi
nal, means applying a current limit signal to the input
terminals of said current limit circuit in accordance with
current in said load, said current limit circuit including
first and second complementary symmetry transistors, first
and
rer
f
‘
voltage source
means, said iirst transistor being a PNP type and said
second transistor being an NPN type, positive and nega
tive reference voltage means obtainable from said ref
erence voltage source means, each of said transistors ha '
termediate terminals on each said DC. source, each of
said transistors having base, emitter and collector elec
trodes, said first transistor base electrode being connected
to said second reference source positive terminal, said
first rectiñer being connected to conduct current from
said íirst reference source negative terminal to said ñrst
transistor emitter, said intermediate terminal of said first
reference source being connected to said current limit cir
cuit first input terminal, said inte]
terminal of
said second reference source being connected to Said com
mon second terminals, said second rectifier being con
nected to conduct current from said second transistor
emitter to said first reference source positive terminal,
Said second transistor base electro-de being connected t0
said second reference source negative terminal, an anti
hunt circuit connected across the output terminals of said
current limit circuit, and said transistor collectors being
connected together and through said antihunt circuit to
ing base, emitter and collector electrodes, means con
said current limit circuit first output terminal, whereby
necting said positive reference voltage means and a posi
said voltage control circuit normally controls said load
tive current limit signal in opposition aV d
circuit with 35 through said impedance and said energization means until
said ñrst tran Aster emitter and `base electrodes and said
the current in said load exceeds a given amount in a posi
tirst rectifier to conduct current therethrough upon a cur
tive direction whereupon said current limit signal exceeds
rent limit signal ot positive polarity exceeding said posi
said reference volt^ges applied in the emitter-base circuit
tive reference voltage means, means connecting said nega
of said first transiswr to cause said first transistor to
tive reference voltage means and a negative current limit
conduct and pass current through said impedance to make
signal in opposition and in circuit with said second tran
said energization means first terminal more positive t0
sistor emitter and base electrodes and said second rec
tifier to conduct current therethrough upon a current
limit signal of negative polarity exceeding said negative
decrease the positive polarity output of said energization
means to said load, and whereby when said current in
said load exceeds a given amount in a negative direction
reference voltage means, an antihunt circuit connected
across the output terminals of said current limit circuit,
and means connecting said transistor collectors together
and through said antihunt circuit to said current limit
said current limit signal exceeds said reference voltages
applied in the emitter-base circuit of said second tran
circuit iirst output terminal, whereby said voltage control
circuit normally controls said load through said imped
means :first terminal more negative to decrease the nega
ance and said energization means until the current in said
load exceeds a given amount in a positive direction where
upon said current limit signal exceeds said reference volt
age applied to said tirst transistor to cause said ñrst tran
sistor to conduct and pass current through said imped
ance to malte said energization means first terminal more
positive to decrease the positive polarity output of said
energization means to said load, and whereby when said
current in said load exceeds a given amount in a negative
direction said current limit signal exceeds said reference
voltage applied to said second transistor to cause said
second transistor to conduct and pass current through
said impedance to make said energization means iirst ter
minal more negative to decrease the negative polarity out
put of said energization means to said load.
8. An electrical control system, including, in combina
tion, a load, a voltage source, means connecting said load
to be energized in positive and negative polarities from
said source and having first and second control terminals,
a voltage control circuit having first and second output
terminals, a symmetrical impedance interconnecting said
first terminals of said voltage control circuit and said
energization means, a voltage feedback circuit connected
to supply a feedback voltage in accordance with a con
dition of said load to said voltage control circuit, the in
sistor to cause said second transistor to conduct and pass
current through said impedance to make said energization
tive polarity output of said energization means to said
load.
9. An electrical control system, including, in combina
tion, a load, a voltage source, means connecting said load
to be energized in positive and negative polarities from
said source and having first and second control terminals,
a voltage control circuit having iirst and second output
terminals, a symmetrical impedance interconnecting said
first terminals of said voltage control circuit and said en
ergization means, a voltage feedback circuit connected to
supply a feedback voltage in accordance with a condition
of said load to said voltage control circuit, the input im
pedance of said energization means exceeding the output
impedance of said voltage control circuit, a current limit
circuit having iirst and second input and first and second
utput terminals, said second terminals being common,
said current limit circuit iirst output terminal being con
nected to the junction of said impedance and said ener
gization means first control terminal, means applying a
current limit signal to the input terminals of said current
limit circuit in accordance with current in said load, said
cu ent limit circui‘ cluding first and second complemen
tary symmetry transistors, ñrst and second rectiiiers and
.first and second reference DC. voltage sources, said first
transistor being a PNP type and said second transistor
being an NPN type, positive, negative and intermediate
3,069,618
13
14
terminals on each said D.C. source, each of said transis
minal, an antihunt circuit connected across the output »ter
minals of said current limit circuit, and said transistor
tors having base, emitter and collector electrodes, said
first and second transistor electrodes being connected to
said common second terminals, said first rectifier being
connected to conduct current from the negative terminal
of said first reference source to said first transistor emit
ter, said intermediate terminal of said first reference
collectors being connected together and through said anti
hunt circuit to said current limit circuit first output ter
minals, whereby said voltage control circuit normally con
trols said load through said impedance and said ener
gization means until the current in said load exceeds
source being connected to said current limit circuit first
a given amount in a positive direction whereupon said
input terminal, said intermediate terminal of said Second
current limit signal exceeds said reference voltages ap
reference source being connected to said current limit l0 plied in the emitter-base circuit of said first transistor to
cause said first transistor to conduct and pas-s current
circuit first output terminal, said second rectifier being
through said impedance to make said energization means
first terminal more positive to decrease the positive polar
ity output of said energization means to said load, and
source, an antihunt circuit connected across the output
terminals of said current limit circuit, and first and sec 15 whereby when said current in said load exceeds a given
amount in a negative direction said current limit signal
ond said transistor collectors being connected to the nega
exceeds said reference voltages applied in the emitter
tive and positive terminals of said second reference source
base circuit of second transistor to cause said second tran
and through said antihunt circuit to said current limit
sistor to conduct and pass current through said impedance
circuit first output terminal, whereby said voltage control
` connected to conduct current from said second transistor
emitter to the positive terminal of Said first reference
circuit normally controls said load through said imped 20 to make said energization means first terminal more nega
ance and said energization means until the current in
said load exceeds a given amount in a positive direction
tive to decrease the negative polarity output of said ener
whereupon said current limit signal exceeds said reference
voltages applied in the emitter-base circuit of said first
ll. An electrical control system, including, in combina
gization means to said load.
,
tion, a load, a voltage source, means connecting said ‘load
transistor to cause said first transistor to conduct and pass 25 to be energized in positive and negative polarities from
current through said impedance to make said energiza
tion means first terminal more positive to decrease the
said source and having first and second control ter
minals, a voltage control circuit having first and second
positive polarity output of said energization means to said
load, and whereby when said current in said load exceeds
output terminals, a symmetrical impedance interconnect
ing said first -terminals of said voltage control circuit
a given amount in a negative direction said current limit 30 and said energization means, a voltage feedback circuit
signal exceeds said reference voltages applied in the
emitter-base circuit of said second transistor to cause
said second transistor to conduct and pass current
connected to supply a feedback voltage in accordance
with a condition of said load to said voltage control
circuit, the input impedance of said energization means
exceeding the output impedance of said voltage control
through said impedance to make said energization means
first terminal more negative to decrease the negative po 35 circuit, a current limit circuit having first and second
larity output of said energization means to said load.
input and first and second output terminals, said second
terminals being common, said current limit circuit first
l0. An electrical control system, including, in combina
output terminal being connected -to the junction of said
tion, a load, a Voltage source, means connecting said load
impedance and said energization means first control ter
to be energized in positive and negative polarities from
said source and having first and second control terminals, 40 minal, means applying a current limit signal to the input
terminals of said current limit circuit in accordance with
a voltage control circuit having first and second output
current in said load, said current limit circuit including
terminals, a symmetrical impedance interconnecting said
first and second complementary symmetry transistors,
first lterminals of said voltage control circuit and said
first and second rectifiers and first and second D.C. volt
energization means, a voltage feedback circuit connected
tage sources, said first transistor being a PNP type and
to supply a feedback voltage in accordance with a condi
said second transistor being an NPN type, positive, nega
tion of said load to said voltage control circuit, the in
tive and intermediate terminals on each said D.C. source,
put impedance of said energization means exceeding the
each of said transistors having base, emitter and collector
output impedance of said voltage control circuit, a cur
rent limit circuit having first and second input and first
electrodes, said ñrst and second transistor emitter elec
trodes being connected to said common second terminals,
and second output terminals, said second terminals be
said first rectifier being connected to conduct current
ing common, said current limit circuit first output ter
from said first transistor base electrode to the positive
minal being connected to the junction of said impedance
terminal of said first reference source, said second recti
and said energization means first control terminal, means
fier being connected to conduct current from the nega
applying a current limit signal to the input terminals of
said current limit circuit in accordance with current in
said load, said current limit circuit including first and
second complementary symmetry transistors, first and
tive terminal of said first reference source to said sec
ond transistor base electrode, said first reference source
intermediate terminal being connected to said first input
terminal of said current limit circuit, said intermediate
second rectifiers and first and second reference DC. volt
terminal of said second reference source being connected
age sources, said first transistor being a PNP type and
said second transistor being an NPN type, positive, nega 60 to said current limit circuit first output terminal, an
antihunt circuit connected across the output terminals
Itive and intermediate terminals on each said D.C. source,
of said current limit circuit, and said first and second
each of said transistors having base, emitter and collector
electrodes, said first transistor emitter electrode being
connected to said second reference source positive ter
minal, said first rectifier being connected to conduct cur
rent from said first transistor base electrode to the posi
tive terminal of said first reference source, said second
rectifier being connected to conduct current from said first
reference source negative terminal to said second tran
transistor collectors being connected to the negative and
positive terminals of said second reference source and
through said antihunt circuit to said current limit circuit
first output terminal, whereby said voltage control cir
cuit normally controls said load through said impedance
and said energization means until the current in said load
exceeds a given amount in a positive direction whereupon
sistor base electrode, said second transistor emitter be 70 said current limit signal exceeds said reference voltages
applied in the emitter-base circuit of said first transistor
ing connected to said second reference source negative
to cause said first transistor to conduct and pass current
terminal, said second reference source intermediate ter
through said impedance to make said energization means
minal being connected to said common second terminals,
first terminal more positive to decrease the positive po
said first reference source intermediate terminal being
Connected to said current limit circuit first input ter 75 larity output of said energization means to said load, and
accepts
whereby when said current in said load exceeds a given
amount in a negative direction said current limit `signal
exceeds said reference voltages applied in the emitter
base circuit of said second transistor to cause said sec
ond transistor to conduct .and pass current through said
impedance to make said energization means first terminal
more negative to decrease the negative polarity output
of said energization means to said load.
l2. An electrical control system, including, in com
bination, a load, a voltage source, means connecting said
load to be energized in positive and negative polarities
in acc
-ance with a condition of said load to said voltage
contr/„i circuit, the input impedance of said controllable
rectifier means exceeding the output impedance of said
voltaee control circuit, a current limit circuit having first
and second input and first and second output terminals,
said second terminals being common, said current limit
circuit first output terminal being conected to the junc
tion of said resistor and said controllable rectifier means
first input terminal, means connected to said load'and
passing a current limit signal to the input terminals of
said current limit circuit, said current limit circuit includ
from said source and having first and second control
first and second complementary symmetry transistors,
terminals, a voltage control circuit having first and second
output terminals, a symmetrical impedance interconnect
ing said ñrst terminals of said voltage control circuit
and said energize-.tion means, a voltage feedback circuit
connected to supply a feedback voltage in accordance
first and second rectifiers and a reference DC. source,
transistors having base, emitter and collector electrodes,
with a condition of said load to said voltage control cir
said first transistor base electrode being connected to said
said first transistor being a PNP type and said second
transistor being an NPN ty e, positive, lnegative and in
termediate ter
1-als on said DC. source, each of said
cuit, the input impedance of said energizations means
D. C. source positive terminal, said. first rectifier being
exceeding the output impedance of said voltage control 9.0 co -ctcd to conduct current from said current limit
circuit, a current limit circuit having first and second
circuit first input terminal to said first transistor emitter,
input and first and second output terminals, said second
i' second rectifier being connected to conduct current
terminals being common, said current limit circuit first
output terminal being connected to the junction of said
impedance and said energization means first control ter
minal, means applying a current limit signal to the input
terminals of said current limit circuit in accordance with
current in said load, said current limit circuit including7
first and second complementary symmetry transistors,
first and second rectifiers and a reference DC. voltage
source, said first transistor being a PNP type and said
second transistor being an NPN type, positive, negative
from said second transistor emitter to said current limit
circuit first input terminal,
second transistor base
electrode being connected to said DC. source nega~
tive terminal, said DC. source intermediate terminal
being connected to said common second terminals, an
antihunt circuit connected across the output terminals of
said current limit circuit, and said transistor collectors
be`“g connected together and through said antihunt cir
cuit to said current limit circuit first output terminal,
whereby said voltage control circuit normally controls
and intermediate terminals on said DC. source, each of
said load through said resistor and said controllable rec
said transistors having base, emitter and collector elec
trodes, said first transistor base electrode being connected
to said DC. source positive terminal, said first rectifier
tifier means until the current in said load eziccds a given
am unt in a positive direction whereupon said current
being connected to conduct current from said current
limit signal exceeds said reference voltage applied to the
limit circuit first input terminal to said first transistor
emitter, said second rectifier being connected to conduct
base of said first transistor to cause and first transitsor to
conduct and pass current through said resistor to make
said controllable rectifier means first input terminal more
current from said second transistor emitter to said current
positive to decrease the positive polarity output of said
limit circuit first input terminal, said second transistor
controllable rectifier means to said load, and whereby
when said current in said load ericeds a given amount in
a negative direction said current limit signal exceeds said
ref ‘ence voltage applied to the base of said second tran
sistor to cause said second transistor to conduct and pass
current through said resistor to make said controllable
base electrode being connected to said DC. source nega
tive terminal, said DC. source intermediate terminal
being connected to said common second terminals, an
antihunt circuit connected across the output terminals siii
of said current limit circuit, and said transistor collectors
being connected together and through said antihunt cir
cuit to said current limit circuit first output terminal,
rectifier first input terminal more negative to decrease the
negative polarity output of said controllable rectifier
whereby said voltage control circuit normally controls
said load through said impedance and said energization
means to said load.
means until the current in said load exceeds a given
amount in a positive direction whereupon said current
a motor armature,
limit signal exceeds said reference voltage applied to the
base of said first transistor to cause said first transistor to
14. A motor co :ol circ‘izit, inclrding, in cfunblz
means connected to
AC. source, cont
'
'
ond input control terminals, met .s con-noni,
ture to be responsive to the output of said
conduct and pass current through said impedance to make
said energization means ñrst terminal more positive to
t
decrease the positive polarity output of said energization
terminals, a resistor interconnecting said first terminals of
said voltage control cir 'tit and said controllable rectifier
means to said load, and whereby when said current in
said load exceeds a given amount in a negative direction
said current limit signal exceeds said reference voltage
applied to the base of said second transistor to cause said
second transistor to conduct and pass current through
said impedance to make said energization means first
terminal more negative to decrease the negative polarity
output of said energization means to said load.
i3. An electrical circuit including, in combination, a
load, a DC. source, cont“ .able rectifier means con
nected to said source and having first and. second input
control terminals, means connecting said load to be re
sponsive to the output of said rectiñer means for energiza
tion in positive and negative polarities, a voltage control
circuit having first and second output terminals, a resistor
interconnecting said first terminals of said voltage con
trol circuit and said controllable rectifier means, a voltage
feedback circuit connected to supply a feedback Voltage
means, a voltage feedback ci
connected to su
feedback voltage in accor
a mature to said voltage control circuit, the input im
pedance of said controllable rectiffn` means far exceeding
'ne output im sedance
s 'd voltage com ci circuit, a
and
current
second
limitoutput
circuitterminals,
firstsaid
andsecond
secondterminals
input andbeing
common, said current limit circuit first output terminal
being connected to the june i
of said re tor
said
controllable rectifier .means first input termal. , a current
limit s-- nal source co :ctcd to
meter armature
and pass ig current limit signal to the input terminals
of said ca_,.ent limit circuit, said current limit circuit in
cluding first and second complementary symmetry transis
tors, tirst and second rcctifiers
a reference DC. volt
age source, said 'first transistor' being a PNP type and said
second transistor being
NPN type, positive, negative
3,069,618
l7
18
and intermediate terminals on said D.C. source, each of
16. An electrical control system, including, in combina
tion, a load, energization means connecting said load to
be energized from a voltage source 4and having control
means, a current limit circuit having input and output
said transistors having base, emitter and collector elec
trodes, said first transistor base electrode being connected
to said D.C. source positive terminal, said first rectifier
from said second transistor emitter to said current limit
circuit first input terminal to said first transistor emitter,
said second rectifier being connected to conduct current
from said second transistor emitter to said current limit
means, means connecting said current limit circuit output
means to the control means of said energization means,
means applying a current limit signal to the input means
of said current limit circuit in accordance with current in
said load, said current limit circuit including first and sec
electrode being connected to said D_C. source negative 10 ond semi-conductors and reference voltage source means,
each of said semi-conductors having three terminals in
terminal, said D.C. source intermediate terminal being
cluding input and output means, means connecting said
connected to said common second terminals, an antihunt
reference voltage means and a positive current limit signal
circuit connected across the output terminals of said cur
in opposition and in circuit with said first semi-conductor
rent limit circuit, and said transistor collectors being con
nected together and through said antihunt circuit to said 15 input means to conduct current therethrough upon a cur
rent limit signal of positive polarity exceeding a positive
current limit circuit first output terminal, whereby said
reference voltage, means connecting said reference voltage
voltage control circuit normally controls said motor arma
means and a negative current limit signal in opposition and
ture through said resistor and said controllable rectifier
in circuit with said second semi-conductor input means
means until the current in said motor armature exceeds a
given amount in a positive direction whereupon said cur 20 to conduct current therethrough upon a current limit sig
nal of negative polarity exceeding a negative reference
rent limit signal exceeds said reference voltage applied to
voltage, and means connecting said semi-conductor out.-r
the base of said first transistor to cause said first transistor
circuit first input terminal, .said second transistor base
to conduct and pass current through said resistor to make
said controllable rectifier means first input terminal more
positive to decrease the positive polarity output of said 25
controllable rectifier means to said motor armature, and
whereby when said current in said motor armature exceeds
a given amount in a negative direction said current limit
signal exceeds said reference voltage applied to the base
put means to said current limit circuit output means for
control of said energization means.
'
"
17. An electrical control system, including, in combina
tion, a load, a voltage source, energization means con
necting said load to be energized from said source and
having control means, a current limit circuit having input
and output means, means connecting said current limit
of said second transistor to cause said second transistor to 30 circuit output means to the control means of said energiza
tion means, means applying a current limit signal to the
conduct and pass current through said resistor to make
input means of said current limit circuit in accordance
said controllable rectifier first input terminal more nega
with current in said load, said current limit circuit in
cluding first and second complementary symmetry tran
15. An electrical control system, including, in com 35 sistors, first and second rectifiers and reference voltage
source means, each of said transistors having base, emit
bination, a load, energization means connecting said load
ter and collector electrodes, means connecting said refer
to be energized from a voltage source and having control
ence voltage means and a positive current limit signal in
means, a limit circuit having input and output means,
opposition and in circuit with said first transistor emitter
means connecting said limit circuit output means to the
tive to decrease the negative polarity output of said con
trollable rectifier means to said motor armature.
„ab
control means of said energization means, means apply 40 and base electrodes and said first rectifier to conduct cur
rent therethrough upon a current limit signal of positive
ing a limit signal to the input means of said limit circuit
polarity exceeding a positive reference voltage, means
in accordance with a first condition, said limit circuit in
connecting said reference voltage means and a negative
cluding first and second semi-conductors and reference
current limit signal in opposition and in circuit with said
voltage source means, each of said semi-conductors having
input and output means, means connecting said reference 45 second transistor emitter and base electrodes and said
second rectifier to conduct current therethrough upon a
voltage means and a positive limit signal in opposition
current limit signal of negative polarity exceeding a nega
and in circuit with said first semi-conductor input means
tive reference voltage, and means connecting said tran
to conduct current therethrough upon a limit signal of
sistor collectors together and to said current limit circuit
positive polarity exceeding a positive voltage derived from
said reference voltage source means, means connecting 50 output means for control of said energization means.
said reference voltage means and a negative limit signal
References Cited in the file of this patent
in opposition and in circuit with said second semi-conduc
tor input means to conduct current therethrough upon
UNITED STATES PATENTS
a limit signal of negativepolarity exceeding a negative
voltage derived from said reference voltage source means, 55
and means connecting said semi-conductor output means
to said limit circuit output means to control said energiza
tion means.
2,888,632
2,888,633
2,889,512
2,904,742
Livegey _____________ __ May 26,
Carter ______________ __ May 26,
Ford et al. ___________ __ June 2,
Chase ______________ __ Sept. 15,
1959
1959
1959
1959
Документ
Категория
Без категории
Просмотров
0
Размер файла
1 846 Кб
Теги
1/--страниц
Пожаловаться на содержимое документа