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Патент USA US3074040

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Jan. 15, 1963
F. J. HIERHOLZER, JR
3,074,030 -
BRIDGE TYPE INVERTER NETWORK
Filed_Jan. 19, 1960
2 Sheets-Sheet 2
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United States Patent
11
CC
1
3,074,030
Frank J. Hierholzer, .l'r., Westport, Conn, assignor to
Westinghouse Electric Corporation, East Pittsburgh,
BRIDGE-TYPE INVERTER NETWGRK
Pa., a corporation of Pennsylvania
Filed Jan. 19, 1960, Ser. No. 3,303
15 Claims. (Cl. 331-113}
This invention relates generally to networks for trans
ferring unidirectional potential power into alternating
potential power and is particularly adapted to such a
network in which controlled diodes are used as the con
trolling valves.
3,074,030
Patented Jan. 15, 1963‘
2
A controlled diode or four region triode is a semicon-J
ductor device which may be of the PNPN, NPNP and'j
PNPM types, among others, and which are sold by West
inghouse Electric Corporation under the trade name
Trinistor. In this type of device the control circuit acts
to control the rendering of the power circuit into its con
ducing condition but has no e?ect (under normal operat
ing conditions) to interrupt the current ?ow in the power.
circuit. Current ?ow through the power circuit is inter
rupted only when the magnitude of the current ?ow
therethrough decreases below a minimum critical value.
In this respect it is very much like a thyratron or ignitron
tube.
FIG. 4 illustrates a typical characteristic curve for a
Various types of networks have been used in the prior
art to invert a direct potential to alternating potential, 15 four region diode. The ordinate Vt represents the break
and these networks have included a bridge-type network
over voltage at zero control current while the abscissa
in which electric triodes have been used to control the
represents time starting to which is the instant that a con
?ow of current as well as electric valves of the transistor
trol current is applied to the control circuit. The curve
type. The transistor type controlling valves have certain
V1 represents the voltage across the power circuit- during
advantages over the tubes in that there is less voltage 20 the “turn-on time,” V2 the voltage during “on time” and
drop thereacross, and also they do not require the elec
V3 the voltage which must not be exceeded during the
tric heating power which is required by the electric
“turn-o? time.” The curves V1, V2 and V3 are typical"
valves or electric tubes. The transistor type electric
and their shapes may vary somewhat depending upon the
valves, however, require a continuous control current so
magnitude of, and rate of rise of, the control current
that the power required for this control current de 25 during “turn-on time” and upon the magnitude of the
creases the e?iciency of the network.
current through the power circuit just before the “turn
It is an object of my invention to provide a new and
improved inverter network which has increased e?iciency.
Another object is to provide a network for inverting
power at greater voltage and current levels than has
heretofore been possible.
A further object of this invention is to provide such a
network with a new and improved controlling device.
A further object of this invention is to provide such
a network in which controlled diodes are used to control
the current flow through the network.
A still further object is to provide such network which
off time.”
‘
Breakover voltage is de?ned as that voltage which when
applied across the power circuit of a controlled recti?er
will cause it to conduct substantial current in the forward
direction. As this control current is increased, the break-.
over voltage decreases.
Let us assume that the voltage magnitude A occurs
with zero control current and that at time to avvo'tage is
applied to the control circuit. Current will build up in
the control circuit at a determined rate. In the typical
curve V1, it is assumed that the wave shape of the con
trol current is square and the current increases to its
is highly reliable in operation.
Other objects will be apparent from the speci?cation‘
maximum value instantaneously. In actual practice
40 some inductance will be present in the control circuit and
and claims and the drawings, in which drawings:
vFIGURE 1 shows schematically an inverter network
embodying the invention;
the current will take a ?nite time to build up. Since any
delay in current build up increases the interval to to t1,
FIG. 2 shows schematically a modi?ed form of starter
network for use in the inverter network of FIG. 1;
the circuit characteristics should be such as to cause full
FIG. 3 is a schematic form of a modi?ed form of the
choice of elements, this may be as low as 1 microsecond.
inverter network of FIG. 1 embodying my invention; and
Time t1 by de?nition is the time that the breakover
voltage will have decreased to 90 percent of A. Time in
by de?nition is the time that the breakover voltage will
have decreased to 10v percent of A. The time interval to
to t1, which may be of the order of two microseconds, is
FIG. 4 shows schematically certain operating charac
teristics of a controlled diode which is usable in the net
work of FIGS. 1 and 3.
Referring to the drawings by charactersof reference, '
the numeral 1 indicates generally a bridge-type inverter
network having power supplying terminals 2 and 4 con—
nected by means of conductors 6 and 8 to a suitable
control circuit to ?ow in the minimum time. By proper‘
de?ned as delay time while the interval t1 to t2, which
may 'be of the order of .2 microsecond, is de?ned as risev
source of unidirectional potential 710. The bridge-type
time. The curve V1 represents the time-voltage relation
ship of the voltage between the emitter and collector of a
network 1 has a pair of output terminals 12 and 14 which
are connected by conductors 16 and 18 respectively to
the alternating current load 20. Current flow through
magnitude A.
The magnitude of the control current should always
four region triode subjected to a source potential of the
each of the bridge arms is controlled by means of con
equal or exceed the base current which is required forv
full turn-on of the controlled diode with the minimum
trolled diodes or four region triodes 22, 24, 26 and 28.
The controlled diodes or devices 22 and 24 respectively 60 value of voltage across the power circuit which will cause
the diode to initiate conduction. This value is sometimes
control current flow from the power terminal 2 to the
called IBF by those skilled in the art. Sometime during
output terminals 12 and 14 while the devices 26 and 28
the interval t2 to t3, the base or control current is termi
similarly control the current flow from the output terminals
12 and 14 to the power terminal 4. Each of the devices 65 nated and as long as the current ?owing in the powercir
cuit does not decrease below a ?xed minimum value, the
22, 24, 26 and 28 has a power circuit extending between
diode will continue to conduct in much the same man
a current input terminal or emitter e through four semi
ner that an ignitron continues to conduct after the igniter
conductor layers to a current ‘output terminal or collector
has been deenergized.
c. Initiation of current flow through the four region-tri
The portion of the curve V3 shows a typical breakover
odes is controlled by means of a control circuit which 70
voltage characteristic of a controlled diode during “turn
extends from the power terminal'e to a control terminal or
electrode 1).
off” which is accomplished by interrupting current flow,
through the'power circuit by some means outside of'the‘
> 3,074,030
1
4
diode itself. Prior to time t3 which is the start of “turn
of the winding 64. Likewise, the control circuit 67 for
olf time,” the current flow in the control or base
circuit will have been terminated, and if the current
flow in the power circuit is prevented for the time t; to t5,
the controlled diode itself will then prevent current ?ow
provided, however, that the voltage across the power
circuit is not greater than 90 percent of the maximum
the diode 28 extends from one terminal 73 of the winding
through a current limiting resistor 74, base b of the diode
28, emitter e thereof, conductor 75, and recti?er 76 to the
other terminal 77 of the winding 66. The primary wind
ing 78 of the transformer 32 is connected in series with
breakover voltage value A. Normally, the voltage ap
plied to the circuit controlled by the trinistor is kept below
85 percent of A so that it is safely below the breakover
voltage, and the controlled diode will not accidentally
conduct without the application of control current.
Returning again to the circuit arrangement of FIG. 1,
the collectors c of the devices 22 and 24 are connected
to the power terminal 2 while the emitters e thereof are
a recti?er 79 and a four region diode 80 across the ter
minals 52a and 52b of the capacitor 52 in the same man
ner as is winding 34 except that the polarities of recti?er
79 and diode 80 are reversed with respect to 53 and 54
so that the diode 80 will breakover and discharge the
capacitor 52 through the winding 78 when terminal 52a
is positive with respect to terminal 52b. The winding 78
is shunted by a recti?er 81 similar to the recti?er 58.
A starting circuit is provided for the network 1 which
acts to initially charge the capacitor 52 in a polarity to
render its terminal 52a positive with respect to its ter
The collectors c of the devices 26 and 28 are connected
minal 52b after which the network 1 continues to oscil
respectively to ‘the output terminals 14 and 12 while the
late due to operation of the ?ring circuits above de
emitters e are connected together and to the power ter
minal 4. The pairs of devices 22—26 and 24-28 are 20 scribed. For this purpose there is provided a pair of
shunting networks 84 and 86 about the controlled diodes
alternately rendered condu:ting for energizing the out
22 and‘ 26. The network 84 includes a capacitor 88 con
put terminals 12, 14 in one polarity and then in the
nected in parallel with a resistor 90. This network
opposite polarity from the source 10 to provide a source
88—90 is connected in series with a recti?er 92 and the
of alternating potential for the load 20.
- In order to accomplish the turning on of the pairs of 25 resulting circuit is connected between the emitter e and
collector c of the device 22. A resistor 91 is also con
devices 22—26 and 24-28, a pair of ?ring or control
nected between emitter e and collector c of the device
transformers 30 and 32 are provided. The ?ring transr
22 and completes the network 84. The network 86 is
former 30 has a primary winding 34 and a pair of sec
connected. to the load terminals 12 and 14 respectively.
ondary windings 36 and 38. The secondary windings 36
- similar to the network 84 and includes a parallelly con
and 38 are connected to energize the control cIrcuits 37 30 nected capacitor 94 and resistor 96, which network 94—96
is in series with a recti?er 98. The network 86 further
and 39 of the devices 22 and 26, respectively. The con
includes a shunting resistor 100 connected between the
trol circuit 37 extends from one terminal 40 of the wind
emitter e and collector c of the device 26.
ing 36. through a current limiting resistor 42, the base b
It is believed that the remaining details of construction
of the device 22, the emitter e thereof, a conductor 43
and a recti?er 44 to the other terminal 45 of the wind 35 may best be described in connection with the description
ing 36. Similarly, the control circuit 39 extends from , of operation which is as follows: upon closure of the dis
connect switches 82 and 82a, potential is applied between
one terminal 46 of the‘winding 38 through a current
limiting resistor 48, the base b of the device 26, the
the input terminals 2 and 4. Since under this condition,
the capacitors 8S and 94 will have been discharged, cur
other terminal 51 of the winding 38. The recti?ers 44 40 rent will flow from the source 10 through conductor 6, dis
and 50 prevent any substantial reverse current ?ow
connect switch 82, inductive reactor 102, terminal 2, the
emitter e thereof, a conductor 49 and a recti?er 50 to the
through the circuits 37 and 39. I
The primary winding 34 of the transformer 30 is con
recti?er 92, capacitor 88, terminal 12, capacitor 52,
recti?er 60, resistor 61, terminal 14, recti?er 98, capacitor
nected across a ?ring or timing capacitor 52 in series
94, the terminal 4, the conductor 8 and disconnect switch
with a recti?er 53 and a four region diode 54. The diode 45 82a to the negative terminal of the source It). Some
54 prevents energization of the transformer 30 until the
current, of course, will also ?ow through the load 20;
capacitor 52 has been charged to a critical potential.
however, the majority of the current will be through the
capacitor 52 as above described. The magnitudes of the
When the potential across the capacitor 52 reaches a
capacitors 88 and 94 with respect to that of the capacitor
critical value, the diode'54 breaksover and the capacitor
52 discharges through the winding 34 to provide a steep 50 52 and the load 20 are such that the capacitor 52 will be
charged to a critical potential prior to the time that the
wave front of voltage in the windings 36 and 38. The
capacitors 88 and 94 become fully charged.
recti?er 53 prevents any substantial reverse energizationv
of the winding 34 when the capacitor is charged in the‘
When the capacitor 52 receives its critical charge, the
opposite polarity as will be described, below. A diode
four region diode 80 will breakover permitting the capac
recti?er 58, connected in shunt with the winding 34, re—, 55 itor 52 to discharge through the primary winding 78 of
duces the voltage surge due to‘ collapsing flux in the'
the transformer 32. This discharge current momentarily
transformer 30.
energizes the secondary windings 66 and 64 thereof to
One terminal 52a of the capacitor 52 is connected to
cause control current to flow in the control circuits 65 and
load terminal 12. The other terminal 52b thereof is
67 of the devices 24 and 28. These devices quickly be—
connectedthrough a recti?er 56, a compensating resistor
come conductive and current will then ?ow from the ter
57, and a current controlling resistor 58 to the load ter
minal 2 through the device 24, terminal 14, load 20, ter
minal 14 for charging of the timing capacitor 52 in a
minal 12, device 28 and terminal 4 back to the negative
?rst direction when the load terminal 14 is positive with
terminal of the DC. source 10. As soon as the devices
respect to the load terminal 12. A recti?er 60 and com
24 and 28 conduct, terminal 12 is elfectively connected
pensating resistor 61 are connected inshunt around the
to terminal 4 and terminal 2 is elfectively connected to
recti?er 56 and resistor-57 for charging the timing capaci
tor 52 in the opposite direction when the load terminal
terminal 14.
This causes load current to flow in one
polarity and causes the capacitors 88 and 94 to rapidly
12 is positive with respect to the load terminal 14.
charge to the full potential of the DC. source 10 and
Transformer 32 is provided with a pair of secondary
causes the capacitor 52 to charge in a polarity opposite
windings 64 and 66 which are connected respectively into 70 to the polarity to which it was charged when devices 22
the control circuits 65 and 67 of the controlled diodes 24
and 26 were conducting as described above.
and 28. The control circuit 65 extends from the ter
The resistors 90 and 96 are large relative to the load
minal 68 of the winding 64 through a current limiting
impedance so that the current ?owing therethrough, with
resistor 69, the base b. of diode 24, emitter e thereof,
controlled diodes 24 and 28 conducting, is a small portion
conductor70 and recti?er 71 to the other?terminal 72V 75 of the load current. Likewise, resistors 91 and 100 will. '
5
3,674,630
be'large in comparison to the load impedance for similar
reasons. During therperiods when diodes 22 and 26 are
conducting, there will be substantially no voltage drop
across these diodes and the capacitors 88 and 94 will com
mence to discharge ‘through the resistors 90 and 96, re
spectively. The value of these resistors should be high
enough to prevent any substantial discharging during this
period. The resistors 91 and 100 are necessary to remove
the voltage of the capacitors 88 and 94 from across the
6
network is provided for each four region triode. Each
network includes a current limiting resistor 106 and a
recti?er 108.
As the carriers in the triode 24 are dispersed due
to reverse current ?ow therethrough, the reverse voltage
across its power circuit increases.
As this reverse volt
age increases, current of increasing magnitude ?ows
through the resistor 106 and recti?er 108. The mag
nitude of the resistance of the resistors 106 is so chosen
power circuit of the controlled diodes 22 and 24 to permit 10 that within the reverse current magnitudes provided by
their turning off during'normal oscillation of the network
the commutating capacitor 194, the voltage between the
1. Without the resistor 91 and with no current ?owing
through the device 22, the capacitor 88 could maintain a
substantial voltage across the power circuit of device 22
because of ‘the reverse direction conduction of the recti?er
92. The resistance value of the resistor 90 is much less
than the value of the reverse resistance of the recti?er 22
collector c and emitter e of any four region triode will
not exceed the maximum permissible reverse voltage.
The reverse voltage needs to be supplied across the triode
24 for only the duration of its “turn-off time” as illus
trated in FIG. 4. Thereafter in the absence of the appli
cation of a control current to the base circuit 65, diode
(approximately 1/10) so that the drop thereacross, which
24 will continue to remain noncouductive since the volt
is the potential across the power circuit of the device 22,
age of the source 10 is less than 90 percent of the
is a small portion of the potential to which the capacitor 20 value A or value of the forward breakover voltage of the
88is charged irrespective of the other circuit impedances
controlled diode.
through which the capacitor 8-8 might otherwise discharge.
During or after the rendering of the diode 24 non
‘When the ‘capacitor 52 reaches its critical charge,
conducting, the diode 26 will commence to conduct.
the four region diode 54 will break down and the capac
This establishes a discharge circuit for the commutating
itor '52 will discharge through the winding 34. When N Dr capacitor 104 through the diodes 26 and 28. The polar
this occurs, the windings 36 and 38 energize the control
ity of the potential of, and the current ?ow established
circuits of the devices 22 and 26 whereby they rapidly
by, the commutating capacitor 104 is in the forward
become conductive to connect the terminal 12 to ter~
direction with respect to diode 26 but in the reverse direc
minal 2, and the terminal 14 to terminal '4. It will
tion with respect to diode 28, and the diode 28 is rendered
be noted that upon initial closure of the disconnect 30 nonconductive as described in connection with diode 24.
switches 82 and 82a, the starting networks 84 and 86
When commutation is complete, the diodes 22 and 26
conducted current to charge the timing capacitor 52 for
turn-on of the devices 24 and 28. The devices 22 and
26, however, did not conduct, and, therefore, it was
will be the only two conducting controlled diodes, and
the terminal 12 will be maintained positive with respect
to the terminal 14 supplying potential to the load 20.
unnecessary to render these devices 22 and 26 noncon 35 Capac'tor 52 begins to charge, and when it again reaches
ductive upon conduction of the devices 24 annd 28 as
its critical voltage, the four region diode 80 will con
above described. However, when the devices 22 and 26
duct causing the capacitor 52 to discharge through the
are rendered conducting, the devices 24 and 23 must be
winding 73 whereby the windings 64 and 66 thereof
rendered nonconducting. If this did not occur, the ter
render the controlled diodes 24 and '28 conducting. Con
minals 2 and 4 would be shorted through a pair of cir 40 duction of these two diodes will cause the previously
cuits, comprising the devices 22 and 2S and the devices
conducting diodes 22 and 26 to be rendered noncon
24 ‘and 26.
Due to inherent differences in four region triodes or
ducting substantially as described above.
controlled diodes and in the various circuit elements
terminals 12 and 14 in alternating polarity at a fre—v
which are utilized in the network 1, one of the diodes
22 or 26 will commence to conduct prior to the other
thereof. For purposes of discussion let us assume that
quency determined by the magnitude of the capacitor 52
and of the resistor 58. If the magn'tude of the resistance
of resistor 58 is increased, it will slow down the charg~
it is the diode 22 which conducts prior to the diode 26.
ing rate of the capacitor 52 thereby reducing to output
When this occurs, a momentary short circuit appears
frequency of the inverter 1. If the value of the resistance
between the terminals 2 and 4 through the diodes 22 50 is decreased, the output frequency is increased.
.
andZS. Current from the source 10, however, is pre
The resistors 57 and 61 compensate for any differences
vented from markedly increasing due to the presence of
in the breakover voltage of the four region diodes 54
the current controlling reactor 192 which is of suf
and 80 and are normally so arranged that the time in
?cient magnitude to prevent a substantial current increase
terval required for the capacitor 52 to charge up and dis
for the time period required to render diode 26 con 55 charge through the diode 54 is the same time interval
ductive and diode 28 nonconductive.
as required for it to charge up and discharge through the
During the interval of conduction of the diodes >24
diode 39 whereby the lengths of the two half cycles
and 28, capacitor 1%, connected between terminals 12
of output voltage at the terminal 12 and 14 will be equal.
and 14 by the conductors 43 and 70, was charged with
At times it may be desirable to have the load 20 ener
its terminal which is connected to conductor 70 positive 60 gized ‘with polarity of one potential for a longer time
with respect to its terminal which is connected to the
period than it is with the polarity of the opposite poten
conductor .43. Conduction of diode 22 completed a dis
tial. This result may be accomplished by changing the
charge circuit for the capacitor 164 reversedly through
relative values of the resistances 57 and 61.
the diode 24 and forwardly through the diode 22. This
In FIG. 2, there is shown a modi?ed form of start
caused a reverse voltage and current to be applied to 65 ing circuit for use with the inverter network of FIG. 1..
the previously conducting diode 24 which quickly renders
the diode '24 nonconducting.
The current which re
versedly ?ows through the diode 24 acts to disperse
rapidly the carriers within the four region triode at the
7
The network 1 will continue to vsupply a power to the
In this instance, the networks 34 and 86 would be omitted
and networks 184 and 186 would be used in their place.
As indicated by the reference characters, the networks
184 and 186 would be connected into the network 1 at
The reverse current flow may be of 70 the points indicated by the reference characters A, B, C
substantial magnitude and may under certain instances
and D. The networks 184 and 136 each comprise two
be greater than the load current. It is, however, of
p'arallelly connected legs connected in series with a re
very short duration. Since a four region triode may be
sistor (189 and 197). One of the legs of each of the
junctions thereof.
damaged by the application of an excessive reverse volt
networks includes a capacitor (188 and 194) series con
age across its emitter and collector, a voltage limiting 75 nected with a recti?er (192 and 198). The other leg
3,074,030v
7
of each of the networks comprises a resistor (190 and
response to the rendering of the triodes 24 and 28
196).
conductive.
'
In FIG. 3 there is shown an inverter network 201 which
The network 1 is energized by closure of the disconnect
switches 82 and 82a and oscillation of the network is
initiated by means of the networks 184 and 186. Upon
closure of the disconnect switches 82 and 82a, current
will ?ow from the terminal 2 through the network 184,
the control circuit of the triode 22, terminal 12, capacitor
52, diode 60, resistor 61, resistor 58, terminal 14, point
as far as the power conducting elements are concerned
is very much like that of FIG. 1. The control circuit of
the network 201 is, however, somewhat different and
operates in accordance with the saturating time of a
saturating core inductor. With this arrangement, only a
single control transformer 230 is provided, and the pri
C, network 186, the control circuit of the triode 26 to 10 mary Winding 234 thereof is connected in series with a
saturating core-type inductor 252. The material of the
the negative terminal 4 which is connected to the DC.
core of the inductor 252 is preferably of the square type
source 10. The major portion of this current is the
hysteresis loop so that the inductor 252 will saturate
charging current of the capacitors 188 and 194. These
abruptly and a steep wave front of control current will
capacitors are of relatively small capacity and their mag
nitude so chosen that the time required to raise the po 15 ?ow to the winding 234. This will provide a steep wave
front of control current in the control circuits of the
tential of each thereof to slightly less than one-half of
triodes 222-226 or 224—-228 as the case may be. ‘
the potential of the direct voltage source 19 is substan
The windings 236, 238, 264 and 266 which energize
tially the “turn-on time” of the triodes 22 and 26. Once
the control circuits 237, 239, 265 and 267, respectively
the triodes 22 and 26 turn on, the starting networks 184
and 186 are no longer used, and the network 1 oscillates 20 are all inductively coupled with the core of the trans~
former 230, instead of being divided between two diff
substantially as described above.
ferent transformers as is the case in FIG. 1. In order
Care should be exercised in the selection of the capaci
that the control circuits will be energized in pairs 237
tors 188 and 194 and the resistors 189 and 197 to in
239 or 265~267, the windings are polarized with re
sure that the timing relationship set out above is sub
spect to the primary winding 234 such that when current
stantially attained. If not, false ?ring of the triodes 22
flows through the Winding 234 as a consequence of the
and 26 may result. In this regard, it will be appreciated
conduction of the triodes 222 and 226, the control cir
that when the triode 22 turns on, the potential difference
cuits 265 and 267 are energized to render the triodes
between the points A and B is substantially reduced to
2.24 and 228 conducting. When the winding 234 is
zero as is the potential between the points C and D upon
conduction of the triode 26. When this occurs, no fur 30 energized as a consequence of the conduction of the
triodes 224 and 228, the control circuits 237 and 239 are
ther charging of the capacitors 188 and 194 occurs and
energized to render the triodes 222 and 224 conductive.
the potential across the capacitors 184 and 194 remains
Current in the reverse direction through the control cir
substantially at slightly less than one-half that of the
source 10.
When the timing capacitor 52 subsequently receives
its critical charge and discharges through the primary
winding 78 of the transformer, the triodes 24 and 28 be
35
cuits 237, 239, 265 and 267 is prevented by the recti
?ers 244, 250, 271 and 276, respectively.
The power portion of the network 201 is provided with
unilateral conducting devices which may be recti?ers 223,
225, 227 and 229 which tend to isolate the commutating
come conductive and the triodes 22 and 26 are rendered
capacitors 304 and 305 from the load 220. The recti
nonconducting. Rendering of the triodes 22 and 26
nonconducting with triodes 24 and 28 conducting places 40 ?er 223 is connected between the emitter e of the triode
222 and the terminal 212, the recti?er 225 is connected
substantially full line voltage between the points A and
B as well as between the points C and D. During this in
terval, the recti?ers 192 and 198 have prevented the
capacitors 188 and 194 from discharging substantially,
and the potential across the capacitors 188 and 194 re
mains at about half that of the source 10. The capacitors
188 and 194 will now draw charging current and charge
up to substantially a full line potential.
If the magnitude of this charging current is not main
tained substantially less than the magnitude of the con
trol current required to turn on the triodes 22 and 26,
they would become conductive and result in short-circuit
ing of the network 1. However, by permitting the capaci
between the emitter e of the triode 24 and the output
terminal 214, and the recti?ers 227 and 229 are con—
nected respectively between the terminal 214 and the
triode 226 and between the output terminal 212 and the
triode 228. Because of the presence of the recti?ers
223 and 225, current from the commutating capacitor
304 acts to commutate only the triodes 222 and 224.
The commutating capacitor 305 is connected between
the collectors c and because of the recti?ers 227 and 229
commutates only the triodes 226 and 228.
The starting circuit of FIG. 3 comprises two manu
ally controlled switches SW1 and SW2. The switch
SW1 is connected in shunt across the series circuit com
tors 188 and 194 to obtain substantially half of their
charge during the initial turn-on of the triodes 22 and 55 prising the saturable reactor 252 and transformer wind
ing 234. ‘One set of contacts SW2a of the switch
26, this subsequent flow of charging current is small
SW2 acts upon closure to connect the base circuit of
enough so that it will not cause these four region triodes
the triode 222 to the positive terminal 202. A current
to become conductive.
.
limiting resistor 221 is provided to limit the current flow
The recti?ers 192 and 198 are preferably silicon diodes
through the base circuit. Likewise, the switch SW2
60
and inherently have a low amount of back current ?ow.
has a second set of contacts SW2b which, upon closure,‘
The magnitude of resistance of the resistors 190 and 196
connect the base of the triode 226 through the diode
is low With respect to the reverse resistance of the diodes
227 to the load terminal 214. Current flow through
192 and 198. A satisfactory ratio would be 1 to 10.
this circuit is limited by a resistor 231.
'
With this construction the reverse current ?ow through
After potential is applied to the power terminals 202
65
the diodes 192 and 198 is ineffective to establish a sul?
and 204 as a consequence of closure of the switches 282
cient potential difference between the points A and B
and 280, oscillation of the inverter 201 is initiated by
to cause a destructive breakdown of the four region
?rst closing the starting switch SW1 and thereafter clos
triode, less than that which may exist across the doides
ing the starting switch SW2. It is necessary that the
192 and 198 when the capacitors are charged to line po 70 starting switch SW1 be closed before the starting switch
tential. The magnitude of the resistors 190 and 196 is
SW2 is closed because the timing inductor 252 and
so proportioned to the reverse resistance of the recti?ers
that the major portion which is the terminal voltage of
the transformer 230 must not operate to control the
triodes until the switch SW2 is opened. As long as
switch SW1 is held closed, the transformer 230 cannot
prevent triodes 22 and 26 from being turned off in 75 become energized and a delay in opening of the switch
the networks 184 and 186 respectively were insuf?cient to
3,674,0éo
9
SW2 is not deleterious. If desired, of course, the switches
SW1 and SW2 could be combined into a single switch in
which the contacts of the switch SW1 would close before
the contacts SW2a and SWZb and would not open until
after opening of the contacts SWZa and SWZb.
Assuming that the switch SW1 has closed, closure of
the switch SW2 closes its contacts SW2a and SW2b, and
current then flows from the terminal 202 through the
resistor 221, contacts SWZa, base-to-emitter in the triode
222, diode 223, terminal 212, switch SW1, resistor 258,
terminal 14, recti?er 227, resistor 231, contacts SWZb,
base-to-emitter in the triode 226 to the negative power
terminal 204. Current flow through the control cir
cuits 237 and 239 of the triodes 222 and 226 cause
these triodes to conduct and connect the terminal 212
to the terminal 202, and the terminal 214 to the ter
minal 204. Thereafter, the switch SW2 is permitted to
open its contacts SWZa and SW2b, and subsequently the
switch SW1 is also opened whereby potential which ap
10'
said storage device being characterized by the fact that
it prevents substantial current flow therethrough during
‘an initial time interval until it reaches a predetermined
charge after which it permits substantial current flow
'therethrough, means individually connecting an individual
one of said output circuits to each of said control circuits,
said output circuits being so polarized that upon charging
of said storage device to said predetermined charge due
to conduction of said ?rst path said semiconductor de
ll) vices associated with said second path are rendered con
ductive and so polarized that upon charging of said
storage device to said predetermined charge due to con
duction of said second path said semiconductor devices
associated with said ?rst path are rendered conductive,
said energy storage device being chargeable as a conse
quence of energy ?ow through said ?rst path, said timing
network being e?ective as a consequence of the charging
of said storage device to a predetermined magnitude to
energize said output circuits associated with said semi
pears between terminals 212 and 214 is applied across 20 conductor devices of one of said paths.
the inductive reactor 252.
2. A control circuit for an inverter network in which
During the time interval required to saturate the re
power from a source of unidirectional potential is sup
actor 252, the current flow through the control circuit is
plied to a pair of output terminals through a pair of cur~
small with substantially all of the voltage appearing across
rent ?ow paths under control of solid~state thyratrons
the reactor 2512. At the end of a predetermined time 25 comprising, an iron core saturable reactor having a re
time interval, the reactor 252 will saturate. This sub~
actor windin'g, a transformer having a primary winding
stantially decreases the impedance of the control cir
and a plurality of secondary windings, an impedance de
cuit causing an increased current to ?ow through the
vice, means connecting said reactor winding and said pri
winding 234 and energize the transformer 23nd. As stated
mary winding and said impedance device for energization
above, the polarity of the windings is such that current
by said inverter network with a potential which is a func
?ows in the control circuit of the nonconducting pair of
four region triodes when the reactor saturates and is pre
vented frorn ?owing in the control circuit of the conduct
ing pair of four region triodes. The initiation of conduc
- tion of that between ‘said output terminals, means in
dividually connecting individual ones of said secondary
windings to individual ones of said thyratrons, an energy
storage device, means connecting said storage device to
tion of a pair of triodes results in the rendering of the pre
viously conducting pair nonconduc-tive in a manner sub
stantially the same as described in connection with FIG.
1. The main point of diiierence is that the capacitor 304
said paths, and means connecting said storage device for
discharging through ‘one of said thyratrons of said one
commutates the triode 222 or 224 as the case may be,
said paths.
be charged as a consequence of conduction of one of
path as a consequence of the conduction of the other of
and the capacitor 305 commutates the triode 226 or 228. 40
3. A control circuit for an inverter network in which
This system requires two capacitors but each may be of
power ?ow from a source of unidirectional potential is
lesser capacity than that of the capacitor 104 of FIG. 1.
supplied to a pair of output terminals through a pair of
The term four element triode or controlled diode has
current flow paths under control of solid-state thyratrons
been used. Those terms are intended to embody all
comprising, an iron core saturable reactor having a re
discontinuous control type solid-state thy'ratrons. Ex
actor winding, a transformer having a primary winding
amples of such devices are disclosed in an article en
and a'plurality of secondary windings, an impedance de
titled “Solid-State Thyratrons” which appeared in Elec—
vice, means connecting said reactor winding and said pri
tronics for March 6, 1959. The term recti?er is intended
mary winding and said impedance device for energization
to include unidirectional current flow devices of all types
by said inverter network with a potential which is a
whether of the solid-state type or of the tube type unless 50 function of that betweensaid output terminals, means in
indicated to the contrary.
'
dividually connecting individual ones of said secondary
There has been described and illustrated only a limited
windings to individual ones of said thyratrons, an energy
number of embodiments of the invention, ‘and these are
storage device, means connecting said storage device to
in-tendednto be illustrativelof the invention rather than
limitative. Since other modi?cations may be made which
come within the generic invention, thev limits 'of the
invention are to be determined by the‘scope of hereinafter
appended claims.
_
What is claimed and is desired to be secured by United
States Letter Patent is as follows:
’
1. In an inverter network, a pair of input terininais
adapted to be ‘energized from a source of unidirectional
potential, a pair of output terminals, a plurality of dis
continuous control type semiconductor devices, each said
device having a power circuit and a control circuit and
be charged as a consequence of conduction of one of said
paths, means connecting said storage device for discharg
ing through one of said thyratrons of said one path as a
consequence of the conduction of the other of said paths,
and a shunt circuit connected in shunt with said one thy
ratron, said shunt circuit comprising a current limiting
element and an asymmetric current conducting device.
4. A bridge-type inverter network comprising a pair of
input terminals adapted to be energized from a source
of unidirectional potential, a pair of output terminals
adapted to be connected to supply energy to an alternating
65 current load, a plurality of solid~state thyratron devices
being of the type in which said control circuit is normally
each having a power circuit, a ?rst circuit means con—
ineffective to interrupt current ?ow through said power
necting a ?rst of said input terminals to a ?rst of said
circuit, a ?rst and second electrical path interconnecting
output terminals and including said power circuit of a
said terminals for flow of energy from said input to said
?rst of said solid-state devices, a second circuit means
output terminals, said ?rst path‘including at least a ?rst 70 connecting a second of said output terminals to a second
of said devices, a second of said paths including at least
of said input terminals and including said power circuit of
a second of said devices, a timing network connected to '
a second of said solid-state devices, a third circuit means
be energized ‘by a potential which is a function of the
potential between said output terminals ‘and including an
connecting said ?rst input terminal to said second out
put terminal and including said power circuit of a third
energy storage'd'evice and a plurality of output circuits,
of said solid-state devices, a fourth circuit-means con
3,074,030
11 ‘
12
necting said ?rst output terminal to said second input
vice, means connecting said last-named storage device
terminal and including said power circuit of a fourth of
said solid-state devices, chargeable energy storage means
connected between at least two of said power circuits of
and said primary winding for energization as a conse
quence of conduction of said solid-state devices, said last
named storage device acting to control the time at which
said transformer is operable to energize said control cir
said solid-state devices at portions thereof adjacent said
output terminals, a plurality of asymmetric current flow
devices, means individually connecting individual ones of
said asymmetric devices in shunt with said power circuits
cuits of said solid-state devices, said asymmetric devices
in said control circuits being polarized such that said
of said solid-state devices, and means for alternately ren
conductive as a consequence of the conduction of said
third and said fourth solid-state devices are rendered.
dering conductive said ?rst and second solid-state devices 10 power circuits of said ?rst and said second solid-state
devices and vice versa.
and said third and fourth devices.
7. A bridge-type inverter network comprising a pair of
5. A bridge-type inverter network comprising a pair of
input terminals adapted to be energized from a source
input terminals adapted to be energized from a source of
unidirectional potential, a pair of output terminals adapted
of unidirectional potential, a pair of output terminals
adapted to be connected to supply energy toan alternat 15 to be connected to supply energy to an alternating current
ing current load, a plurality of solid-state thyratron de
load, a plurality of solid-state thyratronic devices each
vices each having a power circuit, a ?rst circuit means
having a pow-er circuit and a control circuit, a ?rst cir
connecting a ?rst of said input terminals to a ?rst of said
cuit means connecting a ?rst of said input terminals to
output terminals and including said power circuit of a
a ?rst of said output terminals and including said power
?rst of said solid-state devices, a second circuit means 20 circuit of a ?rst of said solid-state devices, a second cir
connecting a second of said output terminals to a second
cuit means connecting a second of said output terminals
of said input terminals and including said power circuit
to a second of said input terminals and including said
of a second of said solid-state devices, a third circuit
means connecting said ?rst input terminal to said second
output terminal and including said power circuit of a
third of said solid-state devices, a fourth circuit means
power circuit of a second of said solid-state devices, a
third circuit means connecting said ?rst input terminal to
said second output terminal and including said power cir
cuit of a third of said solid-state devices, a fourth circuit
connecting said ?rst output terminal to said second in
means connecting said ?rst output terminal to said sec
put terminal and including said power circuit of a fourth
ond input terminal and including said power circuit of a
of said solid-state devices, a ?rst capacitor connected be
fourth of said solid-state devices, chargeable storage means
tween said power circuits of said ?rst and said third solid 30 connected between said power circuits of at least two of 1
state devices, a second capacitor connected between said
said solid-state devices at portions thereof adjacent said
power circuits of said second and said fourth solid-state
output terminals, a plurality of asymmetric current ?ow
devices, said capacitors being connected to said power
devices, means individually connecting individual ones
circuits at portions thereof adjacent said output terminals,
of said asymmetric devices in shunt with said power
a plurality of asymmetric current ?ow devices, said asym 35 circuits of said solid-state devices, a ?ring transformer
metric devices being individually connected in series with
having a primary winding and a plurality of second
said power circuits intermediate the point of connection
ary windings, individual circuits individually connect
of the respective said capacitor to said power circuit and
ing individual ones of said secondary windings to in
said output terminal, a second plurality of asymmetric
dividual ones of said control circuits of said solid-state
current fiow devices, means individually connecting in 40 devices, each said just-named circuit including an asym
dividual ones of said second asymmetric devices in
metric current device, the asymmetric devices of said cir
shunt with said power circuits of said solid-state devices,
cuits associated with said ?rst and second solid-state de
and means for alternately rendering conductive said ?rst
vices
being polarized opposite to those associated with
and second solid state devices and said third and fourth
said third and fourth solid-state devices, a saturable re
devices.
45 actor device, and means connecting said saturable reactor
6. A bridge-type inverter network comprising a pair
device and said primary winding in series circuit between
of input terminals adapted to be energized from a source
said output terminals.
of unidirectional potential, a pair of output terminals
8. A bridge-type inverter network comprising a pair of
adapted to be connected to said energy to an alternating
input
terminals adapted to be energized from a source of
current load, a plurality of solid-state thyratronic devices 50
unidirectional potentials, a pair of output terminals adapt
each having a power circuit and a control circuit, a ?rst
ed to be connected to supply energy to an alternating
circuit means connecting a ?rst of said input terminals
current load, a plurality of solid-state thyratronic devices
to a ?rst of said output terminals and including said
each having a power circuit and a control circuit, a ?rst
power circuit of a ?rst of said solid-state devices, a sec
ond circuit means connecting a second of said output 55 circuit means connecting a ?rst of said input terminals to
a ?rst of said output terminals and including said power
terminals to a second of said input terminals and includ
circuit of a ?rst of said solid-state devices, a second cir
ing said power circuit of a second of said solid-state de
cuit means connecting a second of said output terminals
vices, a third circuit means connecting said ?rst input
to a second of said input terminals and including said
terminal to said second output terminal and including
power circuit of a second of said solid-state devices, a
said power circuit of a third of said solid-state devices,
third circuit means connecting said ?rst input terminal to
a fourth circuit means connecting said ?rst output termi
nal to said second input terminal and including said
said second output terminal and including said power cir
cuit of a third of said solid-state devices, a fourth circuit
power circuit of a fourth of said solid-state devices,
means connecting said ?rst output terminal to said second
chargeable storage means connected between said power
circuits of at least two of said solid-state devices at por 65 input terminal and including said power circuit of a
tions thereof adjacent said output terminals, a plurality
of asymmetric current flow devices, means individually
connecting individual ones of said asymmetric devices in
fourth of said solid-state devices, chargeable storage means
connected between said power circuits of at least two of
said solid-state devices at portions thereof adjacent said
output terminals, a plurality of asymmetric current flow
?ring transformer having a primary winding and a plu 70 devices, means individually connecting individual ones of
rality of secondary windings, individual circuits individu
said asymmetric devices in shunt with said power circuits
of said solid-state devices, a ?ring transformer having a
ally connecting individual ones of said secondary wind
shunt with said power circuits of said solid-state devices, a
ings to invidividual ones of said control circuits of said
solid-state devices, each said just-named circuit including
primary winding and a plurality of secondary windings,
individual circuits individually connecting individual ones
an asymmetric current ?ow device, an energy storage de~ 75 of said secondary windings to individual ones of said con
3,074,630
13
14
trol circuits of said solid-state devices, each said just
to said second output terminal and including said power
named circuit including an asymmetric current device, the
asymmetric devices of said circuits associated with said
?rst and second solid-state devices being polarized op
posite to those associated with said third and fourth solid
'circuit of a third of said solid-state devices, a fourth
circuit means connecting said ?rst output terminal to said
state devices, a saturable reactor device, means connect
means connected between said power circuits of at least
ing said saturable reactor device and said primary wind
ing in series circuit between said output terminals, and
means for controlling the time required to saturate said
two of said solid-state devices at portions thereof adjacent
said output terminals, a plurality of asymmetric current
?ow devices, means individually connecting individual
saturable reactor.
7
9. A bridge-type inverter network comprising a pair
second input terminal and including said power circuit
of a fourth of said solid-state devices, chargeable storage
10 ones of said asymmetric devices in shunt with said power
circuits of said solid-state devices, a ?rst and a second
of input terminals adapted to be energized from a source
of unidirectional potential, 21 pair of output terminals
adapted to be connected to supply energy to an alter
?ring transformer, each said transformer having a pri
mary winding and a pair of secondary windings, a timing
nating current load, a plurality of solid-state thyratronic
ing said regulating element and said timing capacitor in
series circuit between said output terminals, individual cir~
devices each having a power circuit and a control circuit,
a ?rst circuit means connecting a ?rst of said input termi
nals to a ?rst of said output terminals and including said
power circuit of a ?rst of said solid-state devices, a sec
ond circuit means connecting a second of said output
terminals to a second of said input terminals and includ
ing, said power circuit of a second of said solid-state de
capacitor, a current regulating element, means connect
cuits individually connecting said secondary windings of
said ?rst transformer to said control circuits of said ?rst
and said second solid-state devices and said secondary
windings of said second transformer to said control cir
cuits of said third and said fourth solid-state devices, a
?rst and a second diode, a ?rst and a second asymmetric
vices, a third circuit means connecting said ?rst input
current device, means connecting said primary winding of
said ?rst transformer across said timing capacitor and in
power circuit of a third of said solid-state devices, a 25 cluding said ?rst diode and said ?rst asymmetric device,
fourth circuit means connecting said ?rst output terminal
said first diode and said ?rst asymmetric device being
to said second input terminal and including said power
polarized to permit discharging of said timing capacitor
circuit of a fourth of said solid-state devices, chargeable
through said primary winding of said ?rst transformer as
terminal to said second output terminal and including said
storage means connected between said power circuits of
at least two of said solid-state devices at portions thereof
a consequence of a predetermined charge on said timing
adjacent‘ said output terminals, a plurality of asymmetric
current ?ow devices, means individually connecting in
mary winding of said second transformer across said tim
capacitor of a ?rst polarity, means connecting said pri
ing capacitor and including said second diode and said
dividual ones of ‘said asymmetric devices in shunt with
second asymmetric device, said second diode and said
said power circuits of said solid-state devices, a ?rst and
second asymmetric device being polarized to permit dis
a second ?ring transformer, each said transformer hav 35 charging of said timing capacitor through said primary
ing a primary winding and a pair of secondary windings,
a timing capacitor, a current regulating element, means
connecting said regulating element and said timing ca
pacitor in series circuit between said output terminals,
individual circuits individually connecting said secondary
windings of said ?rst transformer to said control circuits
of said ?rst and said second solid-state devices and said
secondary windings of said second transformer to said
control circuits of said third and said fourth solid-state
winding of said second transformer as a consequence of
a predetermined charge on said timing capacitor of a
polarity opposite to said ?rst polarity, and a starting cir
cuit, comprising ?rst and second circuit portions, each
said circuit portion comprising in series a capacitor and
an asymmetric current conducting device, said ?rst and
second circuit portions being individually connected in
shunt with said ?rst and second solid-state device.
11. A bridge-type inverter network comprising a pair
devices, a ?rst and a second diode, a ?rst and a second 45 of input terminals adapted to be energized from a source
asymmetric current device, means connecting said pri
mary winding of said ?rst transformer across said timing
capacitor and including said ?rst diode and said ?rst asym
metric device, said ?rst diode and said ?rst asymmetric
of unidirectional potential, a pair of output terminals
adapted to be connected to supply energy to an alternat
ing current load, a plurality of solid-state thyratronic de
vices each having a power circuit and a control circuit, a
device being polarized to permit discharging of said tim 50 ?rst circuit means connecting a ?rst of said input terminals
ing capacitor through said primary winding of said ?rst
to a ?rst of said output terminals and including said power
transformer as a consequence of a predetermined charge
circuit of a ?rst of said solid-state devices, a second cir
cuit means connecting a second of said output terminals
to a second of said input terminals and including said
connecting said primary winding of said second trans
former across said timing capacitor and including said 55 power circuit of a second of said solid-state devices, a
on said timing capacitor of a ?rst polarity, and means
second diode and said second asymmetric device, said
second diode and said second asymmetric device being
polarized to permit discharging of said timing capacitor
through said primary winding of said second transformer
third circuit means connecting said ?rst input terminal to
said second output terminal and including said power cir
cuit of a third of said solid-state devices, a fourth cir
cuit means connecting said ?rst output terminal to said
as a consequence of a predetermined charge on said tim 60 second input terminal and including said power circuit of
ing capacitor of a polarity opposite to said ?rst polarity.
10. A bridge-type inverter network comprising a pair
a fourth of said solid-state devices, chargeable storage
means connected between said power circuits of at least
two of said solid-state devices at portions thereof adjacent
said output terminals, a plurality of asymmetric current
of unidirectional potential, a pair of output terminals
adapted to be connected to supply energy to an alternating 65 flow devices, means individually connecting individual
ones of said asymmetric devices in shunt with said power
currentload, a plurality of solid-state thyratronic devices
circuits of said solid-state devices, a ?rst and a second
each having a power circuit and a control circuit, a ?rst
?ring
transformer, each said transformer having a primary
circuit means connecting a ?rst of said input terminals to
winding and a pair of secondary windings, a timing capaci
a ?rst of saidoutput terminals and including said power
70 tor, a current regulating element, means connecting said
circuit of a ?rst of said solid-state devices, a second
regulating element and said timing capacitor in series cir
circuit means connecting a second of said output termi
cuit between said output terminals, individual circuits in
-nals to a second of said input terminals and including
dividually connecting said secondary windings of said
said power circuit of a second of said solid-state devices,
?rst transformer to said control circuits of said ?rst and
a third circuit means connecting said ?rst input terminal 76 said second solid-state devices and said secondary wind
of input terminals adapted to be energized from a source
3,074,030:
ings of said second transformer to said control circuits
of said third and said fourth solid-state devices, a ?rst
ing capacitor through said primary windingof said second.
transformer as a consequence of a predetermined charge
and a second diode, a ?rst and a second asymmetric cur
on said timing capacitor of a polarity opposite to said ?rst
rent device, means connecting said primary winding of
said ?rst transformer across said timing capacitor and in
cluding said ?rst diode and said ?rst asymmetric device,
said ?rst diode and said ?rst asymmetric device being
polarity, and a starting circuit, comprising ?rst and second
circuit portions, each said circuit portion comprising in
series a capacitor and an asymmetric current conductingv
device, each said circuit portion further comprising a ?rst
impedance element connected in shunt with its said series
polarized to permit discharging of said timing capacitor
connected capacitor and asymmetric device and a second
through said primary winding of said ?rst transformer
as a consequence of a predetermined charge on said timing 10 impedance element connected in series with its said asym
metric device, said ?rst circuit portion being connected
capacitor of a ?rst polarity, means connecting said primary
between said control circuit of said ?rst solid-state device
Winding of said second transformer across said timing
and said ?rst input terminal, said second circuit portion
capacitor and including said second diode and said second
being connected between said control circuit of said sec~
asymmetric device, said second diode and said second
asymmetric device being polarized to permit discharging 15 ond solid-state device and said second output terminal.
13. A bridge-type inverter network comprising a pair
of said timing capacitor through said primary winding of
of input terminals adapted to be energized from a source
said second transformer as a consequence of a predeter
of unidirectional potential, a pair of output terminals
mined charge of said timing capacitor of a polarity op
adapted to be connected to supply energy to an alternat
posite to said ?rst polarity, and a starting circuit, com
prising ?rst and second circuit portions, each said circuit 20 ing current load, a plurality of solid-state thyratronic de
vices each having a power circuit and a control circuit,
portion comprising in series a capacitor and an asym
a ?rst circuit means connecting a ?rst of said input ter
metric current conducting device, each said circuit portion
minals to a ?rst of said output terminals and including
further comprising a ?rst impedance element connected
said power circuit of a ?rst of said solid-state devices, a
in shunt with its said series connected capacitor and asym
metric device and a second impedance element connected 25 second circuit means connecting a second of said output
terminals to a second of said input terminals and includ
in shunt with its said capacitor, said ?rst and second cir
ing said power circuit of a second of said solid-state de
cuit portions being individually connected in shunt with
vices, a third circuit means connecting said ?rst input
said ?rst and second solid-state device.
terminal to said second output terminal and including said
12. A bridge-type inverter network comprising a pair
power circuit of a third of said solid-state devices, a fourth
of input terminals adapted to be energized from a source
circuit means connecting said ?rst output terminal to said
of unidirectional potential, a pair of output terminals
second input terminal and including said power circuit of
adapted to be connected to supply energy to an alternating
a fourth of said solid-state devices, chargeable storage
current load, a plurality of solid-state thyratronic devices
means connected between said power circuits of at least
each having a power circuit and a control circuit, a ?rst
circuit means connecting a ?rst of said input terminals to 35 two of said solid-state devices at portions thereof adjacent
said output terminals, a plurality of asymmetric current
a ?rst of said output terminals and including said power
flow devices, means individually connecting individual
circuit of a ?rst of said solid-state devices, a second cir
ones of said asymmetric devices in shunt with said power
cuit means connecting a second of said output terminals
circuits of said solid-state devices, a ?rst transformer hav
to a second of said input terminals and including said
power circuit of a second of said solid-state devices, a 40 ing a primary winding and a plurality of secondary wind
ings, individual circuits individually connecting individual
third circuit means connecting said ?rst input terminal
ones of said secondary windings to individual ones of said
to said second output terminal and including said power
control circuits of said solid-state devices, each said just
circuit of a third of said solid-state devices, a fourth cir
named circuit including an asymmetric current device, the
cuit means connecting said ?rst output terminal to said
second input terminal and including said power circuit 45 asymmetricydevices of said circuits associated with said
?rst and second solid-state devices being polarized op
of a fourth of said solid-state devices, chargeable storage
posite to those associated with said third and fourth solid
means connected between said power circuits of at least
state devices, a saturable reactor device, means connect
two of said solid-state devices at portions thereof adjacent
ing said saturable reactor device and said primary winding
said output terminals, a plurality of asymmetric current
in series circuit between said output terminals, a ?rst
?ow devices, means individually connecting individual
switch connected in shunt with said series connected re
ones of said asymmetric devices in shunt with said power
actor device and primary winding, and a switch means
circuits of said solid-state devices, a ?rst and a second
having ?rst and second portions, said-?rst switch means
?ring transformer, each said transformer having a primary
portion acting upon closure to connect said?rst input
winding and a pair of secondary windings, a timing capaci~
tor, a current regulating element, means connecting said 55 terminal to said control circuit of said ?rst solid-state
device, said second switch means portion acting upon
regulating element and said timing capacitor in series cir
closure to connect said second output terminal to said
cuit between said output terminals, individual circuits in
dividually connecting said secondary windings of said ?rst
control circuit of said second solid-state device.
14. A bridge-type inverter network comprising a pair
transformer to said control circuits of said ?rst and said
second solid-state devices and said secondary windings of 60 of input terminals adapted to be energized from a source
of unidirectional potential, a pair of output terminals
said second transformer to said control circuits of said
adapted to be connected to supply energy to an alternating
third and said fourth solid-state devices, a ?rst and a sec
current load, a plurality of solid-state thyratronic devices
ond diode, a ?rst and a second asymmetric current device,
means connecting said primary winding of said ?rst trans
each having a power circuit and a control circuit, a ?rst
former across said timing capacitor and including said 65 circuit means connecting a ?rst of said input terminals
to a ?rst of said output terminals and including said power
?rst diode and said ?rst asymmetric device, said ?rst
diode and said ?rst asymmetric device being polarized to
circuit of a ?rst of said solid-state devices, a second cir
permit discharging of said timing capacitor through said
cuit means connecting a second of said output terminals
primary winding of said ?rst transformer as a consequence
to a second of said input terminals and including said
of a predetermined charge on said timing capacitor of a 70 power circuit of a second of said solid-state devices, a
?rst polarity, means connecting said primary winding of
third circuit means connecting said ?rst input terminal to
said second transformer across said timing capacitor and
said second output terminal and including said power cir
including said second diode and said second asymmetric
cuit of a third of said solid-state devices, a fourth circuit
means connecting said ?rst output terminal to said second
device, said second diode and said second asymmetric
device being polarized to permit discharging of said tim 75 input terminal and including said power circuit of a fourth
17
3,074,030
of said solid-state devices, chargeable storage means con
nected between said power circuits of at least two of said
solid-state devices at portions thereof adjacent said output
terminals, a plurality of asymmetric current ?ow devices,
means individually connecting individual ones of said
asymmetric devices in shunt with said power circuits of
said solid-state devices, a ?rst and a second ?ring trans
former, each said transformer having a primary winding
18
second circuit means connecting a second of said output
terminals to a second of said input terminals and includ
ing said power circuit of a second of said solid-state de
vices, a third circuit means connecting said ?rst input
terminal to said second output terminal and including said
power circuit of a third of said solid-state devices, a
fourth circuit means connecting said ?rst output terminal
to said second input terminal and including said power
circuit of a fourth of said solid-state devices, chargeable
and a pair of secondary windings, a timing capacitor, a
current regulating element, means connecting said regulat 10 storage means connected between said power circuits of
ing element and said timing capacitor in series circuit be
at least two of said solid-state devices at portions thereof
tween said output terminals, individual circuits individual
adjacent said output terminals, a plurality of asymmetric
ly connecting said secondary windings of said ?rst trans
current flow devices, means individually connecting indi
former to said control circuits of said ?rst and said second
vidual ones of said asymmetric devices in shunt with said
solid-state devices and said secondary windings of said 15 power circuits of said solid-state devices, a ?ring trans
second transformer to said control circuits of said third
former having a primary winding and a plurality of sec
and said fourth solid-state devices, a ?rst and a second
ondary windings, individual circuits individually connect
diode, a ?rst and a second asymmetric current device,
ing individual ones of said secondary windings to indi
means connecting said primary winding of said ?rst trans—
vual ones of said control circuits of said third and said
‘former across said timing capacitor and including said 20 fourth solid-state devices, each said just-named circuit
?rst diode and said ?rst asymmetric device, said ?rst diode
including an asymmetric current ?ow device, an energy
and said ?rst asymmetric device being polarized to permit
storage device, means connecting said last-named storage
discharging of said timing capacitor through said primary
device and said primary winding for energization as a con
winding of said ?rst transformer as a consequence of a
sequence of conduction of said solid-state device's, said
predetermined charge on said timing capacitor of a ?rst 25 last-named storage device acting to control the time at
which said transformer is operable to energize said con
second transformer across said timing capacitor and in
trol circuits of said solid-state devices, said asymmetric
cluding said second diode and said second asymmetric
devices in said control circuits being polarized such that
device, said second diode and said second asymmetric
said third and said fourth solid-state devices are rendered
polarity, means connecting said primary winding of said
device being polarized to permit discharging of said tim 30 conductive as a consequence of the conduction of said
ing capacitor through said primary winding of said sec
power circuits of said ?rst and said second solid-state de
ond transformer as a consequence of a predetermined
charge on said timing capacitor of a polarity opposite to
said ?rst polarity, a diode recti?er connected in shunt with
said primary winding of said ?rst transformer, and a 35
diode recti?er connected in shunt with said primary wind
ing of said second transformer.
15. A bridge-type inverter network comprising a pair
of input terminals adapted to be energized from a source
of unidirectional potential, a pair of output terminals 40
adapted to be connected to supply energy to an alternat
ing current load, a plurality of solid-state thyratronic
devices each having a power circuit and a control circuit,
a ?rst circuit means connecting a ?rst of said input ter
minals to a ?rst of said output terminals and including
said power circuit of a ?rst of said solid-state devices, a
vices.
References Cited in the ?le of this patent
UNITED STATES PATENTS
1,947,093
2,179,366
2,523,094
2,872,582
2,925,546
Knowles ____________ __ Feb, 13,
Willis _______________ __ Nov. 7,
Carleton ____________ __ Sept. 19.
Norton ______________ __ Feb. 3,
Berman _____________ __ Feb. 16,
1934
1939
1950
1959
1960
OTHER REFERENCES
.“Solid-State Thyratron Switches Kilowatts,” by R. P.
Frenzel and Gutzwiller; published in Electronics (March
28, 1958); pages 52-55 relied on.
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