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Патент USA US3084873

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April 9, 1963
A. NATHAN
3,084,862
INPUT CONVERTER AND SIGN DISCRIMINATOR FOR MULTIPLIERS
Filed Dec. 23, 1958
2FIG.
2 Sheets-Sheet 1
April 9,‘ 1963
A. NATHAN
3,084,862
INPUT CONVERTER AND SIGN DISCRIMINATOR FOR MULTIPLIERS
Filed, Dec. 25, 1958
2 Sheets-Sheet 2
FIG.3
United States Patent 0
1
3,084,862
we
3,084,862
Patented Apr. 9, 1963
2
of a one to four quadrant converter vusing
criminator of this invention; and
-
’
INPUT CQNVERTER AND SIGN DISCRRMINATGR
FOR MULTIPLIERS
Amos Nathan, 17 Lamed Heir Ave, Ramoth
the sign dis
FIGURES 4A, 4B, 4C, and 41) are scrap circuit dia
grams to show how the circuits may be transistorized.
FIGURES 1A and 1B illustrate functions, which if gen
erated by the [converter give the desired result. More
Rernez, Haifa, Israel
Filed Dec. 23, 1958, Ser. No. 782,497
12 Claims. (Cl. 235—194)
particularly, in FIGURE 1A the equation representing
plane OAB is 11:)’; the equation representing plane OBC
This invention relates to an input converter and sign
is 17:27; the equation representing plane 0CD is 17=-y;
discriminator for electronic multipliers. More speci? 10 and the equation representing plane ODA is 17=—x.
cally, this invention relates to a device which, when con
Surface ABCDO can thus be represented as ' ,
nected to the input of any two-quadrant electronic multi
plier, or to the input of some one-quadrant multipliers,
11=m'aX-{lxl, IYI}
permits four-quadrant operation. This invention also
or, equivalently, as
provides a unit which, when fed 'by two voltages, generates 15
' an output voltage whose sign is equal to the sign of the
product of the two input voltages.
In FIGUR-E 1B the equation representing plane EOF
lIn general, an electronic multiplier is a device, which
is £=x; the equation representing plane IFOG is 5:)’; the
equation representing plane GOH is £=x; and the equa
tion representing plane HOE is .5: —y. Surface EFGHO
when fed with input voltages x and y, generates an output
voltage which is proportional to xy. The ‘following termi
nology is used to describe some aspects of the input ranges
of multipliers: A multiplier is said to operate in the ?rst
quadrant, if x20, ygtl; in the second quadrant, if xéO,
3'50; in the third quadrant, if x50, yétl; and in the fourth
quadrant if x20, ygO.
‘ -A multiplier is said to have one quadrant or two quad
can therefore be represented as
25
The terms maximum and minimum are used in this
rant operation if the permissible input range is restricted
speci?cation to denote selection operators; thus max. (a,
to ‘one quadrant or to two adjacent quadrants, respec
b, c . . . ) is equal to the greatest of a, b, c, .
. ; and
min. (a, b, c, . . '. ) is equal to the least of a, b, c, . . . .
tively.
' Any pair of non-zero values of x and y having differ
The prior art provides input converters for one- or two
quadrant multiplication whose operation is such, that the 30 ing moduli must of necessity satisfy one, and only one,
of the following four conditions:
correct sign of the output of the multiplier is not always
preserved. For example, in a converter for a one quad
rant multiplier operative in the first quadrant, x is con
verted into the modulus of x, ]x[, and y is converted into
(a) y>§cg y>—x
(b) y>x; y<—x
(c) y<x; y>—x
(d) y<x; y<—x
[y]. In this case the sign of multiplier output is always 35
non-negative.
It is an object of this invention to provide an input con
verter, which, when connected to the input terminals of
any electronic multiplier, preserves both the value and
the sign of the output of the multiplier ‘and extends the
Evaluating the functions 5 and 11 for each of these
cases separately there is obtained respectively:
operative range of one or both of the input variables in
the case of multipliers which do not have four quadrant
operation.
. ‘In particular, it is an object of this invention to provide 45
two quadrant input voltages to an electronic multiplier,
when fed with four quadrant inputs.
It is another object of this invention to provide means
for producing an output voltage whose sign is equal to’
the sign of the product of two input voltages.
50
It is a further object of this invention to provide a de
vice which, when used with conventional additional cir~
cuits, converts any one quadrant multiplier into a four
quadrant multiplier.
'
It is yet another object of this invention to provide a 55
device which, when used with additional conventional
circuits, converts some half quadrant multipliers into four
quadrant multipliers.
It follows, for all values of x and y,
‘
It is another object of this invention to provide an‘ in
put converter for multidimensional function generators
(ii)
1720
(iii)
v2.15] '
with certain symmetry properties.
(iv)
~ The sign'of .5 is equal to the sign of xy
A device generating g, 11 as output signals when fed'
with x, y as input signals can therefore be used as an
A
'
yF-urther objects and advantages of this invention will
‘become apparent from the following description of a prac
tical realization of the invention taken in connection with
the accompanying drawings, in which
FIGURE 1A is a three dimensional plot of converter , 65
output 11 as a function of its inputs x and y;
FIGURE 1B is a three dimensional plot of converter
'
input converter for a multiplier, 5 and 11 being the input,
signals to the multiplier; because from (i), above, the
output of the multiplier is not affected by the introduction
of such a converter in the said manner. Moreover, be
cause of (ii), above, the multiplier need only be of the
output .5 as a function of its inputs x and- y;
two quadrant type, whereas the converter accepts inputs
FIGURE 2 is a circuit diagram of one embodiment of
in ‘four quadrants. The multiplier can actually be of
70
the converter and sign discriminator of this invention;
an even more restricted type, for (iii), above shows that
FIGURE/3 is a schematic diagram of one embodiment
input signals 5, 7) lie within one quadrant only, said
4
3
quadrant being limited by the lines 23:1; and .§=—-a7. The
part of the converter generating the .5 signal is a sign dis
criminator for the sign of xy, as tollows from (iv), above.
FIGURE 2 is a schematic diagram of one embodiment
of the device for the generation of 5 and 7;. T1 and T3
are the input terminals for input signals x and y, respec
quadrant multiplier to four quadrant operation.
In
FIGURE 3, T1, T2, T3, T4, are the terminals which are
at voltages x, ——x, y, —y, respectively, as in the device
described in connection with ‘FIGURE 2. Terminal T;
is at voltage 5. This voltage is generated by use of
the part of the converter generating 5, as heretofore de
scribed, i.e. by use of the device ‘shown in FIGURE 2
less that part of it consisting of D1, D2, D3, D4, R1 and
tively. Input signal x is fed to sign changer A1 whose
output signal —x appears at output terminal T2. Input
T1,, and their interconnections. ‘111 FIGURE 3, M is a
signal y is fed to sign changer A2 whose output signal
-y appears at output terminal T4. The anodes of 10 one quadrant multiplier whose input terminals are T9
and T11. T9, T11 are fed with voltages ]x[, ]y[, respec—
diodes D1, D2, D3, D4, are connected to terminals T1,
tively. The anodes of diodes D12, D13 are connected to
T2, T3, T4, respectively. Their cathodes are joined at
T1, T2, respectively; their cathodes are connected to T8;
terminal T5 which is also connected to a negative D.C.
T8 is also connected to a negative D.C. voltage, —,
voltage, at —, through resistor R1. Except for a small
transitional interval, only one of diodes D1, D2, D3, D4, 15 through resistor R9; the voltage of T8 is approximately
conducts at a time; there thus appears at terminal T5
equal to
a signal approximately equal to 11. If the diodes have
a voltage drop equal to s when conducting, the voltage
at T5 will be equal to ‘0+6. When using silicon or
pensate for the voltage drop in D12 and D13 and to com
pensate for diode drift. The cathode of D16 is connected
to T8 and its anode is connected to T9 which is also
‘Diode D16 is provided in order to com
germanium diodes or transistors, e is of the order of 01.1 20 connected to a positive DC. voltage, +, through re
sistor R7. T9 is thus at a voltage equal to
The
to 1.0 volt. To correct for this offset voltage and for
anodes of diodes D14, D15 are connected to T3, T4, re
diode drift, diode D11, of the same type as diodes D1
spectively; their cathodes are connected to T10 which is
to D4, is connected with its cathode to T5. The anode
also connected to a negative D.C. voltage, —, through
of D11 is connected to output terminal Tu and to a
positive D.C. voltage, shown at +, through resistor R5. 25 resistor R6. The cathode of compensating diode D17
is connected to T10 and its anode is connected to terminal
The offset voltage of Du cancels the offset voltages of
diodes D1 to D4 and voltage 1; thus appears at
Tn,
This compensation device, comprising D11 and R5, is
needed only when high accuracy is required. Another
T11 which is also connected to a negative D.C. voltage,
—-, through resistor R8. T11 is therefore at a voltage
equal to |y|. M is therefore fed with non-negative volt
way of compensating for said offset voltage consists of 30 ages and can be of one quadrant operation. At the out
put terminal T12 of M thus appears a voltage equal to
replacing Du by a resistor having a resistance which
klxy], where k is a positive constant. Analogous consid
is equal to the resistance of D11 when conducting.
erations apply when k is negative constant. This volt
Some types of diodes have considerable spread of
voltage drops from diode to diode, when conducting. The
age is fed to sign changer A3 whose output terminal T13
errors thus introduced into the converter can be eliminated 35 is therefore at voltage —kIxy]. Voltage 5 is fed from
by ?rst determining the voltage drop of that diode which
terminal T5 to a polarized relay whose actuating mecha
has the largest drop, 6, when conducting, and then
nism R connects terminal T0 of its change-over switch
adding resistors of suitable values in series with each of
S to T12 or T13 for positive or negative values of 5,
the other diodes so that the drop across each series com
respectively. At To therefore appears the required out
bination of said resistors and diodes is made equal to e 40 put voltage kxy. C is a capacitor, connected between
when the diodes are conducting. This compensation
To and ground; C is required in some applications, de
should be carried out for all diodes of the converter.
pending upon the circuit fed from To, in order effectively
to ‘ground To during the switching over of S. The relay
The cathodes of diodes D5, D6, D8, D9, are connected
to terminals T1, T3, T2, T4, respectively. The anodes of
consisting of R and S and their associated circuits is by
D5 and D6 are joined to T6 which is also connected to 45 way of illustration only; it can be replaced, in particu
a positive D.C. voltage, +, through a resistor R2. At
lar, by an electronic switching device.
T6 thus appears a signal equal to min.(x, y)+e. The
Similarly, a half quadrant multiplier can be converted
anodes of diodes D8 and D9 are joined at T, which is also
into a four quadrant multiplier. For example, to con
connected to a. positive D.C. voltage, +, through resistor
vert- to ‘four quadrant operation a multiplier operative in
50 the half quadrant 312x20, said multiplier can be fed
R4. At T; thus appears a signal equal to
with signals I5] and 1;. Referring again to FIGURE
3, this can be done by omitting D14, D15, D17, R6, and
The anodes of diodes D7, Dm'are connected to_T8, T7,
R8 and their interconnections, and feeding T1, T2, T11,
respectively. Their cathodes are joined at terminal TE
with E, —5, and 11, respectively, Where 5 and 17 are gen
which is also connected to’ a negative voltage, shown at 55 erated as described above, whereas —5 can be obtained
—, through resistor R3. .At '1‘; thus appears a signal
from 5 ‘by sign changing means, or directly from x, —x,
equal to g. A two quadrant multiplier, or a single quad
y, ,—-y from the expression
rant multiplier whose inputs lie within-‘the quadrant
yglxl, can therefore be connected to terminals TE and
T,,_ No compensating diodes are required ‘for the offset 60 The circuit for the generation of —5 according to this
voltages of the diodes associated with the circuit for
later expression is therefore identical with the circuit of
generating :3, because, by virtue of the con?guration, the
FIGURE 2 for the generation of 5, except that anode and
offset voltages cancel.
cathode connections of each of diodes D5 to D10 and
The device generating 5 heretofore described is based
the positive and negative voltages at + and —, respec
65 tively, must be interchanged, and, because of the loading
on the expression
of the circuits generating a and —5, in the circuit generat
ing 5 resistor R3 and the negative voltage to which it
Analogously, a device with identical functions can be
connects must be omitted, and in the circuit generating
constructed, based on the given equivalent form ‘for .5
—5 resistor R3 must be halved.v E or —E are also used
70 as control signals for output selection.
Alternatively [til can be generated according to expres
The description above is to be understood by way of ex
sions such as
ample only.
FIGURE 3 shows one embodiment of the use of the
sign discriminator of this invention to convert a one 75
5
3,084,862
6
[-5 I and a] can be used as input signals and output switch
ing must be provided, as described above in connection
with the conversion of a half quadrant multiplier to four
for example, .and the manner of said generations will be
quite clear from the above description.
quadrant operation.
‘
The embodiments of this invention and its modi?ca
tions which have been described in connection with
In one embodiment of the invention the following com
ponents and component values were used:
FIGURE 2 use diodes as non-linear elements. It is to
be understood that the use of diodes is by way of ex
ample only; in particular, the diodes can be replaced by
All voltages marked —— are ——250 volts D.C.
In the device described in connection with FIGURE 2, 10 transistors connected in a so-called diode logic connection.
All diodes are silicon junction diodes;
All voltages marked + are 250 volts D.C.;
The manner of said replacement will be described in con
nection with FIGURES 4A to 4D, in which FIGURE 4A
represents the diagram of a typical diode, such as D1,
In the device described in connection with FIGURE 3,
D2, ‘D3, D4, D7, or D10 of FIGURE 2, together with re
15 sistor R1 connected to its cathode, which corresponds to
R9=R6=2S0 kilohms
R7=Rg=500 kilohms
R1, or R3, in the case of D1, D2, D3, D4, or D7, D10 re
spectively. 3 is the terminal of the constant negative
voltage, -—. FIGURE 4B shows the corresponding tran
In some applications, inputs x and/or 32 are restricted,
sistor connection, in which terminals 1, 2, 3 are identical
or the multiplier has special input characteristics. It is 20 with terminals 1, 2, 3, of FIGURE 4A. TR1 is an NPN
C = 200' picofarads
then not always required to realize the complete surfaces
of FIGURES 1A and 1B.
For example, if input variable y is always non-negative,
3720, the previous expressions for 1; and £5 simplify to
transistor. The parallel connection of resistor R2 and
capacitor 6 serves as input network to the base of the
transistor. The base is also connected to bias voltage
25 V3 at terminal 4 through resistor R3. The emitter is con
nected to terminal 2 which is also connected to a negative
1D.C. voltage V3, at terminal 3, through resistor R1’. The
collector is connected to terminal 5 which is at the con
and the elements D4, D9, and A2 may be omitted from
stant voltage V5. FIGURE 40 corresponds to one of
the device of FIGURE .2.
Another example which realizes only a part of each of 30 the diodes such as D5, D6, D8, D9, D11 in the embodiment
of FIGURE 2, and consists of FIGURE 4A with diode
the surfaces of FIGURE 1 is required if the multiplier
is such that it can accept only inputs x and y for which
5, replaced by diode 1-52, where D2 is D1 with inter
ygx, the later restriction de?ning a particular two quad
changed terminals, and with voltage V3 of reversed sign.
rant multiplier, said two quadrants covering half of the
FIGURE 4D shows the transistor equivalent to FIGURE
?rst, the whole second, and half of the third quadrants. 35 4C and is identical to FIGURE 4B except for the sub
One embodiment of the modi?cation sufficient in the
stitution of PNP transistor TR2 for TRl and the reversal
latter case consists of the unit of FIGURE 2 with the
of sign of voltages V3, V4, and V5.
omission of the following components: A1, A2, D2, D4,
D8, D9, D10, and R4 and their interconnections.
Combinations of transistors and diode elements can be
used. For example, D7, D10, D11 may be diodes, all
Other modi?cations, realizing other parts of the sur- .40 other‘non-linear elements being transistors.
faces of FIGURE 1 are obtained by the omission of
selected components of the embodiment of this invention
, The use of transistors has the main advantages of pro
viding impedance conversion, from a higher input to a
described in connection with FIGURE 2.
1
lower output value, and of improving the frequency re
‘ While the converter is described above as an input unit
sponse; its main disadvantage is the restriction of, the
to a multiplier, it can also be used as an input unit to a 45 useful voltage range of input voltages at and y.
two dimensional function generator, or to any two inputs
, Typical values for the embodiments of FIGURES 4B
of a multidimensional function'generator; in the latter
and 41D_are as follows: Rfr=50 kilohms; R2=2.0 kilohms;
case several converters can be used as input units, each
E3=10O kilohms; 0:570 picofarads. Typical voltages
converter serving as input unit to one pair of input ter
in the embodiment of FIGURE 48 are as follows;
minals of the function generator or its other input con-' 50
V3=—22.5 volts; V4=7 volts; V5=2 volts. In the em
verters, or to av pair of terminals one of which is an input
bodiment of FIGURE 4D the same voltage values with
terminal of the function generator and the other one is
reversed sign are used. The gain from input to output
an input terminal of an input converter, all this, provided
was found to be ‘0.98. The permissible voltage range at
the function generated has the same symmetry properties
and/ or the same input restrictions as a multiplier.
For example, if f(x, y) is the function generated by
the function generator when it is fed- with voltages at and
y, at its two input terminals, and if
55
terminal Z‘was —3 volts to +3 volts. Adjustment for
zero output voltage with zero input voltage is obtained
by a slight variation of V4. For this purpose adjustable
V4 is provided.‘
As an alternative way of carrying out the invention,
—5
as given above and >—1;=min.(x, -x, y, -y) may be
60
used, or, for example, realization of —£ and 71 according
the unmodi?ed input converter can be used and only one,
to the expressions, which require only one sign-changer,
quadrant of f(x, y) need be realized in the function gen
?x, y)=f(y, x)=f(—x, —y)=f(—y, —x)
erator, said quadrant lying partly in the ?rst and partly
in the second. quadrants, between _x=y and x: —y.
As a second example, if )‘(x, y) ,=f(y, x), the modi?ca 65
andthe manner of their generation will be quite clear
tion of this invention described above in connection with
from the above description.
'
multipliers for which ygx can be used as an input con
.What I claim is:
verter to the function generator and only two quadrants
1. An input converter for a one or two quadrant multi
of f(x, y) need be realized in the function generator, said
two quadrants lying partly in the ?rst and third quadrants, 70 plier or like function generator, comprising means for ac
cepting ?rst and second input signals, ?rst means con
and covering the whole second quadrant, their limit be
ing given by the line x=y.
nected to said accepting means for producing from said
As a third example, if
input signals a ?rst output signal corresponding with the
maximum of the moduli of said input signals, and second
75 means connected to said accepting means for producing a
3,084,862
8
7
mum of the moduli of the input signals, a halt quadrant
multiplier or like function generator producing an output
second output signal having a modulus equal to the mini
mum of the moduli of the input signals, said second means
signal from said secondary signals, said output signal be
ing the required modulus.
including means for generating a sign for said second out
put signal wherein said sign is equal to the sign of the
‘8. A multiplier as set forth in claim 5 wherein the
product of the input signals; said accepting means includ
ing means for generating a plurality of secondary output
means for deriving said control signal comprises ?rst and
second sign changer means for producing ?rst and sec
signals greater in number than said input signals; at least
ond secondary input signals equal to the inverses of the
one of said secondary output signals being equal in mag—
?rst and second input signals respectively, means for se
nitude and opposite in sign to one of said input signals;
said ?rst and second means ‘being adapted to employ said 10 lecting the minimum of said ?rst and second input signals,
means for selecting theminimum of said ?rst and second
secondary output signals to generate appropriate moduli
secondary input signals and means for selecting the maxi
signals.
mum of the minima so selected, said maximum being the
2. The’ input converter of claim 1 wherein the means
required control signal.
for producing the ?rst output signal comprises ?rst and
second sign changer means for producing ?rst and sec 15
9. In a multiplier or like function generator, means for
deriving a signal with the same sign as the product of
ond secondary input signals equal to the inverses of the
?rst and second input signals, and third means for select
ing the maximum of said ?rst and second input signals
and said ?rst and second secondary input signals.
two input signals, comprising ?rst and second sign changer
means for producing ?rst and second secondary input sig
nals equal to the inverses' of the ?rst and second input sig
'3. An input converter for a one or two quadrant multi
20 nals respectively, means for selecting the minimum of
accepting ?rst and second input signals, ?rst and second
said ?rst and second input signals, means for selecting the
‘minimum of said ?rst and second secondary input signals
sign changer means for producing ?rst and second sec
and means ‘for selecting the maximum of the minima so
mum of the two minima so selected.
the minimum of said ?rst and second input signals, means
plier or like function generator, comprising means for
selected, said maximum being the required signal.
ondary input signals equal to the inverse of the respec
tive input signals, means for selecting the maximum of 25 '10. A sign discriminator for use in multipliers or simi
larly symmetrical function generators, comprising means
said ?rst and second input signals and said ?rst and sec
for accepting ?rst and second input signals, ?rst and sec
ond secondary input signals, means for selecting the
ond sign changer means for producing ?rst and second
minimum of said ?rst and second input signals, means
secondary input signals equal to the inverses of the ?rst
‘for selecting the minimum of said ?rst and second sec
ondary input signals, and means for selecting the maxi 30 and second input signals respectively, means for selecting
for selecting the minimum of said ?rst and second second
4. A four quadrant multiplier comprising means for
ary input signals, and means for selecting the maximum of
accepting ?rst and second input signals, means for deriv
the minima so selected, said maximum having the sign
ing the moduli of said input signals, a single quadrant
multiplier for multiplying said moduli to produce a ?rst 35 of the product of the two input signals.
11. An input converter for a one or two quadrant
output ‘signal, sign changer means to produce a second
multiplier or like function generator, comprising means
output signal equal to the inverse of said ?rst output sig
for accepting ?rst and second input signals, means for
nal, and changeover means for selecting one of said ?rst
producing from said input signals a ?rst output signal
and second output signals as ?nal output signal, said
changeover means being responsive to the sign of a con 40 correspond-ing with the maximum of the moduli of said
input signals, and means for producing a second output
trol signal derived from said input signals so that the out
signal having a modulus equal to the minimum of the
put signal selected has the sign as well as the modulus of
moduli of the input signals and a sign equal to the sign
the product of the input signals.
of the product of the input signals, the means for pro
5. A four quadrant multiplier comprising means for
accepting ?rst and second input signals, means for de 45 ducing the second output signal comprising ?rst and second
riving the moduli of said input signals, means for multi
sign changer means for producing ?rst and second second
plying said moduli to produce a ?rst output signal, means
ary input signals equal to the inverses of the ?rst and
for changing the sign of said ?rst output to produce a sec
second' input signals respectively, means for selecting
ond output signal, means for deriving a control signal hav
the minimum of said ?rst and second input signals, means
50
ing the sign of the product of the input signals, and
for selecting the minimum of said ?rst and second second
changeover means, responsive to said control signal, for
ary input signals and means for selecting the maximum
selecting that one of said ?rst ‘and second output signals
of the minima so selected, said maximum’being the re
having the sign of said control signal.
6. A four quadrant multiplier or like function genera
tor comprising means for accepting ?rst and second in 55
put signals, means for deriving a ?rst secondary signal
equal to the maximum of the moduli- of the input
signals, means for deriving a second secondary signal
equal to the minimum of the moduli of the input signals,
a half quadrant multiplier or like function generator .pro
quired second output signal.
12. An input converter for a one or two quadrant
multiplier or like function generator, comprising means
for accepting ?rst and second input signals, means for
producing from said input signals a ?rst output signal
corresponding with the maximum of the moduli of said
60 input signals, and means for producing a second output
signal having a modulus equal to the minimum of the
ducing a ?rst output signal from said secondary signals,
sign changer means to produce a second output signal
equal to the inverse of said ?rst output signal, and change
moduli of the input signals and a'sign equal to the sign
of the product of the input signals, the means for pro
ducing the second output signal comprising ?rst and
second sign changer means for producing ?rst and second
secondary input signals equal to the inverse of the ?rst
being responsive to the sign of a control signal derived
and second input signals respectively, means for selecting
from said input signals so that the output signal selected
the maximum of said ?rst input signal and said second
has the sign of the product of the input signals.
7. A multiplier or function generator for the genera 70 ary input signal, means for selecting the maximum of said
second input signal and said ?rst secondary input signal
tion of the modulus of a product or of another function,
and means for selecting the minimum of the maxima so
comprising means for accepting ?rst and second input sig
selected, said minimum being the required second output
nals, means for deriving a ?rst secondary signal equal to
over means for selecting one of said ?rst and second out
put signals as ?nal output signal, said changeover means
the maximum of the moduli of the input signals, means
for deriving a second setiondary signal equal to the mini
65
signal.
.
(References on following page)
3,084,862
References Cited in the ?le of this patent
UNITED STATES PATENTS
2,808,990
Van Allen ____________ __ Oct. 8, 1957
OTHER REFERENCES
“Electronic Analog Computer,” GAP/R K2 Series,
Philbrick Researches, Inc., received in Scienti?c Library
10
Sept. 29, 1958.
FIG. 1.1, p. 10 and FIG. 4.3, p. 23 relied
on.
“Electronic Analog Computer” (Korn and K0111), 1952,
McGraw-Hill Book Company, Inc, N.Y., FIG. 6.2, page
212 showing adaptation of two-quadrant multipliers to
four-quadrant multiplication of interest.
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