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Патент USA US3090051

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May 14, 1963
Filed NOV. 2, 1959
8 Sheets-Sheet 1
May 14, 1963
Filed NOV. 2, 1959
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United States Patent C)
Patented May i4, 1963
The second type of prior art display unit referred to
3 @99 @di
above is that in whicha scanning raster is formed at the
CHARACTER onN’nmirroN Ann nisrmr _
required character display position on the tube screen
Haroid R. Deli, Palo Alto, Caiif., assigner to Link Avia
the primary electron lbeam is unblanked by a signal
tion, Inc., Binghamton, NÍY., a corporation ot‘ New Ul and
generated to coincide with appropriate points on certain
lines of this raster to form a character composed of line
Filed Nov. 2, 1959, Ser. No. 850,308
segments in a manner similar to the formation of a tele
3 Siaims. (Ci. 349-324)
vision picture.
Such a system will be seen to require
This invention relates to character display devices and
wide-band video ampliiiers. The deiinition of the dis
to methods for providing character displays. More par 10 played characters is relatively poor by this raster presen
ticularly, it relates to improved methods and means for
displaying alphabetic or numeric characters on cathode
ray tubes or other electronic display devices.
tation, and is especially poor for small characters due to
the inherent resolution limitations of raster-type displays.
Another shortcoming of this type of presentation is that a
relatively long time is required to present the character
due to the necessity of covering the character display
Such display devices and methods iind wide utility in
connection with computer and data-processing installa
tions for indicating the results of computations and opera
iield position with a raster sweep, from which only a few
tions performed by digital computers and like appara
tus. Necessary requirements of such character display
segments are unblanked for the display of each char
acter. The present invention does not utilize a scanning
raster and hence avoids the limitations of this second
devices are that they operate rapidly, that they be ca
pable of receiving their input data in the form of com 20 prior art type of display.
puter or data-processing output signals, and that they
produce clear and readily legible characters.
The last general type of these prior art cathode-ray
tube character display units is that in which the continu
A number of prior art devices exist »by the use of which
it is possible to generate alphanumeric characters on the
the character to be displayed are generated and used to
phosphor screen of a cathode ray tube.
Three principal
deiiect the beam continuously from beginning to end of
types of cathode-ray tube character display units are
known. A iirst type includes units in which a shaped
electron beam is generated by the electronic illumination
character-heid region of the tube screen eiîectively traces
ously varying analog X and Y component voltages for
a character.
In this systemy any point within a small
out the desired character on the screen in the manner it
might be written by hand. The prior art devices using
plurality of apertures each having the shape of a different 30 this general method have run into a number of difficulties,
letter or number, and by directing an electron beam onto
since the generation of the X and Y component deflection
the mask from the electron gun a shaped beam is pro
signals in general requires that, -for each character gen
vided. By the use of a detiection system the shaped
erated, a special circuit of considerable complexity must
beam is positioned on the screen as required. A second
be provided. One such system, described in the Jan. 3,
type is that in which a scanning raster is formed at a
1958 edition of “Electronics,” pages 72-75, utilized
desired position on the screen, and the tube is unblanked
Fourier analysis and synthesis, requiring a plurality of
of a mask inside the tube.
The mask is provided with a
to form a character composed of line segments in a
lrarmonically related sine waves to trace out a character.
manner similar to the composition of a television picture.
Fourier composition of a curve involves taking the small
Still a third type of unit is that in which an electron beam
differences -between large opposite sense Fourier compo
is first positioned to a reference point and then is caused 40 nents and inherently is limited in accuracy. Further
to trace out the character through the application of the
more, a large number of Fourier components are re
X and Y component functions to a micro-deiiection
quired to generate some characters. Also, it is not feas
ible to generate the sudden changes in voltage in the
component signals required for the undistorted display of
be described in further detail as employing a character
certain characters. Another system of the latter type
shaped electron beam which is generated by the deiiection
which is described in the March 13, 1959 edition of
of a primary electron beam to illuminate a character
“Electronics” pages 13S-140, requires» a separate and
matrix apertured mask electrode in the display tube, the
relatively complex number-generating circuit for each dif
resulting shaped electron beam is recentered, and the 50 ferent character to be displayed. In this system charac
shaped electron beam is then detiected to the required
ters are formed by special Lissajous patterns, and only a
display position on the tube screen. There are several
limited number of fairly simple characters may be pro
disadvantages to this type of display unit, among which
duced in an undistorted manner unless very complex and
are the requirement for a special, and expensive, type of
expensive number-generating circuits are involved. Ac
display tube. Another disadvantage is that two deflec
curate production of Lissajous ñgures also requires pres
tion systems are required, one for character selection,
ervation of Very accurate phase relationships Ibetween
and one for positioning, each of which must be quite
vertical and horizontal deiiection components. The
precise `due to the chaarcteristics of these special tubes.
present invention does not involve generation of charac
The positioning deiiection system also presents certain
ters by either composition of Fourier components or by
further limitations to the operation of this system which
modified Lissajous iigure presentation and thereby avoids
are due to the requirement that it deflect a shaped beam
the above mentioned problems. In the present invention
with small distortion. Also, due to distortion of the
the location of a desired character as a whole is deter
image and to phosphor-loading considerations it is not
mined by provision of major X and Y deflection voltages,
feasible to transmit a shaped beam of sufficient intensity
as in the case of the prior art systems, but the shape of
to permit the generation of luminous characters which 65 the character itself is determined, not by an apertured
may 'be viewed conveniently under conditions in which
mask Within the tube, not by occasional unbla-nking of a
normal room lighting is present. Also, loss of edge reso
scanning raster, and not by generation of continuous X
lution due to beam debunching, and skew distortions are
and Y voltages by Fourier or Lissajous synthesis, but
emphasized with this type of display unit. The present
rather by provision of a series of discrete successive sets
invention may utilize a standard cathode ray tube and
of Cartesian coordinate voltages, which successively de
The iirst of these types of character display units may
none of the problems attending use of an apertured mask
will arise.
ñect the electron beam to trace out the character in a
series of discrete successive steps, producing a series of
individual sharply deñned dots which may blend together
to provide the desired character. The individual dots
formed in this way have very clean deñnition along their
edges to permit the formation of sharp corners for any
desired character.
It is a primary object of this invention, therefore, to
FIG. 5 illustrates a particular circuit which may be
utilized to provide for the major deflections required
-for a preferred embodimentof the instant invention,
FIG. 6 illustrates a precision analog diode switch
which may be used in the practice of the instant invention,
It is another object of this invention to provide a
method and means for generating characters of better
deiinition than has been possible heretofore on cathode
yFIG. 7 is a diagram of a push-pull driver circuit, such
as may be used in the practice of the instant invention.
Turning now to a detailed discussion of the figures,
it Will be noted that FIG. lA shows the face, at 10,
of a standard cathode -ray tube. The visible portion of
ray tube screens.
face 10 may be divided for convenience of explanation
provide improved means for generating alphanumeric
characters on conventional cathode-ray tube screens.
It is yet another obiect of this invention to provide a
into a plurality of imaginary squares or rectangles, `40
vmethod and means for generating alphanumeric charac
of which are shown in FIG. lA, although a greater or
ters'of good form and of higher brilliance than has been 15 lesser number may be employed and they may be ar
lpossible heretofore on cathode-ray tube screens.
ranged in different positions. .Upon application of input
It is still -another object of this invention to provide an
signals to the invention from a computer output circuit
improved method and improved means for generating
or a card or tape reader, for example, a message will
characters on visual ‘display devices through generation
appear on Vface 10, with a single character contained
of lsuccessive and discrete sets of minor X and Y posi 20 within each rectangle for any given set of message input
tioning signals.
4It is a further object of this invention to provide an im
The individual characters of the message are
n‘îormed successively, but the entire message remains
proved method and means for -forming ‘alphanumeric
characters by placing a plurality of successive dots Var
visible on face 'lll due to screen persistence.
meric characters on the screen of a cathode-ray tube
of adjacent characters involves smaller charges in cer
For ex
ample, the ñrst character of la message may be `formed
ranged, to represent said characters on the screen of a 25 Within the area of rectangle 1l, then the second char
cathode-ray tube.
acter may be formed in the area of rectangle 12, etc.,
It is yet a -further object of this invention to provide
until the complete message is formed. It is not neces~
means »for -forming predetermined characters on a cath
sary, however, that the successive individual characters
ode-ray tube in which said lmeans -may be readily altered
be formed from right to left, or from top to bottom;
to provide other characters.
30 nor is it necessary that each successive character be
It is a still further object of this invention to provide
formed immediately lfollowing formation of the character
means for rapidly and accurately presenting a alphanu
in an adjacent rectangle, -although successive formation
without the use of special tubes, or the loss of definition
tain major positioning voltages to be described and in
or of brilliance and without employing circuits of inordi 35 general is advantageous.
nate complexity.
In the vformation of a single desired character Within
The novel features that I consider characteristic of
my invention are set forth With particularity in the ap
any particular one of the rectangular areas shown in
FIG. 1A, van X major position voltage and a Y major
pended claims. The invention itself, however, both as
position voltage »are ñrst applied to the deilection system
to its organization, and its method of operation, to 40 of the CRT. These voltages are derived from the con
gether Withadditional objects and advantages thereof,
version of a plurality of input digit signals. Although
will best lbe understood «from the following ‘description
the CRT is blanked when the two major positioning
of specific embodiments when read in connection with the
voltages are iirst applied, they are of proper magni
`accompanying drawings, in which:
tude and polarity to position the beam Within the area
FIG. 1A shows the face of a cathode ray tube divided 45 defined by the particular rectangle Where the desired
into a plurality of areas in which characters may be
character is to be written, so that later, when the CRT
is unblanked, the beam will strike face 10 within the
FIG. lB illustrates the «relationships -between a sub
origin or reference point and a plurality of dotsrmaking
up a character,
FIG. 1C is a Ibloclr diagram illustrating'the general
layout of a preferred embodiment of the invention,
particular area.
Reference noW should be had to FIG. 1B, Where a
50 single rectangular area of FIG. I1A is shown on an
enlarged scale.
X and Y major positioning voltages
applied to the CRT deiiection system eiîectively prepare
FIG. 2A is part of a more detailed block diagram
the system to locate the beam -at 20' in FIG. 1B, the
serving to illustrate the relationships between the various
sub-origin of area 11. FIG. 1B illustrates how the letter
input components used with the present invention as Well 55 "‘P” may be formed. After the X and Y major position
as some of the pulse forming components thereof,
ing voltages are applied to the CRT deñection system and
(FIG. 2B is a block diagram illustrating further rela
a certain time has elapsed, during which time the dc
tionships' between various components of a preferred em
flectìon voltages stabilize at the X and Y major values,
bodiment of the instant invention,
a first set of x and y minor positioning voltages repre
FIG. 2C is a block diagram illustrating the relationship 60 senting Cartesian coordinates are ‘applied to the CRT de
between additional components of a preferred embodi
flection system to be superimposed respectively, on the
ment of .the instant invention,
X and Y major deñection voltages. If the iirst set of
FIG. 2D provides a table toy aid in identifying the
minor x and y positioning voltages has magnitudes indi
various blocks, in FIGS. 2A through 2C, which do not
cated by the dimensions x1 and y1 in FIG. 1B, the de
correspond to conventional symbols,
65 liection system of the CRT Will be seen to be biased to
iFIG. 2E illustrates an embodiment of the invention
locate its beam at point Z1 in FIG. 1B.
'The CRT is
which provides quantized signals by «digital means for
then unblanked for a short period, so that a dot appears
generating minor deflection signals,
at point 21, and then the CRT is :blanked again.
'A second set of Cartesian positioning voltages, x2
. FIGS. 3A-3D show examples of the types of symbols
which may be produced by the instant invention as well 70 and y2, are next applied to the dellection system in place
as showing the relationship between the sub-origin and
of the x1, y1 set thereby preparing the deflection system
the dots forming the characters,
to locate the beam at point 22 in FIG. 1B, and upon
FIG. 4 illustrates a particular precision transistor
unblanking of the CRT a second dot appears 'at point
switch which is of use in the practice of the instan
22. In the particular example chosen, the x2 voltage
75 will be the same as the x1 voltage, since dot Z24is located
directly above dot Ztl.
The further dots arranged to
form the letter “P” are then successively Íorined in simi
lar manner so that the beam is elîectively stepped around
the path indicated by the arrows in FIG. 1B until it has
provided the dot at point 23, the last dot required to
form the letter “lì” While the CRT is blanked, the
locate and form the character determined by the digital
data stored in register 3d, an initiating pulse is applied
to the system on lines 38, 39 and 4G.
This pulse may
be derived from the “Read” or “Print” circuit of the com
puter or other input device, and it will signify that data
sufticient to determine a character has been supplied to
minor x and y coordinate voltages are removed and
register 36“, and that a display of the character should be
the major X position voltage is then changed, relocating
the potential position of the beam from the sub-origin
The digital data stored in the X position storage por
of area lì to the sub-origin of area l2 (FIG. 1A), 10 tion 3i of register 3i? is applied to an X major deflection
preparatory to display of a further character in area l2.
computing unit 34 which is essentially a digital decoder
The further characters of the input message are formed
and converter, and which provides an analog voltage of
proper magnitude to position the CRT beam in the X
direction to the sub-origin of the area in which the char
acter is to be displayed. The digital data stored in the
Y position storage portion 32 of register 30 is applied to
a Y major deflection computing unit 35, which also is
essentially a digital decoder and converter, and which
provides a voltage of proper magnitude to position the
embodiment to be described) Ifrom the computer or
card or tape reader or other data-processing device to
`CRT beam in the Y direction to the sub-origin of the
storage register means 3@ shown in FlG. lC as compris
area in which the character is to be displayed. VThe X
and Y voltages from units 34 and 35 are applied through
ing three separate storage units, 3l, 32 and 33. The
input data applied to storage register means 3ft may be
amplifiers 36 and 37 to drive the horizontal and vertical
applied serially or in parallel, and register 3h» serves
detlection systems, respectively, of the CRT 60.
to present the data in parallel to the remainder of the 25
No timing delays are provided between storage units
system. A number of data-processing devices already
3i, 32 and the CRT deiiection system, so the deflection
in the other areas in the same manner, until the com
plete message has been indicated.
A general understanding of how the above process
is performed will be facilitated by reference to PEG. 1C,
a general system :bloeit diagram. The digital input data
to be displayed is applied (over 19 lines in the speciilc
contain suitable output storage registers which perform
voltages are applied to the CRT essentially as soon as
the function of register 39, and in such cases no ‘further
the character location data is entered into storage units
3l and 32;. The digital number stored in character stor
30 age portion 33 of storage register 30 is applied to a char
register is required.
The X position code storage unit 3E. of register 36 con
sists of 7 digit stages, and receives input data over 7 lines.
The binary or digital number applied to portion 3l of
the register will determine the X major position, and
hence determine in which area of a horizontal row of
areas any particular character will be formed. The Y
position code storage portion 32 of register 30 consists
of 6 digit stages and receives input data over 6 lines.
The digital number applied to storage portion 32. will
determine the Y major position, and hence determine
acter decoding unit 4S as soon as the data is present in
unit 33. Character decoding unit 43 includes a matrix
which converts the input data from unit 33 into a plu
rality of selected parallel switch controlling potentials.
Decoding unit 43 is connected via 40' parallel lines to
condition various of forty “x” diode analog switches rep
resented at dat and through 40 parallel lines to various of
forty “y” diode analog switches represented at 45. De
coding unit 43 and diode switching groups 44 and 45
in which area in a vertical row of areas `any particular 40 are thus arranged so that input data at unit 33 relating
to a letter such as “A” will cause a particular x switch
character will be formed. Thus, together, the data stored
in unit 44 and a particular y switch in unit 45 to be con
in portions 3l and 32’. of storage register Si? determine
in which one of a plurality of areas (491 in a preferred
ditioned while data relating to another letter such as “B”
will cause a different pair of switches to be conditioned,
embodiment, although 27x26 such areas are possible
with 7 X-lines and 6 Y-lines) a character will be formed 45 etc. While the selected two switches in groups 44 and
but have no eiîect upon the nature of the specific char
acter to be displayed. it may be noted that the system
d5 are immediately conditioned as soon as data is applied
possible, but it will be appreciated from the foregoing
“y” diode analog switch grouped and 40 output lines to
to character code storage unit 33, no output voltages
are applied immediately from the switches 4d and 45
just described uses storage registers 31 and 32 to operate
to ampliiiers 36 and 37.
in a mode which may be called the “position mode,”
After the initiating or “Display Order” signal is pro
since the area in which a character is to appear is uniquely 50
vided, and after a short time delay provided to allow
determined by individual signals specifying X and Y
the deilection system to settle, the pulse gates on a dot
coordinates. Another mode of operation, which may be
`counter 46 _are fed by a clock pulse oscillator 48 through
called the “typewriter mode,” may be used by employing
an “and” gate @9, so that pulses are sequentially derived
X and Y maior deflection counters at 3l and 32 which
on successive ones of lO output lines from the counter.
are started from the 0, 0 state and count upwards to
The output pulses from the counter successively energize
obtain a position format like that a typewriter. The
input conductors of a dot deflection generating unit 47,
description oi the invention is presented, for the salie of
which is provided with 40 output lines connected to feed
simplicity, as though only the “position mode” were
that a changeover of the operations described to the 60 feed “x” diode analog switch »group 45'. The function
of dot de'tlection generating unit ‘i7 is to apply sequentially
“typewriter mode” may be made without departing from
to switch groups ¿i4 and ¿i5 a large number of analog
the scope of the invention.
potentials of different magnitudes. Those analog po
The character code storage portion 33 of storage reg
tentials which are applied to switches which have been
ister 3i) contains 6 digit stages, and data stored in portion
conditioned are passed by the switches to amplifiers 36
33 determines the shape of the character to be displayed
and 37 and thence to the CRT deñection systems at 66
in the particular area deiined -by the data in portions
and d3. The switch groups ¿itl and 45 are arranged with
3l and 32. Thus the data stored or counted in portions
respect to dot deilection generating unit 47 so that a
3l and 32 determine where on the face of the CRT a
single analog voltage will be applied to amplifier 36 and
character is to be displayed, and the data stored in por
tion 33 determines what particular character is t0 be dis 70 a single analog voltage will be applied to amplifier 37 at
any one time. in between application of each set of
played. Each portion of register means 3u is connected
analog voltages to ampliíiers 36 and 37, clock pulse
to a reset or clearing line, which clears the register after
one character has been displayed, enabling data pertain
oscillator 43, after a further small delay, operates a
ing to the location and type of the next character of the
blocking oscillator 5t) which is connected to the grid
message to be entered into the register. In order to 75 cathode circuit of the CRT to unblank the CRT gun 64
sistor switches are summed by suitable resistor networks
dot counter is stepped through its stages, dilïerent sets of
such as those indicated in FIG. 5, and provide a suitable
dot positioning analog voltages are successively applied
potential at terminals 210 and 212, respectively, to aim
the gun in the cathode-ray tube at -a desired suborigin
to the CRT deflection system. In the embodiment de
point such as is indicated in FIGS. 13A-3D. It should be
scribed, dot counter 46 was provided with a capacity of
noted that the gun ofthe cathode ray tube will be blanked
twenty counts, so that characters composed of as many
at the time of the selection of the suborigin and will re
as nineteen dots may be formed. Most characters re
main so until such time as a suitable unblauking signal
quire less than nineteen dots, therefore “turno ” circuits
is provided by suitable circuitry such as that at 236 and
>51, responsive to the character decoding unit 43 and
the dot deflection generating unit 47 have been provided, 10 232 in FIG. 2B. It will be recognized that the major
deflection circuits of FIG. 2A correspond to the X major
to disconnect dot counter 46 after the required number
deiiection circuits 34 and the Y major deflection circuit
of dots up to and including nineteen have been formed.
_35 which were shown in FIG. 1C, with corresponding
A CRT employing electrostatic deflection circuits is
outputs made available to control the ldeflection circuits
illustrated, but it will be appreciated that other display
of a cathode-ray tube.
tubes employing other deflection and/ or focusing systems
Having established the method employed and shown
may lbe used and that the invention may be employed
means for determining the major X and Y deñections to
with other display devices capable oi using coordinate
locate the suborigin points, we turn now to means for de
signals to produce either visible or latent images. In par
termining the minor deflections which are necessary to
ticular, it will be appreciated that a CRT having separate
r‘orm the required characters and, more specifically, to
deflection means for major and minor deñections may be
means for providing the plurality of luminous dots which
are necessary to the formation of those characters. The
Having in mind the general description of this inven
character code provided on the input terminals of counter
tion set forth above in connection with FIG. 1A through
triggers CT6-CT11 controls the output pulses of the
FIG. 1C, a more detailed description will now be made
in connection with the block diagrams of FIGS. 2A, 2B 25 counter triggers which are then provided over suitable
connecting -lines to the :character decoding diode matrix
and 2C. FIGS. 2A through 2C may be considered as
and’create a'dot on the face of the CRT. Thus as the
parts of a single iigure and the conducting lines leading
between FIGS. 2A, 2B and 2C have been drawn in such
a way as to make it possi-ble to more easily consider
204. The character ldecoding matrix 204, in the present
embodiment, is designed to provide an output pulse over
any one of forty lines to provide a signal indicating that
tional or standard equipment which is well known in the
a chosen one of forty dilïerent characters has been desig
nated by the character code. The possible characters in
the preferred embodiment of this invention include the
26 letters of the English alphabet, the numerals 0 through
computer and data processing arts, as are the necessary
9, and special symbols -l-, -, ., and /. The operation of
them as a unit. It will be recognized that the input sig
nals to FIG. 2A and the output signals from FIG. 2B
and FIG. 2C come from or are transmitted to conven
power supplies, and therefore this equipment is not il 35 a. character decoding diode matrix of the kind involved
in element 204 is well known and reference is made to
lustrated. 'I'he character codes and position codes made
the book by R. K. Richards entitled “Digital Computer
available as inputs to FIG. 2A, for example, may be
Components and Circuits” published by D. Van Nostrand
Vderived from suitable tapes or other storage units or di
Co. in 1957 and to pages 56 through 60 therein. Each of
rectly from the outputs of suitably coded computing or
data processing equipment.
40 the for-ty terminals from the character decoding diode
Turning Íirst to FIG. 2A, consider that suitable code
signals are made available as inputs (preferably 1 micro
second pulses) to counter triggers C116 through CT-24
in parallel approximately 2 micro-seconds after the dis
play order is made available at a terminal 2&2 or that
matrix 264 is connected to an “or” gate in FIG. 2B and
also to a push-pull driver in FIG. 2C. The drawings in
FIGS. 2A, 2B and 2C have been' constructed in such a
Way that `the lines from one ligure `to another may be
these inputs have been applied individually at various
turns after the display order. The dis-play order, gener
ally a 1 micro-second pulse, may be provided either by
hand or from suitable data processing equipment. The
A, B . . . T, etc. corresponding to the signal appearing
readily followed, and the corresponding lines are labelled
thereon to expedite the following of one line from one
iigure to another.
Consider now the circuitry of FIG. 2B, which is acti
counter triggers will then be operated to provide the cor 50 vated 'by signals from the components shown in FIG. 2A.
The ‘display order provided at terminal ’M2 of FIG. 2A
responding character codes to the diode matrix at 204 and
-is supplied, as shown, to a single-shot multivibrator, in
the transistor switches TS-lp through 'IS-ISP may be
dicated in the block labelled SS-Z, which may prefer
operated to provide signals to the major deflection re
ably provide a l5 microsecond delay prior to emitting a
sistor networks at 206 and 208.
Signals are then provided iby resistor networks 2% 55 pulse in order -to permit the major deñections of the
cathode-ray to be completed and for the cathode ray
and 208 to be supplied at terminals 21d and 212 of FIG.
to be settled to the required character suborigin position.
2C -to provide major deflections to a suitable cathode
A signal is supplied, over the appropriate line from the
ray tube such that the suborigin or reference point with
character decoding diode matrix of FIG. 2A, correspond
respect to which each character is formed will be suitably
determined. As previously indicated, the position codes 60 ing to that determined -by the character code to an appro
priate “or” gate indicated by the conventional half circle
are supplied to counter triggers CT-IZ through CT-24
symbols in FIG. 2B. Taking, as an example, the letter
which are suitable hip-flop circuits of a type well known
T, «the signal in the lform of a pulse will be supplied
to those skilled in :the art and which will pass a suitable
to .the input terminal T of an “or” gate 227 from which
pulse signal to the corresponding precision transistor
it will be supplied to the corresponding “and” gate iu
switch TS-Ip through TS-lflp upon the occurrence of a
dicated by the triangle 216. The “and” gate 216 will not
suitable signal on the Y or X position code input termi
be activated until a suitable signal is supplied at its ter
nals. The design of the transistor switches is a critical
minal I@ from a dot decoding diode matrix 220. The
matter, since they are required to supply an accurately
“and” and “or” gates indicated herein may be conven
»determined reference voltage from source 22S of FIG.
2B through line 214 to the X and Y major deflection 70 tional gates such as are illustrated in the book “Digital
Computer Components and Circuits” by R. K. Richards,
resistor networks 206 and 208 whenever one of »the tran
>to which reference was previously made.
sistor switches is operated by its corresponding counter
The display order signal on terminal 2íì2 of FIG. 2A
trigger. A suitable example of circuitry for these tran
will be supplied to the counter trigger CT-2S of FIG.
sistor switches is described later in this disclosure in con
nection with FIG. 4. The out-put signals from the tran 75 2B which will ‘be set to its “one” state to provide an in
put to an “and” gate 218 which will then provide a
switches for 2a signal to provide a minor Y deflection.
series of pulses from the free-running blocking oscillator
These transistor switches then provide an input potential
217 to provide a count signal to the dot binary counter
from a precision reference supply to one of Ia plurality of
made up or” the counter triggers CT-l through CT-S, and
to activate an unblanking signal through the activation
of units 231i and 232 as will be later explained. The
resistors, as exemplified by the resistor-s [associated with
the generation of the deilection signal for the X Iand Y
detlection of T, which are labelled TX and Ty in FIG.
2C. The precision refer-ence supply is indicated at the
counter triggers are coupled so that they may count up
to 20 to provide a plurality of outputs to the -dot decod
ing diode matrix 22d.` The diode matrix or distributor
22@ may be of conventional design similar to the char
acter decoding diode matrix 294 of I`FIG. 2A. The active
output signals, on terminals 1 through 19, of the dot de
coding diode matrix 220 are supplied one by one to power
inverters Pil through P119 and to precision transistor
switches indicated as 'IS-1x through 'TS-19X and as TS-ly
through 'TS-19,.. The 20th terminal is connected directly
to the last “and” gate 226, which provides a pulse -to the
“or” 'gate 222 whenever the dots forming either the letter
“W” or the number “p” have all be placed. Each oi‘ the
output signals from the power inverters is supplied in suc 20
block `diagram 228 and it is of -suliioient accuracy not to
exceed a i2() millivolt error and is as indicated, of nega
tive polarity. The actual opera-‘tion ot the transistor
switches is explained in some detail in connection with
FIG. 4.
Considering now the FIG. 2C in more detail, we ñnd
that the negative potentials supplied by the transistor
switches of FIG. 2B from the supply 22S are each applied
to a plurality of resistor networks equal in number to
the total number of characters which may be displayed, in
this oase 40. The negative potential from the lirst transis
tor switch is provided to the first resistor of all of these
resistor networks, the negative potential from the second
cession to an “and” gate to prime it to operate the mul
transistor switch is then provided to the second resistor of
tiple “or” gate 222 it a signal is placed on the other lgate
all of the networks except the network for gener-ating the
terminal at the saine time. The outputs ~from the power
“peniod,” to which only one potential is supplied; the
inverters are supplied to the “and” gates at terminals in
potential from «the third transistor switch is then provided
dicated at 2, 6, 7, 8, etc. and the other terminal of each 25 to the third resistor of each resistor network having three
“and” gate may receive a pulse supplied through an “or”
resistors, etc.
gate by the character decoding diode matrix 204 of 'Fl
To generate the “period” it is apparent from FIGS. 2A
2A. rEhe occurrence of pulses on both terminals of any
and 2B that the reference potential from transistor switch
“and” gate simultaneously means that the required nurn
'IS-1X to the ñrst resistor in the .X network will be trans
ber of dots have been supplied for the formation of a par 30 mitted from `that network to the precision analog diode
ticular character and will cause the “or” gate 222 to stop
switch DS-.x which was previously closed by the output
the system.
signal on lthe “period” terminal from the character decod
An example of the operation of the circuits described
ing diode matrix 2M of FIG. 2A through a push-pull driv
thus far may be taken using the formation of period “.”
er PP-dll. This reference potential will then be supplied
signals, which require only a single dot, and which con 35 to »the [terminal 210 to cause a minor deflection of the
sequently call for a signal to the “or” gate 22 when both
oathode~ray beam «along the X laxis away from the sub
the pulse indicating “period” and the signal from the
origin. It will be recognized that lat the time the minor
power inverter -PI-Z are available on the “and” gate 22d,
deflection along the X axis is generated, a minor deiiection
which then supplies a pulse to the “or” gate 222. 'ille
along the Y axis will be generated by a potential through
“or” gate 222, in turn, supplies a turnollî signal through 40 the TS-ly transistor switch to the .y resistor network and
the inver-ter 1_1 which resets CT-Zâ so that its “Zero”
.the precision analog diode switch `i3d-_y to the terminal
portion conducts to operate the power driver PD-l to
212. It should be recognized that the timing `of these X
reset the counter triggers (lm-1 through CT-S to zero.
and Y minor detlections is such that the minor deflections
As la further example, if the character code calls for the
will have a chance to settle down to a steady-state
display of the character “T,” a signal will be provided on 45 before the single shot Ämultivibrator SS-l at 230
the line from terminal T of the character decoding diode
which provides la delay of one micnosecond fol
matrix 204 of FIG. 2A to the corresponding T on the “or”
gate 227. Under these circumstances, the counter triggers
lowing each pulse from the free running oscillator 217,
operates the blocking oscillator at 232 which unblanks
CT-1 through CT-S will continue to be activated by the
the cathode ray beam for approximately 1.5 microseconds
count from the “and” gate 2118 to provide signals through 50 to permit the formation of a dot at the desired point on
the diode matrix 22@ and the pulse inverters PI-l through
the cathode ray tube. The second pulse from the dot
Pl-9 to the iirst nine pairs of transistor switches. These
decoding diode matrix 220 will be supplied to the pulse
transistor switches will provide suitable minor deñections
inverter PI-2 ‘and from there to TS-2X and the “and” gate
in both the X `and Y directions to the cathode-ray tube as
224. The pulse from the “period” or “.” termin-al of the
is explained hereinafter. On the occurrence of the 10th 55 character decoding diode matrix 204 will also appear on a
pulse to power inverter 10, however, -a signal will appear
terminal of the “and” gate 224, and .the coincidence of the
on terminal l0 of “and” gate 216 opposite «the pol-se from
two pulses will provide a pulse which will operate “or”
the “or” gate 227 to provide ya pulse from “and” gate 2id
gate 222 and through inverter I-ll, CT-25 and PD-1 will
to operate the “or” gate 222 and to turn oli” the circuit
reset the dot counter to zero» yand prepare the circuit for
60 the next display after forming only one dot.
through inverter I-l ‘and counter trigger CT-2S.
It will be recognized that in the case «of a character hav
There are two characters, W and o, which, in this sys
tem, are composed of nineteen dot-s and thus require that
ing more than one dot, which is the case «for all except the
the corresponding transistor switches 'IS-19x and TS-l9y
“period” that each dot will be formed before the cathode
ray beam is deflected to form the succeeding dot, and that
be driven, iand consequently the cutoff lfor these letters is
generated «from output terminal 2G in cooperation with the
this is done through dot deflection resistor networks such
output from the “or” gate 229 to operate the “and” gate
as that »associated with TX and 'l'y in FIG. 2C. Consider
ing the generation of the letter T, `and yfurther «limiting the
226 and »the “or” gate 222 to reset the counter trigger 25
discussion to the consideration lof fthe deliection along the
and to provide a pulse at its “0” terminal.
X axis which is alike in principle to that along the Y
Following inversion of a pulse from the diode matrix
220 by one of the power inverters Pl-1 through PI-19, 70 axis, we find that the ñrst potential supplied from the tran
the ysignal is transmitted through one of nineteen lines to
sistor switches, namely that from 'TS-1X is supplied to a
íirst resistor indicate-d `at R-Z‘St! in FIG. 2C and from
connect to one of 19 transistor switches TS-lx through
there to the diode switch DS-Tx, which has been activated
TS-19X, to >open one of said switches for a signal, to pro
by the push-pull driver PP-Ztìi acting. in response to a
vide a minor X-deliection; and to one of 19 transistor
switches TS--îly through 'FS-19y to open one of said 75 signal from the character decoding diode matrix 264 in
FIG. 2A, tand more particularly from the .terminal label
‘led “T” thereof. The output of DS-Tx, which is the pre
cision potential from the resistor network las modified by
must- be made available in storage. If the required char
acters are speciñed before construction ofthe display
unit, this storagermay be of the type in which a pattern
of drive wires codes a core switch by passing through
the iirst resistor R-230 in said network and as it appears
across the resistor` R~234 is then supplied .to the terminal
210 to provideV the iirst minor deñection from fthe sub
origin, where the suborigin has previously been deter
mined by the major ‘deflection networks in response toÀ the
position code. As indicated before, rthe Y deileotion in
cores Vfor “ones” and outside for “zeros”
Thus the
memory will be in the patterned leads, and not in the
cores themselves, which merely respond to a pulse on
the appropriate patterned lead.
The embodiment of the memory in FIG. 2E requires
,volves the same principles land occurs substantially simul lO that 560 memory cores be provided, in 40 sets of 14
taneously. After a short delay tof about l’mìcro-second
cores, one set for each character and with no more than
to permit the beam to settle down in its new dei'leeted posi
19 drive pattern wires through-any one set of cores.
tion, a pulse .will be provided from the single-shot multi
For random addresses this will require no more than 10
vibrator SS-l at 230 to the blocking oscillator 232 which
wires through any one core, plus a readout winding, and,
provides 1an unblanking pulse of about 1.5 micro-second 15 if required, a bias line.
width to generate the iirst dot on the cathode ray screen.
This circuit may be connected to the dot decod
ing diode matrix 220 of FIG. `2B which will provide
signals from terminals 1 through 2() as heretofore ex
vblanked, following the end -`of the unblfanking pulse `from
plained. Each output pulse will be transmitted over lines
232, and the second precision potenti-al has ‘been supplied 20 253, 255, etc., as shown, to all forty sets of cores in the
The generation of the second dot will 'then proceed in
the same way after the cathode ray beam has been
from precision reference supply 228 through the transistor
switch TS-Zx ‘and through a second connecting line to the
second resistor R~232 in the resistor network for TX.
figure and through the one set of cores which has been
prepared for its ‘reception by the reception of a signal
from the character decoding diode matrix 204 by one of
The precision potential will be supplied through diode
Vthe associated character switches CS-l through (2S-40.
switch DS-Tx, which has been kept closed by the potential 25 'In each case, the signal pulse will be supplied to the ap
from the T terminal of 264, and to the terminal 210 to
propriate magnetic cores by the windings through those
provide potential for a new deflection of the cathode ray
beam. As before, la Asimilar new deflection will -be pro
cores to activate them in accordance with the require
ments oi the code. To illustrate the operation of the
`vided by the Y minor deñection circuitry. After a short
digital character generator, we turn to the example of
period, `determined by the delay Ioccasioned by the single 30 what happens when a pulse is received from 220 at char
shot multivibrator SS~1 Iat block 230 to permit the cathode
acter 1. In such a case, only the cores 252 and 260
ray beam to settle down, the gun :of the cathode ray tube
would appear to be activated by the pulse, with charac
Vwill be -unblanked by the blocking oscillator at 232 `and a
ter switch CS-l operative, though it will be recognized
second dot will be formed. This same procedure will be
that one or more of the l1 cores not illustrated might
followed with respect to each of the nine dots which are 35 he activated. In any case, following the activation of
used to makeup the letter “'1`,” and on the occurrence of
the required cores in accordance with the code signal,
)the tenth pulse from the dot decoding matrix 220 of FIG.
the read ampliíiers at 262V will be activated to read
2B, the pulse will be supplied (through a connection
“pulse” or “no pulse” on each of the corresponding 14
which has been omitted to keep the circuits uncluttered)
cores `to provide signals to the latches at 264, and to the
to a
10 of “and” gate 216, which in response to 40 14 precision switches at 266 to provide reference po
the potential on terminal 10 and a potential from “or”
tentials from the source 268 to each of the seven-bit
Ygafte 227 yoccasioned by the presence of a signal from “T”
digital to analog converters at 270 and 2712. The digital
on 204 will provide a pulse to activate rthe multiple “or”
to analog converters will then provide the minor deflec
gate 222 which in turn will provide a tnrnoft signal Vto the
tions required to the X and Y amplifiers 274 and 276 re
inverter I-l to switch CT-25 to its “zero” conduction state 45 spectively. The latches, read amplifiers, memory cores,
and provide a pulse through power driver PD'-l which will
etc. of this circuit are all elements which are well known
>reset, the dot binary counter made up of CT-l through
in the art.
CT-S to the zero state land prepare it for the next char
It may be noted that, in theory at least, a minimal unit,
of the general type illustrated in -FIG. 2E, may be built
A somewhat different approach to the problem of gen 50 using only 14 large tape cores, with all the lines required
erating the required minor deñection potentials and for
for the forty characters through them in accordance with
positioning the electron beam and thus positioning the
the requirements of the code, and with connect type se
dots, is illustrated in FIG. 2E. It will be recognized that
lection switching for choice of a desired character.
the steps of generating the minor deflections through the
The basic logic of the circuit in FIGS. 2A, 2B and 2C
use of the dot deflection resistor networks of FIG.' 2C 55 will be the same as that required for the operation of the
provide step-function approximations of the ideal vloca
-circuit in FIG. 2E, in that all the character outputs are
tion of each dot. The circuitry of FIG. 2E makes a fur
formed in potential form, the circuits to start and stop
ther approximation of this step-function approximation,
the sequences will be much the same, and the desired
,in that the essentially digital generation of the latter fig
characters are chosen by a translating switch driven by
ure provides step-amplitudes which are quantized. This,
the character code.
lof course, produces the familiar dot-matrix type of char
An embodiment of the invention which is of consider
acter. However, if the character i'leld is quantized with
able practical interest is one in which the display held
v128 positions in each direction, requiring tworseven-bit
available on the screen of the cathode-ray tube used is
numbers for dot position representation, positioning will
designed to have a maximum resolution of 1,024 posi
be approximately equal to the one percent deviation 65
tions in each axis. Each of these 1,024 positions may be
lwhich may be obtained by the use of the analog system.
for the resolution of an arbitrary pattern of lines
If the same spot size is retained as in the analog sys
as, for example, a map display. Of these positions, ap
tem, and the analog dot positions are duplicated to the
proximately 2E or 64 equidistant values may be used for
nearest quantized value, the difference in the characters
rformed will be negligible. `
- . 70 the Y, or Row, axis positions, to form a tabular display
of characters, and approximately 2rÍ or 128 Values may
The writing lof any of the previously specified charac
be used for the X or Column axis positions. For dis
ters by either system, will require the generation of from
play tubes having a diameter of 21", such a tabular dis
one to nineteen dots, and assuming an average of 11,
play íield would result in the formation of characters ap
each of which requires a position description of 1-4 bits,
proximately 1/s" in height. Good definition and bril
for 4() characters, a total of 6,160 bits of information
liance of the display is obtainable for characters of this
have the property of inverting the signal. The power
inverters modify the negative going pulses from 0 to
As previously explained, this display is one in which
_10 volts of the dot counter outputs to positive going
each character is formed by a sequence of luminous dots,
where the electron beam of the display tube is held mo
pulses from -10 volts to 0 which are provided as inputs
to the input terminals of the transistor switches as shown
in FlG. 2B and also at terminal `‘im in FIG. 4. Each of
these transistor switches consists of two transistors having
two common emitter circuits using complementary trans
istons with collectors interconnected to» form the output
terminal. When the input on terminal 4d'2ì is _|10
volts, the PNP transistor conducts and the output is at
tionless during an unblanking interval, during which a
dot is formed `on the screen, and then is rapidly deilected
to a new dot position adjacent to the previous position,
with the beam blanked. One method of determining the
position or" successive dots is by the generation of a step
function approximation of the X and Y component volt
ages of the characters, followed by the writing of a dot
onto the display screen during the flat-top portion of
each step. The general appearance of such characters,
formed of a relatively small number of dots is illustrated
in FIG. 3, where the suborigin is taken to be at the plus
sign appearing in the upper right hand corner as shown
with respect to each of the characters A, B, W and S. It
will be seen that characters generated in this manner, for
the equivalent number of dot elements, are superior in
deíinition to characters which could be formed from a
matrix of dots whose positions are iixed, as in a dot
printer, and are superior in the Y dimension to the line
segments used in a raster type display. This improve
ment is obtained by positioning successive dots to any
required locations within a character ñeld either by ana
log means or digital means.
In a display of this type, the successive dot positions
may be established such that sufficient overlap occurs so
that relatively uniform illumination will occur along the
trace line of the displayed character, as illustrated in
FIGS. SA-SC. Since the primary electron beam of the
ground level, except for the voltage drop across the trans
istor of less than 5@ millivolts. With the input on terminal
[§52 at »gro-und, the NPN transistor is in conduction and
the output is `at _101 v., except for the voltage drop across
the transistor of less than 5G’ millivoits. The switch thus
inverts the polarity of the incoming pulse and feeds a nega
tive nulse to the resistor summing networks from terminal
4M with constant voltage levels. The \-l0* volt supply
to which the emitter of the NPN transistor is connected
via terminal Litio is a specially designed precision voltage
supply, as previously indicated, with ya. maximum varia
tion in its output voltage of +20 millivolts.
The resistor summing networks -for minor deflections
must be quite accurate; involving 1% resistors, but are
connected in fairly well known circuits. Corresponding
to each character there are two resistor summing net
works, one for the horizontal or x-deñections of dots and
the other for the vertical or y-deiiections, both being
measured from the suborigin of the character. The
transistor -switches `are identified not with the character
display tube is used, rather than a shaped beam or a
bea-m which has to undergo a plurality of deflections, the
but with the dot, thus, transistor `switch TSJX in FIG.
2B isassociated with the x~deilection of the first dot of
every character and will drive the x-resistor networks, AX,
design of defiection equipment is not critical, and beam
intensity may be increased to limits determined by phos
TS-ìy will drive all the y-resistor networks, Ay, By . . .
phor loading, to provide a brightly luminous display. In
some instances, particularly to maintain deiinition in
small images, it may .be desirable to maintain the indi
vidual dots as distinct elements. 'I'his has been done in
actual operating models as indicated in FIG. 3D, which
shows a greatly enlarged image of “S” as it appears in a
photograph of a tube screen employing the invention.
in the mechanization of a display system such as the
Bx, etc., of all the characters. Similarly, transistor switch
etc. Transistor switches 'IS-2.x and TS~2Y will drive all
the .1c-resistor and y-resistor networks, except 4for the re
sistor network for character “period” which contains. only
one dot.
It can be seen that transistor switches 'TS-i954
and TS-llîty will drive the resistor networks of only two
characters, W and qä, which are the only two characters
composed of 19 dots each. Thus the üoading on the
transistor switches would be variable, the switches associ
one yused in the present invention, a primary concern is 45 fated with the iirst dot carrying the heaviest load. How
ever, as theoretically predicted and experimentally veri
with the accuracy with which each dot in any character
tied, the voltage drop across either transistor in the
can be positioned on the screen of the oscilloscope.
transistor switch does not vary more than 50 milli-volts
The accuracy becomes all the more important to consider
under widely varying load conditions. By operating the
where, -as in the present invention, the maximum deflec
tion from the suborigin to `any dot in a character is pro 50 transistor switch between «ground and a precision -10
Volts voltage source, it is `assured that the input voltage
vided by less than one volt. In order to help obtain the
at any terminal of any resistor network is either O or
reuired accuracy, a precision voltage source is used to
provide the basic potential which provides the deflection,
together with transistor switches such as those illustrated
in FIG. 4 which can supply the precision voltage at
selected inputs of the resistor networks of FIG. 2C.
~-10 volts, within i501 millivolts. The output voltage
from the resistor network (see the resistor circuits associ
ated with TX and Ty in FIG. ZC) is `given by:
Turning to the portion of the system block diagram shown
in FIG. 2B, it may be pointed out that, with the exception
of output-'s (ì and 20, the dot counter outputs `are negative
going pulses `from O to _l0 volts which drive power in 60 where x=l, 2, _ . ., n, since only one voltage input is
verters which in turn drive the transistor switches.
received at a time. In the practice of the instant embodi
ment of the invention, EX is a constant (-10` volts) and
may be noted parenthetically at this point that the output
the sum of ‘all the conductances is also constant for a
marked 01 in the dot decoding diode matrix 220ï represents
particular character. Thus, the output Voltage is inversely
the idle state of the counter when all of the counter flip
tlops are reset to the ‘0” position, and that this output is 65 proportional to the value of the resistor which has the in
put signal. Assuming that the sensitivity of the oscillo
not used anywhere. Since the maximum number of dots
scope remains constant, the deiiection is seen to be i-n
in any character is 19, outputs 1 through 19 are used for
versely proportional to the resistor value. iSince the
character generation. Output 2G is -used in the logic
number and positions of dots with respect to the suborigin
where the ydot counter is reset, at the end of each char
acter, by the (n»-{-l)th pulse, where n is the number of 70 is different for different characters, the sun
dots in the character.
The power inverters of FIG. 2B are required not only
will be different for different characters. -However, if a
for power gain, but also to invert the pulse polarity,
given input voltage EX at the input of a resistor Rx is
since `a negative going pulse is required at each of the
to produce the same output voltage regardless of what the
inputs to the resistor networks and the transistor switches
Yrest of the resistor network «looks like, the terminating
resistance -Ro must be so chosen that the sum
ample. This opens the diode switches for B and closes
the «diode switches for T. Each selected character is thus
successively generated.
. . . «1+l/Rn-t-1/R0
The majority of the electronic ‘components for which
the blocks in the block diagram stan-d are conventional
circuits, which have been adapted to operate `under cer
tain load conditions with the power and the input signals
where k is a constant. The design of resistor networks
supplied by the other portions 4of the exemplary circuit.
thus involves choosing resistors R1, R2, . . . Rn inversely
The majority of `these lcircuits are not discussed in detail,
is constant for all characters. This insures that
proportional to the minor deflection and choosing R0
such that the sum l/R1-}-l/R2+ . . . -f-I-l/Rn-l-l/Ro is
constant .for all characters. For convenience, R0 associ
ated wit-h the x-deflection of dots in character W was
chosen to be infinite, since the sum
therefore, 'but a few of them are illustrated in order to
point out particular circuits which may be used in the
practice of this invention. It is `appreciated that much or
all of lthe circuitry `of this preferred embodiment of the
invention might be replaced by equivalent circuitry de
rived from such sources `as the hook lby G. A. Korn and
is maximum for this case. To ñnd R0 for either x or y
'deñection resistor network for any character, the sum
1/R1-}-l/R2-l- . . . -l-l/Rn for that particular resistor
network is subtracted ctirom the corresponding sum for
the .1c-deflection resistor network of W to yield the inverse
of the desired resistance R0.
The preceding discussion has shown how the resistor
networks for the minor Vcletîection signals are obtained.
The major ydeñection signals are obtained using resistor
T. M, Korn entitled “Electronic Analog Computers,”
2nd edition, 1956, McGraw-Hill Book Co., the article by
J. Millm-an and T. H. Puckett entitledf‘Accurate Linear
Bidirectional Diode Gates” from the Proc. of I.R.E., vol.
43, pp. 27~37, January, 1955; Richard’s book entitled
“Digital Computer Components and Circuits,” to which
reference was previously made; or from other sources in
divider networks such as `are shown in FIG. 5. Resistors
the extensive .literature pertaining «to digital land analog
compu-ters and data processing devices.
Among the more critical elements, as »they pertain to
a preferred embodiment, are 4the precision `analog diode
R-ll, R-12, . . . R-~17 in FIG. 5 are selected to be equal
switches, one of which is .illustrated in FIG. 6r. One re
value and resistors R-Zl, R-ZZ . . . R-25 are selected to
quirement of the diode switches is that they have a high
back impedance, since 40 oí them >are connected together
at their output terminals. In order to provide a high
be one-half that value. As a result or" this selection, the
output potential ey appearing across terminals 500502.
may 'be expressed .according to the following equation:
hack impedance, silicon diodes are used at 612 and 614
in the output .arm of the diode bridge. It will he noted
that terminals 602 and 604 have oppositely poled pulses
applied to them from the push-pull drivers, which serve
where e1, E2 . . . es are output potentials of TS-lp 35 to bias the diodes shown to permit the sum of the pulse
through TS~6p, K is a constant and ey is the major Y
deflection potential. The major X-detlection potentials
appearing across terminals 504- and 506 may be determined
in substantially the same way as indicated sketchally in
FIG. 5. It will be recognized that the various potentials
supplied to the transistor switches indicated by block dia
grams 'I‘S-lp through TS431, are as shown in FIG. 4.
The task of mixing the major and the minor deflec
.tions of a character and impressing the sum on the os
cilloscope x and y inputs at the proper time may be ac
complished by the circuit illustrated in FIG. 6, in which
the connection of the major deflection signals is made
.to the amplifiers of the oscilloscope, through a mixing
resistor R-6l6, to be mixed with `the minor deflection
«inputs on terminals 606 and l610 to be transmitted to out
put terminal 66S. These switches have heen made in
such a way that the output potential on ìterminal 608 is
a -very accurate reflection of the input on terminal 606
in the case where the minor dellection is the only one
applied, and will accurately sum «the major and mino-r
detiect-ion signals if both of them are applied to provide
an output at terminal 608.
The control signals to the diode switches are provided
by push-pull drivers PP-l through IDP-40 which may he
of «the .general form illustrated in FIG. 7. This circuit
uses .two complementan/«type common emitter circuits
:connected in tandem.
»inputs to the push-pull drivers
come from the character counter 204 of FIG. 2A Áand are
signals. Wit-h each character are associated two diode 50 negative-going pulses- of from 0 to _l0 volts. Two out
switches: one for the x-deilections ofthe :dots in the char
puts `are Kavailable from each of these circuits at terminals
acter »and the other for the y-deflections. Let it be as
704 and 706 which are signals in push-pull. The first
surned that «the writing of ra selected character has just
output, appearing on Iterminal ’704, is a p0sitive~going 20
been finished. The character register, CT-6 through
volt pulse ygoin-g from _l0 to +10 volts. The other out
'CT~'1\1, receives an input X position code which sets it, 55 put, appearing on terminal 706, is a negative-going 20
¿for example, to the “B” position and the “B” output (see
volt pulse from +10 to -10 volts. AThese outputs are
block diagram, FIG. 2A and FIG. 1C) drives the asso
connected to the control terminals of the diode switches
ciated push-pull driver, of FIG. 2B, which .impresses con«
to “open” or “close” the switches.
trol signals at terminals 602fa11d'604 of each of ltwo diode
Having set forth specific details as to the means used
switches (one for Bx and the other for By), with polarity 60 and the general mode of operation of a preferred em
las shown in FIG. 6. This “closes” the diode switch, and
bodiment of this invention, a brief resume of the mode
the input signals consisting of minor 4deflections will ap
of `operation for »the display of a single character is now
pear at the output 608 with slight attenuation. As the
presented. In the preferred embodiment, a display order
dot counter starts its count, minor deiiection signals are
pulse of ‘l microsecond dura-tion `is ñurnished -to reset
received at input 606 of FIG. 6 :and appear at the output 65 counter triggers CT-G - CT-24 yand to drive a single-shot
608 which is connected to the appropriate terminal of
multivibrator SS-Z. Approximately 2 microseconds after
either the x or the y input of the oscilloscope. The minor
the display order has been provided, the character code
deflection signals, as has ‘been shown previously, =are pro
and the y fand x position codes are inserted in parallel,
portional -to the deilections of the dots las measured from
in the form Vof 1 microsecon-d pulses, to set the appropriate
the suhorigin ot the character. rllhe major deflections 70 unit of CT-6 ~ C1224. The set units of CT-IZ - CT-17
come from deflection resistor networks such las are shown
operate corresponding transistor switches TS-lp through
in FIG. 5 .and may be applied »at terminal 6N'. Having
Written the 4last -dot in B, the next dot counter pulse resets
the dot counter and places the equipment `in readiness to
.Ißcßívç _the next character code which may be T, for eX 75
TS-6p to drive a precision deflection resi-Stor network 206
to furnish the major deflection voltage for Y-aXis de
ilection, and similar procedures follow >for the X-axis de
flection. A l5 microsecond delay is furnished by the
single-shot multivibrator SS-Z which is utilized to permit
CT~6- CT-1»1 drive 4the Character Decoding Diode
Matrix to energize the chosen ‘one `oiî the 40t character
state and counted upwards to obtain a position format
like that of a typewriter. 'Ihe “typewriter mode” may
be practised with the above described embodiment of the
instant invention by reconnecting registers CT-IZ - CT-l7
and CT-'llS-CT-24 of FIG. 2A to form two counters
outputs, which -in turn drives the cor-responding push-pull
and applying suitably spaced pulse inputs to said counters.
`driver PP-l through PP-40 to operate the associa-ted X
and Y diode switch unit. Since, however, the Dot Count
Having set yforth the general nature of a preferred
embodiment of the instant invention and its modes of
operation, it is apparent that a number of advantages
over the prior art devices will be found in the practice of
this invention. In the Íirst place, this invention makes
possible a display having very superior deiinition which
uses circuits employing elements of simple and dependable
settling of the ldeflection system to the required character
suborigin position.
Simultaneously counter triggers
er made -up of CT-l -CT-S is reset to the zero stage,
no output will appear through the operated diode switches
at this time.
Upon the completion of the SS-Z delay, counter trigger
25 will be set to its “one” state, yopening Ia gate from the
blocking oscillator 217, and removing reset from the Dot
types. The circuit may use a standard cathode-ray tube
Binary Counter, composed of CT-1 - CT-S. This count 15 for display purposes and the system is adaptable to im
proved, or special-purpose tubes or other display devices
er :will be yadvanced through 20 states, except for the oc
as desired. The system is adaptable to the display of any
currence of the turn-off signal which, in most cases, will
desired set of characters by the simple expedient of pro
occur at some earlier state, which is that represented by
viding an appropriate set of dot deflection resistor net
the number of dots utilized in the display of the chosen
character, plus one. As the Dot Counter passes through 20 works. The invention is adaptable to miniaturization
each state, the corresponding power inverter Pil-1 through
PI-19 operates the .associated X land Y Transistor
techniques so that a very small and light display system
can be constructed, since no heavy components or com
Switches, each or“ which drives the corresponding resistor
ponents of iìxed size need be utilized.
The invention
provides a display having greater brilliance than is possible
of each of the Dot Deflection Resistor Networks. For
example, in position “l” of diode matrix 22€), PI-'l op 25 with any of the prior art devices, a display which is of
particular use where the ambient light is great or where
crates to drive ’l`S-~1X land TS-'ly which drive the first
projection is desirable. The invention is more ilexible
resistor in all 40 X and all 40‘ Y networks, respectively.
than the prior ait devices, since the shape, the size, or the
The signal appearing across the X network for the first
nature of a character may be modiñed by simply plugging
dot of the character “T,” for example, will then pass
through DS-TX if the latter has been iactivated by 204, 30 in different resistor cards associated with the minor deiiec
»and similarly `for the Y network, through DS--Ty to add
tion signals.
-a :minor ‘deflection voltage to the lpreviously established
maj or deflection vol-tage.
It will thus be seen that the objects set forth above,
shot multivibrator SS-l to furnish a l microsecond
settling delay for the dot circuitry, 'and »then will drive a
Blocking Oscillator unblank pulse generator, which causes
constructions set 'forth without departing from the scope
of the invention, it is intended that all matter conained
in the above description or shown in the accompanying
the dot to be displayed on the screen of the oscillomope
drawing shall be interpreted as `illustrative and not in a
among those made apparent from the preceding descrip
tion, are eñiciently attained. Since certain changes may
Simultaneously with this positioning yof the beam within
the character space, the clock signal will drive the single 35 be made in carrying out the above method and in the
ttube. A similar process 'occurs for each succeeding dot, 40 limiting sense.
Having described my invention, what I claim as new
until the required number of dots have been sequentially
and desire to secure by Letters Patent is:
placed to write lt-he chosen character.
1. In a display device including a cathode ray tube
When the Dot Decoding Matrix reaches the state lfol
having a deñection means, apparatus for generating sig
lowing that of the final ydot of the character, the output
of aan 'appropriate pulse inverter will `drive an “and” gate, 45 nals to deflect an electron beam to selected dot positions
for »forming a display of character, said apparatus corn
whose `other input has been armed by the chosen charac
prising a pair of potential dividing resistive networks each
ter, yas indicated by the output of the Character Decoding
coupled between a lirst reference potential and a second
Matrix. rllhe output of this “and” gate passes through
reference potential and each having a series connection
a multiple “or” gate to furnish a turn-oit signal which
passes through an inverter I~1 to reset CT--`25, whose 50 point, each of the potential dividing networks including
a iii-st resistor coupled between the ñrst reference potential
“zero” output then passes through the power driver PD-l
and the series connection point, each of the potential
to reset the Dot Counter, and thus end the character
dividing networks further including a plurality of ratio
resistors, a sequencing switching means for coupling the
It will be recognized that the instant invention may be
used in conjunction with other apparatus, such as high 55 ratio resistors in sequence between the second reference
potential and the series connection point, and another
speed photographic equipment, which may make perma
switching means for directly coupling the signals from
nent records of messages appearing on the face of the
the series connection points of both potential dividing net
tube for storage or projection. It case only direct visual
inspection of the display is desired, it will be possible, of
works to the cathode ray tube deiiection means.
2. In a display device including a cathode ray tube
course, by the use of existing devices such as recycled 60
having a deflection means, apparatus for generating sig
magnetic recordings to repeat a given message any de
nals to deflect an electron beam to selected dot positions
sired number of times until the image has been caused to
for forming a selected character, said apparatus compris
a plurality of potential dividing resistive networks
of observers.
arranged in pairs, each resistive network being coupled
It will be recognized also that the instant invention may 65 between a iirst reference potential and a second reference
operate in more than one mode. One of these, which has
potential and having a series connection point, each poten
been described in detail, may be called “position mode,”
tial dividing network including a tirst resistor coupled
persist long enough to be clearly registered by the eyes
in which each input code word will need to include both
between the iirst reference potential and the series con
character selection information and position address in 70 nection point, each potential dividing network further
formation. The second mode might be called a “type
including a plurality of ratio resistors, a first switching
writer mode” in which the character selection informa
means for sequentially coupling the ratio resistors be
tion only is furnished in each input code word, and the
tween t‘ne second reference potential and the series con
position address information is obtained from X and Y
nection point, and second switching means for directly
major deliection counters, which are started `from the 0, 0 75 coupling the signals from the series connection points of
a selected pair of the potential dividing networks to the
_cathode ray tube deflection means.
respectiveone of >the resistive networks directly to the
cathode ray tube deñectionrmeans.
3. Apparatus in accordance with claim 2 wherein the
ñrst switching means comprises a plurality of transistors
each coupled between the second reference potential and 5
'a respective one of the ratio resistors of a plurality of the '
resistive networks, and wherein the second switching
References Cited m the me of thls Patent
Ratzinger ____________ __ N0V_ 24’ 19 59
Triest ________________ __ Mal-_ 29, 1960
means comprises a plurality of diode switches each cou-
, 2,932,017
Prince ________________ __ Apr, 5, 1960
pled to selectively pass the deflection signals from a
Shanahan ____________ __ June 21, 1960
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