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Патент USA US3099795

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July 30, 1963
H. E. FORSHA ETAL
'
3,099,784_
FREQUENCY MULTIPLIER
Filed Dec. 51, 1959
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BY
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ATTORNEY
United States Patent Oihce
1
3,099,784
Patented July 30, 1963
2
Referring now to the drawing, there is illustrated a
3,099,784
FREQUENCY MULTIPLIER
Herbert E. Forsha, Sharon, and Sidney M. Kapell, Pros
frequency multiplying circuit 20 which embodies the teach
ings of this invention for converting alternating current
from a three-phase source of alternating current having
pect Park, Pa., assignors to Westinghouse Electric Cor
a ?rst predetermined frequency as indicated ‘at the input
poration, East Pittsburgh, Pa., a corporation of Penn
terminals 14, 16 and 18 to single-phase alternating cur
sylvania
rent having a frequency three times said ?rst frequency
Filed Dec. 31, 1959, Ser. No. 863,248
which is supplied to .a load circuit, which includes the
6 Claims. (Cl. 321-7)
load 100 at the output or load terminals 101 and 102. In
This invention relates to frequency multipliers for con 10 order to maintain the output voltage of the frequency
verting three-phase alternating current having a given or
multiplier 20 at the output or load terminals 101 and 102
at substantially‘ a predetermined value and the effective
predetermined frequency into single-phase alternating cur
rent having a frequency three times the input frequency
power factor of the load 100 substantially within a pre
determined operating range, the regulator system 30,
and particularly to electrical control apparatus, such as
regulator systems, for maintaining the output voltage of 15 which includes the saturable reactor or saturable induc
such multipliers at substantially a predetermined value.
In the application of certain types of electrical appa
tive device 60, the magnetic ampli?er 140 and the error
detecting circuit 40, is connected in circuit relation with
ratus, it is desirable to provide alternating current at a
the output or load terminals 101 and 102.
p
In particular, the frequency multiplier or tripler 20
frequency which is higher than that of‘ a conventional
electrical power system, which is usually 50 or ‘60 cycles. 20 includes the transformer 50 having three primary phase
windings 42A, 42B and 42C and three associated second
For example, the output of an ozone generator increases
with the frequency of the alternating current supplied
ary phase windings 44A, 44B and 44C, respectively, which
are disposed on the magnetic core structures 46A, 46B and
thereto. One well-known type of frequency multiplier
which has been employed in the past for converting three
46C, respectively, which may be combined in a common
phase alternating current of a predetermined frequency 25 structure in a particular application. The three primary
into single-phase alternating current having a frequency
phase windings 42A, 42B and 42C of the transformer 50
three times said predetermined frequency employs a trans
are connected in a star or Y arrangement with .a neutral
former having three primary phase windings which are
connection indicated at N1, to :be energized from the three
phase alternating current source terminals 14, 16 and ‘18,
rent and three secondary phase windings which are con 30 respectively, through the current limiting and buffer reac
tors 52 and 82, 54 land 84, and 56 and 86, respectively.
nected in series circuit relation with one another or in an
The three secondary phase windings 44A, ‘44B and 44C
open delta arrangement to a load circuit to provide single
phase alternating current of a frequency three times the
of the transformer 50 are connected in series circuit rela
Y connected to a source of three-phase alternating cur- -
frequency of the alternating current from said source.
tion with one aanother to provide a single-phase alter
The latter type of ‘frequency multiplier has been found 35 nating current output voltage at the load terminals 101
to have certain disadvantages with respect to e?iciency,
and 102, the series circuit which includes said three sec
ondary phase windings ‘being connected across the load
voltage ?uctuations, and power factor, particularly in
circuit which includes the load 100. The latter circuit
applications where the load is normally of a leading power
arrangement of the secondary phase windings 44A, 44B
factor type which may vary during operation, such as an
ozone generator. It is, therefore, desirable to provide an 40 and 440 may also be described as an open delta arrange
improved frequency multiplier of the type described hav
ing more desirable operating characteristics, particularly
with respect to ef?ciency, voltage ?uctuations and power
factor, especially where the load heing supplied is nor
ment with the open corner of the delta connection at the
phase alternating current of a predetermined frequency
source terminal or conductor 14.
load terminals 101 and 102 being connected to the load
circuit which includes the load 100.
The current limiting and buffer reactors 52 and 82, re
mally of a leading power factor type which may vary 45 spectively, are connected in series circuit relation with one
~ another and with the primary phase winding 42A of the
during operation.
It is an object of this invention to provide a new and
transformer 50, the series circuit being connected be—
improved static frequency multiplier for converting three
tween the neutral terminal or connection N1 and the
Similarly, the current
to single-phase alternating current of a frequency three 50 limiting and ‘buffer inductive reactors 54 and 84, respec
times said predetermined frequency.
tively, are connected in series circuit relation within one
Another object of this invention is to provide an im
another and with the primary phase Winding 4213 between
proved electrical control apparatus for varying the output
voltage of a static frequency multiplier which is adapted
tral connection N1 while the current limiting and buffer
three times the input frequency.
primary phase winding 420, the series circuit being con
the source phase conductor or terminal 16 and the neu
to convert threeep'hase alternating current of a given fre 55 inductive reactors, 56 and 86, respectively, are connected
quency to single-phase alternating current of a frequency ' in series circuit relation with one another and with the
A further object of this invention is to provide a new
nected between the source conductor or terminal 18 and
the neutral terminal or connection Nil.
stantially ‘a predetermined value the output voltage of a 60
The current limiting reactors 52, 54 ‘and 56 are pro
and improved regulator system ‘for maintaining at suh
frequency multiplier for converting three-phase alternating
1 vided to limit the in-rush current through the associated
current of a predetermined frequency to single-phase alter
nating current of a frequency three times said predeter
primary phase windings 42A, 42B and 42C, respectively,
‘when said primary phase windings are excited or ener
gized initially from the three-phase alternating current
mined (frequency.
Other objects of the invention will, in part, he obvious 65 source indicated at the terminals 14, 16 and 18, respec
tively, ‘and to permit across-the-line starting of the fre
and will, in part, appear hereinafter.
'
For a fuller understanding of the nature and objects of
quency multiplier 20 without the run-away action which
might otherwise result during the initial operating period
the invention, reference should he had to the following de
after said multiplier is energized. The current limiting
tailed description taken in connection with the accom
panying drawing, in which the single FIGURE diagram 70 inductive reactors 52, 54 and 56 must be provided where
~ the impedance or reactance of the alternating current
matically illustrates one embodiment of this invention.
a;
3,099,784
6
source at the input terminals 14, 16 and 18 is lower than
desired to limit the in-rush currents which ?ow through
the windings of the transformer within allowable safe
limits.
The buffer reactors 82, 84 and 86 are provided to effec
tively isolate the three primary phase windings 42A, 42B
and 42C of the transformer 50 from the three-phrase cir
cuit means 60. The buffer reactors 82, 84 and 86 opera
4
the input frequency is prevented by the associated in
ductive reactors 62, 64 and 66, respectively.
In order to at least partially compensate for the power
factor of the load 100 when said load is of a leading
power factor type, the ?xed inductive reactor 96, having
a tap connection 98 whose purpose will be explained here
inafter, is connected in parallel circuit relationship with
the load 100 between the terminals 101 and 102 across
the output of the series circuit which includes the three
tively control and limit the ?ow of harmonic currents
between the three-phase circuit means 60 and the pri 10 secondary phase windings 44A, 44B and 44C of the
mary phase windings 42A, 42B and v42C of the trans
transformer 50. In certain applications where the load
former 50.
100 is of a lagging power factor type, the ?xed inductive
In order to compensate for the low lagging power factor
reactor 96 may be replaced by a ?xed capacitive reactance
of the transformer 50 when considered as a load viewed
or capacitor to make the load 100 as viewed from the
from the source terminals 14, 16 and 18, respectively, the 15 three secondary phase windings 44A, 44B and 44C of the
three-phase circuit means 60 is provided. “In general, the
transformer 50 effectively appear to be of a leading
three-phase circuit means 60 is connected in circuit rela
power factor type.
tion ‘between the buffer reactors 82, 84 and 86 and the
In the operation of the frequency multiplier 20‘ the
‘associated primary phase windings 42A, 42B and 42C,
alternating current voltage at the source terminals 14, 16
respectively, of the transformer 50 and the source ter
and 18 is increased until the magnetic cores 46A, 46B
minals 14, 16 and {18, respectively, in a delta arrange
and 46C of the transformer 50 are operating at least at
ment. The three phases of the circuit means 60 include
times well above the knee of the saturation curve of each
the compensating capacitors 72, 74 and 76 which are each
of said magnetic cores, as disclosed in greater detail
connected in series circuit relation with the associated
in U.S. Patent 1,157,730, issued October 26, 1915,
inductive reactors '62, 64 and 66, respectively. The ?rst 25 to F. Spinelli and in the magazine article “Frequency
phase of the circuit means 60 which includes the inductive
Changing at Supply Frequencies by Static Means,” by F.
reactor 62 and the capacitor 72 connected in series cir
Brailsford, which appeared in the Journal of the Institute
cuit relationship is connected between the common ter
of- Electrical Engineers, volume 73, page 309, in 1933.
minal between the current limiting and buffer reactors 52
When the latter operating condition is present, the output
and 82, respectively, and the common terminal between 30 frequency of the frequency multiplier 20 which appears
the current limiting and buffer reactors 54 and 84, re
at the output of load terminals 101 and 102 across the
spectively. Similarly, the second phase of the circuit
means 60 which includes the inductive reactor 64 and
the capacitor 74 connected in series circuit relationship
secondary phase windings 44A, 44B and 44C of the trans
former 50 will be three times the frequency of the alter
nating current supplied at the source terminals 14, 16 and
is connected between the common terminal between cur 35 18. Because of the high magnetic ?ux densities at which
rent limiting and buffer reactors 54 and 84, respectively,
the magnetic cores 46A, 46B and 46C of the transformer
and the common terminal between the current limiting
50 are operated, the output voltage of the higher fre
and buffer reactors 56 and 86, respectively, while the
quency alternating current which appears at the output or
third phase of the circuit means 60 which includes the
load terminals 101 and 102 is subjected to wide ?uctua
inductive reactor ‘66 and the capacitor 76 connected in 40 tions in magnitude for small changes or increments in
series circuit relation is connected between the common
the magnitude of the alternating current voltage at the
terminal between the current limiting and buffer reactors
source terminals 14, 16 and 18.
56 and 86, respectively, and the common terminal be
As mentioned previously, the regulator system 30 is
tween the Icunrent limiting and buffer reactors 52 and 82,
provided in order to maintain at substantially a predeter
respectively.
45 mined value the output voltage of the frequency multiplier
20 which appears at the output or load terminals 101 and
capacitors 72, 74 and 76 of the circuit means 60 during
102 across the load circuit which includes the load 100.
In order to prevent overloading of the compensating
the operation of the frequency multiplier 20 when higher
harmonic frequencies, particularly the ?fth and seventh
In general, the regulator system 30 employs an error de
tecting circuit 40, which may be of any conventional type,
harmonic frequencies of the input frequency at the source 50 vfor comparing the output voltage of the frequency multi~
terminals 14, 16 and 18 result, the resonant frequency of
plier 20 at the terminals 101 and 102 with a ‘substantially
each phase of the circuit means 60 is arranged or selected
constant ‘potential or reference voltage to obtain an error
to be greater than the output frequency of the frequency
or diiference signal which is then ampli?ed by the mag
multiplier 20, which in this case is three times the input
netic ampli?er 140 and applied to the saturable reactor or
frequency of the alternating current from the three phase 55 saturable inductor device 60 which is effectively connected
source at the terminals 14, 16 and 18. Preferably, the
in parallel circuit relation with the load 100 to vary the
resonant frequency of the phase of the circuit means 60
effective impedance of said satura-ble reactor and to there
is selected to be slightly less than the ?fth harmonic of
by maintain the voltage across the load 100 at the termi
the input frequency of the alternating current at the
nals 101 and 102 at substantially a predetermined value.
source terminals 14, 16 and 18. For example, the series 60
In this instance, the error detecting circuit 40 comprises
resonant frequency of the capacitor 72 in combination
means for providing a substantially constant potential or
with its associated inductor reactor 62 is arranged to be.
reference voltage, more speci?cally, the constant potential
greater than the output frequency of the frequency multi
plier 20 or greater than three times the input frequency
device 130 and maens for obtaining a measure of the out
put voltage of the frequency multiplier 20 at the terminals
of the alternating current at the source terminals 14, 16 65 101 and 102, more speci?cally, the tap connection 98 on
and 18 in order that the impedance of each phase of the
the ?xed inductive reactor 96. The input terminals of the
circuit means 60 be higher at the higher frequency har
constant potential device 130 are connected to be respon
monies to thereby prevent the overloading of the capaci
sive to the source terminals 16 and 18, respectively, and
tors 72, 74 and 76 during the operation of the frequency
produces at its output terminals 63 and 65 a substantially
multiplier 20. The power factor compensation provided 70 constant alternating current potential irrespective of the
by the capacitors 72, 74 and 76 of the circuit means‘60,
magnitude of the voltage at the source terminals 16 and
therefore, need only be adequate to provide compensa
18 to which said device is connected. The substantially
tion at the fundamental frequency of the alternating cur
constant output potential of the constant potential device
rent at the terminals 14, 16 and 18 since the overloading
130 at the output terminals 63 and 65 is applied to the
of said capacitors by the higher harmonic frequencies of 75 input terminals of the full wave recti?er 110* to which
3,099,784
6
5
across the output terminals 101 and 102 in accordance
said output terminals are connected. The substantially
constant unidirectional or direct-current output voltage
with the output signal of the magnetic ampli?er 140 and,
in turn, with the output error or dijference signal from
at the output terminals of the full wave recti?er 110 is
the error detecting circuit 40 which varies with the out
then applied across the resistor 132 at the terminals 124
and 125 to which the output terminals of the full wave C1 put voltage of the magnetic ampli?er 20 at the terminals
recti?er 110 are connected.
101 and 102 in order to maintain the output voltage of
In order to obtain a meas
the frequency multiplier 20 at the terminals 101 and 102
ure of the output voltage of the frequency multiplier 20' at
the output terminals 101 and 102, the output terminal
‘at substantially a predetermined value.
'
In particular, the saturable reactor or saturable in
1M and the tap connection 98 of the ?xed inductive re
actor 96, which functions in this respect as an autotrans 10 ductor device 60 comprises the ?rst and second load
winding sections 92A and92B, respectively, and the asso
former, are connected across the input terminals of the
ciated ?rst and second control winding sections 94A and
full wave recti?er 120 which produces at its output termi
94B, respectively, which are inductively disposed on the
nals ‘a unidirectional or direct-current voltage which is
saturable magnetic cores 95A and 95B, respectively, as
responsive to or varies with the output voltage of the fre
quency multiplier 20 at the output terminals 101 and 102. 15 shown in the drawing. The ?rst and second load winding
sections 92A and 92B, respectively, are connected in par
The output voltage of the full wave recti?er 120 is applied
allel circuit relation with one another across the output
across the resistor 134 at the terminals 125 and 126 to
which the output terminals of the full wave recti?er 126*
are connected so that the voltage across the resistor 134
varies with the output voltage of the frequency multiplier
20 at the output terminals 101 and 102. The resistors 132
and 134 are connected as mixing resistors in series cir
cuit relation with one another between the terminals 124
and 126 with the unidirectional or direct-current voltages
across said resistors arranged to be opposing with respect 25
to one another to obtain an output error or difference
signal which is a measure of the deviation of the output
terminals 101 and 102 of the frequency multiplier 20
and also in parallel circuit relation with the load circuit
‘which includes‘ the load 100* while the ?rst and second
control winding sections 94A and 94B of the saturable
reactor 60 are connected in series circuit relation with
one another, the series circuit being connected across the
output terminals 142 and 144 of the magnetic ampli?er
140 to be responsive to the output signal of said mag
netic ‘ampli?er. The ?rst and second control winding sec
tions 94A and 94B, respectively, of the saturable reactor
voltage of the frequency multiplier 20 ‘at the terminals 101
60 are disposed on the associated saturable magnetic
and 1692 from substantially a predetermined regulated
value. The common terminal 125 ‘between the mixing
resistors 132 and 134 is connected to the negative output
terminal of each of the full Wave recti?ers 110V and 120'.
cores 95A and 95B so that the alternating current volt
ages induced in said control winding sections when cur
rent ?ows in the ‘associated load winding sections 92A
‘and 92B are substantially equal and opposing to prevent
any interference with the operation of the magnetic am
In the operation of the error detecting circuit 40, the
direct-current output voltage of the full wave recti?er 119
which appears across the mixing resistor 132 is, therefore,
a substantially constant potential or reference voltage
while the direct-current voltage at the output of the full
pli?er 140 whose output terminals 142 and 144 are con
nected across said control winding sections. The effective
reactance or impedance of the saturable reactor 60‘ which
is introduced in parallel circuit relation with the load 100
across the output terminals 101 and 102 varies with the
unidirectional or direct-current control signal which ap
current measure of the output voltage of the ‘frequency 40 pears at the output terminals 142 and 144 of the mag
wave recti?er 120 which appears across the resistor 134
and opposes the voltage across the resistor 132 is a direct
multiplier 21} at the terminals 101 and 102. The magni-v
tude and polarity of the output error or dilference signal
or voltage of the error detecting circuit 40‘ which appears
at the terminals 124 and 126 will depend upon whether
the output voltage of the frequency multiplier 20 at the 45
netic ampli?er 140 and which flows through the ?rst and
second control winding ‘sections 94A and 94B of the
terminals 1M and 102 is above or below substantially a
voltage of the ‘frequency multiplier 20 which appears at
saturable reactor 60.
The overall operation of the regulator system 30 will
now be considered. When the magnitude of the output
predetermined desired regulated value of output voltage.
the output terminals 101 and 102 increases to a value
It is to be understood that in certain applications the
above its regulated value, a corresponding change in the
comparing of the output voltage of the frequency multi
‘direct-current voltage across the resistor 134 of the error
plier 20 with a substantially constant potential or reference 50 detecting circuit 401 results which causes a corresponding
voltage may be accomplished magnetically by applying
change in the magnitude of the direct-current error signal
‘a reference potential to one of the windings of a magnetic
device, such as a magnetic ampli?er, while a measure of
or voltage which ‘appears at the output terminals 124 and
126 of the error ‘detecting circuit 40‘. The latter change
in the output signal of the error detecting circuit 401 is
in such a direction as to increase the output signal or
current of the magnetic ampli?er 140 which ‘appears at
the output terminals 142 and 144 and which is applied
to the ?rst ‘and second control windings 94A and 94B of
the saturable reactor 60 to thereby decrease the effective
60 reactance or impedance of the saturable reactor 60‘ and
the output voltage of the frequency multiplier 2G is ap
plied to a di?‘erent winding of the same magnetic device.
The magnetic ampli?er 140, which may be of the
push-pull type, is connected in circuit relation between
the error detecting circuit 40 and the saturable reactor
60 to be responsive to the output error or difference sig
nal from. the error detecting circuit 41} and to control
the operation of the saturable reactor 60 in accordance
with said error or difference signal. In particular, the
input of the magnetic ampli?er 140 is connected across
the output terminals 124 ‘and 126 of the error detecting
circuit 40 to produce at the output terminals 142 and 144
of the magnetic ampli?er 140 an ampli?ed signal which
is of the unidirectional or direct-current type and which
reduce the output voltage of the frequency multiplier 20
to its regulated value.
On the other hand, a decrease in the output voltage of
the frequency multiplier 20 which appears at the output
terminals 101 and 102 causes a corresponding change in
the voltage across the resistor 134 of the error detecting
circuit 40 and a corresponding change in the output error
varies with the output error or difference signal from the
signal or voltage of said error detecting circuit which
error detecting circuit 40v and, in turn, with the output
appears at the terminals 124 and 126. The latter change
voltage of the frequency multiplier 20‘ at the output ter 70 in the output error signal or voltage of the error detecting
minals 101 and 102.
circuit 40 which is applied to the input of the magnetic
In general, the saturable reactor 60 is connected in
ampli?er 140 causes a decrease in the output current or
circuit relation between the magnetic ampli?er 140? and
the output terminals 101 and 102. of the frequency multi
plier 20 to vary the effective impedance or reactance
signal of the magnetic ‘ampli?er 140 which appears at
, the output terminals 142 and 144 and which is applied
to the ?rst and second'eontrol windings 94A and 94B of
8,099,784
8
the saturable reactor 60 to thereby increase the effective
reactance or impedance of the sa-turable reactor ?ll and
the output voltage of the frequency multiplier 20 across
the loadltltl until the latter voltage reaches substantially
its regulated value.
ings Y connected to said source and three secondary
phase windings connected in series circuit relation with
one another to provide a single phase alternating current
output voltage thereacross ‘and adapted to be connected
to a load circuit, three-phase circuit means delta con
When the load 1081 is of a leading power factor type,
nected in phase-tophase circuit relation between said
the operation of the saturable reactor 60 because of the
primary windings and said source for compensating for
variation in the effective reactance or impedance of said
the power factor of said transformer, each phase of said
reactor with the output voltage of the frequency multi
circuit means comprising a capacitor and an inductive
plier 20 also cooperates with the ?xed inductive reactor 10 reactance connected in series circuit relationship with one
96 in addition compensating for the leading power factor
another, the resonant frequency of said circuit means
of the load 100 and in maintaining the effective power
being greater than three times and less than ?ve times
factor of the load 10!)» as viewed from the output of the
said predetermined frequency, reactance means connected
frequency multiplier 20 within substantially a predeter
in series circuit relation with each of the primary wind
mined operating range.
15 ings between the circuit means and the
windings,
It is to be understood ‘that in certain applications a
and saturable reactor means connected in parallel circuit
measure of the output voltage of the frequency multi
relation with the series circuit which includes said three
plier 20 may be obtained by the use of a conventional po
secondary windings, said reactor means including a con
tential transformer rather than by the use of a tap con
trol winding adapted to be responsive to a control signal
nection on the ?xed inductive reactor 96 as illustrated in 20 applied thereto for varying the voltage across said load
the drawing. It should also be understood that the mag
netic ampli?er 140 may be replaced in certain applica
tions by other types of conventional amplifying devices,
such as those of the electronic tube type or of the transis
tor type.
The apparatus embodying the teachings of this inven
tion have several advantages. For example, it has been
found that the e?iciency of a frequency multiplying cir
and the effective power factor of said load.
:3. A static frequency multiplier for converting alter
nating current of a predetermined frequency from a three
phase source to single phase alternating current of a
25 frequency three times said predetermined frequency com
prising a transformer having three primary phase wind
ings Y connected to said source ‘and three secondary
phase windings connected in series circuit relation with
cuit as disclosed is improved over conventional fre
one another to provide a single phase alternating cur
quency multipliers of the same general type while the 30 rent output voltage thereacross and adapted to be con
voltage ?uctuations at the output thereof are substan
nected to a load circuit, threephase circuit means delta
tially eliminated. In addition, it has been found that
connected in phase~to-phase circuit relation between said
the power factor of the overall frequency multipliers dis
primary windings and said source for compensating for
closed is considerably improved by the use of the different
the power factor of said transformer, the resonant fre
means described, particularly when the load connected 35 quency of said circuit means being greater than three
to the output of the frequency multiplier is of the leading
i'itunes said predetermined frequency, reactance means
power factor type.
connected in series circuit relation with each of said
Since numerous changes may be made in the above
primary windings between said circuit means and said
described apparatus and circuits and different embodi
primary windings for limiting the ?ow of harmonic cur
ments of the invention may be made without departing 40 rents between said circuit means and said primary ‘Wind
from the spirit and scope thereof, it is intended that all
ings, and saturable reactor means connected in parallel
the matter contained in the foregoing description or
circuit relation with the series circuit which includes said
three secondary windings, said reactor means including
as illustrative and not in a limiting sense.
a control winding adapted to be responsive to a control
45
We claim as our invention:
signal applied thereto for varying the voltage across said
1. -A static frequency multiplier ‘for converting alter
load :and the effective power factor of said load.
nating current having a predetermined frequency from
4. A regulator system for maintaining at substantially
a threedphase source to single phase alternating current
a predetermined value the output voltage of a static fre
having a frequency three
said predetermined fre
quency multiplier adapted to convert alternating current
quency comprising a transformer means having three pri 50 of a predetermined frequency from a three-phase source
mary phase windings connected in circuit relation with
to single phase alternating current of a frequency three
said source and three secondary phase windings connected
times said predetermined frequency comprising a trans
in series circuit relation with one another to provide a
former having three primary phase windings Y con
single phase alternating output current, inductive react-ance
nected to said source and three secondary windings con
means associated with and connected in series circuit
nected in series with one another and adapted to provide
relation with each of said primary windings between
a single phase alternating current output voltage to a
said source and said primary windings for limiting in
load
circuit connected thereacross, three-phase circuit
rush currents when said primary windings are energized
means delta connected in phase-toaphase circuit relation
from said source, three-phase circuit means for at least
between said primary windings and said source for com
partially compensating for the power factor of said trans 60
pensating
for the power factor of said transformer, the
former and reactance means, said circuit means being
resonant frequency of said circuit means being greater
delta connected in phase-toephase circuit relation be
than three times said predetermined frequency, reactance
tween said source and said
windings, the reso
means connected in series circuit relation with each pri
nant frequency of said circuit means being slightly less
mary winding between the circuit means and the primary
than the ?fth harmonic of said predetermined frequency,
windings, a saturable inductive device having a load
each phase of said circuit means comprising a capacitor
winding connected in parallel with said load circuit and
and an inductive reactance connected in series circuit
shown in the accompanying drawing shall be interpreted
relationship, and reactance means connected in series cir
cuit relation with each of the primary windings between
the circuit means and the primary windings.
2. A static frequency multiplier for converting alter
nating current of a predetermined frequency from a three
phase source to single phase alternating current of 1a fre
quency three times said predetermined frequency com
prising a transformer having three primary phase wind
a control winding, ?rst means connected to said source
for providing a substantially constant potential, second
70 means for comparing the output voltage of said multiplier
with said constant potential to obtain an error signal,
and amplifying means connected in circuit relation be
tween said second means and said control winding for
applying v‘a control signal thereto which varies with said
error signal to vary the effective impedance of said sat
3,099,784
10
ur-able device ‘and maintain the output voltage of said
multiplier at substantially said predetermined value.
5. A regulator system for maintaining at substantially
a predetermined value the output voltage of a static fre
quency multiplier adapted to convert alternating current
of a predetermined frequency from a three-phase source
to single phase alternating ‘current of a frequency three
times said predetermined frequency comprising a trans
former having three primary phase windings Y con
nected in series with one another ‘and adapted to provide
a single phase alternating current output voltage to a load
circuit connected thereacross, three-phase circuit means
delta ‘connected in phase-to-phase circuit relation be
tween said primary windings and said source for com
pensating for the power factor of said transformer, the
resonant frequency of said circuit means being greater
than three times said predetermined frequency, inductive
reactance means connected in series circuit ‘relation with
nected to said source and three secondary windings con 10 each of said primary windings between said circuit means
and said primary windings ‘for limiting the ?ow of har
nected in series with one another [and adapted to provide
monic currents between said circuit means and said pri
a single phase alternating current output voltage to a
mary windings, a saturable inductive device having a
load circuit connected thereacross, three-phase circuit
means delta connected in phase-to-phase circuit relation
between said primary windings and said source for com
load winding connected in parallel with said load circuit
pensating for the power factor of said transformer, each
phase of said circuit means comprising a capacitor and
source for providing a substantially constant potential,
second means for comparing the output voltage of said
an inductive reactance connected in series circuit rela
multiplier with said constant potential to obtain an error
tionship with one another, the resonant frequency of
said circuit means being greater than three times said
predetermined frequency, reactance means connected in
series circuit relation with each primary Winding between
the circuit means and the primary windings, a saturable
inductive device having a load winding connected in par
allel with said load circuit and a control winding, first 25
signal, ‘and amplifying means connected in circuit rela
tion between said second means and said control winding
means connected to said source for providing a substan
tially constant potential, second means for comparing
the output voltage of said multiplier with said constant
potential to obtain an error signal, and amplifying means
connected in circuit relation between said second mean-s 30
and said control winding for applying a control signal
thereto which varies with said error signal to vary the
effective impedance of said saturarble device and main
tain the output voltage of said multiplier substantially at
said predetermined value.
6. A regulator system for maintaining ‘at substantially
a predetermined value the output voltage of a static f-re~
quency multiplier adapted to convert alternating current
of a predetermined frequency from a three-phase source
to single phase alternating current of a frequency three 40
times said predetermined frequency comprising a trans
former having three primary phase windings Y con
nected to said source and three secondary windings con
and a control winding, ?rst means ‘connected to said
vfor applying a control signal thereto which varies with
said error signal to vary the effective impedance of said
satura-ble device and maintain the output voltage of said
multiplier substantially at said predetermined value.
References titted in the ?le of this patent
UNITED STATES PATENTS
1,157,730
1,991,063
2,166,827
2,380,522
2,451,189
2,517,396
Spinelli _____________ __ Oct. 26-, 1915
Rudenberg ___________ __ Feb. 12, 19:35
2,682,635
Henrich ____________ __ June 29, 1954
2,693,540
2,820,942
2,824,274
2,978,629
Huge ________________ __ Nov. 2,
Depenbrock _________ __ Jan. 21,
Holt ________________ __ Feb. 18,
Siedband ___________ __ Apr. 14,
Stacy _______________ __ July 18, 1939
Hang _______________ __ July 21, 1945
Alexanderson et a1 _____ __ Oct. 12, 1948
Logan _______________ __ Aug. 1, 1950
1954
1958
1958
1961
FOREIGN PATENTS
588,651
France _____________ __ Mar. 22, 1922
470,351
1,015,126
Great Britain _________ __ Aug. 13, 1937
Germany ____________ __ Sept. 5, 1957
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