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Electronically tunable solid-state microwave integrated circuit amplifiers

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Electronically Tunable
Solid State
Microwave Integrated Circuit Amplifiers
by
Jeffrey H. S insky
A dissertation submitted to The Johns Hopkins University
in conformity with the requirements for the degree of
Doctor o f Philosophy
Baltimore, Maryland
1997
© Copyright by Jeffrey H. S insky
All rights reserved
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
UMI Number: 9730790
Copyright 1997 by
Sinsky, Jeffrey Harold
All rights reserved.
UMI Microform 9730790
Copyright 1997, by UMI Company. All rights reserved.
This microform edition is protected against unauthorized
copying under Title 17, United States Code.
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Abstract
The standard approach for designing a
microwave amplifier requires
accurate device measurements and accurate characterization of matching network
performance. Since the wavelength of operation is comparable to the size of the
circuit, microwave device measurements often contain inaccuracies. Furthermore,
device measurements are frequently provided by a manufacturer on a sample
basis, and thus individual devices may have parameters that vary significantly
from the mean. The result is less than optimal performance. To remedy these
problems, a new approach to designing microwave amplifiers has been developed
that relies on electronically tunable matching networks rather than accurate device
characterization.
Tunable
matching
network
topologies
are
presented
and
design
considerations are discussed. The mathematics required to determine the optimum
range of values for matching network components given a domain of loads is
developed for three element ladder networks and cascaded transmission line
networks. Additionally, a technique for designing tunable broad band matching
networks using active circuit elements is discussed.
Methods for designing widely tunable microwave circuit elements
utilizing varactor diodes and monolithic microwave integrated circuits (MMICs)
ii
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are presented. Using varactor diodes, a new approach to designing electronically
tunable transmission lines is presented. The development of a microwave current
conveyor using MMIC technology is also presented. The use of MMIC current
conveyors provide a means for designing numerous types of electronically tunable
circuit elements. Simulations show the feasibility of designing widely tunable
positive and negative capacitors, positive and negative inductors, gyrators, and
impedance transformers at microwave frequencies.
Finally, closed loop control of a 2.25 GHz electronically tunable
microwave impedance transformer is demonstrated. Results show low insertion
loss and real-time computer controlled variable impedance matching.
Detailed
measurements of tuning range, insertion loss, and frequency response are
presented.
iii
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To my wife, Joanne
iv
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A cknow ledgm ents
I would like to thank my research advisor Dr. Charles Westgate for his
valuable support and guidance during the course of my graduate studies.
Additionally, I would like to thank my second reader Dr. Richard Joseph for his
thorough review of my dissertation.
A large measure of gratitude goes to my group supervisor at The Johns
Hopkins Applied Physics Laboratory, Dr. Marion Edwards, for his very thorough
technical review of my dissertation and his support and understanding regarding
my continuing education while under his employ.
I am also grateful for the
support and tolerance of my co-workers at APL, and for consultations from Sheng
Cheng, Craig Moore, and John Penn regarding MMIC design and test.
I would like to thank The Johns Hopkins Applied Physics Laboratory for
allowing me to fulfill my residency requirement on the Hafstad fellowship.
Without this opportunity , this research would not have been possible.
I am
grateful to the TriQuint Semiconductor Corporation for providing me with
foundry support for my MMIC designs.
I am also grateful for the use of the
resources at The Johns Hopkins University Whiting School of Engineering at the
Dorsey Center.
Finally, I thank my parents for instilling me with the desire to learn. I
thank my wife, Joanne and my children, Eric and Leanne, for doing without me on
many weekends and, most importantly, for their support, understanding, and
encouragement during the course of this research. Without them as well as those
mentioned above, this work would not have been possible.
v
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Table
of
C ontents
LIST OF TABLES
XI
LIST OF ILLUSTRATIONS
XII
1.0 INTRODUCTION
1
2.0 REVIEW OF SOLID STATE MICROWAVE AMPLIFIER DESIGN
6
2.1 Introduction
6
2.2 The Microwave Amplifier Circuit Topology
8
2.3 S-Parameter Representation of Networks
10
2.3.1 The Generalized Scattering Matrix
11
2.3.2 Renormalization of the Generalized S-Parameter Matrix
14
2.4 Providing the Amplifying Device with Optimal Terminations
16
2.4.1 High Gain Amplifier Design
17
2.4.2 Low Noise Amplifier Design
21
2.4.3 High Power Amplifier Design
22
2.5 Matching Network Design
2.5.1
23
Matching Network Circuit Elements
25
2.5.1.1 Lumped Circuit Element Transformation Properties
27
2.5.1.2 Distributed Circuit Elements
30
vi
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2.5.2 Narrow Band Matching
33
2.5.3 Broad Band Matching
34
2.6 The Effects of Measurement Error on Matching Circuit Performance
3.0 TUNABLE IMPEDANCE MATCHING TOPOLOGIES
3.1 Introduction
35
39
39
3.1.1 The Traditional Impedance Matching Network and Its Limitations
42
3.1.2 The Tunable Matching Network Concept and Design Considerations
46
3.1.3 Overview of New Techniques for Realizing Tunable Maps
48
3.2 Tunable Ladder Network Synthesis and Realization
52
3.2.1 Review o f Lumped Element Impedance Transformations
54
3.2.2 Intersections o f Constant Conductance and Resistance Circles
55
3.2.3 Determination of Values for the C-L-C n network
60
3.2.4 Determination o f Values for the Resonator K network
63
3.2.5 Determining Optimum Ranges o f Component Values from a Domain of
Load Impedances
66
3.3 Tunable Cascaded Transmission Line Network Synthesis
72
3.4 Tunable Impedance Matching Using Broadband Reactance and Susceptance
Cancellation
77
vii
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4.0 THE DESIGN OF MICROWAVE ELECTRONICALLY TUNABLE
CIRCUIT ELEMENTS
83
4.1 The Design of Electronically Tunable Circuit Elements using Varactor Diodes
84
4.1.1 Varactor Diode Modeling and Characteristics
85
4.1.2 V aractor T uned Resonators
89
4.1.3 A New Approach to Designing Electronically Tunable Transmission Line Using
Varactors
94
4 .1 .3 .1 The Traditional Transmission Line
94
4.1.3.2 A Lumped Element Equivalent Transmission Line
95
4.1.3.3 The Electronically Tunable Transmission Line Circuit
96
4.2 The Design of Electronically Tunable Circuit Elements using Microwave Current
Conveyors
99
4.2.1 Introduction to the Current Conveyor Concept
99
4.2.2 A Review of Nullator-Norator Circuit Analysis and its Application to Current Conveyor
Design
101
4.2.3 A New Approach to Designing
M icrowave Current Conveyors
105
4.2.4 Design and Analysis o f MMIC
Tunable Positive Inductors and Capacitors
109
4.2.4.1 MMIC Tunable Positive Inductor
110
4.2.4.2 MMIC Tunable Positive Capacitor
113
4.2.5 Design and Analysis o f MMIC
Tunable Gyrators and Transformers
116
4.2.6 Design and Analysis of MMIC
Tunable Negative Inductors and Capacitors
121
4.2.6.1 Negative Capacitor Analysis, Design, Layout, and Simulated Performance
122
4.2.6.2 Negative Inductor Analysis, Design, Layout, and Simulated Performance
127
viii
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5.0 CLOSED LOOP CONTROL EXPERIMENT
131
5.1 Introduction
131
5.2 Design, Analysis, and Measured Performance of a Computer Controlled Electronically
Tunable Microwave Impedance Transformer
132
5.2.1 Component Selection
133
5.2.2 Linear Circuit Simulation and Predicted Performance
136
5.2.3 Large Signal Non-Linear Circuit Simulation and Predicted Performance
139
5.2.4 Circuit Fabrication
148
5.2.5 Microwave Measurement Technique
152
5.2.6 Closed Loop Feedback Control and Optimization o f Hardware Performance
156
5.2.7 Measured Data
158
5.2.8 Nonlinear Measurements
165
6.0 CONCLUSION
167
APPENDIX A • STABILITY OF SINGLE DEVICE AND
MULTI-DEVICE NETWORKS
172
APPENDIX B - DERIVATION OF CONDITION FOR d*>0
IN A TUNABLE C-L-C LADDER NETWORK
181
APPENDIX C - COMPUTING OPTIMUM COMPONENT
VALUES FOR A TUNABLE C-L-C NETWORK
185
ix
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APPENDIX D - DERIVATION OF 3-PORT H-PARAMETERS
FROM 2 AND 3 PORT Y AND Z PARAMETERS
192
BIBLIOGRAPHY
200
VITA
211
x
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L is t
of
Table 2-1.
Tables
Matching Network Component Values and Errors
38
Table 3-1. Tunable Network Synthesis Procedure
52
Table 3-2. Example Required Range for C-L-C values for | FLI^0.9
71
Table 5-1.
Parameter Values for Electronically Tunable Impedance
Transformer Design
134
Table 5-2. MA46473 Varactor Diode Performance Characteristics
135
Table 5-3. Rogers TMM10I Microwave Substrate Properties
149
xi
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L is t
o f I l l u s t r a t io n s
Figure 2-1.
Microwave Amplifier Block Diagram
Figure 2-2.
The Scattering Parameter Concept
11
Figure 2-3.
The Generalized S-Parameters of an n-Port Network
13
Figure 2-4.
Properties of the Smith Chart
8
28
Figure 2-5.
Inductor and Capacitor Reflection Coefficient Transformations
29
Figure 2-6.
Transmission Line Concept
31
Figure 2-7.
Transmission Line Reflection Coefficient Transformation
32
Figure 2-8.
HFET Output Matching Circuit
36
Figure 2-9.
HFET Impedance Match Before and After Introduction of
Component Errors
38
Figure 3-1.
Schematic Representation of an Impedance Matching Network
40
Figure 3-2.
Impedance Matching in Terms of Complex Mappings
41
Figure 3-3.
Narrow Band Impedance Match
43
Figure 3-4.
Wide Band Match
43
Figure 3-5.
Matching Error Due to Domain Inaccuracies
44
Figure 3-6.
Matching Error Due to Map Inaccuracy
45
Figure 3-7.
Matching Error Due to Parameter Inaccuracy
46
Figure 3-8.
Matching Error Due to Range Inaccuracy
46
Figure 3-9.
Correcting Matching Errors with The Tunable Map
47
Figure 3-10.
Lumped Element Impedance Matching in the Reflection
Coefficient Plane
54
Figure 3-11.
Intersection of Constant Admittance and Resistance Circles
57
Figure 3-12.
C-L-C re Network
60
Figure 3-13.
The Matching Process for a C-L-C Jt Network
61
xii
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Figure 3-14.
Resonator k Network
63
Figure 3-15.
The Matching Process for a Resonator rc Network
64
Figure 3-16.
Values for Ci for CLC Matching Example
70
Figure 3-17.
Values for Li for CLC Matching Example
70
Figure 3-18.
Values for Cj for CLC Matching Example
71
Figure 3-19.
Electronically Tunable Distributed Matching Network Topology
73
Figure 3-20.
Matching a Domain of Impedances with an Electronically Tunable
Distributed Matching Network
Figure 3-21.
74
Required Electronically Tunable Quarter-Wave Transformer Tuning
Range for Impedance Matching Domains
76
Figure 3-22.
Novel Broadband Active Matching Circuit Topology
77
Figure 3-23.
Negative Capacitor and Inductor Characteristics
80
Figure 3-24.
Decreasing the Q of an R-C Load Using a Negative Capacitor
81
Figure 3-25.
Decreasing the Q of an R-L Load Using a Negative Inductor
82
Figure 4-1.
Microwave Varactor Diode Model
85
Figure 4-2.
Electronically Tunable Resonators that Use Varactor Diodes
93
Figure 4-3.
Microwave Transmission Line Representation
94
Figure 4-4.
Lumped Element Transmission Line Approximation
95
Figure 4-5.
Electronically Tunable Transmission Line Topology
98
Figure 4-6.
Comparison of a CCD- and an Ideal Field Effect Transistor
101
Figure 4-7.
Norator and Nullator Schematic Representations
104
Figure 4-8.
Nullor Schematic Representation
104
Figure 4-9.
Nullator-Norator Representation of a CCII-
105
Figure 4-10.
Equivalent Circuit For Common Source Cascaded MESFETs
107
Figure 4-11.
Microwave Current Conveyor Layout
109
Figure 4-12.
Electronically Tunable Inductor Circuit
110
Figure 4-13.
Active MMIC Tunable Inductor: Inductance Values
112
Figure 4-14.
Active MMIC Tunable Inductor: Q Values
112
xiii
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Figure 4-15.
Electronically Tunable Capacitor Circuit
113
Figure 4-16.
Active MMIC Tunable Capacitor: Capacitance Values
114
Figure 4-17.
Active MMIC Tunable Capacitor: Q Values
115
Figure 4-18.
Schematics and Properties of Gyrators and Transformers
116
Figure 4-19.
Norator-Nullator Immittance Converter/Inverter Topology
Applicable to Current Conveyor Implementation
Figure 4-20.
Current Conveyor Implementation of an Electronically Tunable
Gyrator
Figure 4-21.
119
Current Conveyor Implementation of an Electronically Tunable
Transformer
Figure 4-22.
117
120
Gyrator Insertion Loss In a Mixed Impedance System for a Range of
Impedance Transformations
121
Figure 4-23.
Negative Capacitor Network
122
Figure 4-24.
Microwave Negative Capacitor Schematic
124
Figure 4-25.
Microwave Negative Capacitor Layout
125
Figure 4-26.
MMIC Tunable Negative Capacitor - Capacitance Values
126
Figure 4-27.
MMIC Tunable Negative Capacitor: Q Values
126
Figure 4-28.
Negative Inductor Network
127
Figure 4-29.
Microwave Negative Inductor Schematic
128
Figure 4-30.
Microwave Negative Inductor Layout
129
Figure 4-31.
MMIC Tunable Negative Inductor - Inductance Values
130
Figure 4-32.
MMIC Tunable Negative Inductor: Q Values
130
Figure 5-1.
Varactor Diode Selection
134
Figure 5-2.
Electronically Tunable Impedance Transformer in a Mixed
Characteristic Impedance System
Figure 5-3.
137
Simulated Performance of an Electronically Tunable Impedance
Transformer in a Mixed Characteristic Impedance System
xiv
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138
Figure 5-4.
Electronically Tunable Impedance Transformer Large Signal
Performance Simulation -12.5£2 to 5012 Transformation
Figure 5-5.
Comparison of Series Expansion and Nonlinear Model for the
MA46473 Varactor Diode
Figure 5-6.
142
12.5 to 50 Ohm Transformer Harmonics: 0 dBm
2.25 GHz 12.512 source
Figure 5-7.
143
12.5 to 50 Ohm Transformer Harmonics: +10 dBm
2.25 GHz 12.5 £2 source
Figure 5-8.
144
12.5 to 50 Ohm Transformer Harmonics: +20 dBm
2.25 GHz 12.5 £2 source
Figure 5-9.
145
12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages:
0 dBm 2.25 GHz 12.5 £2 source
Figure 5-10.
146
12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages:
+15 dBm 2.25 GHz 12.5 £2 source
Figure 5-11.
139
147
12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages:
+20 dBm 2.25 GHz 12.5 £2 source
148
Figure 5-12.
Electronically Tunable Impedance Transformer Schematic
150
Figure 5-13.
Electronically Tunable Impedance Transformer Layout
151
Figure 5-14.
Example of Biasing Scheme for Use with a GaAs FET
152
Figure 5-15.
TRL Calibration Kit Mechanical Drawings
155
Figure 5-16.
Electronically Tunable Impedance Transformer Close Loop
Feedback Control Test Setup
Figure 5-17.
Measured Insertion Loss of an Electronically Tunable Microwave
Impedance Transformer - Low Impedances
Figure 5-18.
159
Measured Insertion Loss of an Electronically Tunable Microwave
Impedance Transformer - High Impedances
Figure 5-19.
157
160
Measured 50 £2 to 8 £2 Impedance Transformation Optimized
at 2.15,2.25 and 2.49 GHz
161
XV
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Figure 5-20.
Measured 50 £2 to 162 £2 Impedance Transformation Optimized
at 2.16,2.25 and 2.58 GHz
Figure 5-21.
162
Measured 50 £2 to 392 £2 Impedance Transformation Optimized
at 2.16,2.25 and 2.35 GHz
Figure 5-22.
163
Measured Minimum Insertion Loss and Corresponding Return Loss
of the Computer Controlled Electronically Tunable Microwave
Impedance Transformer at 2.25 GHz
Figure 5-23.
164
Measured Varactor Voltages and Insertion Phase of the Computer
Controlled Electronically Tunable Microwave Impedance
Transformer at 2.25 GHz
165
Figure A-l.
Oscillator Composed of a Negative Inductor and Negative Capacitor
176
Figure A-2.
Real Implementation of a Negative Inductor, Capacitor Oscillator
180
Figure D-l.
Current Conveyor Port Assignments
193
xvi
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1
CHAPTER 1
INTRODUCTION
The current approach for designing and fabricating microwave solid state
amplifiers requires characterization of active components, synthesis o f matching
networks via computer aided design (CAD), realization through fabrication in a
foundry (for MMIC) or hybrid assembly (for MIC), and remanufacturing or
mechanical tuning to optimize performance. Since the last step is costly and time
consuming, there is currently emphasis on highly accurate device characterization
and circuit modeling.
Unfortunately, devising accurate device models at
microwave frequencies can be difficult, especially when trying to account for
nonlinear phenomena [1], [2],
As a result, despite all the modeling work,
mechanical tuning and refabrication seem to be inevitable when carrying out a
microwave amplifier design.
The following research develops an entirely different amplifier design
methodology which will alleviate the need for mechanical tuning, reduce the
requirement for accurate device characterization and CAD, and substantially
reduce the need for remanufacturing (see Figure I). Instead of trying to determine
precise nonlinear device models, the invention of electronically tunable matching
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Introduction
2
networks that allow for the transformation of a domain of impedances to the
required system impedance has been devised. As a result, less accurate device
models and less stringent requirements on the knowledge of matching network
impedances will be required. As an added benefit, additional design capabilities
such as real time adaptation to environmental and drive signal changes and
instantaneous frequency band shifting are possible. These real time capabilities
can be controlled via analog control techniques or via digital means.
output
input
Electronically
Tunable Microwave
Matching Network
Electronically
Tunable Microwave
Matching Network
Digital/Analog
Control Module
i and v denote
DC control voltages
Feedback and Open Loop Control
(Temperature, Drive Level, User Input)
Figure !•!. Block Diagram of Electronically Tunable Microwave Amplifier
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Introduction
3
Although several electronically tunable amplifiers have been designed at
UHF and VHF frequencies [3], [4], those have used approaches that either utilize
broadband amplifiers combined with tunable filters, amplifiers that are tunable
only in discrete steps, or negative resistance diode type amplifiers.
The
techniques described here allow for continuous tuning and involve the design of
electronically
tunable
matching
networks
suitable
for
matching
metal
semiconductor field effect transistors (MESFETs), pseudomorphic high electron
mobility transistors (PHEMTs), or heterojunction bipolar transistors (HBTs), or
any other type of two-port amplifying device. The matching networks developed
here provide variable impedance transformation and reactive tuning, thus allowing
for new capabilities that take advantage of analog and digital feedback. These
techniques are applicable to miniature microwave amplifiers (both MIC and
MMIC), and solid state power amplifiers, and promise widespread use in the
microwave community.
The development of this novel approach to microwave amplifier designed
will be addressed by considering several fundamental issues: 1) determining the
required matching network topologies; 2) designing widely continously variable
microwave tuning elements; 3) demonstrating the ability to carry out closed loop
feedback control of an electronically tunable matching network using a new
approach to designing electronically tunable microwave impedance transformers.
This dissertation is organized as follows.
Chapter 2 provides an
introduction to microwave amplifier design. The basic topology of a microwave
amplifier is introduced. Then, the concept of S-Parameters is discussed and its
application to microwave amplifier design explained. Standard techniques for
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Introduction
4
designing high gain, low noise, and power amplifiers are outlined. Methods for
determining the required source and load impedances for these three types of
amplifiers are explained. The concept of narrow band and broad band matching
network design are briefly reviewed. Finally, the effects of measurement error on
standard matching network design are illustrated by example.
In Chapter 3, an analytic technique is presented for determining how to
develop tunable matching networks that can transform a domain of load
impedances to a specified system impedance. The theory presented addresses the
problem of determining the required range of component values necessary to carry
out this transformation. Furthermore, it addresses techniques for optimizing the
required range of circuit elements required for matching a domain of loads with
different matching network topologies. A new technique for designing wideband
tunable microwave matching networks is developed using the notion of negative
capacitors and inductors. This technique uses the concept of broadband reactance
cancellation to allow for wideband matching of MMIC circuits. This approach is a
significant departure from the traditional Fano-Bode bandwidth driven passive
matching network design approach commonly used in microwave designs.
In Chapter 4, several techniques are presented for designing widely tunable
variable reactances in MMIC and in MIC.
An innovative microwave current
conveyor is presented, and its application to the development of electronically
tunable
positive
and negative capacitors
and
inductors, and
impedance
transformers is explained.
An experimental electronically tunable microwave impedance transformer
has been built and tested to demonstrate the ability to instrument real time
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Introduction
5
feedback control of an electronically tunable matching network and is discussed in
Chapter 5.
Through computer control, this circuit can be told to match one
impedance to another. The computer reads in data about the quality of the match,
and generates new voltages to control the matching network in a closed loop
fashion using a Simplex optimization algorithm. Experimental data is presented
as well as harmonic balance simulations of expected large signal performance of
the network for medium power amplifier design applications.
Finally, Chapter 6 summarizes the results of the dissertation while
discussing conclusions and suggesting possible future work in this field.
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6
CHAPTER 2
R e v ie w
of
S o l id S t a t e M ic r o w a v e A m p l if ie r
D e s ig n
2.1
Introduction
The microwave amplifier is a one or two-port circuit capable of providing
amplification of a signal in the 1-100 cm wavelength regime.
Unlike low
frequency amplifier design, microwave amplifier design must take into account
the significant parasitic elements that exist in the amplifying device and
packaging. As a result, available power, voltage, and current gains are limited,
and lossless impedance matching techniques must be used.
Additionally, the
amplifier’s frequency of operation has a wavelength comparable to the dimensions
of the circuit, resulting in the need for distributed circuit models.
Making measurements of microwave devices can present some interesting
challenges. At microwave frequencies, it is impossible to put an open circuit or a
short circuit at the input or output of a circuit in order to obtain the commonly
used small signal Z-Parameters or Y-Parameters of a device. This is because the
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Review o f Solid State Microwave Amplifier Design
7
wire used to form a short circuit will have a length comparable to the wavelength
of the frequency of measurement, and can look like an open circuit, a short circuit,
or any of a number of impedances as dictated by transmission line theory.
Similarly, an open circuit will look capacitive and in many cases act as a radiating
resistance behaving like a small antenna.
As a result, microwave network
measurements are usually made into a specified fixed real impedance that can be
realized using a transmission line and a fixed termination. Two common values
are 75 Q. and 50 Q. Such terminations can be made very accurate at high
frequencies and are used to measure scattering parameters commonly called Sparameters. The properties of these parameters will be discussed shortly.
Microwave nonlinear measurements are even more difficult to make.
Since a nonlinear device must be presented with the load and source impedances
it will see during operation, nonlinear performance can not be derived from small
signal S-parameters.
It can be very difficult to measure the exact impedances
presented to a device under test when they are required to be complex.
A
measurement of the presented loads must be made at a precisely determined set of
reference planes. Incorrect determination o f these reference planes can result in
significant measurement error.
Microwave power amplification devices are
frequently measured using a load pull system. This is a specially designed system
that presents different loads and sources to a nonlinear device to see how it
performs.
Calibrated measurements of the loads and sources are made to
determine the required device matching under different operating conditions. This
is a very time consuming and difficult process.
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Review o f Solid State Microwave Amplifier Design
2.2
8
The Microwave Amplifier Circuit Topology
The most commonly used type o f microwave amplifier is the two-port, and
thus what follows will focus on this type of amplifier. The two-port microwave
amplifier can be broken up into several specific elements as illustrated in Figure
2-1. There are two bias tees (for the input and output), two matching circuits (for
the input and output), and an amplifying device which provides gain at microwave
frequencies, a signal source, and a load.
Input
DC
Bias
Input
Bias
Tee
Input
Matching
Network
Output
Matching
Network
Amplifying
Device
Power
Source
Output
Bias
Tee
Output
DC
Bias
Figure 2-1. Microwave Amplifier Block Diagram
The bias tees are designed to provide a DC path to deliver current to the
active device without disrupting the performance of the amplifier in the frequency
band of interest. There are numerous techniques for designing bias tees that are
explained in many texts [5], [6]. Since a bias tee is designed to appear as an
extremely high impedance in the frequency band of interest, small variations in
measured versus predicted performance usually have insignificant effects on the
overall circuit performance.
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Review o f Solid State Microwave Am plifier Design
9
On the other hand, the matching networks are designed to provide a
specified type of amplifier performance in the frequency band of interest. The
most popular types of performance goals are high gain, low noise, or high power.
Depending on which type of performance is desired, the matching networks will
be designed differently.
To provide maximum gain, minimum noise, or
maximum power over a specified frequency range, one of the most fundamental
problems of microwave amplifier design is optimizing these matching networks
for the problems at hand. The reason that this is a formidable task is that good
performance depends on the knowledge of what source and load impedances the
active device requires, and what source and load impedance the matching network
will present to the device. This requires accurate measurement of the device and
of the matching networks over the same operating conditions that the amplifier
experiences. Since the size of the amplifier is comparable to the wavelength at
the frequencies of interest, small inaccuracies in test setups may yield large errors
in device measurements.
Similarly, inaccuracies in microwave circuit element
models used for CAD design of matching networks will yield errors in predicting
matching network performance. As a result, accurate measurement and modeling
of high frequency devices has become a significant area of research.
The active device used for gain in the microwave power amplifier may be
any of a number of different structures including Gallium Arsenide Field Effect
Transistors (GaAs FETs), Phsedomorphic High Electron Mobility Transistors
(PHEMTs), Heterostructure Field Effect Transistors (HFETs), and Heterojunction
Bipolar Transistors (HBTs). Each o f these devices has been engineered with a
particular type of performance in mind: low noise, high gain, or high power over
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Review o f Solid State Microwave Amplifier Design
10
a specified frequency range. Due to the physics of the device, it can not just be
terminated with an arbitrary load or source impedance and demonstrate the
performance for which it was designed. It must be presented with a specific
impedance at each frequency to perform as desired.
To determine what
impedance the device must see, it may be modeled using the physical properties of
the semiconductor structure (i.e. the dimensions and materials in the junction of
the device). More commonly, it must be measured with various different loads to
determine which will yield optimal performance.
2.3 S-Parameter Representation of Networks
The scattering parameter plays a very important role in the design of
microwave circuits.
As discussed earlier, it is impractical to measure Z-
Parameters or Y-Parameters on high frequency networks. Unlike Y-Parameters
and Z-Parameters, the S-Parameter is based on the concept of traveling waves. As
is well known, Y and Z parameters are derived from looking at a ratio o f nodal
voltages and currents. In contrast, the S-Parameter is thought of as a ratio of
traveling waves. The incident wave is usually denoted by the variable, a, the
reflected wave by the variable, b, and the transmitted wave by c as illustrated in
Figure 2-2. The units of these wave parameters are proportional to j power . The
reflection coefficient, F, is defined as
b
T= ~.
a
(2.3-1)
Similarly, the transmission coefficient can be expressed as
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Review o f Solid State Microwave Amplifier Design
11
T =~ .
a
(2.3-2)
Incident signal
-*■ Transmitted signal
Reflected signal •*-
Reference Plane
Figure 2-2. The Scattering Parameter Concept
Figure 2-2 can be thought of as a two-port network since it considers power
transmitted from one port and reflected to that port as well as transmitted to a
second port. The reference impedances for these two-ports are complex valued
and distinct in general. At any reference plane in a circuit where the reflection is
considered, there exists the traditional voltage and current notions. With these
concepts in mind, the generalized scattering matrix representation of a network
may now be discussed.
2.3.1 The Generalized Scattering Matrix
The generalized scattering matrix provides a way of working with an nport network that uses the concept of the traveling wave.
Consider an n-port
network as illustrated in Figure 2-3. The incident and reflected traveling waves
(a, and bk) are defined in terms of the measured port impedances at ports / and k
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Review o f Solid State Microwave Amplifier Design
12
(z, and Zk), the measured current at port k (/*), and source voltage presented at port
i (e,)as
1- 1 / 2
ai
2 ei
(2.3-3)
}
(2.3-4)
bk = - i k Re{zk ] 1/2 •
The maximum available power to the network, N, at port i is
1 ei2
P;= T — ---4 R e{z,}'
(2.3-5)
Similarly, the power delivered to termination Zk is
(2.3-6)
In equations (2.3-3) - (2.3-6) it is assumed that Re{zfc},Re{z/}>0.
The
generalized scattering parameters can now be expressed in terms of these
quantities as [5]
Zk ~ Z k
% = -H
ak a [ = 0 , i ^ j
(2.3-7)
Zk + Z k
and
-
^ - i k R z{zk }
s ki
~
'
-
—0,k^i
2 ei
1 /2
1/2
(2.3-8)
}
where Zk is the load impedance terminating port k.
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Review o f Solid State Microwave Amplifier Design
13
I-------n-Port Network
Figure 2-3. The Generalized S-Parameters of an n-Port Network [5]
The power entering port i is defined as
Pi = |at-|2 -|fy |2, for i = 1,2...n .
(2.3-9)
Considering the excitations at all of the n ports, the total power entering the
network is
P=
/=!
_ X |^ /|2 = a 7'* a - b 7'* b ,
/
(2.3-10)
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Review o f Solid State Microwave Amplifier Design
14
where b7* denoted the transpose conjugate o f the vector b.
The S matrix is
defined in terms of the traveling wave vectors a and b simply as
b = S a.
(2.3-11)
It is important to note that if the rc-port network is lossless, its S matrix will satisfy
the following condition making it a unitary matrix,
(2.3-12)
where I„ is an n x n identity matrix. These formalisms are general and can be
used for addressing all linear networks discussed in this dissertation. In many
cases, the port impedances, Zy, where j= l,2...n, are considered to be the same and
real valued.
Simplified expressions can be obtained by substituting these
conditions into the above equations.
2.3.2 Renormalization o f the Generalized S-Parameter Matrix
The generalized S-Parameter representation of an n-port network assumes
that each of the ports is terminated in a complex impedance Z/, Z?, ... Z„. It is
often necessary to use a set of S-Parameters measured using one set of
terminations in a system that is defined in terms of a second set of terminations,
Z / , Z2 , ... Z „.
For this reason, it is useful to introduce the mathematical
technique for renormalizing a generalized S-Parameter matrix. An understanding
of this concept is necessary for a complete appreciation of some of the research to
follow in later chapters. The following expressions will be described without
proof since they are derived in detail by Ha [5].
The S-Parameter matrix
representation of a network can be expressed in terms of its impedance matrix,
Z/v, 3S
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Review o f Solid State Microwave Amplifier Design
15
S = R - ( z ,v - Z 7'*)-(ZyV+ z ) 1-R-1 ,
(2.3-13)
where
Z N = n x n impedance matrix of N,
R =—
2
R c { Z ,} -'/2
0
0
0
-1/2
Re{z2 }-
0
0
0
0
...
0
:
,
(2.3-14)
0
-
0
1/2
Re{z»}
and
Z,
0
0
0
Z2
0
0
0
0
•••
Z=
0 N
0
0
*
(2.3-15)
7
The renormalized S-Parameter matrix, S ' of the network, N, can be expressed as
s ' = A “ l ( s - r r *) - ( i n - r - s ) I - A r *,
(2.3-16)
where
r = (z'-z)-(z'+zT*)~l,
O
I* =
0
0
(2.3-17)
0^
01 0
:
0
0
•.
0
0
•••
0
1
A = R /- 1 R ( i „ - r r *),
(2.3-18)
(2.3-19)
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Review o f Solid State Microwave Amplifier Design
0
16
0
0
, (2.3-20)
\
0
and
/
>
Zx
0
0
0
Z2'
0
0
0
•.
0
0
0
(2.3-21)
0
Zn )
Equation (2.3-13) will prove to be very important in the understanding of power
transfer and loss in two-port matching networks.
2.4 Providing the Amplifying Device with Optimal
Terminations
Microwave amplifiers are designed to amplify a signal although there are
often additional performance requirements specified. This section will address
three types of amplifiers:
1) high gain; 2) low noise; and 3) high power. To
design an amplifier optimized to one of these three performance criterion, one
must present the amplifying device with the correct source and load impedances at
the frequency of interest.
This is accomplished by transforming the source and
load impedances o f Figure 2 -1 to the required load and source impedance for high
gain, low noise, or high power performance. Before addressing the problem of
transforming the system load and source impedances, it is necessary to understand
how to determine the required source and load impedances that must be presented
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Review o f Solid State Microwave Amplifier Design
17
to the amplifying device. This determination is based solely on the parameters of
the amplifying device.
2.4.1 High Gain Amplifier Design
While many types of gain can be defined for an amplifier, most common is
known as transducer gain. Transducer gain is defined [6] as
(2.4-1)
where PL is the power delivered to the load, and Ps is the power available from
the source. It will be assumed that the amplifier designed here will be linear.
Nonlinear amplifiers will be considered in section 2.4.3. Since the amplifier is
assumed to operate linearly, the amplifying device can be characterized in terms
of its two-port S-Parameter matrix. The transducer gain of a microwave amplifier
can be expressed in terms o f the presented load impedance, presented source
impedance, and amplifying device S-Parameters as [5]
(2.4-2)
where r s is the source reflection coefficient presented to the amplifying device,
and r L is the load reflection coefficient presented to the amplifying device, and
S=
■^11
_
\*^12
^21
_
,
22)
(2.4-3)
where S is the two-port S-Parameter representation of the amplifying device. In
some cases, S/2=0, resulting in the unilateral device approximation. When this
condition holds, the transducer gain expression can be expressed more simply as
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Review o f Solid State Microwave Amplifier Design
18
(2.4-4)
The problem now posed is how can equations (2.4-2) and (2.4-4) be
maximized by varying only the load and source impedances presented to the
amplifying device?
This problem can be solved and is explained in many
microwave text books including [5], [6], and [7]. The results will be presented
here.
For the unilateral case described in equation (2.4-4), the result is quite
simple. Since the input and output are effectively decoupled, maximum amplifier
gain can be achieved from the following values for the source match and load
match, denoted as f smand f^n, respectively,
(2.4-5)
and
r Lm ~ S 22* ■
(2.4-6)
The use of this load and source impedance yields a transducer gain of
g Tu max - P21
(2.4-7)
For the general, or bilateral case, the solution is a bit more complex
because a simultaneous conjugate match is needed. The source match and load
match, denoted as f smand 71m respectively, required for maximum gain are
2C\
(2.4-8)
and
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Review o f Solid State Microwave Amplifier Design
19
12
B2 ± }jB22 - 4 \ c 2
.
Ljtl
/-) /-T
(2.4-9)
where
(2.4-10)
(2.4-11)
(2.4-12)
(2.4-13)
and
A - 5 h 5 22 - ^ 2 1 ,s'i 2-
(2.4-14)
O f the two possible solutions that result from equation (2.4-8), only one will have
a magnitude less than unity. This is the solution that is used since the other would
be impossible to realize with a passive matching network. Similarly, the solution
to equation (2.4-9) whose magnitude is less than unity is used. The use o f the
load and source impedance specified in equations (2.4-8) and (2.4-9) yields a
transducer gain of
max
(2.4-15)
where
K=
(2.4-16)
Clearly from equation (2.4-15), if K< 1 then Grmax is not defined. If K<1 then the
two-port network described by the S-Parameter matrix is potentially unstable.
Stability of single device and multi-device networks is discussed in Appendix A.
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Review o f Solid State Microwave Amplifier Design
20
When an amplifying device is potentially unstable, it does not have a
simultaneous conjugate match, and thus other means must be used to determine
the maximum stable match.
A method has been developed for designing conditionally stable amplifiers
by Edwards, et. al. [8] . For values of K>0, This approach provides a maximum
single-sided matched gain (Gmsm) expressed by
(2.4-17)
To provide some margin of stability in the design, this value o f gain serves as an
upper bound. The values of
and fun required to obtain maximum gain are
(2.4-18)
and
C\\gq ~ VlCl\2 S o 2 - ( g a Dl +]) { s a E l - l ) ,
cs ,
(2.4-19)
where
D\ = k n | 2 ~IaI2 £i
= i -| s 22|2,
Sa
(2.4-20)
(2.4-21)
(2.4-22)
(2.4-23)
G a ~ G M SM ~ G S ’
(2.4-24)
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Review o f Solid State Microwave Amplifier Design
21
where G$ is the gain margin from the maximum possible gain used to provide a
stability margin during amplifier operation.
2.4.2 Low Noise Amplifier Design
Another important type of microwave amplifier is the low noise type. In
this design, maximum gain is traded off with the desire to achieve a low amplifier
noise figure. Such an amplifier is important in the front end of a communication
system where received signals are small and good noise performance provides
superior receiver performance. As in section 2.4.1, it turns out that a device can
be made to provide improved noise performance when presented with an optimal
source and load impedance.
Noise figure is defined as
where No is the noise output power, k is Boltzman’s constant (1.374 x 10'23 J/°K),
B is the noise bandwidth, G is the amplifier gain, and T is the temperature (°K). It
has been shown [5], [6] that for a two-port amplifying device, the noise figure is
determined by four parameters, {Fm, Rn, Gm, Bm), such that
(2.4-26)
where the presented source admittance is Ys = Gs + j Bs, the optimum source
admittance is Ym = Gm + j Bm, the optimum noise figure is Fm, and the equivalent
noise resistance is Rn. Equation (2.4-26) can be rewritten in terms of reflection
coefficients and the following required param eters,, {Fm, Rn, Tm} as follows
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Review o f Solid State Microwave Amplifier Design
22
(2.4-27)
where
(2.4-28)
(2.4-29)
and
(2.4-30)
Z0 is the measurement characteristic impedance while Yo is the measurement
characteristic admittance.
It is interesting to note that the noise figure is
determined by the presented source impedance and not the load impedance. This
allows the selection of the load impedance to optimize the gain o f the low noise
amplifier. The optimum value for the source impedance is given by
(2.4-31)
as is evident from equation (2.4-27). When the amplifying device is presented
with this source impedance, a noise figure of Fm is achieved.
2.4.3 High Power Amplifier Design
High power amplifiers, unlike the amplifiers described in sections 2.4.1
and 2.4.2 have behavior determined by nonlinear phenomenon. As a result, small
signal S-Parameters cannot be used to predict the achievable output power.
However, like the low noise and high gain amplifier, the power amplifier wants to
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Review o f Solid State Microwave Amplifier Design
23
be presented with a specific source and load impedance to generate the most
power possible from the device. These required source and load impedances,
r Sop{ and Ti Qpt are usually determined by a nonlinear measurement technique
known as load pull. In this procedure, the amplifying device is presented with a
vast number of load and source combinations until maximum output power is
obtained. When it is, the source and load impedances presented to the power
amplifier are recorded. This measurement process is a very time-consuming and
complex process. The resulting values of Ts
and T L
can be used to design
the input and output matching networks but they do not provide any information
on amplifier gain or performance.
All of this information must be measured
during the load pull process.
2.5 Matching Network Design
In the previous section, techniques for determining the required source and
load terminations for optimized high gain, low noise, and high power amplifying
devices were discussed.
The question of how to generate these required
termination impedances from the system characteristic impedances is the
fiindemental impedance matching problem.
As illustrated in Figure 2-1, an
amplifier is expected to work in some sort of a “system” where a source
impedance and a load impedance are available. These impedances will hereby by
denoted as the system characteristic impedances. These impedances may be real
or complex in general, and vary with frequency. M ost likely, the system
characteristic impedances will not be the ones need for optimum high gain, low
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Review o f Solid State Microwave Amplifier Design
24
noise, or high power performance. As a result, the designer must devise a way to
transform the system source and load impedances, hereby denotes by r s and /~L
respectively, to the optimum source and load impedances, hereby denoted by
and
ru,pt.
rsop,
These transformations may be thought of as complex mappings which
for convenience will be denoted as follows
(2.5-1)
and
(2.5-2)
where
Ns denotes the mapping that transforms the source system characteristic
impedance to the required source impedance while N L denotes the mapping that
transforms the load system characteristic impedance to the required load
impedance. These two mappings are realized in hardware through a network of
circuit components. This matching network is usually linear, even in the case of
the power amplifier, and thus can be represented by a two-port S-Parameter
matrix. Furthermore, as stated in equation (2.3-12), if the matching network is
lossless, then the S-Parameter matrix is unitary. This is a very desirable property
for a matching network where transferring available power from a source to a
load is the goal. The circuitry used to realize the matching network may be active
or passive.
Active circuitry, by definition must draw power.
This may be
acceptable if the power drawn is direct current (DC).
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Review o f Solid State Microwave Amplifier Design
25
2.5.1 M atching Network Circuit Elements
M atching circuits are composed of electrical circuit elements in a variety
of configurations to transform one complex impedance to another.
circuit elements may be lumped, distributed, or even active.
Matching
Most microwave
matching is traditionally done with passive lumped and distributed circuit
elements.
These will be discussed presently in the context of achieving an
impedance match. Some new active lossless matching circuit elements will be
introduced and explained in Chapter 4.
They have not been used before in
microwave amplifier design and thus will not be discussed here.
For the purpose of microwave matching, impedances and admittances will
be considered in terms of their equivalent complex reflection coefficient. This
will prove to be an essential part of understanding microwave matching. A quick
review of the relationship between impedances, admittances, and reflection
coefficients is as follows. Consider a system with a characteristic impedance of
Z q. If a load has an impedance o f Z = R + jX , the equivalent reflection coefficient
is
Furthermore, if we assume that T = U + j V, and that the normalized impedance z
= r + jx = Z/Zo, we can solve for U and V as follows
(2.5-4)
and
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Review o f Solid State Microwave Amplifier Design
2x
V =— — j — t .
( r + l) + x~
26
(2.5-5)
Additionally, this impedance, z = r + jx, lies on two circles in the reflection
coefficient plane, a constant resistance circle and a constant reactances circle.
Expressions relating the impedance to constant resistance circles will be required
in Chapter 3. This constant resistance circle has the following center and radius
respectively,
cs =
^
(2.5-6)
and
**=777-
(2-5-7)
An important relationship to note is that
Cr = 1 - R r
(2.5-8)
If a load has an admittance of Y = G + jB , the equivalent reflection
coefficient is
Yq —Y
r = TT77To +1
(2.5-9)
Furthermore,if we assume that r = U + j V, and that the normalized admittance v
= g + jb =Y/Y0 we can solve for U and V as follows
1- g 2 + b 2
U =7~
U + 0 +b
(2.5-10)
and
-2 b
y =Z
----- 7 (g + l)“ + b :
(2-5-11)
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Review o f Solid State Microwave Amplifier Design
27
Additionally, this admittance, y = g + jb , lies on two circles in the reflection
coefficient plane, a constant conductance circle and a constant susceptance circle.
Expressions relating the admittance to constant conductance circles will be
required in Chapter 3. This constant conductance circle has the following center
and radius respectively,
cC=jfl
( 2 -5 -
R c = —I T 8+ 1
(2-5-13)
12)
and
An important relationship that will be used in Chapter 3 is that
Cc = Rc - 1
(2.5-14)
2.5.1.1 Lumped Circuit Element Transformation Properties
The most commonly used lumped circuit elements in microwave amplifier
design are simply capacitors and inductors. These can be made very small so that
parasitics will not dominate performance in the 1 GHz - 10 GHz frequency band.
Discrete microwave inductors tend to be more difficult to make at the upper end
of this band but they can be printed very small on a microwave substrate.
Additionally, when designing monolithic microwave integrated circuits (MMIC),
microscopic inductors and capacitors can be fabricated that are operational at
much higher frequencies. The purpose here is not to go into an in-depth study of
circuit element characteristics, but rather to explain the impedance transformation
properties of these elements.
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Review o f Solid State Microwave Amplifier Design
28
Figure 2-4 is an illustration of a Smith Chart. The Smith Chart is merely a
representation of the reflection coefficient plane with constant resistance,
reactance, conductance and susceptance curves superimposed on it. These curves
mm out to take on the shape of circles. This chart is an extremely useful design
tool when trying to design an impedance matching network.
Constant
Conductance
Circles
____
Constant
Resistance
Circles
Constant
Susceptance
Circles -■«. _
Constant
Reactance
Circles
Figure 2-4. Properties of the Smith Chart
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Review o f Solid State Microwave Amplifier Design
29
Consider now the two lossless lumped circuit elements, the capacitor and the
inductor.
Figure 2-5 illustrates the transformation properties of the capacitor
Constant
Conductance
Circles
.
Constant
Resistance
Circles
CP
Figure 2-5. Inductor and Capacitor Reflection Coefficient Transformations
and the inductor on an arbitrary reflection coefficient.
A curve is drawn to
illustrate the mapping from the original reflection coefficient, Tt
to the
transformed reflection coefficient, Ti. The illustrated transformations are for a
series capacitor, C s, a parallel capacitor, C p, a series inductor, Lf, and a parallel
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Review o f Solid State Microwave Amplifier Design
30
inductor, I f . It is important to note that the series element transformations follow
circles of constant resistance while the parallel transformations follow circles of
constant conductance.
It is also noteworthy that series capacitors and parallel
inductors will always result in transformations with counterclockwise motion
along constant resistance or constant conductance circles, respectively. Similarly,
series inductors and parallel capacitors will always result in transformations with
clockwise motion along constant resistance or constant conductance circles,
respectively. These transformation properties will provide insight into matching
network topology selection and will be used in Chapter 3.
2.5.1.2 Distributed Circuit Elements
Unlike lumped circuit elements, distributed circuit elements are considered
to be comparable in size to the wavelength of operation.
As a result, the
magnitude and phase of the voltages and currents along the length of a distributed
structure change as a function of position. The simplest distributed structure to
consider is the uniform transmission line. Figure 2-6 illustrates schematically a
transmission line of length x terminated in a load with reflection coefficient f l .
The impedance seen a distance .t from the load is expressed as
e^x + TLe~YX
Zln=z° er* - r Le- r x '
(2'5- ,5)
where Z q is the characteristic impedance of the transmission line and y - a+jfi is
the complex propagation constant of the line. Similarly, the reflection coefficient
at a distance x is
f ( x ) = r L<T2^
(2.5-16)
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Review o f Solid State Microwave Amplifier Design
31
It is important to note that the impedance on this line is not constant and in fact
changes continuously along the length of the line as do the voltages and currents.
Figure 2-7 illustrates the transformation properties of a uniform transmission line
Figure 2-6. Transmission Line Concept
on an arbitrary load.
The transmission line transformation, T, always follows
clockwise circular arcs. When the Smith Chart is normalized to the same
characteristic impedance as the transmission line, the transformation sweeps out
an arc that is concentric with the center of the Smith Chart. When working with
different impedance lines, the Smith Chart can be renormalized accordingly.
Transmission lines can be constructed using many different types o f media
including planar circuit boards, coaxial cables, and waveguides.
Additionally,
circuits can be made to emulate the behavior of a transmission line over a
specified band of frequencies. This concept will be exploited in Chapter 4.
Transmission lines can also be used to emulate the behavior of a capacitor
or an inductor in a specified frequency band. To realize an inductor, consider the
impedance of a short circuited transmission line of characteristic impedance Zo
and electrical length 6. This steady state impedance is
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Review o f Solid State Microwave Amplifier Design
32
Z = yZo ta n 0 .
(2.5-17)
Comparing this with the steady state impedance of an inductor,
Z = jc o L ,
(2.5-18)
it is clear that to realize an inductor with an inductance o f L at frequency co, a
short
circuited
transmission
line
with
electrical
length
0 = arctan co and
characteristic impedance Z0 = L can be used. Analogously, to realize a capacitor
Constant
Conductance
Circles — .
Constant
Resistance
Circles
Figure 2-7. Transmission Line Reflection Coefficient Transformation
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Review o f Solid State Microwave Amplifier Design
33
with capacitance C, an open circuited transmission line with electrical length
6 = arctan co and characteristic impedance Z q = 11C can be used. The variable
jQ. = j tan Q is called the steady state Richards Variable. Richards showed that
distributed networks composed o f equal lengths of line could be analyzed as a
lumped element network [9].
2.5.2 Narrow Band Matching
The process of transforming one complex impedance to another over a
narrow band of frequencies is what is meant by the term narrow band matching.
Most narrow band matching techniques are designed to work with impedances at
a single frequency point.
The response of the circuit at nearby frequencies is
assumed to be close to that of the single frequency point. The network used to
accomplish this transformation can include inductor, capacitors, transmission
lines, or any of a multitude of circuit elements. Since the process of analyzing
these various combinations of circuit elements tends to require frequent inversion
of complex numbers, a purely numerical approach to narrow band impedance
matching tends to be tedious and not intuitive.
As a result,
the problem is
frequently addressed graphically on a Smith Chart. The Smith Chart allows for
the graphical illustration of the transformation effects of lumped elements and
distributed elements on a single chart. This provides great insight into the effects
of combining multiple elements in complex ways.
Many examples o f this
procedure are given by Gonzalez [6] which illustrate the mechanics of carrying
out single frequency impedance matching on the Smith Chart. Most narrow band
amplifier designs are carried out with this very process. Computer Aided Design
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Review o f Solid State Microwave Amplifier Design
34
(CAD) tools are used to help model parasitic elements that result from non-ideal
circuit elements.
2.5.3 Broad Band Matching
The general problem of broad band impedance matching requires the
transformation of a domain of load impedances to a range o f required impedances.
Each point in the domain, D„ is the impedance of the load at a different
frequency.
Correspondingly, each point in the range, /?„
is the result of a
N
mapping D(- ------- > R, , where N is the mapping function defined by the matching
network. This will be explained in much more detail in Chapter 3. The main
point in explaining this concept is to emphasize the fact that the process of broad
band matching is complex. The task of determining the network that is able to
map a domain of loads to a range of required impedances cannot be accomplished
using the approach presented for narrow band matching.
The classical treatment of broadband matching is to formulate the problem
as a filter design problem where the terminations on the two-ports of the filter are
different. This becomes more difficult when the terminations are not real, as is
typically the case in microwave impedance matching. The reactive part of the
load must be treated as part of the matching network. One of the most common
ways to carry out this synthesis is using Darlington synthesis [9]. It is assumed
that the desired pass band response, S^iCs) can be expressed in terms of some
polynomial function (i.e. Chebychev, Butterworth, etc.) where s is the Laplace
Transform variable representing complex frequency, s = a + jco. Assuming the
matching network is lossless, it obeys the unitary condition illustrated in equation
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Review o f Solid State Microwave Amplifier Design
(2.3-12).
35
Since analytic continuation holds for rational functions with real
coefficients[9], S\\(s) can be found from
S n (s)Si , ( - j ) = 1 -S 21(j)S2j ( - j ) .
(2.5-19)
From the expression S h (j) Sh(-j), SuC?) can be determined by using only the
terms that have left half plane poles. The resulting expression will be realizable
with a passive network. The driving point impedance is now expressed as
Z (s)=
1+ Sn( j )
~~c
1 -S n (5 )
(2.5-20)
This impedance function can be expanded using the method of continuing
fractions to realize a ladder network of inductors and capacitors terminated in a
resistance [10].
Realization of the microwave matching network can be accomplished
using lumped inductors and capacitors, or transmission lines by means of
Richards transforms and Kuroda identities[9].
These approaches to matching
network design are very' mature and addressed in numerous texts [9]-[13]. Other
techniques include the use o f lossy elements as described by Goyal [14]. Lossy
matching networks ease the problem of broad band matching at the expense of
gain. At microwave frequencies, lossy techniques are not usually practical.
2.6 The Effects of Measurement Error on Matching
Circuit Performance
All of the matching network theory presented in section 2.5 specifies how
to transform load impedances to required impedances over broad and narrow
bands. When the designer goes to fabricate this matching circuit, it is assumed
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Review o f Solid State Microwave Amplifier Design
36
that he knows several things: 1) what the load impedance is; 2) the values of the
circuit elements in the matching network; 3) the required impedance to be
synthesized from the matched load.
Knowledge of all three of these items is
based on the designers ability to accurately make microwave measurements.
The procedures outlined in section 2.5 are religiously followed by
microwave designers and the following crucial questions are seldom asked:
1).
What effect will an error in the load measurement have on the
impedance match?
2). What effect will modeling inaccuracies of the synthesized matching
networks have on the impedance match?
3).
If a multi-device network is being designed and the matching
impedance goal is based on measurements of a second device, what effect
will an error in the measurement of this second device have on the
designer’s ability to transfer power to my load?
Zq = 50 £2
0 = 77.3°
/ = 5 GHz
0.4557 nH
3.6 pF
9600 pm
HFET
5Q
Narrow Band
Impedance
Matching
Network
m
L
Figure 2-8. HFET Output Matching Circuit
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Review o f Solid State Microwave Amplifier Design
37
As an example of this problem, consider the case o f trying to achieve a
narrow band output match of a Texas Instrument Heterostructure Field Effect
Transistor (HFET) at 5 GHz. Figure 2-8 illustrates the equivalent large signal
output model for the device and the designed matching network. r ou, represents
the output reflection coefficient which should be ideally matched to 0 at the
frequency of interest (-°° dB).
Figure 2-9 shows the simulated circuit
performance before and after the introduction of matching network component
value errors. It is interesting to see the significant error in matching caused by the
small variations in matching network component values.
The 7° error in the
electrical length o f the open circuit transmission line corresponds to microstrip
line length error (on Alumina) of approximately 0.017".
The inductor error
measurement error is 15%. These errors in measurement are not unreasonable,
but the effect on the circuit match is catastrophic.
Surprisingly, most matching network design handbooks do not address this
problem, although any experienced microwave circuit designer knows that the
effects of these problems can be quite significant. The generic topic of circuit
sensitivity analysis is discussed in some texts [15], however, treatments are based
on numerical approaches which do not provide the designer with any design
insight. Furthermore, if the circuit sensitivity is too high, there is no intuitive way
to design a less sensitive circuit. In certain cases, it may be the case that there is
not a way to guarantee the required performance given the uncertainty in circuit
component values. What is to be done then? The answer is to look at a different
approach at solving the problem. Instead of trying to ascertain better ways to
measure the circuits, it makes sense to develop techniques to make the matching
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Review o f Solid State Microwave Amplifier Design
38
networks tunable, and therefore more robust. These tunable matching networks
would be able to change their impedance transformation properties in such a way
as to compensate for the measurement uncertainties in the design.
This new
approach to designing matching networks will be developed and demonstrated in
the following chapters.
o
-10
-20
C
-30
-40
-50
Ideal impedance match
Impedance match with component errors
•60
4.90
4.92
4.94
4.96
4.98
5.00
5.02
5.04
5.06
5.08
5.10
5.12
Frequency (GHz)
Figure 2-9. HFET Impedance Match Before and After Introduction of Component Errors
Component
Ideal Value
Non-Ideal Value
Error
Inductor
0.4557 nH
.3873 nH
0.0683 nH
Open Circuit Transmission Line
50 Q
50 Q.
0Q
77.3°
84.3°
7°
Table 2-1. Matching Network Component Values and Errors
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39
CHAPTER 3
T u n a b l e I m p e d a n c e M a t c h in g T o p o l o g ie s
3.1 Introduction
As a precursor to the development of tunable impedance transformation
topologies, it is necessary to understand what a matching network is and what it is
supposed to do. Figure 3-1 illustrates a simple matching network, N. This is a
two port network that transforms a complex load impedance, designated in terms
of its reflection coefficient, f l , to a required input impedance
T)„. The ideal
impedance matching network is a lossless two port network defined by the
following S-Parameter matrix
N=
S2 l( s ) '
(3.1-1)
The parameter s is complex frequency and can be defined as s = a + jc o . For the
purposes o f the analysis to follow it will be assumed that s —> jco since amplifier
impedance matching is usually for a steady state excitation. The main purpose of
the impedance transformer in an amplifier is to transfer maximum power from a
load to a source.
If the following two conditions are satisfied, this is
accomplished.
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Tunable Impedance Matching Topologies
40
T j = 0„*
(3.1-2)
N « (N ‘ ) r = I
(3.1-3)
The first condition is known as conjugate matching. The second condition assures
that the matching network is lossless and that N is a unitary matrix. Clearly, if
power is dissipated in the matching network, it will not all reach the load. This
can occur even if r $ sees a conjugate match.
in
Figure 3-1. Schematic Representation of an Impedance Matching Network
The general problem of impedance matching can be thought of simply as a
mapping of one complex plane to another.
As illustrated in Figure 3-2, the
domain of this map contains a subset of all possible load impedance values, D,
while the range o f the map contains the input impedance values, R, that result
from the mapping D
N
»R . Since S-Parameters are much more convenient to
use in microwave design problems, the load impedance plane and input
impedance plane will be considered in terms of their reflection coefficients, T/,
and Tin, respectively.
As explained in Chapter 2, there is a simple one-to-one
relationship between a complex reflection coefficient and a complex impedance.
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Tunable Impedance Matching Topologies
41
Therefore, without loss of generality, loads and sources can be considered in this
way.
R c Tin
D c Tl
Figure 3-2. Impedance Matching in Terms of Complex Mappings
The mapping, N, represents the impedance matching network.
It is
important to note the range of the mapping is a function of D as well as three
other variables, ft), p, and T. These variables are defined as follows:
co =
angular frequency
p=
power level of microwave excitation
T=
temperature
The following definition is stated to define the meaning of a successful
impedance match.
D efinition
3.1:
An
impedance
matching
network
defined
by
the
map N {T i,c o ,p ,T ) is said to successfully impedance match the load impedance
Di to the input impedance goal, Rg, if and only if d (R [,R g ) < £ where
Rl:Dl —^ R i
Dj e f L Plane
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Tunable Impedance Matching Topologies
42
/?i e Tin Plane
Rg s r,„ Plane
d(R \ ,R g ) = Euclidean distance [16] between the
impedance points R\ and Rg
e= minimum acceptable distance between the achieved
impedance match and the required impedance match
Matching network synthesis requires a technique for arriving at and
realizing the mapping function, N, given a matching domain and a matching
range. The matching domain is the domain of impedances that must be
transformed.
The matching range is the range of impedance values that are
required for the design. The network is adequate if it adheres to the requirements
of Definition 3.1.
3.1.1 The Traditional Impedance Matching Network and Its
Limitations
Traditionally, there are two types of impedance matching that are
discussed: narrow band and broadband. The narrow band impedance match is
illustrated is Figure 3-3. For a specified load impedance, D \, a network must be
synthesized such that Dj — ^ (<o0 .’P0 ’f0 ) ) ^
^ ^
synthesis problem,
D\ and R\ are defined and the designer must determine N. Similarly, in the case
of the wide band impedance match, a continuum of points
in the rV Plane is
mapped to the fV Plane where each point in the domain is defined for a different
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Tunable Impedance Matching Topologies
43
value of co. This concept is illustrated in Figure 3-4. It is important to note that in
this case, the mapping, N, must be synthesized such that for different values o f its
parameter, co, it is able to successfully match the domain of interest.
Figure 3-3. Narrow Band Impedance Match
N (C O i , P q , T q )
N((0 ;,P q,Tq)
N(CO n,Po,Tn)
Figure 3-4. Wide Band Match
The primary limitation with the standard approach to impedance matching
is that it assumes the designer has knowledge of the following quantities:
1. The points in the domain, £>,
2. The map, N
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Tunable Impedance Matching Topologies
44
3. The parameters too, po, and T0
4. The points in the range, /?,
In low frequency circuit design, these quantities are easily measured with great
accuracy in many cases. However at microwave frequencies, distributed circuit
effects discussed in Chapter 2 make accurate measurements more difficult.
Nonlinear circuits add another level of complexity to the measurement.
Traditional impedance matching techniques obviously do not require absolutely
perfect measurements to obtain a satisfactory match, however, they do not provide
a means of ascertaining the error in the match that will occur as a result of errors
in the four items listed above. In the case o f microwave circuit design where the
wavelength is comparable to the circuit size, it becomes clear, as illustrated in
Chapter 2, that these errors will have an impact on the design. A technique to deal
with this problem has not been developed in the past. The primary purpose of the
development in this chapter is to remedy this problem.
Figure 3-5. Matching Error Due to Domain Inaccuracies
There are four primary ways in which measurement error can effect the
impedance matching process in terms of complex mappings. They will here be
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Tunable Impedance Matching Topologies
45
explained for the narrow band matching case since the same principle applies to
the broad band matching problem. Figure 3-5 illustrates the case where the point
in the domain D\ is measured to be D2. As a result, the range of the map is R2,
instead of the desired value of Ry. If d(R^ ,R 2 ) ^ £ , then the matching process is
unsuccessful per Definition 3.1 . A similar situation occurs when the map is
thought to be N, when in fact it is AT. This occurs when the matching network is
designed to have certain physical parameters, but as a result of fabrication errors
or component tolerances, the fabricated circuit has a map N ' , instead o f the
desired map N. The result of this situation is illustrated in Figure 3-6, where the
range of the map is R2, instead of the desired value of R\.
Figure 3-6. Matching Error Due to Map Inaccuracy
Another situation is when one of the parameters of the map (i.e. co, p, or t)
is in error, as illustrated in Figure 3-7. Again, the result is the same, the range of
the map is R2, instead of the desired value of R\. Finally, there is the case when
the range is thought to be R2 instead of its actual value of R\. This can occur when
the range of the matching process is determined by measurement as is frequently
the case in an interstage matching network. Figure 3-8 illustrates the resulting
error, e, which is a function of only the error in the range value in this case.
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Tunable Impedance Matching Topologies
46
Figure 3-7. Matching Error Due to Parameter Inaccuracy
Figure 3-8. Matching Error Due to Range Inaccuracy
In a real system, mapping errors will be a result of some combination of all four of
the illustrated errors in Figures 3-5, 3-6, 3-7, and 3-8. The design o f a matching
process capable of correcting for these errors is needed.
3.1.2 The Tunable Matching Network Concept and Design
Considerations
The matching errors described above occur frequently with microwave
circuits, and require a more robust matching technique than currently available.
This robust matching can be accomplished by devising techniques for
synthesizing a tunable map, N$
As illustrated in Figure 3-9, the tunable map is a
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Tunable Impedance Matching Topologies
47
mapping that is a function of an additional parameter, £, that effectively allows the
mapping to change so that it can compensate for uncertainties in R, D, N, co, p, or
T. This allows the range of the map to meet the goal o f d {R [,R 2 ) < £
, as is
required for a successful match. The variable £ can be thought of as a state vector
representing the values o f the n tunable circuit elements, [et ,e 2 ,e3,...en }, at any
given time in the tunable matching network. For a physically realizable network,
each of these tunable circuit elements, e„ must be have an upper and lower bound
such that emin < et < emax. Furthermore, it is usually desirable to keep the value
of n as small as possible to reduce the network complexity, dissipated power loss,
and size.
N
Figure 3-9. Correcting Matching Errors with The Tunable Map
The difficulty in designing an impedance matching circuit that behaves
like a tunable map, N%, is in trying to meet the requirements set forth in Definition
3.1 while satisfying the constraints that {V e,:l< r < n ,emin < e, < emax }and that
the number of tuning elements, n, is minimized. Only one paper, by Y. Sun and J.
Fidler [17] has been written on the topic of impedance matching domains. The
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Tunable Impedance Matching Topologies
48
paper of Sun and Fidler addresses the converse o f the problem that will be
discussed here. It addresses the problem of determining the domain o f impedance
values, D, obtainablefro m a range of circuit values in a ladder or tee network.
3.1.3 Overview o f New Techniques fo r Realizing Tunable Maps
In this chapter, three tunable matching network synthesis techniques will
be introduced. The first technique describes a technique for realizing the tunable
map, N$, using a ladder network of two particular forms: 1) ladders of inductors
and capacitors and 2) ladders of resonators. The theory presented will address
matching errors due to domain, map, and parameter inaccurracies as illustrated in
Figures 3-5, 3-6, and 3-7, respectively. This will cover the case of matching a
domain o f loads to a specified range impedance.
In the case o f interstage
matching networks, range inaccuracies also occur when the range impedance is in
error.
The work done here can be extended to cover that case as well.
Additionally, the range of the map in this development is assumed to be real
valued, which is the case when matching a device to a coaxial or microstrip
transmission system.
Techniques for determining the optimum range of the
tuning elements, e„ and the number of circuit elements, n, are developed.
The second technique describes a technique for realizing the tunable map,
N$, using tunable cascaded transmission lines.
Again, this theory will discuss
matching errors due to domain, parameter, and map inaccuracies. As before, the
range of the map is assumed to be real valued. Required tuning ranges for these
circuit elements are derived.
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Tunable Impedance Matching Topologies
49
Finally, the problem of synthesizing a tunable map, A^, capable of
impedance matching a domain, D, over a broad bandwidth is developed. This
technique deals with the problem of matching error due to domain inaccuracies
(Figure 3-5) in the context of a wide band match (Figure 3-4). It is assumed that
the load can be approximately modeled over the frequency band of interest in
terms of lumped circuit elements, as is frequently the case with microwave
transistors.
The proposed matching network provides tunable broadband
matching by using novel tuning elements in the matching networks. These tuning
elements behave like tunable negative capacitors and inductors over the frequency
band of interest. As a result, the matching network uses the process of broadband
reactance and susceptance cancellation to achieve a broadband tunable map, N$.
The limitation of the matching bandwidth is driven by the method for realizing the
tuning elements, not the Fano-Bode Bandwidth limitation. As a result, broadband
matching of high Q devices is possible yielding performance far superior to
traditional passive matching. Tuning element design will be discussed in Chapter
4, while this chapter will serve to establish the requirements for these elements.
The synthesis of any of the tunable maps, N$, discussed above, can be
carried out using the general procedure outlined in Table 3-1. This table will be
refered to in subsequent sections.
It is important to note that when a tunable
matching network topology is selected that has only one vector, £, available to
map each D{ to R\, steps 3, 4, and 5 can be skipped. For such a circuit, the fact
that there exists only one match for each element o f the matching domain means
that the best solution does not need to be selected. This will be the case when the
cascaded line tunable matching network and the broadband reactance and
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Tunable Impedance Matching Topologies
50
susceptance cancellation tunable matching networks are discussed in sections 3.3
and 3.4.
1. Determine the Domain of interest, D.
2. For each point, D„ in the domain, determine the set of all tunable maps, {N$},
for the specified network topology, that can map
£ to take on the values
D,- —» R [, by allowing
, £2 »§. • • • £n where the set {£i , £>, <%
£n} contains
all possible state vectors that will provide the transformation D(- —> /? j. /?i is the
specified range impedance and £ = {ei, ei
ek,
where ek is the value of the
nth matching circuit element.
3.
Given the limitation of physically realizing the circuit element, et, an
optimization function for each element f\{e\), fifa ) ,... /*(£*),... f n{en) is specified
such that/* is minimum when ek is optimal.
4. Accomplish multiobjective optimization (i.e. minimize! //(^i),
fitei),---
/*(£*)»••• f n(,en)) by weighting the individual optimization functions as follows
as / ( £ ) = Wlf l (el ) + W2f 2 (e2 )+...Wicf k (ek )+...Wnf n (en ), where Wk is the
weight of the kth optimization function.
5. Determine the optimum state vector, ^opt D_ , for each load, D„ in the matching
domain.
{table continued on next page)
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Tunable Impedance Matching Topologies
51
7
f[ vlopti, J}•f , i{[e‘ lop,,
}• { % » ,. }S
UChthat
2
6 . Extract the sets {e,
K „ i } <=&p,0.VDi €D
where ey f. is the optimum value for ey for the load impedance point £>,. Each
subset contains all values required for a particular tuning element, e*, to match the
entire impedance domain, D, taking into account the optimization criteria outlined
in step 4.
7. The required minimum and maximum values of e* for k = 1„.« are
max
max
e max
max
max'
maxi e.
{table continued on next page)
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Tunable Impedance Matching Topologies
52
8 . To account for errors in element values due to map and parameter inaccuracies
(Figures 3-6 and 3-7), e:‘max and e-.‘min
. , for all i = 1 , 2 n are multiplied
by
the
r
J
factor *7/
and ty- in respectively where the q ’s are determined by the
uncertainties in component values resulting from parameter and modeling errors
as explained in section 3.1.1
Table 3-1. Tunable Network Synthesis Procedure
3.2
Tunable Ladder Network Synthesis and Realization
This section will describe a technique for synthesizing tunable matching
networks whose topologies take the form of a ladder network.
The general
procedure outlined in Table 3-1 will be followed to carry out this task.
The
networks addressed in this section will be composed of three elements, so N% =
{e\, ez,
}. The theory can be extended to include cases where n >3. However
three elements will be shown to be the minimum number of components
necessary to deal with any domain matching problem where the domain is a
subset of the unit Smith Chart. Two types of elements,
will be treated. In the
first case, the elements take the form of inductors or capacitors, or in general,
circuit components whose reactance or susceptance is either positive or negative.
In the second case, the elements will take the form of resonators, or in general,
circuit components whose reactance or susceptance can be both positive and
negative.
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Tunable Impedance Matching Topologies
53
The most complicated part of the development is determining an orderly
way to carry out step 2 from the procedure in Table 3-1. Several subsections will
be dedicated to this procedure.
To carry out the steps in Table 3-1, the following developments will be
presented:
1. A review of lumped element impedance matching will be given from
the perspective of mappings. The ladder network will be shown as a
composition of individual transformations.
A point, D„ in the
matching domain will be operated on by this composition of
transformations.
2. The impedance points that occur between the individual component
transformations will be derived in terms of geometric properties of the
Smith Chart.
3. The application of the geometric expressions will be used to arrive at a
set of equations that define the component values, {e\, ei, e3}, as a
function of a single scalar value who’s upper and lower bounds are
expressed as a function of the load point in the domain, D,. This will
be carried out first for the case of the C-L-C (capacitor - inductor capacitor) ladder network and then for the resonator network.
This
will effectively accomplish the task in step 2 of Table 3-1.
4. Next, the optimization functions defined in steps 3 and 4 o f Table 3-1
will be defined for both types of networks.
5. Steps 5, 6 , 7, and 8 will be illustrated through an example design that
is carried out.
Resulting values are graphically displayed and the
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Tunable Impedance Matching Topologies
54
software used to implement the process is included in an appendix for
reference.
3.2.1 Review o f Lumped Element Impedance Transformations
The reflection coefficient plane or Smith Chart provides a particularly
insightful way of looking at the impedance matching problem as discussed in
Chapter 2.
Figure 3-10 illustrates the concept of lumped element impedance
matching as observed from the reflection coefficient plane.
Constant
Conductance
Circles
,
Constant
Resistance
Circles
Figure 3-10. Lumped Element Impedance Matching in the Reflection Coefficient Plane
As explained in Chapter 2, using a lumped element to transform an impedance is
equivalent to traversing circles of constant conductance or resistance. In lumped
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Tunable Impedance Matching Topologies
55
matching, this is done until the desired impedance is obtained. For the case of the
ladder network, we alternate between constant conductance and resistance circles.
After brief study of the Smith Chart above, it becomes obvious that one requires a
minimum o f three elements to match all possible impedance in the unit Smith
Chart. Less than three elements results in the so called “forbidden regions” [6 ]
discussed in basic microwave matching circuit design. With a three element or
greater ladder, there are an infinite number of ways to match every complex
impedance to the Smith Chart reference impedance. The following section will
illustrate an analytical way to consider all o f these possible matching networks for
a given load.
This will be accomplished by taking advantage of some of the
special properties and relationships that the constant conductance and resistance
circles have in the reflection coefficient plane.
3.2.2 Intersections o f Constant Conductance and Resistance Circles
The values of the required tuning elements in any matching network are
determined by three factors from a geometrical standpoint: 1) The location of the
load impedance (from the matching domain)
2) The location of the system
impedance (in the matching range) 3) The location o f the intersections of the
constant admittance and resistance circles that are traversed during the matching
process. The load impedance is assumed to be a subset of the matching domain.
The system impedance is assumed to be specified for the particular problem. It
will be assumed in the following developments that the system impedance is real
and that the reflection coefficient has been normalized such that the system
impedance lies at the point T= 0, hereby denoted as To. The key to determining the
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Tunable Impedance Matching Topologies
56
range of tuning element values is in the orderly determination of the intersection
of constant conductance and resistance circles. The equations describing these
intersections will be derived presently.
Consider the illustration of the intersection of a constant conductance
circle and constant resistance circle in the complex plane as illustrated in Figure
3-11.
The variables CA and CR denote the center points of the constant
admittance and resistance circles respectively. Similarly, RA and R r denote the
radii of the constant conductance and resistance circles respectively.
The
following important properties must hold for these two types of circles:
Constant admittance circles:
ca
~ r a ~^
0 < R a <\
(3.2-1)
- 1 < C A <0
Constant resistance circles:
c
R = rR ~ 1
0 < R r <1
(3.2-2)
- 1 < CR < 0
In the context of Figure 3-11, the circles can be defined with the following two
equations:
0U - C a )2 + V 2 = Ra 2 ,
(3.2-3)
( U - C r )2 + V 2 = R r 2 .
(3.2-4)
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Tunable Impedance Matching Topologies
57
Constant
Conductance
Circles
/
\
Constant
Resistance
Circles
*
7? /
Figure 3-11. Intersection of Constant Admittance and Resistance Circles
It is worth noting that all the constant conductance and resistance circles have
their centers on the V = 0 line in the complex plane. As a result, if there are two
points of intersection (as illustrated in Figure 3-11), these points will be
symmetric about the U = 0 line and are thus complex conjugates.
From Figure 3-11 it is clear that simultaneous solutions will occur if and
only if C a + R a > C r - R r . Recalling the relationship between the centers and
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Tunable Impedance Matching Topologies
58
radii of constant conductance and resistance circles from equations (3.2-1) and
(3.2-2), we can simplify this expression as follows:
CA + l > C R .
(3.2-5)
This simple expression is necessary and sufficient for an intersection to occur
between a constant admittance and resistance circle. Equality occurs when the
two circles intersect at a single point. Substituting CA +1 for RA on the right
hand side of equation (3.2-3) and substituting 1~ C R for Rr on the right hand
side of equation (3.2-4) and solving for U and V, we obtain the following solution
for the intersection points:
Cr +C a
U
=■
Cr ~ C a
(3.2-6)
±2
v ~~p.
l r
Required
in
the
— J C a C r ( C r - R a ).
~ l a
solution
of
equation
(3.2-6)
is
the
fact
that
■\J(CA - C R )2 = CR - C A which is directly implied from equations (3.2-1) and
(3.2-2). It is necessary to compute the susceptance and reactance at each of these
two intersection points. By solving equations (2.5-4) and (2.5-5) simultaneously,
one obtains
2V
x = --------- 5
T.
(1 - U ) l + V l
(3.2-7)
as the value of the reactance of the reflection coefficient T = U + j V . Similarly,
the value of the susceptance at this same point on the reflection coefficient plane
is
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Tunable Impedance Matching Topologies
b=
59
-IV
z
2 (1 + U) 2 + V 2
(3-2' 8)
Finally, one can express the reactance and the susceptance of the point
r'(fro m Figure 3-11) in terms of constant conductance and resistance circles by
substituting equation (3.2-6) into equations (3.2-7) and (3.2-8) resulting in
—
* < n = ■■
~ CA ~ Cr )
v , ------—
(3.2-9)
and
^ c n = -v
„ ■■ ■-
— — •
(3-2- 10)
Similarly, for the point T (from Figure 3-11) in terms of constant conductance and
resistance circles by substituting equation (3.2-6) into equations (3.2-7) and (3.28 ) to resulting in
■JCa C d (—1—C a ~ C r )
*(I~)=
* * n r \
(3'2- U)
\ I C a C d (—1—C a + C d )
b(T) = - A ; ■
A
R- .
(3.2-12)
and
Equations (3.2-9) - (3.2-12) are all that is needed to determine the range of values
required for different types of ladder networks. It is important to note that it was
not required to compute the resistance and conductance values at the reflection
coefficient points T and T' since all ladder networks of interest will traverse
constant resistance and admittance circles.
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Tunable Impedance Matching Topologies
60
3.2.3 Determination o f Values fo r the C-L-C it network
A very useful matching network topology is the C-L-C n network
illustrated in Figure 3-12. The objective is to determine the optimum required
range of values for C/, L 2 , and Cj
to impedance match a domain of load
impedances as described in Table 3-1.
/" V W A
C,
Impedance Match
Figure 3-12. C-L-C 7t Network
This will be accomplished by first determining all possible impedance matches
where {<£[/}is the set of all possible values of the matching
circuit elements) of the form in Figure 3-12 that will transform a specified load to
the Smith Chart reference impedance.
Figure 3-13 illustrates the process of
impedance matching a point, 71, in the matching domain on the unit Smith Chart
using a k C-L-C network. It is obvious that any point on the Unit Smith Chart can
be matched using this topology given the range of values for C/, L2, and Cj are
infinite. In a real network, the range of these values is finite, and thus one must
try to find an appropriate range of circuit element values that can be realized in
hardware.
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Tunable Impedance Matching Topologies
61
Figure 3-13. The Matching Process for a C-L-C k Network
The reflection coefficient transformation from f L
» r 0 can be
decomposed into three impedance transformations. After applying equations (3.28 ) - (3.2-12) to the circles illustrated in Figure 3-13, one obtains three reflection
coefficient transformations defined as follows after some algebra:
r.
bl
(3.2-13)
•r ' :
4c m
^ r 2 : x 2 = 71
1- C M
cm
-Rl
cl
(3.2-14)
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Tunable Impedance Matching Topologies
62
CM
- 2 ,
(3.2-15)
where
Ng = 6 3 ° x 2 °b\
R l = load circle radius
C i = load circle center
C y = center of the matching circle
b i = normalized load susceptance
bi = normalized susceptance of capacitor Q
x 2 = normalized reactance o f inductor Lo
63 = normalized susceptance of capacitor C3
and
R L'-L
rC
0 < C m < min
, f oxbL> 0 ,
(3.2-16)
0 < CM < m in[^/?^,j], f o r ^ < 0 .
(3.2-17)
Cl - R lV
2.
and
If bi<0, then there always exists a positive valued capacitor on any matching
circle with a center, C m , that falls in the range specified by equation (3.2-17);
however, if b[>0 , and the load lies on a constant resistance circle whose center is
less than Cm, then counterclockwise motion is required to intersect the required
matching circle for some values of Cm-
This is not possible with a positive
capacitor, and thus Cm<Cu resulting in the more complex limits on Cm illustrated
in equation (3.2-16). This condition can be derived using inequality mathematics
and is shown in Appendix B.
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Tunable Impedance Matching Topologies
63
Once a load is specified in the matching domain, equations (3.2-13) - (3.215) are parametric equations of a single constrained scalar value, C m , yielding
all possible values of C/, L?, and Cj that will impedance match the defined load.
By evaluating these equations for different loads in the matching domain and
specifying an optimization criterion, optimal ranges of values for C/, L?, and Cj
can be determined from a domain of load impedances. This will be explained in
section 3.2.5 and illustrated with examples.
3.2.4 Determination o f Values fo r the Resonator n network
Another very important network topology is the n resonator network
illustrated in Figure 3-14.
Each shunt branch of this network can have a
susceptance that varies from -B0 to +Bo where -B0 < Bi < +B0 and B, is the
susceptance of the 1th resonator. Each series leg of the network can range from X0 to +Xo where -X0 < Xj < +X0 and Xj is the reactance of the / h resonator.
Figure 3-14. Resonator n Network
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Tunable Impedance Matching Topologies
64
Figure 3-15. The Matching Process for a Resonator n Network
Once again, the objective is to be able to determine the minimum required range
o f values for the elements in the ladder network.
Figure 3-15 illustrates the
process of impedance matching an arbitrary load using a resonator K network. It is
important to note that unlike the matching process using the C-L-C k network, at
each juncture in the matching process (i.e. T\, f i , etc.) , there are two possible
directions that can be traversed along the constant resistance and admittance
circles.
This occurs because the resonator can act as a positive or negative
susceptance or reactance depending on which side o f the resonance the operating
point is. As a result, the equations describing the matching process differ slightly
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Tunable Impedance Matching Topologies
65
from equations (3.2-13) - (3.2-16). Applying equations (3.2-8) - (3.2-12) and
selecting the shortest path, either a positive or negative susceptance (or reactance)
for the first path, the following expressions are obtained:
Rl
(3.2-18)
\
r„rI'-S-»r2.r2':*2 =
(3 -2 - |9 )
r2.r2 — >r3,r3:b3 - S ( b L ) J —
- 2
,
(3.2-20)
where
ri
b L < oi
» j - i bL*o\'
(3 -2' 21)
YL = S L + j b L .
(3-2-22)
RL =
IT ’
g L +l
CL = — T T = /?L ~ 1 ’
SZ. +
1
(3.2-23)
(3-2-24)
for
0 < C M <rtdn[RL , h .
(3.2-25)
Evaluating these equations for different loads and specifying an optimization
criterion, minimum ranges of values for B/, X 2 , and Bj can be determined from a
domain of load impedances. This will be explained next.
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Tunable Impedance Matching Topologies
66
3.2.5 Determining Optimum Ranges o f Component Values from a
Domain o f Load Impedances
In sections 3.2.3 and 3.2.4 mathematical expressions for determining the
set of all possible tunable maps, Af«=, for a specified load in the matching domain
for two types of ladder networks have been derived, as required in step 2 o f Table
3-1. The next task is to use this information to determine the optimum component
range needed for a domain of load impedances as outlined in steps 3 and 4 of
Table 3-1. To achieve this, we first must define what is meant by an optimum
range of values. This is not at simple as it might first appear. To appreciate the
complexity, consider the following facts:
a) Common to both types of ladder networks discussed in 3.2.3 and 3.2.4,
there are two distinct types of components in every ladder network: 1)
inductors and capacitors; or 2 ) tunable reactance and tunable
susceptance resonators.
The question comes up as to which
component range is more important to minimize, the capacitor or the
inductor, the tunable reactor or the tunable susceptance? How do we
compare the range of capacitance to the range o f inductance when they
have different units?
b) a range of values for a given component may be minimum but the
actual values required for the component may be very impractical. For
example, is it better to use a range of capacitance from I pF to 5 pF or
a range of capacitance from 10000 pF to 10001 pF? The latter may
have a smaller range, but may be very difficult to realize in hardware at
5 GHz.
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Tunable Impedance Matching Topologies
67
As a result of these complexities, a general optimization criterion must be set up
to generate a useful solution.
Optimization theory is a very complex and well developed science as is
evident from the multitude of books that address the subject.
A number of
sources were consulted on this matter [18] - [23]. In the following development,
the objective function used for the individual circuit element, e„ is
w , ) 2'
<32-26)
where et is the value of the zth circuit element, and e;lnom is the nominal value of
the zth circuit element. The nominal value for a circuit element is defined as a
circuit element value that is in the middle o f the range o f values that is easily
realized with hardware. For example, a circuit that used a varactor diode at 2
GHz might
have a e-.lnom of 5 rpF.
°
This would make sense if varactors were
available at that frequency range that could vary from 2 pF to 8 pF. One would
not select a value of 10000 pF at that frequency because realization in hardware
would be impossible. It is important to note that the error function in equation
(3.2-26) is minimum at e, = e-t
, and that as the value of e, departs from
e;lnom in either direction, the error increases. This serves to reduce the required
n
range of values for the circuit component while constraining the actual value to
something that is realizable.
When carrying out a multiobjective optimization where the individual
objectives are not all optimized at the same operating point, a weighting of the
importance of the individual goals must take place. This is the justification of the
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Tunable Impedance Matching Topologies
formulation shown in Table 3-1, step 4.
68
In terms of the circuit components
described here, the resulting formulation for the ladder circuit topology is
f c l A Cm ) = (Q ( Q i ) ~ C\nom ) 2 + a clc ( ^2 ( Q i ) ~ ^-nom ^
+ (C3(Cm) - C 3^ ) 2
fres('Cm) = (•B\('Cm ) “ Blnom )'2 +
( X 2('Cm) “ * 2„om )'2
. (3.2-28)
+ (fl3(Cm) - f l 3wom)
Equations (3.2-27) and (3.2-28) are the optimization functions for the C-L-C
ladder network and the resonator network respectively. Variables are defined as
follows: Ci(Cm) , L i(C m) , and C3(Cm) are the range of values obtained for a
given load impedance, /*., as defined in equations (3.2-13) - (3.2-17). Similarly
yj(Cm) , Z2 (Cm) , and f 3(Cm) are the range of values obtained for a given load
impedance, r L, as defined in equations (3.2-18) - (3.2-25). W e seek to minimize
the values of f ck{Cm) and / rei(Cm) over the defined range o f values for Cm as
defined in equations (3.2-16), (3.2-17), and (3.2-25). Since / c/c(Cm) and / r«(Cm)
are each functions of a single scalar parameter, Cm, that is defined over a finite
range of values, this is easily accomplished numerically. The result of minimizing
equations (3.2-27) and (3.2-28) is a matching solution for a particular load that
serves to reduce the range of values of each of the three components of the ladder
networks illustrated in Figures 3-12 and 3-14 respectively. If the complex load
impedance is varied over the impedance domain of interest and the optimization
process repeated, the set of component values that result are matching circuit
values for every point in the impedance domain such that the variation of these
component values is minimized.
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Tunable Impedance Matching Topologies
69
The following example will illustrate this process for a C-L-C k matching
network. All of the steps in Table 3-1 will be carried out here. Assume that we
are trying to match a load whose reflection coefficient is not known, but is
believed to be in the region |r ^ | < 0.9. The problem at hand is to determine what
optimum range o f circuit component values is required to match any such load for
a matching network o f the form illustrated in Figure 3-12.
In determining the
values, the following set o f assumption will be made:
1. The frequency of interest is 1 GHz.
2. A 1 pF range of capacitance variation is as easy to achieve as a 5 nH
range of inductances
3. The system impedance is 50 Q.
4. A desirable capacitance value for matching should be in the
neighborhood of 10 pF.
5. A desirable
inductance value for matching should be in the
neighborhood of 5 nH.
It is important to note that these assumptions will in general be a function of the
method in which the hardware is realized. For example, depending on how the
electronically tunable capacitor will be fabricated (varactor or other more
advanced techniques introduced in Chapter 4), certain values (i.e. 10000 pF) may
not be realizable at 1 GHz. For different applications, other assumptions may be
more appropriate.
Appendix C contains a MATLAB program listing that
implements the equations (3.2-13) - (3.2-17) and (3.2-25) for this particular
scenario. Figures 3-16, 3-17, and 3-18 illustrate the resulting values for C/, L 2 ,
and Ci over the required matching domain of impedances, respectively.
The
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Tunable Impedance Matching Topologies
70
graphs illustrate the computed optimal match component values with projections
8
CO
n
m
m
33
-v -O
0 .0
•S
'«=» V -<
Figure 3-16. Values for C| for CLC Matching Example
^ .O
0-0
_-v.o
Figure 3-17. Values for L2 for CLC Matching Example
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Tunable Impedance Matching Topologies
io
71
.
Figure 3-18. Values for Cj for CLC Matching Example
down to the complex plane for the entire matching domain. The minimum and
maximum values for C/, L 2 , and Cj required over the entire range are shown in
Table 3-2.
Component
Minimum Value
Maximum Value
c,
1.01 pF
1.82nH
2.47 pF
26.64pF
11.02 nH
16.87pF
l2
c3
Table 3-2. Example Required Range for C-L-C values for |T^| <0.9
While this range of values may be somewhat difficult to achieve using
conventional methods, the new electronically tunable circuit element techniques
developed in Chapter 4 can achieve this kind of tuning range. But also, this is a
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Tunable Impedance Matching Topologies
72
very broad load range to match. Furthermore, Figures 3-16, 3-17, and 3-18 can be
used to determine required component values for subsets of the specified
impedance domain. Smaller ranges of values can be expected for subsets of the
broad impedance matching domain specified in these figures.
3.3
Tunable Cascaded Transmission Line Network
Synthesis
Another problem of interest is the determination of an appropriate
topology for the design of a tunable distributed matching network capable of
matching any impedance matching domain that is a subset o f the unit Smith. The
topology proposed is not the only means of addressing this problem. However it is
easily implemented in hardware as discussed in detail in Chapter 4.
Figure 3-19 illustrates the proposed electronically tunable distributed
network. The approach taken here is to use an electronically tunable phase shifter
of characteristic impedance Zo to transform the arbitrary complex load to the real
axis. After this operation, an electronically tunable quarter wave transformer is
used to transform this real impedance to the Smith Chart reference impedance.
For a specified impedance domain, D, on the Smith Chart, the goal is to minimize
the required range o f phase shifts from T-Line 1, hereby denoted as Q(p), and
minimize the required range of characteristic impedances for T-Line 2, hereby
denoted as Zip). The minimum required range of values for dip) will be as a
function of Z.TL while the range of values for Zip) will be formulated as a
function of | r j . Consider the Smith Chart illustrated in Figure 3-20. It is clear
that for any load in the impedance matching domain, D czU nit Smith Chart, the
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Tunable Impedance Matching Topologies
73
maximum required range of phase angles for a transmission line of characteristic
o
impedance Zo is 90 . Assume that the impedance matching domain is the set
{r,-} c Unit Smith C h art.
The
minimum
tuning
range required of the
transmission line acting as a phase shifter, 6{p), can be defined as
A0 = j min max zjr,- } - min z { r t},360°-( max z { r (}-m in z{r(}) , (3.3-1)
where
{ rJ* D ,
D is a connected region,
and there does not exist a pair of points, T,-, F j , such that z r , - z r ; = 180°
in D and T, , Fj e D .
Tip)
/
/
/
Electronically
Tunable
Quarter-Wave
Transformer
(0=90°)
Q(P)
JL
//
Electronically
Tunable
Phase
Shifter
Z c—Z q
Figure 3-19. Electronically Tunable Distributed Matching Network Topology
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Tunable Impedance Matching Topologies
74
0(p)<9O'
Figure 3-20. Matching a Domain of Impedances with an Electronically Tunable Distributed
Matching Network
Again consider the Smith Chart illustrated in Figure 3-20. Given that
impedance matching domain could have points anywhere on the unit Smith Chart,
it is not clear which side of the real axis the range of the map 0{p) will intesect.
As a result, the required quarter-wave transformer will have two possible values
for a load with a given reflection coefficient magnitude. These two values can be
obtained by first noting that the real impedance, Z reai , obtained after carrying out
the phase shift will be
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Tunable Impedance Matching Topologies
75
(3.3-2)
” '2 ~
H r Z.
° \+ \r L
(3.3-3)
Additionally, the required quarter-wave transformer must have a characteristic
impedance of
(3.3-4)
Substituting equations (3.3-2) and (3.3-3) into equation (3.3-4), the required
characteristic impedance for the quarter-wave transformer to match a load whose
reflection coefficient magnitude is |r ^ | is
where
d = ± |r L
(3.3-5)
Z q = system characteristic impedance
Z q = electronically tunable quarter wave transformer impedance
For a given reflection coefficient magnitude, two curves can be drawn illustrating
the upper and lower bounds of the required characteristic impedance tuning range
for the required electronically tunable quarter-wave transformer for loads with
reflection coefficient magnitudes less than jr ^ |. Figure 3-21 is an illustration of
these bounds and can be used as a design guide for determining the required
tuning range for different types of loads.
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Tunable Impedance Matching Topologies
76
«O
c
■<oQ
&
E
o
2*c
2o
2(B
Lower Bound
Upper Bound
£
o
O
e
o
0e29
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Reflection Coefficient Magnitude
Figure 3-21. Required Electronically Tunable Quarter-Wave Transformer Tuning Range
for Impedance Matching Domains
It is interesting to note that if it is known that the impedance matching
domain, D, lies entirely below the real axis on the Unit Smith Chart, the required
range of values for the quarter wave transformer, Zip), can be computed using
only the lower bound curve from Figure 3-21. Similarly, if it is known that the
impedance matching domain, D, lies entirely above the real axis on the Unit
Smith Chart, the required range of values for Zip) can be computed using only the
upper bound curve.
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Tunable Impedance Matching Topologies
77
3.4 Tunable Impedance Matching Using Broadband
Reactance and Susceptance Cancellation
There are many approaches currently in use for designing broadband
matching networks [5], [6 ], [14]. Several o f the more popular ones are I) purely
reactive matching networks subject to the Fano-Bode [24]-[25] bandwidth
limitation; 2) resistive matching; 3) either (1) or (2) in combination with
feedback; 4) distributed amplifier design. Each of these techniques has its own set
of advantages and disadvantages. The ultimate goal in broadband matching is to
impedance match over as wide a frequency range as possible while obtaining a
relatively flat transfer response over that band and dissipating as little RF power
as possible.
+c,
G v ra to r
+ C„
Broad Band Active Negative Element
Matching Network
Arbitrary Passive Load
Figure 3-22. Novel Broadband Active Matching Circuit Topology
The new approach proposed here is the use o f microwave negative
inductors and capacitors to form a purely reactive network that can potentially
avoid the Fano-Bode bandwidth limitation (see Figure 3-22) at the expense of DC
power consumption. The Fano-Bode bandwidth limitation assumed the use of
passive matching elements, and therefore does not apply to circuits containing
negative inductors and capacitors. The assumption of passive matching networks
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Tunable Impedance Matching Topologies
was made because at the time o f Fano and Bode’s
78
work, MMIC and IC
technology did not exist, and therefore the concept of using negative inductances
and capacitances was impractical.
In today’s environment, improvement in
miniature device technology occurs on a regular basis, and it is in fact quite
feasible to assume the use of negative inductors and capacitors. When the load to
be matched has a high Q and the negative inductors and capacitors operate over a
substantial bandwidth, the use of active matching networks as illustrated in Figure
3-22 will exceed the Fano-Bode predicted bandwidth limitation that applies to
passive reactive matching.
The achievable bandwidth is a direct function of
device technology, not network theory. This will be explained shortly.
The network shown in Figure 3-22 is capable of providing a tunable map
that has performance over a broad bandwidth as illustrated earlier in Figure 3-4.
If the model of the load is known in terms of its lumped components, the
matching network can effectively transfer RF energy from the source to the load.
Even if the exact values of the elements in the load model are not known, the
tunable map can compensate as long as the topological form o f the load model is
correct. As a result, this tunable map, N$, is capable of correcting for errors due
to domain inaccuracies, map inaccuracies, and parameter inaccuracies as
discussed in section 3.1.1. The procedure for determining the required values for
the network is obvious from Figure 3-22. The procedure outlined in Table 3-1
can be followed omitting steps 3,4, and 5 since there is only one set of component
values {ex-} for each load in the impedance matching domain, D,.
Negative resistors, inductors, and capacitors can be synthesized using
negative impedance converters (NICs) [26] - [31]. At low frequencies, these have
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Tunable Impedance Matching Topologies
19
been implemented using operational amplifiers, transistors and even tubes. A new
technique for designing such devices at microwave frequencies will be discussed
in chapter 4. One of the first uses of the negative impedance converter was as a
negative resistance device. The negative resistance was used as a repeater to
provide amplification on a long transmission line [32].
The use of negative
resistors in circuit design is now commonplace both in oscillator work and
reflective amplifier work [33] - [35].
Much less common is the use of negative capacitors and inductors. Very
few authors have eluded to the use of these components in circuit design [36] [38]. One of the difficulties is the conceptualization o f the meaning of a negative
capacitor or inductor and the use of such a device.
Definition 3.2:
A negative capacitor is an active circuit that when
impressed with a sinusoidal voltage o f frequency
CO
will respond with a current
equal and opposite to that o f an ideal positive capacitor over a finite bandwidth
(Figure 3-23).
Definition 3.3:
A negative inductor is an active circuit that when
impressed with a sinusoidal current o f frequency
CO
will respond with a voltage
equal and opposite to that o f an ideal positive inductor over a finite bandwidth
(Figure 3-23).
It is important to note that these responses can only occur over a finite
bandwidth which is dependent on the circuit design and the upper frequency
cutoff of the active devices used.
This is because negative inductors and
capacitors can only be realized using active circuits [39] which require active
devices.
Since all real devices have an upper cutoff frequency, the circuit
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Tunable Impedance Matching Topologies
80
comprising the negative inductor or capacitor must become passive above some
upper frequency /,. As a result, it is impossible for the circuit to behave like a
negative inductor or capacitor above this frequency, and thus the circuit can only
behave like a negative inductor or capacitor over a finite bandwidth.
+ jx
'min
’max
to axis
— L => X = j(£> ( ~ L )
;g) C
Figure 3-23. Negative Capacitor and Inductor Characteristics
One of the most powerful capabilities of the negative capacitor and
inductor is to provide broadband gain equalization. Narrow bandwidth in circuits
results from parasitics that provide a frequency dependent component to the ideal
resistance of a load. Large parasitics result in high Q devices which are inherently
difficult to match over a broad bandwidth. Negative inductors and capacitors can
be used to cancel out the energy storage effect of the parasitics in a particular
circuit.
This can be understood by considering the following two simple
examples. If a negative capacitor is placed in parallel with a positive capacitor,
the effect is a cancellation of the reactance over a broad bandwidth. This is in
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Tunable Impedance Matching Topologies
81
contrast to putting an inductor in parallel with a capacitor which only cancels the
reactance at the point of resonance. Similarly, if a negative inductor is placed in
series with a positive inductor, the effect is a cancellation of reactance, in contrast
to the series L-C circuit which results in cancellation only at resonance. Consider
the scenario where a negative capacitor of equal and opposite value to a parasitic
capacitance is placed in parallel with a simple parallel R-C load as illustrated in
-c
Q
=
+ C,
+R
R La> { C i ~ C j )
Figure 3*24. Decreasing the Q of an R-C Load Using a Negative Capacitor
Figure 3-24. Over the frequency range that the negative capacitor operates, it will
source or sink an equal and opposite amount of current as the parasitic capacitance
in the load, effectively canceling the effect of the parasitic capacitance.
As a
result, if the negative capacitor is exactly equal and opposite to the parasitic, a Q
of zero is obtained. In real design, a perfect match is never obtained, and thus
there will be some small residual capacitance equal to the difference between the
negative and positive capacitor. Even so, the result is a significant reduction in
the circuit Q. If we apply the Fano-Bode bandwidth limit to the modified circuit,
the resulting achievable bandwidth will be significantly improved over the
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Tunable Impedance Matching Topologies
82
original. This same effect occurs if a negative inductor is placed in series with a
series R-L circuit as illustrated in Figure 3-25.
+*,
to
- Lrf)
Q=
Figure 3-25. Decreasing the Q of an R-L Load Using a Negative Inductor
In summary, determining the optimal tuning range for the broad band
reactance and susceptance cancellation matching technique is trivial given the
topology of the load. The complexity is in realizing quality negative inductors
and capacitors as will be explained in the next chapter.
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83
CHAPTER 4
T h e D e s ig n O f M ic r o w a v e E l e c t r o n ic a l l y
T u n a b l e C ir c u it E l e m e n t s
In the design of traditional matching networks, fixed capacitors, inductors,
resonators, and transmission lines are used but provide no tuning capability.
If
the networks are fabricated but do not work due to modeling or measurement
error, the elements must be removed from the circuit and replaced. In the case of
miniature microwave design, this can be very time consuming, difficult, and
expensive.
In the case of monolithic microwave integrated circuit (MMIC)
design, this is impossible and a new design is necessary resulting in the significant
expense and time delay of a second foundry run.
The fundamental reason that electronically tunable matching networks are
not used in microwave circuit design is that there are very few available tuning
elements suitable for design and fabrication. It is the purpose of this research to
change this situation by introducing several new techniques for realizing
microwave tuning elements. These techniques will take advantage of existing
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The Design o f Microwave Electronically Tunable Circuit Elements
84
solid state technology and emerging MMIC technology allowing for the design of
miniature circuits that emulate a much wider variety of tuning elements.
The following sections will describe two classes of electronically tunable
microwave circuit elements. First, tuning elements that use varactor diodes will
be discussed. Included in this discussion is a novel approach for designing an
electronically tunable microwave transmission lines. Secondly, a new approach to
designing MMIC tuning elements using microwave current conveyors will be
presented. Traditionally, current conveyors have been used as building blocks at
low frequencies. This is the first reported technique for designing them in the
microwave frequency range.
Microwave current conveyors can be used to
synthesize virtually any type of tuning element imaginable. Theory and examples
will be presented.
4.1
The Design of Electronically Tunable Circuit
Elements using Varactor Diodes
The varactor diode provides a very simple yet powerful way to accomplish
electronic tuning of circuits. The word varactor is an abbreviation for variable
reactor, in which the diode acts as a voltage variable capacitor, thus resulting in a
variable reactance.
When reverse biased, a depletion region is set up in the
junction of the device. By changing the bias voltage, the size of the region and
thus the junction capacitance can be varied. This phenomenon will occur in both
P-N junctions as well as Schottky junctions, even though the Schottky junction is
a metal-semiconductor junction [40].
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The Design o f Microwave Electronically Tunable Circuit Elements
This
section
will
discuss
varactor
diode
modeling,
85
operating
characteristics, and applications in electronic tuning elements. The varactor tuned
resonator will be reviewed with a discussion of its uses in an electronically
tunable matching network.
Additionally, a new technique for designing
electronically tunable transmission lines using varactors will be presented and a
discussion of its use in electronically tunable matching networks will also be
discussed.
4.1.1 Varactor Diode Modeling and Characteristics
In the microwave frequency regime, a varactor diode can be modeled
using the circuit illustrated in Figure 4-1.
Rs(v)
C
P
Figure 4-1. Microwave Varactor Diode Model
where Cp is the package parasitic capacitance, Lp is the package parasitic
inductance, C; is the junction capacitance, Rs is the junction resistance, and v is the
applied reverse bias voltage.
Since Cp and Lp result from package parasitics, they do not vary with
applied voltage. On the other hand, Cj and Rs are a result of the dynamics of the
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The Design o f Microwave Electronically Tunable Circuit Elements
86
diode junction and are bias dependent. For high Q devices, Rs is small and can be
assumed to be approximately constant. The junction capacitance can be expressed
in terms of the applied bias voltage and material properties as follows [41]:
(4.1-1)
where 0 is the built in potential (0.7 for Si and 1.3 for GaAs), v is the applied
<9logC
reverse bias voltage, Co is the capacitance at zero volts, and y = —---------------.
d log(V + <j))
Two types of junction doping profiles will be discussed here, abrupt and
hyperabrupt.
For an abrupt junction, y = constant = 0.47 for all reverse bias
voltages. For the hyperabrupt junction, y varies depending on the reverse bias. A
measurement of the value in a local region of use is required or a curve fit over the
entire range of applied voltages must be performed to obtain a value for yfor the
hyperabrupt junction.
When using the varactor diode in electronically tunable matching
networks, an important parameter is the Q of the device.
Since the goal of
impedance matching is usually to obtain maximum power transfer, the use of
lossy devices will result in power dissipation in the matching network and not
power transfer to the load. A varactor diode chip usually has small parasitic
reactance in the 1 - 8 GHz frequency range, and thus a good estimate of the device
Q can be expressed as follows:
Q=
coRsC j
(4.1-2)
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The Design o f Microwave Electronically Tunable Circuit Elements
where Q) is the angular frequency.
87
It is important to note that the Q of the
varactor is highly dependent on the operating point.
Since Rs is small and
approximately constant, large values of Q will result in much lower Q 's than
small values of C; . As a result, this constraint must be considered carefully in the
design of electronically tunable matching networks.
Another important consideration when using the varactor as a tuning
element is how large an RF signal can be used without degrading the matching
circuit performance.
The varactor diode is actually a nonlinear device whose
properties have been exploited in the design of frequency doublers, triplers, and
multipliers [42]. For use as a tuning element, nonlinearities are not desirable and
merely serve to degrade the performance of the tuning circuit. To understand the
concern, consider the following scenario. The instantaneous voltage on the
varactor will swing from a minimum value, Vmin to a maximum value of V ,^. At
each instant in time, the value of the capacitance will also change as shown in
equation (4.1-1). If we average this changing capacitance over time, a value Ceff
will be obtained. It is clear that as we reduce the distance between Vmin and V ^ ,
Ceff
will change. This means that the average capacitance o f the varactor will
change as the amplitude o f the RF imposed voltage is changed. Furthermore, Vmm
must be kept away from the forward bias region, and VVu must be kept away from
the reverse breakdown region of the device. Therefore, the DC operating point
must be selected such that the resulting RF voltage (including DC offset) on the
varactor is between reverse breakdown and forward conduction. This does not
prohibit the use of the varactor for large signal operation, but merely reduces the
tuning range of the device.
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The Design o f Microwave Electronically Tunable Circuit Elements
88
To understand the nature of the harmonics that will be generated from a
varactor diode during nonlinear operation, the Manley-Rowe relations can be
examined [40].
These relations hold only for a lossless variable reactance,
however, for high Q devices, this approximation is adequate.
In general, this
approach provides valuable insight into the nonlinear operation of the varactor,
and has been used extensively to design frequency doublers, triplers and
multipliers. If it is assumed that the large signal excitation on the varactor can be
expressed in terms of Fourier series of two sinusoids, with frequencies Oh and COi,
the Manley-Rowe relations express the relationship between power at the various
frequencies as follows:
Z
mPm„
—----- = 0
mnmco{+n(OQ
y _H Pm n
=Q
m n mcox+ncoQ
(4.1-3)
{4A A )
where P™ is the power into the capacitor at frequency mcoi+ncoo. These relations
show that not all harmonics will exist in large signal varactor diode operation, but
only those resulting from equations (4.1-3) and (4.1-4). For electronically tunable
matching networks, these equations can be used to ensure that harmonics are
small enough not to significantly reduce the transfer of power from the source to
the load at the frequency o f interest. For example, in the case o f single frequency
operation, one can rewrite the relations as a single equation
oo
IP „= °
(4.1-5)
/! = I
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The Design o f Microwave Electronically Tunable Circuit Elements
89
where Pn is the power at the nth harmonic. Equation (4.1-5) shows us that if we
put power into the system at frequency n(o=lco, then the amount of power put out
at all other harmonics combined is equal to the power put in. If the system does
not present a resistive load at any of these harmonics, a minimum amount o f the
power, Pi, would be transferred to harmonic frequencies. This suggests that a
tuning circuit should try to present a reflection coefficient with a magnitude o f one
at the harmonic frequencies for optimum performance.
4.1.2 Varactor Tuned Resonators
As discussed in Chapter 3, an important class of tunable matching
networks depend on the use of tunable resonators. Resonators can be modeled as
a series R-L-C or a parallel R-L-C circuit. The series resonator has a minimum
reactance at resonance and the parallel resonator has a minimum susceptance at
resonance. In addition to modeling the lumped R-L-C circuit, this simple model
of resonance can be applied to all types of physical resonators including metal
cavities, microstrip lines, and dielectric resonators.
Electronically tunable
resonators can easily be assembled using varactor diodes. These resonators are
typically used in tunable bandpass filters and voltage controlled oscillators, but
they can also be used in electronically tunable matching networks. It is important
to understand the difference in the application.
For review and the purpose of comparison, some resonator properties that
are important in the design of VCO’s and tunable bandpass filters will be
summarized. When using resonators in VCO’s and tunable bandpass filters, the
properties of interest are:
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The Design o f Microwave Electronically Tunable Circuit Elements
90
1. The Q of the resonator.
2. The response of the resonator as a function of frequency.
For filter design, the Q of the resonator will affect the insertion loss in the
passband and the bandwidth of the response.
For VCO, the Q will effect the
phase noise performance and the amount of negative resistance needed to
compensate for the loss of the resonator at resonance.
High Q resonators are
obtained when the following conditions are true [43]:
Series Resonators
Rs < < x L
(4.1-6)
GS « B S
(4.1-7)
Parallel Resonators
where
Rs = Effective series resistance of a series resonator at resonance
X l = Effective series reactance of the inductor only at resonance
Gs = Effective parallel conductance o f a parallel resonator
Bs = Effective parallel susceptance o f the capacitor only at resonance
When using resonators in the design o f electronically tunable matching
networks as described in Chapter 3, we are interested in different but related
quantities:
1. The ratio of reactance to resistance in series resonators.
2. The ratio of susceptance to conductance in parallel resonators.
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The Design o f Microwave Electronically Tunable Circuit Elements
91
3. The response of the resonator as a function of the varactor capacitance
at a single frequency.
The electronically tunable matching network requires variable reactances at a
specified frequency in order to transform the load impedance domain to the
specified system impedance. Ideally, the ladder network contains lossless tunable
series reactances and parallel susceptances. In reality, the circuits used to generate
these reactances and susceptances are lossy. To approach the performance of the
ideal matching network, the following two conditions are required:
Series Resonators
Rs (co)«
X s (co)
(4.1-8)
Gs (0 ) ) «
Bs (co)
(4.1-9)
Parallel Resonators
where
Rs = Effective series resistance of a series resonator
Xs = Effective series reactance of a series resonator
Gs = Effective parallel conductance of a parallel resonator
Bs = Effective parallel susceptance of a parallel resonator
co = Frequency of operation , not of resonance
Equations (4.1-8) and (4.1-9) imply that the resonators are dominated by their
reactive components and not the resistive ones. Interestingly enough, in the case
of the resonator, this isnot equivalent to increasing theQ. The Q of a series or
parallel
L-C resonator is determined by L or C,and only
at the resonant
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The Design o f Microwave Electronically Tunable Circuit Elements
frequency.
92
In general, when the resonator is used in an electronically tunable
matching network, the resonant frequency is not the frequency of interest. This is
because at resonance, the resonator has no reactive part and thus does not provide
any tuning. Additionally, as shown in equations (4.1-8) and (4.1-9), this is the
point of operation that the resonator will least accurately model the ideal tunable
reactor.
Some examples
of techniques
for building electronically
tunable
resonators as found in the literature [44] - [46] are illustrated in Figure 4-2. It is
important to note that the distributed element resonators have both a series and a
parallel resonant mode and thus one type of circuit can be used to synthesize
variable reactance and variable susceptance circuits as required for electronically
tunable matching network synthesis.
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The Design o f Microwave Electronically Tunable Circuit Elements
93
Tunable Series L-C Resonator
Tunable Ring Resonator
Tunable Parallel L-C Resonator
- bias
Tunable Cross Slot
Resonator
+ bias
Tunable Rhombic Resonator
Figure 4-2. Electronically Tunable Resonators that Use Varactor Diodes
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The Design o f Microwave Electronically Tunable Circuit Elements
94
4.1.3 A New Approach to Designing Electronically Tunable
Transmission Line Using Varactors
4.1.3.1 The Traditional Transmission Line
A standard transmission line can be characterized by a single set of two
port parameters (Y-Parameters, S-Parameters, etc.).
A typical microwave
transmission line is realized using stripline, microstrip, coplanar waveguide, or
any of a number of similar structures. The transmission line is characterized by its
characteristic impedance and electrical length. Traditional transmission lines are
such that these parameters are not electronically tunable. Figure 4-3 illustrates a
typical symbolic representation of such a line.
Zo,0
Figure 4-3. Microwave Transmission Line Representation
The Y-Parameter matrix of such a line in its most general
f
1
s6
coth —
0)Q
0
- esc h —
Y ------I
sd)
- esc h —
Q)0
sd
coth —
«o )
(4.1-10)
If we let the complex frequency variable, s —> jc o , we obtain the following matrix
for the lossless line
'
Y=zz~
0
- cot
0)6
0)0
0)6
esc —
0) 0
0)6 A
C SC ----
0)Q
0)6
- cot —
(4.1-11)
0)q
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The Design o f Microwave Electronically Tunable Circuit Elements
95
Finally, if we assume that the frequency of operation, co -» o^, we obtain
/ (-c o t6
Y=—
Zo escd
e sc 6 ^
(4.1-12)
-c o td
4.1.3.2 A Lumped Element Equivalent Transmission Line
We will now look at the Y-Parameters of a simple rc-network composed of
lumped inductors and capacitors as an approximation of the transmission line as
illustrated in Figure 4-4.
/Y Y Y \
C,
_
c ,
Figure 4-4. Lumped Element Transmission Line Approximation
This circuit is characterized by the following Y-Parameters
Y=
_ 1_
f 1
sLi
sLi
1
sLi
If we let s
^
sLi
(4.1-13)
■+sC\
jco, the following matrix is obtained for the network in Figure 4-4
£OCi
Y= y
1
1
a>Li
coLi
1“
(o Lq_
coCj -
1
(4.1-14)
o)Li
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The Design o f Microwave Electronically Tunable Circuit Elements
96
One can now equate terms in the Y matrices o f equations (4.1-12) and
(4.1-14) to obtain the two following unique equations:
1
cot#
(oCl - —
=- —
C0 L 2
Z0
1
CSC#
00Lq
Zq
If one assigns the variables a and
(4.1-15)
(4.1-16)
to the right sides of equations (4.1-15) and
(4.1-16) respectively, it is simple to solve for Ci and L 2 as follows:
_ (a + p ) /
/(O
(4.1-17)
and
(4., - 18)
By selecting desired values for Z0 and #, one can determine the required values for
Ci and L2. The dependence on frequency that exists in equations (4.1-17) and
(4.1-18) implies that this equivalent structure will only behave like a transmission
line at a specific frequency. The band over which this behavior is adequate will
be dependent on the application.
4.1.3.3 The Electronically Tunable Transmission Line Circuit
The circuit of Figure 4-4 illustrates a structure that can be designed to have
a fixed set of electrical properties. As discussed in Chapter 3, to design tunable
impedance matching networks, it is necessary to have matching elements that are
widely tunable to allow for real time adaptation, compensation for device
nonlinearities, and programmable performance. The capacitors in Figure 4-4 can
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The Design o f Microwave Electronically Tunable Circuit Elements
97
be implemented using varactor diodes. However an electronically tunable
microwave inductor is only available in MMIC [47] - [56]. These techniques for
generating MMIC active inductors can not handle large signal levels and require
more DC power than would be acceptable for a medium power amplifier. To
obtain the equivalent of a tunable inductor in the bandwidth of interest, a parallel
varactor surrounded by J-Inverters is proposed and illustrated in Figure 4-5. The
resulting inductance, L eqttiv, illustrated in Figure 4-5 is used in place of L 2 shown
in Figure 4-4. The variable J represents the admittance of the J-inverters used in
conjunction with the capacitor C2 (as shown in Figure 4-5) to synthesize a tunable
inductor. This circuit topology allows for the realization of a tunable transmission
line in a specified frequency band.
Since all three of the elements in this
realization are tunable, a much broader range of transmission line characteristic
impedances and electrical lengths is possible. Taking equations (4.1-17) and (4.118) and substituting for the variables a,
and L2, one obtains the following
simplified expressions
l-c o s fl
J 2Z q sin#
(4.1-19)
(4.1-20)
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The Design o f Microwave Electronically Tunable Circuit Elements
98
i—i
Lequiv. = C 2J J 2
Figure 4-5. Electronically Tunable Transmission Line Topology
Similarly, one can solve for Zo and 9 in terms of C/ and C? as follows
9 = arccos(l - CiC 2<y2 / 72)
Zo = ' /
C .co/J2
,
,,
-y/l-fl -C,C2tu2/ 7 2)
(4.1-21)
(4.1-22)
It is important to note that there are many ways to implement J-Inverters as
explained in great depth by Matthaei et. al. [11]. An example is the quarter wave
transformer.
Such a structure is easy to implement in microstrip but has the
disadvantage of narrow bandwidth and large size at lower microwave frequencies.
It is interesting to note that for equations (4.1-21) and (4.1-22) to yield a valid
solution,
J2
~ Y > C i C2
co
(4.1-23)
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The Design o f Microwave Electronically Tunable Circuit Elements
99
It is clear that not all possible values of C/ and C? yield a circuit equivalent to a
transmission line. Equations (4.1-19) and (4.. 1-20) in conjunction with equation
(4.1-23) provide a powerful yet simple way to compute the required components
to synthesize a tunable impedance transformers (0 = constant), phase shifters (Zo =
constant), and more generally transmission lines over any desired range of
frequencies.
Chapter 5 contains extensive measured data of an electronically
tunable transmission line built and tested using this technique.
4.2
The Design of Electronically Tunable Circuit
Elements using Microwave Current Conveyors
This section will discuss a technique for designing a multitude of
microwave electronically tunable circuit elements realizable using monolithic
microwave integrated circuit (MMIC) technology. A novel technique for realizing
a microwave current conveyor will be introduced [57] and its application to
microwave tuning elements will be explained.
4.2.1 Introduction to the Current Conveyor Concept
The current conveyor was developed by A. Sedra quite by accident [58].
During work on his master’s thesis in 1966, he was developing a voltage
controlled waveform generator to be used as part of a design of a programmable
instrument for incorporation in a system for computer controlled experiments,
when he happened upon a novel circuit. As a master’s student, he was able to
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The Design o f Microwave Electronically Tunable Circuit Elements
100
pursue this novelty instead of his original project. He generalized the concept and
developed the current conveyor, a circuit that conveys current from one port to
another. This design, now called a first generation current conveyor (CCI) is a
three-port device (with ports defined as X, Y, and Z) described by the following
hybrid matrix:
f • >
lY
'o
— 1
VX
Jz j
,0
f
1
0
0
vY
\
'X
1 0, <vZ y
This circuit exhibited a virtual short circuit at node X, a virtual open circuit at
node Y, and the current supplied at X was conveyed to Z. Node Z had a very high
impedance.
Applications of the CCI included current meters and negative
impedance converters (NICs). To increase the versatility of the current conveyor,
a second generation current conveyor (CCII) was introduced. This design was the
same as the previous except that no current flowed through node Y. This design
was introduced in 1968 and is described by the following hybrid matrix:
f ■ \
lY
=
VX
J Z
'o
y
1
,0
0
0
±1
/
oN V y
0
\
'X
Oy <VZ ;
The current supplied to node X has either a positive or negative polarity resulting
in the CCII+ or CCII- respectively. The CCII- can be thought of as an ideal field
effect transistor where the gate = node Y, drain = node Z and source = node X.
This relationship is illustrated in Figure 4-6. Traditionally, the current conveyor
has been implemented using low frequency bipolar transistors, FETs, or
operational amplifiers [59] - [61].
Work presented later in this chapter will
demonstrate for the first time a technique for designing microwave current
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The Design o f Microwave Electronically Tunable Circuit Elements
101
conveyors. Before discussing this new technique, it is important to understand
how current conveyors can be used to design active circuits.
For purposes of
analysis, it is much easier to relate the current conveyor to two ideal one-port
networks known as norators and nullators. This will be explained in the next
section.
f ■ >
lY
VX
<lZ j
=
'o
1
0
0
,0 -1
0^
/
\
VY
0 lx
0, <vz ,
Drain
i fD
! lz
ccn-
Gate
i lS
Source
Figure 4-6. Comparison of a CCII- and an Ideal Field Effect Transistor
4.2.2 A Review o f Nullator-Norator Circuit Analysis and its
Application to Current Conveyor Design
When analyzing active linear networks, several distinct types of circuit
elements are used.
These include resistors, capacitors, inductors, transmission
lines, independent voltage sources, independent current sources, dependent
voltage sources and dependent voltage sources.
The dependent voltage and
current sources tend to be two-port networks that associate a voltage or current
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The Design o f Microwave Electronically Tunable Circuit Elements
from one port to a voltage or current to the second port.
102
Although analyzing
circuits containing these two-port networks is relatively straightforward, the
simultaneous solution of equations that usually results from such analysis serves
to reduce the designer’s intuition about the circuit. The use of two ideal one-port
network representations known as nullators and norators can help to restore some
of this lost intuition. Nullators and norators can replace all dependent voltage and
current sources in a network so as to reduce the primitive elements in a linear
network to only one-port networks. This is a very powerful technique that can be
used to gain insight into active network synthesis [62] - [64]. The properties of
the nullator and norator will be discussed presently.
Definition 4.1: A nullator is a one port network with v f t ) = i f t ) = 0 defining the
the voltage and current on its one port [64].
Definition 4.2: A norator is a one port network with v f t ) =Af t ) and i f t ) = A 2 U)
defining the voltage and current on its one port. The functions A f t ) and Ai(t) are
arbitrary, and thus v f t ) and i f t ) are unconstrained resulting in a degree o f
freedom not fo u n d in any other one port network [64 ].
The schematic symbol used to describe the nullator and norator are shown in
Figure 4-7. When carrying out nodal circuit analysis of a circuit that had nullators
and norators, Definitions 4.1 and 4.2 can be easily applied when the node being
analyzed' has a norator or nullator connected to it. When a node has a nullator
connected to it, the voltage at that node is assumed to be equal to the voltage at
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The Design o f Microwave Electronically Tunable Circuit Elements
103
the other node of the nullator, however, it is assumed that no current can flow
through the nullator. When a node has a norator connected to it, it is assumed that
current flows through the norator, but the voltages on either node of the norator
are determined by the rest of the circuit. Similarly, the current through the norator
is determined by the rest of the circuit.
Several equivalence properties of norators and nullators that allow for
network simplification will be described presently[64]:
1. A series or parallel connection o f ±R ’s, ±L’s, ±C’s, and at least one
nullator is equivalent to a single nullator.
2. A series or parallel connection o f ± R ’s, ±L ’s, ±C’s, and at least one
norator is equivalent to a single norator.
3. A series or parallel connection o f ± R ’s, ±L’s, ±C’s, and at least one
norator and at least one nullator is equivalent to an open circuit or a
short circuit respectively.
4. A four terminal circuit composed of two nullators and two norators all
of whom have a single terminal tied to one node is equivalent to a four
terminal network composed of an uncoupled single nullator and a
single norator.
Another circuit element that is worth mentioning is the nullor. The nullor
is a two-port network which is simply composed o f a nullator at one port and a
norator at the second port. Effectively, it is two uncoupled one port networks.
The schematic symbol for this network is illustrated in Figure 4-8. The reason for
its use is that many dependent current and voltage sources can be expressed in
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The Design o f Microwave Electronically Tunable Circuit Elements
104
terms of this unit. It is important to note that the nullor can always be thought of
as simply a nullator and a norator, and therefore provides no additional insight
into the analysis o f a network. It is mentioned here merely so that the reader will
be familiar with the terminology.
Nullator
Norator
v7 = t1=0
vj= i\= arbitrary
Figure 4-7. Norator and Nullator Schematic Representations
Port 1
17 = 1!= 0
Port 2
v2=t2= arbitrary
Figure 4-8. Nullor Schematic Representation
Given the matrix definition of the negative second generation current
conveyor (CCII-) from equation (4.2-2), an equivalent representation for the CCIIcan be expressed in terms of a single nullator and norator as illustrated in Figure
4-9. The hybrid matrices for these two circuits are equivalent. In summary, any
active network composed of nullators and norators in pairs as illustrated in Figure
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The Design o f Microwave Electronically Tunable Circuit Elements
4-9 can be fabricated using CCII- networks.
105
This will prove to be a useful
property for synthesizing microwave tuning elements using current conveyors.
P{-denotes the z'th port
Figure 4-9. Nullator-Norator Representation of a CCII-
4.2.3 A New Approach to Designing Microwave Current Conveyors
A negative second generation current conveyor (CCII-) is a three port circuit
element characterized by the following set o f hybrid circuit parameters as
described by A. Sedra [58], [65].
f ■\
ll
h
'o
0
= 0
-1
,1
0
f
o' v l
0
\
h
0 , <v2,
h\2
= ft2i
<h 3\
h\2>
1*22 h i
h 32
\
(
vl
*3
h33; <v2 ,
The current at ports 2 and 3 are equal in magnitude and 180 degrees out of phase.
The voltage at port 1 follows the voltage at port 2 but the current flow from port 1
to port 2 is zero.
We now consider a GaAs MESFET as a candidate for use as a current
conveyor by assigning the gate, drain and source to ports 1, 2 and 3 of equation
(4.2-3) respectively.
If we assume that the device is modeled with an input
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The Design o f Microwave Electronically Tunable Circuit Elements
106
capacitance cgs, a drain source resistance of r^, and a transconductance gm, some
algebra yields the following hybrid parameters in the Laplace transform domain
h2\
^31
hl2
^13 ^
h22
h22>
^32
cgss
A
C gS s / r d s
g m
C g s s I rd s
c g s s ! rd s
, (4.2-4)
rd s
h33 )
_1_
8 m '* ’ c g s s
rd s
where A
1
----- 1- gm + cgss and s = j(0 + a . By inspection of equation (4.2-4), it
rd s
is clear that if gm >>|cg5.sj and gm»
1/r*, this matrix formulation will converge
to the numerical values in equation (4.2-3) except h32 which approaches 1/ gm. For
typical MESFETs used in MMIC circuits with gmls on the order of 5 to 80 mS, h32
can have values of 12.5 to 200 ohms. This value is large enough to prevent the
single MESFET from functioning as an adequate current conveyor at microwave
frequencies. One possible solution is to increase the periphery of the MESFET;
however, one would have to obtain a gm of 2000 mS to obtain a value of 0.5 ohm
for h32 . This is impractical in the context of a MMIC circuit. It would appear as
though the MESFET is not a very good current conveyor.
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The Design o f Microwave Electronically Tunable Circuit Elements
107
n common source cascaded FETs
m
m
n
•
•
♦
g
mef f
i l + c s s rdss)"~ '
c.
equivalent single FET model
Figure 4-10. Equivalent Circuit For Common Source Cascaded MESFETs
We now consider a string of n MESFETs in cascade. By comparing the YParameters of an individual MESFET with the Y-Parameters of a cascade of n
FETs connected in a common source configuration we can derive a simple
equivalent model for a cascade of devices as illustrated in Figure 4-10. Noting the
equivalence, we can write the hybrid matrix for a cascade of n MESFETs by
replacing gm in equation (4.2-4) with
(
(_ 1 )
8 m ef f
n
n r-
8 m ds
« —1
vn - l
(4.2-5)
(1 + c g^r^s)
This modification will allow equation (4.2-4) to converge to the ideal hybrid
parameters in equation (4.2-3) when
gm „ » |cg5^ |, g m - » l / r ^ ,
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and
The Design o f Microwave Electronically Tunable Circuit Elements
1/ gmef f ~ 0 • Since gm^
108
is a function of n, we have control over its value
without modifying the individual device parameters.
It will be shown that
8meg can easily be made large enough to obtain good current conveyor
performance in the low microwave frequency band.
To demonstrate how such a current conveyor can be fabricated and used in
microwave circuit design, the following example MMIC current conveyor is
presented. The microwave current conveyor designed here uses four cascaded 300
|im GaAs FETs from TriQuint Semiconductor Corporation’s HA2 process [6 6 ]
will be used. This current conveyor design includes bias resistors, active loads,
lossy capacitors, and microstrip lines as illustrated in Figure 4-11. Some off chip
bias circuitry is required. TriQuint’s HA2 process 300 (im GaAs FETs have
a n / 7- = 18 G Hz,
I d s ~ 24 m a .
g m = 38 m S ,
cgs ~ 0.38 p F ,
and
rjs ~ 340 Q
at
The number of devices and associated gate periphery were
selected such that |/i32 1< 1 Q . In general, the required value of /ij2 is dependent
on the specific design that the current conveyors will be used in. The following
sections will use this current conveyor design to illustrate the performance of
some unique microwave tuning elements.
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The Design o f Microwave Electronically Tunable Circuit Elements
109
920 jum = — @ 2 GHz
60
. Drain
^Bias
Gate
Bias I
550
%
tm
Lb
|Ltm
m tb
T
Figure 4-11. Microwave Current Conveyor Layout (© 1996 IEEE)
4.2.4 Design and Analysis o f MMIC Tunable Positive Inductors
and Capacitors
Using the method o f current conveyors, positive electronically tunable
inductor and capacitor circuits can easily be synthesized.
This section will
describe and analyze a simple realization of both a microwave tunable inductor
and capacitor respectively. It is important to note that this is not the only way to
realize these circuits using microwave current conveyors.
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The Design o f Microwave Electronically Tunable Circuit Elements
110
4.2.4.1 MMIC Tunable Positive Inductor
As an example of the application of the microwave current conveyor
design technique, we will look at the design of a tunable positive inductor. The
circuitry shown in Figure 4-12 is from work done by Raj Senani [67] used for
realizing floating active elements using second generation current conveyors. The
value of the inductance
AAAA
equiv
Figure 4-12. Electronically Tunable Inductor Circuit
can be changed using a variable resistor which can be implemented in a GaAs
MMIC chip using a MESFET with VdJ = 0 . Each of the ideal CCD- in Figure 4-12
is replaced with a set of cascaded GaAs FETs.
Equation (4.2-4) with
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The Design o f Microwave Electronically Tunable Circuit Elements
8m
111
>8mef f can be usec* t0 evaluate the performance of the current conveyor at a
given frequency by comparing the resulting hybrid parameters with those in
equation (4.2-3).
The simulation results shown in Figures 4-13 and 4-14 are the resulting
inductance values and quality factor obtained using current conveyors composed
of four cascaded 300 pm GaAs FETs from TriQuint’s HA2 process [66 ]. These
devices have an f T of 18 GHz, transconductance of 43 mS, gate-source
capacitance of 0.38 pF, and drain-source resistance of 380 ohms. The simulated
values of inductance are 10, 50 and 90 nH. There is excellent agreement between
the simple equation in Figure 4-12 and detailed simulation inductance values for
frequencies below 2.5 GHz. The simulated quality factor (Q) is shown in Figure
4-14. Circuit stability is an important issue that must be considered carefully in
active microwave circuit design [8 ], [6 8 ], and [69], Research in this area as it
pertains to current conveyor circuits would make an excellent topic for further
study.
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The Design o f Microwave Electronically Tunable Circuit Elements
112
100
90
Inductance (nH)
80
70
60
SO
40
Simulation (10 nH)
Simulation (50 nH)
Simulation (90 nH)
30
20
- _ .
.- __L
10
0
0.1
0.5
0.9
1
1.3
1.7
t
2.1
2.5
Frequency (GHz)
Figure 4*13. Active MMIC Tunable Inductor: Inductance Values
103
- Simulated Q at 10 nH
Simulated Q at 50 nH
- Simluated Q at 90 nH
v -.
V,
102
0.1
0.5
0.9
1.3
1.7
2.1
2.5
Frequency (GHz)
Figure 4-14. Active MMIC Tunable Inductor: Q Values
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The Design o f Microwave Electronically Tunable Circuit Elements
113
4.2.4.2 MMIC Tunable Positive Capacitor
Another example application of the microwave current conveyor design
technique is the active tunable capacitor. It is difficult to make a good varactor
diode with a standard GaAs MESFET process. The following circuit can be used
to generate a variable capacitance with a potential tuning range of 4 0 :1 in the low
microwave region.
This is far in excess of what can be done with a MMIC
varactor (typically 2:1). The circuitry shown in Figure 4-15 is derived from work
done by Raj Senani [67], as before. The value of the capacitance
M .
eqmv
O f t2^3
Figure 4-15. Electronically Tunable Capacitor Circuit
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The Design o f Microwave Electronically Tunable Circuit Elements
114
can be changed using a variable resistor (/?j) which can be implemented in a
GaAs MMIC chip using a MESFET with
=0.
The simulation results shown in Figures 4-16 and 4-17 are the resulting
capacitance values and quality factors obtained using current conveyors composed
of four cascaded 300 pm GaAs FETs from TriQuint’s HA2 process [6 6 ] as in the
inductor example. The simulated values of capacitance are 1, 20, and 40 pF. There
is excellent agreement between the simple equation in Figure 4-15 and detailed
simulation inductance values for frequencies below 2.5 GHz. The simulated
quality factor (Q) is shown in Figure 4-17.
50
40
lT
a
s'
30
c
(0
a
(0
O
- Simulation (1 pF)
• Simulation (20 pF)
- Simulation (40 pF)
10
0
0.1
0.5
0.9
1.3
1.7
2.1
2.5
Frequency (GHz)
Figure 4-16. Active MMIC Tunable Capacitor: Capacitance Values
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The Design o f Microwave Electronically Tunable Circuit Elements
Simulated Q at 1 pF
Simulated Q at 20 pF
Simulated Q at 40 pF
103
a
115
102
101
0.1
1
»
0.5
0.9
1.3
1.7
2.1
2.5
Frequency (GHz)
Figure 4-17. Active MMIC Tunable Capacitor: Q Values
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The Design o f Microwave Electronically Tunable Circuit Elements
116
4.2.5 Design and Analysis o f MMIC Tunable Gyrators and
Transformers
8
•
n
•
)C
i\(t) = g v 2(t)
v l (t) = n v2(t)
i2(t) = -g v x(t)
-i2(t) = n i {(t)
g real
n real
g> 0
n> 0
Gyrator
Transformer
Figure 4-18. Schematics and Properties of Gyrators and Transformers [64]
Another very powerful use of the current conveyor is in the design of
electronically tunable gyrators and transformers. These components can be used
in the design of electronically tunable matching networks as discussed in chapter
3. Figure 4-18 illustrates the schematic symbols for the gyrator and transformer
respectively [64]. The variable g is called the transconductance while n is called
the tums-ratio. The gyrator and the transformer both are able to transform one
impedance to another; however, the gyrator acts as an impedance inverter while
the transformer acts as an impedance converter. This concept is made clear by
observing equations (4.2-6) and (4.2-7) which express the effective impedance at
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The Design o f Microwave Electronically Tunable Circuit Elements
117
port one, ZunCr) when a load of Z2(s) is placed on port two for the gyrator and
transformer respectively.
Figure 4-19. Norator-Nullator Immittance Converter/Inverter Topology Applicable to
Current Conveyor Implementation
(4.2-6)
Z Un( s ) = n 2Z2 (s)
(4.2-7)
A number of very interesting norator-nullator topologies were presented by
Pauker [70] which provide a means for designing positive immittance (impedance
or admittance) inverters and converters. These topologies are directly applicable
to the design of gyrators and transformers. Of the twenty topologies presented in
this paper, one lends itself to a realization with only two current conveyors. This
norator-nullator topology is illustrated in Figure 4-19. It should be noted that each
of the two norators shares a common node with a nullator. As a result, a current
conveyor can be used to replace each norator-nullator pair.
Equation (4.2-8)
illustrates the simple relationship between the impedances in this topology.
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The Design o f Microwave Electronically Tunable Circuit Elements
zt=
Z1Z4Z6
6
118
(4 .2 - 8 )
Z 3Z 5
If Z3 or Z5 are allowed to be the port two impedance, the network will act
as a gyrator with
_2 Z9Z4Z/:
g 2= V 6
(4.2-9)
z5
or
_2 Z9Z4Z5
g 2= V 6
(4.2-10)
z3
respectively.
Similarly, if If Zi, Z4. orZ6 are allowed to be the port two impedance, the
network will act as a transformer with
"
2
Z4 Zg
(4.2-11)
3^5
or
2 Z 2Z5
«2 = 7 7 -
(4.2-12)
Z 3Z 5
or
2 Z 9 Z4
«2 = ^ V -
(4.2-13)
Z 3Z 5
respectively.
Figure 4-20 and 4-21 illustrate the current conveyor implementation of this
circuit for the gyrator and transformer, respectively.
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The Design o f Microwave Electronically Tunable Circuit Elements
Port 2
c c n -
*2
Port 1
R2 r 4 R$
port 1 “ 7
„
Zport 2 r 5
Figure 4-20. Current Conveyor Implementation of an Electronically Tunable Gyrator
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119
The Design o f Microwave Electronically Tunable Circuit Elements
120
c c n -
Port 2
Port 1
^port 2 R4 ^6
^port 1 ~
Z3 R5
Figure 4-21. Current Conveyor Implementation of an Electronically Tunable Transformer
The simulation results shown in Figure 4-22 are the resulting insertion
losses obtained implementing the gyrator design of Figure 4-20 using current
conveyors composed of four cascaded 300 |im GaAs FETs from TriQuint’s HA2
process [66]. It is clear that a very broad frequency band impedance match can be
obtained using this technique. Furthermore, by changing the resistances in the
circuit of Figure 4-20, a wide range of impedance values can be transformed. In a
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The Design o f Microwave Electronically Tunable Circuit Elements
121
real MMIC design, the variable resistors would be implemented using FETs with
a vjs=0 volts.
2
50 ohms to 2 ohms
50 ohms to 4 ohms
50 ohms to 50 ohms
50 ohms to 100 ohms
50 ohms to 300 ohms
50 ohms to 500 ohms
1
m
2,
0
CO
co -1
o
_j
c
o
■c -2
a>
0)
c
-3
-4
■5
1
2
3
4
5
Frequency (GHZ)
Figure 4-22. Gyrator Insertion Loss In a Mixed Impedance System for a Range of
Impedance Transformations
4.2.6 Design and Analysis o f MMIC Tunable Negative Inductors
and Capacitors
Negative capacitors and inductors have broad reaching applications in the
area of broadband matching as explained in Chapter 3. Both of these types of
circuit elements can be synthesized using negative impedance converter (NIC) and
negative impedance inverter (Nil) techniques, respectively.
The negative
impedance converter is a two-port network that synthesizes an impedance of -Z at
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The Design o f Microwave Electronically Tunable Circuit Elements
122
port one when presented with an impedance o f Z at port two.
The negative
impedance inverter is a two-port network that synthesizes an impedance of -1/Z at
port one when presented with an impedance of Z at port two. Both of these types
of circuits can be synthesized using current conveyors.
4.2.6.1 Negative Capacitor Analysis, Design, Layout, and Simulated
Performance
Figure 4-23
illustrates a realization of the negative capacitor in
nullator-norator form and the equivalent current conveyor form. Resistor R\ is
variable to allow for tuning of the negative capacitor value. The nullator-norator
schematic illustrated was introduced by J. Braun [31].
This circuit produces
negative capacitance by means of voltage inversion.
~ R {C
Ce ff~ ~ r 7
Figure 4-23. Negative Capacitor Network
The schematic for this circuit is illustrated in Figure 4-24. This schematic
uses the NIC circuit design discussed in Chapter 4 for negative capacitor design
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The Design o f Microwave Electronically Tunable Circuit Elements
123
using current conveyors. The microwave current conveyor circuit is substituted
into this schematic in place of the traditional low frequency current conveyor.
Additionally, some control over stability and the capacitance value have been
added.
This was accomplished by using voltage controlled variable resistors
implemented with GaAs FETs whose v*=0. A detailed layout of this design is
illustrated in Figure 4-25.
Figures 4-26 and 4-27.
Finally, linear simulation results are illustrated in
These simulations where done using MMIC AD for
Windows. This linear simulation includes transmission line models for microstrip
traces illustrated in Figure 4-11 and detailed models for all of the GaAs devices.
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The Design o f Microwave Electronically Tunable Circuit Elements
124
VDrain
V gate
ISO um
ISO um
300 um
ISO um
300 um
5pF
5pF
150 um
300 um
5pF
300 um
SpF
CCII(-) Current Conveyor Cell
VDrain
V gate
a aaa
300 um
—p
150 um
ISO um
ISO um
ISO u iij
5pF
300 um
300 um
300 um
5pF
5pF
SpF
Control
Vbltage
0 volts thru
cutoff
(capacitance
20 O hm s
300 um
5pF
CCIl(-) Current Conveyor Cell
Stability
Control
Vbltage
1.666
Removable
Airbridge
O hms
3 00 um
Source
DC
Vbltage
(External
bias tee)
Microwave
Input
(Coplanar
Launch)
Figure 4-24. Microwave Negative Capacitor Schematic
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The Design o f Microwave Electronically Tunable Circuit Elements
B
k :
Figure 4-25. Microwave Negative Capacitor Layout
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125
The Design o f Microwave Electronically Tunable Circuit Elements
126
0
Capacitance (pF)
-10
s '
,r
.//
-20 .......................
/
/
/
/
/
-30 ’ ------- Simulation (-5 pF)
------- Simulation (-25 pF)
--------Simulation (-45 pF)
-40
/
/
.........
-50
-60
J/ l .................................
_______
_
:
1
2
3
4
5
6
7
8
Frequency (GHz)
Figure 4-26. MMIC Tunable Negative Capacitor - Capacitance Values (© 1996 IEEE)
103
102
o
',oSimulated Q at -5 pF
Simulated Q at -25 pF
Simulated Q at -45 pF
10 °
1
2
3
4
5
6
7
8
Frequency (GHz)
Figure 4-27. MMIC Tunable Negative Capacitor: Q Values (© 1996 IEEE)
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The Design o f Microwave Electronically Tunable Circuit Elements
127
4.2.6.2 Negative Inductor Analysis, Design, Layout, and Simulated
Performance
Figure 4-28
illustrates a realization of the
negative
inductor in
nullator-norator form and the equivalent current conveyor form. Resistor R i is
variable to allow for tuning of the negative inductor value. As with the negative
capacitor, the nullator-norator schematic illustrated was also introduced by J.
Braun [31].
This circuit produces negative inductance by means of current
inversion.
*1
Figure 4-28. Negative Inductor Network
The schematic for this circuit is illustrated in Figure 4-29.
The
microwave current conveyor circuit is substituted into this schematic in place of
the traditional low frequency current conveyor. Additionally, some control over
stability and the inductance value have been added.
A detailed layout of this
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The Design o f Microwave Electronically Tunable Circuit Elements
128
design is illustrated in Figure 4-30.
Finally, linear simulation results are
illustrated in Figures 4-31 and 4-32.
These simulations where done using
MMICAD for Windows.
This linear simulation includes transmission line
models for microstrip traces illustrated in Figure 4-11 and detailed models for all
of the GaAs devices including those that are serving as variable resistors.
VDrain
Vgate
150 um
ISOum
ISO um
M icrowave Input
(Coplanar
300 um
300 um
5pF
300 um
300 um
5pF
5pF
5pF
CCll(’) Current Conveyor Ceil
Control Vbltage
0 volts thru
cutoff
(inductance
VDrain
Vgate
5pF
150 um
150 um
150 um
Source
DC
300 um
300 um
5pF
5pF
300 um
5pF
DC
' bltage
Probe
300 um
5pF
5pF
CCIK-) Current Conveyor Cell
T
DC
Probe
100
500
Stability
Control
300 um
Figure 4-29. Microwave Negative Inductor Schematic
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The Design of Microwave Electronically Tunable Circuit Elements
□
m
Figure 4-30. Microwave Negative Inductor Layout
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129
The Design o f Microwave Electronically Tunable Circuit Elements
130
-2
-4
X
C"
o
o
c
(B
o
3
■o
C
-6
-8
-10
•12
-14
-16
Simulation (-1 nH)
Simulation (-5 nH)
Simulation (-15 nH)
-18
-20
0.5
1.5
3.5
2.5
Frequency (GHz)
Figure 4-31. MMIC Tunable Negative Inductor • Inductance Values
Simulated Q at -1 nH
Simulated Q at -5 nH
Simulated Q at -15 nH
0.500
1.375
2.250
3.125
4.000
Frequency (GHz)
Figure 4-32. MMIC Tunable Negative Inductor: Q Values
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131
CHAPTER 5
C l o se d L o o p C o n t r o l E x p e r im e n t
5.1 Introduction
This chapter will present results from an experiment designed, fabricated,
and tested that demonstrates for the first time the ability to make a microwave
electronically tunable impedance transformer whose parameters are optimized
through real time closed loop computer control. The circuit was fabricated using
a numerically controlled circuit board milling machine and was fabricated on a
thin microwave substrate. The circuit was measured using an automated vector
network analyzer and a thru-reflect-line (TRL) calibration kit designed for this
experiment so as to extract data from reference planes on the microwave
substrate. A method was devised to optimize circuit performance using a closed
loop computer controlled feedback system. Data is presented and test equipment
and procedures are described.
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Closed Loop Control Experiment
132
5.2 Design, Analysis, and Measured Performance of a
Computer Controlled Electronically Thnable Microwave
Impedance Transformer
As an example of the application of the theory presented in Chapters 3
and 4, this section outlines the design,
fabrication, and real time closed loop
control of a microwave electronically tunable impedance transformer.
Such a
circuit can be used in conjunction with an electronically tunable phase shifter to
design an electronically tunable matching network with an impedance matching
domain as described in section 3.1.2. An electronically tunable phase shifter can
also be implemented using the theory o f section 4.1.3, but there are a number of
different ways to build phase shifters discussed in the literature [71] - [73]. This,
however, is the first reported design and fabrication of an electronically tunable
microwave impedance transformer.
The microwave impedance transformer, by definition, is a two port device
capable of transforming one real impedance to another real impedance. In typical
microwave circuit design, such a structure is implemented using a quarter-wave
transmission line made of coax, microstrip, or stripline. These structures are very
easy to fabricate, but their characteristic impedance is determined by the choice of
materials and geometry. These physical parameters are fixed and do not lend
themselves to electronic tuning. As discussed at length in Chapter 3, due to the
errors in the impedance
matching domain
and network realization,
an
electronically tunable matching network is the most robust way to provide
impedance matching. To demonstrate this philosophy, an electronically tunable
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
133
impedance transformer has been designed using a combination of microstrip
transmission lines and varactor diodes in such a way as to generate a circuit whose
performance will emulate a variable characteristic impedance quarter-wave
transmission line.
5.2.1 Component Selection
As illustrated in Figure 4-5, an electronically tunable transmission line
circuit requires two J-inverters and three varactor diodes. In this design, the Jinverter was implemented using a quarter-wave microstrip line.
Further
motivation for this selection will become more obvious when varactor biasing is
discussed. A value of 1/50 was selected for J since this can be implemented using
a 50Q quarter wavelength transmission line. If ZH is defined as the impedance of
the microstrip quarter-wave transmission line, equations (4.1-19) and (4.1-20) can
be rewritten as
Z qQ) sin0
(5.2-1)
and
Z q sin d
(5.2-2)
For the design of this tunable impedance transformer, the parameters from
equations (5.2-1) and (5.2-2) were assigned the values in the following table.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
134
Parameter
Selected Value
Zq
50 Q
0)
2 tz 2.25 GHz
0
90
o
Table 5-1. Parameter Values for Electronically Tunable Impedance Transformer Design
5
4
3
2
Required Value for Varactor C1
Required Value for Varactor C2
1
o
0
20
40
60
80
100
120
140
160
Transmission Line Characteristic Impedance (ohms)
Figure 5-1. Varactor Diode Selection
In this design, a tunable impedance transformer capable of transforming any load
impedance with a reflection coefficient magnitude less then 0.9 (i.e. |r ^ |< 0 . 9 )
was desired. This assumes a tunable phase shifter has been used to bring the load
impedance to the real axis of the reflection coefficient plane, and the theory
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Closed Loop Control Experiment
described in section 3.3 has been used.
135
The required range of tunable
transmission line characteristic impedances was selected from Figure 3-9, 8 f l <
Z q < 392 Q... To determine the required capacitance range needed for each of the
three varactor diodes, the values in Table 5-1 were substituted into equations (5.21) and (5.2-2) while the synthesized value of Zo was swept from 8 Q to 392 Q.
Figure 5-1 is a plot of the required range of values for C/ and C?. Additionally,
since this circuit will be used to provide maximum power transfer of a signal from
one impedance to another, it is desirable to use very low loss varactor diodes.
Parameter
Value
T
1.25
Q @ -4 volts @ 50 MHz
3000
Effective Series Resistance at -4 volts (Rs)
0.884 a
Capacitance at -4 volts
1.2 pF
Parasitic Package Capacitance
0.12 pF
Parasitic Package Inductance
0.4 nH
Total Capacitance Ratio = Cji/C jto
4.8/7.4
(Minimum/Maximum)
Total Capacitance at -20 volts
0.45 pF
Total Capacitance at -0.5 volts
4 pF
M inimum Reverse Voltage Breakdown (V r)
22 volts
Table 5-2. MA46473 Varactor Diode Performance Characteristics
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Closed Loop Control Experiment
136
The above considerations led to the selection of the MA-COM varactor
diode MA46473 in a 186 style package. This is a GaAs hyperabrupt junction
diode whose performance characteristics are illustrated in Table 5-2.
5.2.2 Linear Circuit Simulation and Predicted Performance
Since the circuit that is designed here will be electronically tunable, a
detailed accounting for parasitic reactances in the required bias networks will not
be addressed here. It will be assumed that the varactor diodes will be able to
compensate for the small amount of parasitic reactance presented by the bias tees
through applying a small offset in the expect varactor diode voltage , Av. This is
one of the beneficial properties of electronically tunable networks. O f course, if
the bias tee is not designed well, the required tuning may be excessive. Therefore,
care must be taken when designing the bias circuit.
The most important parasitic element that must be included in the
simulation is the effective series resistance o f the varactor diodes. Obviously, this
can not be tuned out with reactance. Furthermore, as the value of the capacitance
is tuned to larger values, the effective Q of the varactor will decrease and the
effective loss of the entire network will increase. One of the interesting properties
o f this circuit design is that as the value of the center capacitor, Ci, increases, the
value of the end capacitors, C/, decreases. This means that during operation as a
tunable impedance transformer, as the Q of one device goes down, the Q o f the
other two will go up. This is very important in maintaining an acceptable overall
Q for the entire circuit. The simulation results presented here will illustrate the
expected insertion loss and return loss of a tunable impedance transformer in a
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Closed Loop Control Experiment
137
“mixed characteristic impedance” system.
This is easily understood by
considering the scenario illustrated in Figure 5-2. This figure illustrates the 2-port
electronically tunable impedance transformer between two fixed real impedances
that differ.
This is precisely the situation that exists in a typical impedance
matching problem.
The insertion loss and return loss are computed by
determining the S-Parameters of this system using Z qa as the source impedance
and Z qb as the load impedance as described in section 2.3.2.
Electronically
Tunable
Impedance
Transformer
OB
Figure 5-2. Electronically Tunable Impedance Transformer in a Mixed Characteristic
Impedance System
Using the mixed characteristic impedance terminations, the simulated insertion
loss will illustrate the amount of loss that can be expected when using this type of
network in a real amplifier design. Figure 5-3 shows the simulated insertion loss
and return loss in a mixed impedance system where Z qa is 50 Q. and Z qb is
shown on the independent axis.
The simulation shows that very good
performance can be expected over a wide range of characteristic impedances. It is
important to note that even better performance can be obtained by changing the
electronically tunable impedance transformer’s phase angle and characteristic
impedance so as to match one real impedance to another. Such an arrangement
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Closed Loop Control Experiment
138
can allow for the varactors to operate at higher Q ’s than they are constrained to in
the scenario simulated in Figure 5-3. As a result, improved insertion loss values
can be obtained.
0
20
■1
o■o
0o1
2
00o1)
-1
£c
ca
0c)
-I
c
3
-3
-10
-4
-20
©
Simulated Insertion Loss at 2.25 GHz
Simulated Return Loss at 2.25 GHz
-5
10.0
S0.0
-30
100.0
200.0
Load Impedance (in ohms) matched to 50 ohms
Figure 5-3. Simulated Performance of an Electronically Tunable Impedance Transformer in
a Mixed Characteristic Impedance System
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
139
5.2.3 Large Signal Non-Linear Circuit Simulation and Predicted
Performance
Power Steps = {0 dBm, 10 dBm, 11 dBm, 12 dB m ,... 20 dBm}
□
Return Loss
Q
Insertion Loss
1 . 0
DdBm
0 . 5
0 dBm
-20 . 0
0.0
-30 .0
-0 .5
-40 .0
-1
. 0
0 d Bm
-50 . 0
-1 . 5
20 dBm
-2
-60 . 0
Frequency
0.1
GHz
.
IV
Figure 5-4. Electronically Tunable Impedance Transformer Large Signal Performance
Simulation -12.512 to 5012 Transformation
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
0
Closed Loop Control Experiment
140
Nonlinear performance evaluation was done using a harmonic balance
[74] simulator, Libra.
The electronically tunable impedance transformer was
modeled using nonlinear models for the varactor diodes. The circuit simulation
assumed that the stray inductance in the varactors was resonated out. Large signal
S-Parameter measurements were made over frequency at different simulated drive
levels to simulate the effects of large signal operation. Figure 5-4 illustrates the
change in insertion loss and return loss as a function of drive level swept over
frequency. It can be seen that the result is a slight shifting of the center of the
bandpass. It is interesting to note that this shift is relatively small. Furthermore,
the insertion loss does not increase dramatically either.
This is a result of
relatively low harmonic content. The varactor diode was modeled using a Taylor
series expansion approximation of the ideal varactor diode equation. This is due
to the limitation in the way in which Libra allows for modeling nonlinear
capacitors. The junction capacitance of the MA46473 is expressed as
6.9517
c; = ----------------- j-rr- pF.
1
(1 + 0.7692v)125
(5.2-3)
where v is the reverse bias voltage in volts. This equation was modeled in Libra
using the following series expansion:
20
cj
= ' L M v - ID ' PF
(5.2-4)
(•=0
with the following values of the A,’s:
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Closed Loop Control Experiment
141
A 0 =5.977555012
A// = -1.69724331 E-7
A , = -4.023403469
A/2 = 7.26623943 E-9
A2 = 1.91429548
A/i =-3.732392098 E-10
As = -0.6927485456
Aw = 1.56799975 E - l l
A 4 = 0.1969851157
A/5 = -5.299682391 E-13
A5 = -0.04498588653
A/tf = 1.406289451 E-14
A<5 = 0.00838154073
A/7 = -2.821805193 E-16
A7 =-0.001288346058
A/* = 4.02591614 E-18
As = 0.0001646237971
A /9 = -3.639947001 E-20
A9 = -0.00001756584455
A2o = 1.567941433 E-22
A/o = 1.567943941 E-6
The number of terms, decimal places of accuracy and expansion point of the
series where selected so that the series closely matched the values of equation
(5.2-3) over the reverse bias range o f 0 volts to 20 volts as illustrated in Figure 55. The use of less terms or less decimal places of accuracy was found to result in
capacitance errors of several picofarads at various bias voltages within the 0 to 20
volt range.
The harmonics of this impedance transformer were simulated at
several different 12.5S2 drive powers. Figure 5-6 illustrates the harmonic content
at the 50Q side of the circuit when 0 dBm of drive power is presented into the
12.5 Q side. Figures 5-7 and 5-8 illustrate the effect of increasing the drive level
to lOdBm and 20 dBm respectively. It is interesting to note that the harmonic
levels do not take away any significant power from the fundamental even at high
drive levels.
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Closed Loop Control Experiment
142
Capacitance
(pf)
6
5
4
3
2
1
0
0
5
10
R ev erse
B ia s
15
20
( v o lt s )
Figure 5-5. Comparison of Series Expansion and Nonlinear Model for the MA46473
Varactor Diode
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Closed Loop Control Experiment
143
o.o
-
10.0
-
20.0
Harmonic Power (dBm)
■<------
Fundame ital Frequenc y
- 3 0 .0
-40 . 0
-5 0 .0
-60 . 0
- 7 0 .0
-80 . 0
-90 . 0
-100.0
T
0 . 0
Harmonic
Frequency
2 5 . O'
5.0
GHz/DIV
Figure 5-6. 12.5 to 50 Ohm Transformer Harmonics: 0 dBm 2.25 GHz 12.5 Q source
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
10.0
144
■ ■■ 11--------
0.0
------
-20
Harmonic Power (dBm)
Fundame ital Frequenc y
10.0
.
0
- 3 0 .0
-40 . 0
-50 . 0
-60 . 0
-70 .0
-80 . 0
-90 . 0
-1 00
.
0
*
0.0
25.0
Harmonic
Frequency
5.0
GHz/DIV
Figure 5-7. 12.5 to 50 Ohm Transformer Harmonics: +10 dBm 2.25 GHz 12.5 £1 source
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
20 . 0
11
10.0
<
-----
0.0
£
00
3
-
10.0
-
20.0
145
Fundame ital Frequenc y
ii
-3 0 .0
Urn
o
a.
£
- 4 0 .0
O
- 5 0 .0
E
o
S
>_
i
-6 0 .0
a
E
-7 0 .0
- 8 0 .0
-9 0 .0
-
100.0
0.0
25.0
Harmonic
Frequency
5.0
GHz/DIV
Figure 5-8. 12.5 to 50 Ohm Transformer Harmonics: +20 dBm 2.25 GHz 12.5 £2 source
The voltage and current swings were checked in the time domain to ensure
that they did not leave the region of convergence of the curve fit. Figures 5-9, 510 and 5-11 illustrate the instantaneous voltages across each of the three varactor
diodes during operation at drive levels of 0 dBm, 15 dBm, and 20 dBm
respectively. It can be seen that at 20 dBm the varactor voltage begins to enter the
forward conduction region. This is clearly the upper limit of operation for this
circuit. It is interesting to note that the signal is still predominantly sinusoidal in
all three of these plots.
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Closed Loop Control Experiment
146
□ Diode 1
o Diode 2
r
Diode 3
Instantaneous Reverse Bias (volts)
0
0
0
0
0
0
0
-a
0
500 . 0
Time
100.0
psec/DIV
Figure 5-9.12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages: 0 dBm
2.25 GHz 12.5 Q source
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
147
Closed Loop Control Experiment
□ Diode 1
o Diode 2
~ Diode 3
Instantaneous Reverse Bias (volts)
o
0
0
0
500 . 0
Time
100.0
psec/DIV
Figure 5-10. 12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages: +15 dBm
2.25 GHz 12.5 Q source
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
148
□ Diode 1
o Diode 2
v Diode 3
/-N,
5/3
o
>
>
<D
cc
3
O
<
D
C
5/3
C3
C
2
V3
c
- 5 .0
500 . 0
Time
100.0
psec/DIV
Figure 5-11.12.5 to 50 Ohm Transformer Instantaneous Varactor Diode Voltages: +20 dBm
2.25 GHz 12.5 Cl source
5.2.4 Circuit Fabrication
The electronically tunable impedance transformer was built on Rogers
TMMlOi. This material is a thermoset plastic and serves as an excellent low loss
constant dielectric contant material. Its microwave performance parameters are
illustrated in Table 5-3. The required artwork was patterned on this substrate
using a special 2-D milling system that mechanically removes the unwanted
copper using small endmills. The TMM10I is easily patterned using this process
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Closed Loop Control Experiment
149
because it is a soft substrate, however, it is much less flexible that Rogers Duroid
which is frequently used in microwave fabrication. This material also has a much
more stable dielectric constant over temperature and is ideal for microwave
satellite hardware.
The varactor diodes were soldered to the surface of the
substrate after patterning. Figure 5-12 shows a detailed schematic of the fabricated
circuit.
The required grounds for the varactor diodes are implemented using
quarter-wave microstrip lines. These lines can be cut slightly shorter if needed to
resonate out
Property
Value
Relative Dielectric Constant
9.8
Dielectric Loss Tangent
0.027
Thickness
25 mils
Thermal Coefficient of Expansion
nearly the same as copper
Plating
Front and back side Vi ounce copper
50 £2 microstrip line width
23.5 mils
Table 5-3. Rogers TMM10I Microwave Substrate Properties
the series parasitic inductance in the varactor diodes. During testing, it was found
that this was not necessary for our application because the varactor diode voltages
could be tuned slightly to compensate for the parasitics.
The bias tees were
fabricated using quarter-wave transformers and radial stubs.
The use of
microwave grounding instead of DC grounding prevented the need for platedthrough hole processing and allowed for simple independent varactor biasing.
The layout of this circuit is illustrated in Figure 5-13. Wires are soldered to each
of the three bonding pads (£/, 5 2, and Bj) to provide DC bias to each of the
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Closed Loop Control Experiment
150
varactor diodes. For the electronically tunable impedance transformer, B/ and Bj
are set at the same voltage. The other side of all three varactors is tied to a
common voltage. When this circuit is used to match a GaAs FET, the common
voltage can be set to that of the gate or drain of the device.
This provides a
convenient way to bias the device to be matched and the matching network as
illustrated in Figure 5-14.
DC and RF
In
A/4
A/4
DC and RF
out
A/4
A/4
A/4
Bi
A/4
A/4
vB 2
vB i
Figure 5*12. Electronically Tunable Impedance Transformer Schematic
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
Bl
151
b2
B3
Figure 5-13. Electronically Tunable Impedance Transformer Layout
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Closed Loop Control Experiment
152
Gate Bias
RF Input
Power
GaAs F E T
B>
B-y
B;
v diode r
B i ' Gate Bias
Vdiode2 = B 2 ' Gate Bias
Vdiode3=B3 - Gate Bias
Figure 5-14. Example of Biasing Scheme for Use with a GaAs FET
5.2.5 Microwave Measurement Technique
The best way to make accurate small signal microwave measurements of a
microwave circuit is to use a vector network analyzer.
When measuring
microwave circuits, it is impossible to present a perfect short circuit or open
circuit so the use of Y-Parameters or Z-Parameters is impractical. For this reason,
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Closed Loop Control Experiment
153
the vector network analyzer is designed to directly measure S-Parameters which
result from terminating the network in fixed real impedance loads as discussed in
Chapter 2. When measuring S-Parameters with a vector network analyzer, a
calibration process is required to de-embed the effects of the measurement system
from the measurement. A very specific reference plane must be specified for each
of the two ports of the system where the measurements will be accurate. At this
reference plane, a set of “standards” is required to provide enough equations to
solve for all of the unknowns in the model of the measurement system. This is
typically accomplished using coaxial standards. These are standards that connect
directly to a coax cable coming from the vector network analyzer. This process
typically uses a 12 term error-correction model. Further complexity occurs when
the S-Parameters must be measured in a non-coaxial system as in the case o f the
electronically tunable impedance transformer. Since the reference planes occur in
a non-coaxial environment (i.e. on a microstrip line), coaxial standards can not be
presented at the desired reference planes.
As a result, a different calibration
process is required.
A process
known as Thru-Reflect-Line
measurement presented in the following sections.
was used to obtain
the
This process allows for
measurements to be accurately made at non-coaxial reference planes. In the case
of the electronically tunable microwave impedance transformer, the reference
planes are on the microstrip substrate on either side of the circuit illustrated in
Figure 5-13. This method is discussed in detail in [75]. In summary, the use o f
three standards and 16 measurements are used to determine 12 unknowns. The
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Closed Loop Control Experiment
154
mathematical solution is not simple and is derived in [76]. The three standards
required are as follows:
1. Reflect - A load with a high reflection coefficient (~ 1) with a phase
angle known within 14 wavelength.
2. Thru- Ideally a standard of zero length with characteristic impedance
Zo that defines the reference plane between ports.
3. Line - Ideally a line that is 14 wavelength long with characteristic
impedance Zo .
Over the frequency band of interest, the electrical
length of the thru can be between 1/8 and 3/8 o f a wavelength. The
exact length is NOT required.
It is important to note that the Reflect and Line standards do NOT need to be
known exactly. The one important property that must be accurately specified is
the characteristic impedance of the lines. In the case of microstrip, this can be
done very accurately.
The S-Parameter measurements in the sections to follow were made using
the Hewlett Packard 85IOC Vector Network Analyzer using the TRL calibration
process.
A set of calibration standards were designed on TMM10I and a
calibration kit was written to describe the parameters o f the standards to the
HP8510C vector network analyzer. A special coaxial connector test fixture was
used to provide pressure mounted SMA connectors for use with the measurement
standards and the device under test.
In this way, the same connector used in
calibration are used in measurement.
Figure 5-15 illustrates the mechanical drawings for the TRL calibration
kit.
The standards were designed for a center frequency of 2.25 GHz.
They
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Closed Loop Control Experiment
155
include a zero length through, a 90° line with a resulting electrical delay of
110.944567 picoseconds, and a microstrip open circuit for a reflect. It should be
noted that 800 mils o f microstrip have been placed at either end of the reference
plane to allow for the connection of the removable coax connector. This same
length of line must be appended to either end of the device under test to establish
the reference plane.
2.115”
TRL Calibration Kit
Center Frequency 2.25 GHz
Standards
Thru, Line, Reflect
1.600”
TMM10I 25 mils thick
1/2 ounce copper
90 degree delay = 110.944567 pS
Thru Delay = 0 ps
Effective Dielectric Constant = 6.474
Line Width = 23.5 mils
Figure 5-15. TRL Calibration Kit Mechanical Drawings
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Closed Loop Control Experiment
156
5.2.6 Closed Loop Feedback Control and Optimization o f
Hardware Performance
To optimize circuit performance and to demonstrate the ability to control
electronically tunable matching networks in real time, a closed loop feedback
control system was set up to measure data on the electronically tunable impedance
transformer. A block diagram of the test setup is illustrated in Figure 5-16. The
computer running MMICAD for Windows sets the initial bias values for the
electronically tunable impedance transformer. The HP8510 is then directed to
take a set of two-port S-Parameter measurements using the TRL calibration with
reference planes on the microstrip substrate of the device under test. MMICAD
for windows then converts these S-Parameters which are relative to a system
impedance o f 50Q and converts them to a mixed impedance system specified by
the user in the MMICAD for Windows program.
The value of S21 is then
computed in the mixed impedance system and compared to the desired value o f 0
dB. An error function is formulated based upon the distance from 0 dB to the
measured S21. This error is then used to generate new bias values for the varactor
diodes using the Simplex Algorithm [15]. The bias values are then output to the
GPD3 programmable power supplies and the process repeats.
After several
iterations, the measured S21 begins to improve. When the resulting S-Parameter
remains constant for several iterations, the result is considered to be optimal.
Obviously, it is possible to have the system converge on a local minimum that is
not optimal. Since a rough estimate of the optimal insertion loss was made
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
coaxial line
S-Band
Bias Tee
Compaq 386
Computer
Running
MMICAD for Windows
coaxial line
Electronically
Tunable
2.25 GHz
Impedance Transformer
Closed Loop Control Experiment
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
GPIB interface
HP8510C
Vector
Network Analyzer
DC Ground
0 - 2 0 volts
HP6643A
Programmable
Power Supply
20 volts
HP6643A
Programmable
Power Supply
Figure 5-16. Electronically Tbnable Impedance Transformer Closed Loop Feedback Control Test Setup
Ul
-j
Closed Loop Control Experiment
158
analytically, a situation where this occurs would be evident. During the course of
measuring data, this phenomenon did not occur.
5.2.7 Measured Data
The best approach for measuring the performance of the impedance
transformer is to look at the insertion loss in a mixed impedance system, as
defined earlier. If the system is well matched, and therefore S u and S 22 are very
small, then S 21 will be determined predominately by the resistive loss in the
system, which is to be kept at a minimum. Figures 5-17 and 5-18 illustrate the
measured performance of the electronically tunable microwave impedance
transformer shown in Figure 5-13 with performance optimized for 2.25 GHz.
Each curve is obtained by renormalizing the measured S-Parameters to the
specified source and load impedances in the legend. The curves are illustrated
over frequency to show the instantaneous bandwidth characteristics of the system
which is in excess of 4.8%. These curves were obtained by allowing a computer
to repeatedly read the measured circuit S-Parameters, compute an error function,
and calculate new bias voltages for the circuit thereby iteratively attempting to
minimize the insertion loss in the specified mixed impedance system.
This
automated control was accomplished by using MMICAD™ for Windows by
Optotek in conjunction with an HP8510C vector network analyzer and two GPIB
controllable Hewlett Packard power supplies. Further measurements were made
above and below the center frequency to obtain the tuning bandwidth of the
system.
Figures 5-16, 5-17, and 5-18 illustrate measured performance of the
electronically tunable transformer after optimizing performance at frequencies as
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Closed Loop Control Experiment
159
far apart as possible above and below the design frequency o f 2.25 GHz. This
tunable bandwidth is in excess of
10%.
Clearly the broad range of tuning
available and low insertion loss should make this type o f tunable matching circuit
an excellent candidate for many types of applications including medium power
amplifiers.
•o.o
•
0.2
-
0.4
<2 - 0.8
-
1.0
-
1.4
-
1.6
-
1.8
-
2.0
2.0
- A -—B~—
— —
— W—
2.1
2.2
2.3
50
50
50
50
50
to
to
to
to
to
50 Ohms
32 ohms
18 ohms
8 ohms
4 ohms
2.4
Frequency (GHz)
Figure 5-17. Measured Insertion Loss of an Electronically Tunable Microwave Impedance
Transformer • Low Impedances
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Insertion Loss (dB)
Closed Loop Control Experiment
-
0.0
-
0.2
-
0.4
-
0.6
•
0.8
160
- 1.0
-
1.2
-
1.4
-
1.6
-
1.8
-
2.0
2.0
2.1
2.2
2.3
--•A --
50 to 50 ohms
— H --
50 to 98 ohms
—
— ;—
50 to 162 ohms
50 to 2 4 2 ohms
—W ~
50 to 3 92 ohms
2.4
Frequency (GHz)
Figure 5-18. Measured Insertion Loss of an Electronically Tunable Microwave Impedance
Transformer - High Impedances
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Closed Loop Control Experiment
161
•- A - ••
2.15 G H z Optimization
— i—
2.25 G H z Optimization
—
2. 49 G H z Optimization
Insertion Loss (dB)
-1
\
\
-2
/
X
/T
1.75
1.85
1.95
2.05
2.15
2.25
2.35
2.45
2.55
2.65
Frequency (GHz)
Figure 5-19. Measured 50 £2 to 8 Cl Impedance Transformation Optimized at 2.15, 2.25 and
2.49 GHz
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Closed Loop Control Experiment
162
------ ^
\
\
Insertion Loss (dB)
..a : - - - " -
4-
- -
\
•
\
t--------- -------------------------------- ^
\
\
i
▲
•
•- A •••
— I—
1.75
— W—
2 .1 6 G H z Optimization
2.25 G H z Optimization
2 .5 8G H z Optimization
i
i
1.85
.
1.95
------- 1--------------1-----
2.05
2.15
•
i-
2.25
i
------- 1-------1----- 1_
2.35
2.45
2.55
.
i
2.65
Frequency (GHz)
Figure 5-20. Measured 50 A to 162 Q Impedance Transformation Optimized at 2.16,2.25
and 2.58 GHz
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Closed Loop Control Experiment
163
-1
\
-2
/
-
CO
/
;o
(0
/
CO
o
c
o
_i
-3
./■f*
r
0>
in
c
-4
-
2.0
• A -—r--
2 .1 6 G H z Optimization
2.2 5 G H z Optimization
-W —
2.3 5 G H z Optimization
2.1
2.2
2.3
2.4
Frequency (GHz)
Figure 5-21. Measured 50 £2 to 392 Q Impedance Transformation Optimized at 2.16, 2.25
and 2.35 GHz
Figure 5-22 illustrates the performance o f the electronically tunable transformer
by showing the minimum obtainable insertion loss when matching a range o f real
impedances to 50 ohms. It is important to note that the optimization was done
using minimum insertion loss as the criterion for determining the error function.
This explains the somewhat unusual behavior that is seen in the range of varactor
voltages and insertion phase in Figure 5-23. The computer was able to trade off
the ohmic losses in the system with reflected loss in such a way as to obtain
minimum insertion loss. Part of the beauty of this electronic feedback control is
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Closed Loop Control Experiment
164
that this otherwise analytically complex task becomes relatively simple to
implement.
0
-1
m
■o
(0
o
•
Minimum Achievable Insertion Loss at 2.25 GHz
m
2,
■—/k— Corresponding Input Return Loss at 2.25 GHz
-2
(A
—B-- Corresponding Output Return Loss at 2.25 GHz
-10
o
■■5
0)
0)
c
<
0
o
-I
c
w
3
©
c
-3
-20
-4
-5
-30
10.0
50.0
100.0
200.0
Load Im pedance (in ohm s) matched to 50 ohm s
Figure 5-22. Measured Minimum Insertion Loss and Corresponding Return Loss of the
Computer Controlled Electronically Tunable Microwave Impedance Transformer at 2.25
GHz
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Closed Loop Control Experiment
30
w
165
180
—• — Tuning Voltage for Varactor C2 at 2.25 GHz
- a - Tuning Voltage for Varactor C1 at 2.25 GHz
—
Insertion P hase at 2.25 GHz
160
140
1
»
O)
a
120
20
0
>
01
c
c
100
o>
~
3
10
o
a
a
>
o
10.0
50.0
100.0
300.0
Load Impedance (in ohms) matched to 50 ohms
Figure 5-23. Measured Varactor Voltages and Insertion Phase of the Computer Controlled
Electronically Tunable Microwave Impedance Transformer at 2.25 GHz
5.2.8 Nonlinear Measurements
The test setup used to take the linear measurements o f section 5.2.7 can
not be used to take large signal measurements. This is because it is required to
present the impedance transformer with the actual load and source impedances. In
the previous experiment, the system was presented with 50 £2 at either port and
the results were renormalized to emulate the desired load and source terminations.
For linear measurements, this approach is perfectly adequate.
However for
nonlinear measurements, the renormalization does not guarantee correct results.
Furthermore, the techniques required to reduce the signal input into the HP8510
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Closed Loop Control Experiment
166
would serve to reduce the dynamic range of the required measurements. As a
result, the only measurement that could be made was of harmonic content in a
50Q system. It is desirable to have these harmonics as small as possible, because
large amplitude harmonics result in reduced power transfer at the frequency of
interest.
A measurement was made on a Hewlett Packard Spectrum Analyzer
which indicated that the second harmonic (5.5 GHz) was down 20 dB from the
fundamental when the electronically tunable matching network was biased for
optimal 50£2 operation and driven with approximately 20 dBm of input power at
2.25 GHz.
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167
CHAPTER 6
C o n c l u s io n
A new approach to designing microwave integrated circuit amplifiers has
been developed that relies on electronically tunable matching networks rather than
accurate device and circuit characterization. The primary results of this research
include:
1. The development of techniques for designing tunable impedance
matching networks with optimized component ranges for specified
matching domains.
2. The introduction of new widely variable electronically tunable
microwave circuit elements.
3. Demonstration of a technique for carrying out closed loop feedback
control of an electronically tunable matching network.
The concept of the tunable matching network was explained in terms of
complex mappings. Definitions explaining criteria for a successful matching in
terms of these complex mappings were explained.
An analytic approach for
designing tunable ladder networks using three tuning elements was developed.
The mathematical development provided design equations that can be used in
conjunction with a simple optimization process to obtain optimum tuning ranges
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Conclusion
168
for circuit elements given a specified domain of loads. An example of a tunable
matching design problem was solved and results plotted to demonstrate the use of
this new approach.
An approach for designing tunable matching networks
composed of cascaded transmission lines was also derived. The results relate the
required tuning ranges needed for these transmission lines as a function of the
specified domain of load impedances.
Finally a technique for accomplishing
tunable broadband matching networks using broad band negative reactance and
susceptance cancellation was developed. This approach is predicated on the use
of electronically tunable microwave negative inductors and capacitors.
A
technique for designing such elements was not available before this research.
The design of widely tunable microwave circuit elements was carried out
using two basic types of circuits:
1) varactor based circuits; 2) monolithic
microwave intergrated circuit (MMIC) current conveyor circuits.
The use of
varactor tuned resonators in electronically tunable matching networks was
discussed and contrasted with the traditional usage in a bandpass filter. A novel
technique for designing an electronically tunable microwave transmission line
using a three diode circuit was developed.
This approach provides a circuit
topology that functions as a transmission line with an electronically tunable
characteristic impedance and phase length in a specified microwave frequency
band.
The development of a technique for designing microwave current
conveyors was introduced. This approach takes advantage of MMIC technology
to build an active three port network that functions as a current conveyor in the L
and S Bands. Use of higher performance MMIC devices, such at PHEMTs with
significantly higher unity gain cutoff frequencies (f,), promises a threefold increase
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Conclusion
169
in the operational frequency band.
Current conveyor design topologies for
realizing widely tunable microwave circuit elements including positive and
negative inductors, positive and negative capacitors, gyrators, and impedance
transformers were developed.
Microwave simulations were carried out using
detailed device models from TriQuint Semiconductor to illustrate performance.
Additionally, several of these circuits were laid out using the appropriate design
libraries provided from TriQuint to demonstrate physical realizability.
The feasibility of closed loop feedback control of an electronically tunable
impedance transformer was demonstrated by experiment.
Using the theory
developed in Chapter 4, an 2.25 GHz electronically tunable impedance
transformer was designed and fabricated.
The design equations developed in
Chapter 4 were used to determine the required circuit component values.
The
design was constructed on a microwave substrate known as TMM (Rogers’
tradename for thermoset plastic). Three MA-COM hyperabrupt junction varactor
diodes were used in this design. Linear and nonlinear simulations were carried
out prior to operation to determine expected performance. Large signal analysis
showed that the use of this tuning circuit in medium power amplifier would be
possible. This impedance transformer would be used in the input matching circuit
where power levels of +15 thru 20dBm could be expected.
The constructed
circuit was measured using a TRL calibrated vector network analyzer to verify
performance. A computer, vector network analyzer, and computer controllable
power supplies were used to instrument the closed loop feedback control system.
The computer was then instructed to match 50 £2 to several specified real
impedances. A simplex optimization algorithm was run from within MMICAD
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Conclusion
170
for Windows on the computer.
Approximately every three seconds a new
measurement was sent to the computer which compared measured results to the
specified matching goals. The computer generated error function was used to
generate new voltages for the computer controlled power supplies and the process
repeated. The loop was able to optimize performance in about 1 - 2 minutes in
most cases.
There are several areas that would make excellent topics for future
research and serve to further the development and integration of electronically
tunable matching network theory into common practice.
An investigation o f
simpler techniques for determining stability of complex multi-device microwave
feedback circuits would be useful for evaluating some of the more complicated
MMIC tuning element designs discussed. Currently, Nyquist techniques are used,
and require decomposition of the entire circuit to evaluate stability. This process
is very long and involved.
Pole-zero techniques have limited application in
distributed network theory since each transmission line has an infinite number of
poles. Another area that is worth evaluation is the design of electronically tunable
magnetic circuits. Work has been reported [77] on the design of tunable phase
shifters implemented using microstrip lines fabricated on magnetic substrates.
The circuits are tuned by inducing a magnetic field via DC current.
Such a
technique may provide some other techniques for designing widely tunable circuit
elements.
As the emphasis on developing complex high speed circuits continues, the
problem of accurately measuring devices under a variety of operating conditions
will become increasingly more difficult.
To date, the current philosophy for
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Conclusion
171
dealing with this problem has been to devise better measurement techniques so
that more accurate models can be derived. This dissertation has presented an
entirely different approach to solving this problem. Instead of trying to improve
the accuracy of the derived circuit models, the work carried out here has
established a new microwave design philosophy that allows a circuit to adapt and
compensate for the measurement uncertainties. This approach provides a more
robust means for designing amplifiers that is better suited for the complex
miniature microwave circuits that are beginning to appear in the market place.
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172
Appendix A
S t a b il it y
of
S in g l e D e v ic e
and
M u l t i - d e v ic e
Netw orks
The following is intended to be a summary of some of the techniques for
analyzing the stability of linear networks. These concepts will be stated without
proof. The interested reader can consult the noted references for details o f the
derivations.
Definition A .l : A system is Bounded Input Bounded Output Stable (BIBO) i f and
only if fo r all possible bounded amplitude input waveforms x(t) , the resulting
output waveform y(t) is bounded in amplitude [64].
When considering a linear time-invarient network, Definition A. 1 can be
reformulated based on Laplace Transform analysis of the same system.
The
resulting definition for BIBO stability follows:
Definition A .2 : A linear time invariant network is BIBO stable i f and only i f none
o f the poles o f the system, Sj, are in the right half plane (RHP) [64].
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Stability o f Single Device and Multi - Device Networks
173
Now the representation o f a linear time invariant jV-Port network is
considered. In general, the Laplace transform of such a network in terms of its
hybrid matrix, H(s), can be represented [39] as
H (j ) =
(A -l)
"■ hnn (s)j
where
(A-2)
ux (s)=0,x*j
u f s) is the Laplace transform of the excitation at port j, and v,(s) is the Laplace
transform of the response at port /. It is important to note the the H matrix can be
admittance parameters, impedance parameters or any other type o f rc-port
parameters that can be described by equations (A-1) and (A-2).
Definition A .3 :
A linear time invariant system composed o f a network
represented by the hybrid
matrix, H(s), and terminated in immittances
(impedances or admittances) Mi, M 2,...Mn, is BIBO stable i f and only i f none o f
the roots o f the characteristic equation, A(s)= 0 are in the right h a lf plane [78] [80], where
hn + M {
hl 2
h2 [
h2 2 + M 2
hn j
hn 2
(A-3)
A(s) =
••• hnn + M n
Definition 3 allows for the determination of the stability of any linear time
invariant A-port network. There are, however three basic caveats on using this
approach:
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Stability o f Single Device and Multi -Device Networks
174
1. The designer must have enough information to express the Laplace
transform of the network function in terms of hybrid parameters. This
means that circuit models are required, not just the steady-state
frequency response of the network.
2. When
dealing
with
more
complex
networks,
the
numerical
requirements for determining the zeros of A can become prohibitive,
especially when modeling parasitic circuit elements.
3. When dealing with distributed networks, the characteristic equation of
the system will contain trigonometric functions, and in general will
have an infinite number of roots. Finding roots of A in this situation
may be quite difficult.
Distributed networks are commonplace in
microwave circuit design.
In many cases, only the steady-state frequency response of the system is
known. In this case, the approach described in Definition A.3 can not be applied.
The most common way around this problem is to use the Nyquist method [81]. In
the Nyquist approach, the circuit must considered as a number of loops.
By
considering the open loop steady-state response of the individual loops, G(ja>),
stability of the system may be ascertained.
D efinition A .4 : According to the Nyquist theorem, a closed-loop system is stable
i f and only i f the number o f clockwise encirclements o f the point -1+jO by the open
loop function, G(j(0 ), plus the number o f right half plane poles o f the open loop
function G(s) is equal to zero [81].
It is assumed that the designer will know the poles of the open loop
function, G(s), but not of the closed loop response.
This technique can be
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Stability o f Single Device and Multi - Device Networks
175
generalized to handle multi-loop circuits as described by Chen [79] and multi­
device microwave circuits as described by Ohtomo [82]. The description of these
approaches are complex and beyond the scope of this appendix.
One of the most common types of networks that is analyzed for stability is
that of the linear time-invariant two-port. Much work has been done to describe
the stability of a two-port network with arbitrary terminations [68], [69], [83] [92]; however, over the years, some papers have presented results that contain
certain assumptions about the two-port that are not stated. The following is the
simplest set of complete requirements for a 2-port network to be unconditionally
stable as formulated in terms of its two-port S-Parameter matrix.
Definition A .5 :
A linear time-invariant two port network is said to be
unconditionally stable fo r any passive uncoupled source and load impedances, r s
and Fl respectively, i f and only if
1. There exists a pair o f positive real reference impedances, Zi and Z 2
respectively, such that the Laplace Transform (N O T STEADY-STATE)
two port S-Parameter Matrix S(s), representation the network contains
no poles in the right half plane [93].
2. The stability parameter fi> I where fl is defined [6 8 ], [69] in terms o f
the steady state S-Parameter Matrix S(jd)) as
2
(A-4)
where A s = Sn S 2 2 - S l 2 S2 l.
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Stability o f Single Device and Multi - Device Networks
176
It is important to note that Ts and T*. are passive if and only if the poles of
the Laplace Transform representations of the load and source, r ^ s ) and I^O)
respectively, are in the left half plane. It is a common mistake in the microwave
community to assume that if
|r(y'ty)| < 1, then the load is stable.
This is not true
and is easily shown by the following counterexample.
Consider the example of a circuit that will oscillate when hit with an
impulse of current but that appears unconditionally stable using the conventional
statement that a 1-port network is unconditionally stable if and only if |T |< 1.
The circuit is as follows:
V(t)
Figure A-l. Oscillator Composed of a Negative Inductor and Negative Capacitor
For ease of analysis, we will compute the Laplace Transform Solution for this
circuit. The result is as follows:
V(s) =
s l0
(A-5)
- C s 2 + R ' ls - L ~ l
Clearly this system has one zero at the origin and two poles. The question is
where do the poles lie? We remember that the constants C , R , L > 0 . This is
because we are defining our resistor to be positive and our capacitor and inductor
to be negative.
We can now use the quadratic formula to solve for the pole
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Stability o f Single Device and Multi - Device Networks
111
location in the denominator of the expression for V(s). Solving we obtain that
the poles are as follows:
L ± a / l 2 - 4 LC R 2
(A-6)
Clearly, both of these poles will be in the right half of the 5-PIane since
L I 2RLC > 0 given C , R , L > 0. Depending on the nature of the radical, there
could be an oscillation or a growing exponential response. We will consider the
more interesting case of the oscillation.
In order for there to be an oscillatory
response we must have L ( L - 4 C R 2) < 0 . Since we know that L>0, it suffices to
say that we require only L - 4 C R 2 < 0 . Solving for R, one obtains that
(A-6)
Again, even though C , R , L > 0, it is clear that there are an infinite number of
solutions that satisfy this inequality. In these cases the circuit in Figure A -l will
result in a voltage that has the following form:
(to cos a) t + <7sin co r)
(A-7)
where
cr = Re(j0 ) = Re(*i)
and
(A-8)
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Stability o f Single Device and Multi - Device Networks
178
If one looks at the reflection coefficient of this circuit, |r| < 1for all frequencies.
Clearly the |F| < 1 criterion does not indicate that this circuit is potentially
unstable.
The reader may find it hard to believe that a negative inductor or capacitor
can exist in a real circuit in such a way as to cause this phenomenon.
The
following simple design example using the cascaded FET current conveyor design
approach o f Chapter 4 will be used to illustrate this.
Consider a real
implementation of Figure A-l in hardware as shown in Figure A-2.
For this
example, the following circuit component values were used:
cgs = 0.38 pF
rd s = 3 8 0 Q
8m
= 20 S
rp = 1000 Q
q = r2 = r3 = r4 = 1 Q
Evaluating the input impedance Z(s), the following RHP poles are found in the
solution:
s0 = 4.8141 108 + y'3.10301- 10l° ,
jj = 4.8141-108 -y3.10301 1010.
The resulting value of Z(s) evaluated at the same frequency is
Z( s)
s= y'3.1030110
m = 999.947 - ;8.34892 => |T| < 1.
J
1 1
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Stability o f Single Device and Multi -Device Networks
179
Clearly, the condition that |r ^ | < 1 did not catch the RHP poles in this circuit.
This will be the case anytime a feedback circuit takes the form o f a negative
capacitor or inductor. When current conveyors are used in different complex
feedback arrangements, this phenomenon will occur. Therefore, the stability of
each design must be evaluated carefully.
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Stability o f Single Device and Multi - Device Networks
180
—vW V
-w C5y v
Figure A-2. Real Implementation of a Negative Inductor, Negative Capacitor Oscillator
\ZWV~i
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181
A p p e n d ix B
D e r iv a t io n o f C o n d itio n f o r bt>0 in a
T u n a b le C -L -C L a d d e r N e t w o r k
To realize a tunable C-L-C ladder network, the values for the susceptances
b/ and bo (equations (3-13) and (3-15)) must be positive if the capacitors are to be
positive.
Similarly, the reactance x 2 (equation (3-14)) must be positive if the
inductor is to be positive. Certain conditions are known from the geometry of the
problem. They are
CL < 0
(B -l)
0 < Rl < 1
(B-2)
0 < CM < m in ( l/2 ,/? £ ) .
(B-3)
While equations (B -l) and (B-2) are direct results of the properties of a single
constant conductance circle, equation B-3 is true
resistance
if and onlyif the
circle with center and radius ( C m , R m ) intersects
conductance circle with center and radius ( C l , R l )-
constant
the constant
This is obvious from
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Derivation o f Condition fo r b/>0 in a Tunable C-L-C Ladder Network
182
inspection of Figure 3-2. An important result that is required for the following
proof is obtained from equations (B -l), (B-2), and (B-3):
Rl < 0 .
-M
,
(B-4)
From equations (B -l), (B-2), (B-3), and (B-4) it is clear by inspection that x i > 0
and b 3 > 0, but it is not apparent that b\ >0.
Claim:
G N E N (B -l), (B-2), (B-3), and (B-4) hold, bL >0 if and only if
c l r l
C L - b L2* i.2 ’
Proof: This claim will be proved in one direction but all steps are reversible thus
proving the converse.
First, we assume that
bx > 0.
(B-5)
This can be restated in terms of equation (3-13) as
>bT .
(B-6)
> b LR L .
(B-7)
Since R l >0 by definition,
1—-
R,
-M
Proceding, both sides of equation (B-7) are squared resulting in the following,
C,
R,
I - -
\ b LR L f .
(B-8)
■M 7
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Derivation o f Condition fo r b i> 0 in a Tunable C-L-C Ladder Network
183
This is only reversible because we know that
(B-9)
and
(B-10)
from equations (B -l), (B-2), (B-3), and (B-4), and therefore equations (B-9) and
(B-10) are the only valid solutions for this problem. Therefore, taking the square
root in the reverse direction only yields one valid solution. Since Cl <0, equatio
(B-8) can be rewritten as
Adding minus one to both sides of equation (B-l 1) and noting that Rl > 0,
equation (B-l I) can be rewritten as
(B-l 2)
Since Cm >0, multiplying both sides of equation (B-l 3) by Cm yields
(B-13)
Since R l > 0, multiplying both sides of equation (B-13) by R l results in
~ r L < CM “ l +
(B-14)
CL
J
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Derivation o f Condition fo r bi>0 in a Tunable C-L-C Ladder Network
184
b 2 2
Finally, since Cl < 0, bL >0, and R l >0 resulting in - 1 + ■-L~ - L < 0 , equation
(B-14) becomes
-R ,
(B-l 5)
-1 +
or simply
CrRr
Cm < ~
T i T T • QED.
CL ~bL2RL2
(B-l 6)
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185
Appendix C
C o m p u t in g O p t im u m C o m p o n e n t V a l u e s
fo r a
T u n a b l e C -L -C N e t w o r k
The following program listing uses equations 3-13, 3-14, 3-15, 3-16, and
3-17 to determine solutions for the domain of load impedances
is specified by |r £ |< 0 .9 .
The load domain
The optimization function from 3-26 is used to
determine the error from optimal component selection for each possible solution
to the matching problem for all load impedances in this domain. The optimal
match for each point in the domain is stored in an array.
Program Listine
% Solution to optimal values for a three element matching network - automated
% J. H. Sinsky 1/5/97
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Computing Optimum Component Values fo r a Tunable C-L-C Network
clear
close all
yltot=[];
z2tot=[];
y3tot=[];
refmag=[];
refang=[];
%yinn is the normalized input admittance of the system used for verifying that
% the solution equations are in fact correct. All values should be yinn= l+ i 0
yinn=[];
%define range of capacitance values in Farads
crange=le-12;
%define range of inductance values in Henries
lrange=5e-9;
%define system characteristic impedance
z0=50;
%define scaling parameter alpha
alpha=(zO A4).*(crange./lrange).A2;
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186
Computing Optimum Component Values fo r a Tunable C-L-C Network
% define frequency in GHz
fghz=input('Enter frequency in GHz')
%fghz= 1;
w=2.*pi.*fghz.* 10. A9;
% define nominal capacitance and inductance values
%
for the optimization function
clnom = 10.*10A(-12);
12nom= 5.*10A(-9);
c3nom= 10.*10A(-12);
% normalize nominal values
y I nom=zO.*w.*c 1nom;
z2nom=12nom.*w./z0;
y3nom=z0.*w.*c3nom;
%lammag=input('Enter magnitude of load reflection coefficient’)
mags=0.9:-0.1:0.1;
for lammag=mags
angs=0:10:360;
for lamang=angs
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187
Computing Optimum Component Values fo r a Tunable C-L-C Network
% define load admittance in terms of the reflection coefficient
%Iammag=0.7;
%lamang=180;
Iamangn=lamang.*pi./180;
lambda=lammag.*exp(i.*lamang.*pi./180);
gl=(l-lam m ag.A2)./(lammag A2+2.*lammag.*cos(lamangr)+l);
bl=-2.*lammag.*sin(lamangr)
./(lammag.A2+2. *lammag. *cos(lamangr)+1);
%Define load circle parameters in terms of gl and bl
% radius of the load admittance circle
rl=l-/(gl+l);
% center of the load admittance circle
cl=rl-l;
% define the range of possible values for the center o f the
%
middle circle (impedance circle)
delta=le-50;
cmmin=delta;
if bl>0
cmmax=min(0.5,(rl.*cl)./(cl-(rl.*bl).A2));
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
188
Computing Optimum Component Values fo r a Tunable C-L-C Network
else
cmmax=min(0.5,rl);
end
steps=1000;
ssize=(cmmax-cmmin)./(steps+1);
cm=cmmin:ssize:cmmax;
% define the solution for y 1 z2 and y3 (normalized)
y l=-bl+sqrt(cl.*( l-rl./cm))./rl;
z2=sqrt(cm).*(sqrt(l-2.*cm)+sqrt((cm-rl)./cl))./(l-cm);
y3=sqrt(l./cm-2);
% verify match
yinn=[yinn i.*y3(cm)+l./(i.*z2(cm)+l./(gl+i.*bl+i.*y l(cm)))];
%yinn=[yinn i.*y3(lcmopt)+l./(i.*z2(lcmopt)+l./(gl+i.*bl+i.*yl(lcmopt)))];
%yinn2=[yinn2 i.*c3val.*w+1,/(i.*l2val.*w+1 ./((gl+i.*bl)./z0+i.*c 1val.*w))];
%define optimization function, f, and plot
%f=y 1,A2+alpha.*z2.A2+y3.A2;
f=(y 1-y 1nom).A2+alpha.*(z2-z2nom) A2+(y3-y3nom) A2;
% find the minimum value of the optimization function
%
and denote optimum cm as cmopt
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
189
Computing Optimum Component Values fo r a Tunable C-L-C Network
fmin=min(f);
Icmopt=find(f==fmin);
cmopt=cm(lcmopt);
%display optimum values for bigyl, bigz2, bigy3
bigy l=y 1(lcmopt)./z0;
bigz2=z2(lcmopt).*z0;
bigy3=y3(lcmopt)./z0;
yltot=[ y ltot bigyl];
z2tot=[z2tot bigz2];
y3tot=[y3tot bigy3];
refmag=[refmag lammag];
refang=[refang lamangr];
end
end
nh=10.A9;
pf=10.A12;
cltot=pf.*y Itot'./w;
12tot=nh.*z2tot'./w;
c3tot=pf.*y3tot'./w;
refmag=refmag';
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
190
Computing Optimum Component Values fo r a Tunable C-L-C Network
refang=refang';
x=refmag.*cos(refang);
y=refmag.*sin(refang);
alldat=[refmag refang x y c l tot 12tot c3tot];
save clcladf.txt alldat -ascii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
191
192
Appendix D
D e r iv a t io n
and
of
3 Port Y
3 -P o r t H -P a r a m e t e r s
and
from
2
Z Param eters
In order to evaluate the quality of a microwave frequency current conveyor it is
convenient to look at the hybrid parameters of the device as described by A. Sedra
[65]. These three port parameters are for the circuit illustrated in figure D -l.
The following numbers 1,2, and 3 will be used as port subscripts instead o f the
letters x, y, and z for convenience.
The hybrid matrix description is then
represented as follows
f . \
‘2
<v 3 ,
=
0
0
0
-1
,1
0
f
\
/
\
o ' V1
^11
=
0 *3
^21
^12
h l3
V1
h 22
h 23
*3
0, <v 2 ,
h 32
h 33; <v 2 ;
<^31
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
193
ccn-
i
V
V
ccn-
—i
V
Figure D-l. Current Conveyor Port Assignments
Writing these equations out in scalar form, we obtain
t'l = h u vl +/ti2*3 +^13V2
1*2 = ^21VI + ^22*3
^23v2
(D -2 )
v 3 = ^ 3 I V1 + ^ 32i 3 + ^ 3 3 v 2
Clearly, given all of the currents and voltages, we can solve for the H-Parameters
by letting vj,V2 , and i'3=0 at the appropriate times. The following notation will
be assumed
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
194
Yy refers to Y - Parameters
Zfy refers to Z - Parameters
hjj refers to Hybrid - Parameters
At this point an expression for each of the hybrid parameters in (D -l) as a
function of 2 and 3 port Y and Z parameters of the network in figure D -l will be
derived. The purpose for this exercise is to be able to use circuit simulator tools
to find hybrid parameters of complex circuits.
Since Y and Z parameter
calculations are commonplace in modem microwave CAD, this process will
automate the process of finding the desired hybrid parameters.
■’l v'2=0
= Yi [ of the two port {1,2}
(D-3)
* *12 of the two port {1,2}
(D-4)
= —— - = ^ ^/C
(D-5)
13=0
v2
v j= 0
«3=0
“
u _
ftp
—i.u
*3
h2 1 - -
h 23 ~
V ) =0
=U
/ * : 33
of the three port {1,2,3}
v2 =0
v2 =0
('3=0
v2
vV 3, I*
13
h Y2l of the two port {1,2}
(D-6)
= Y22 of the two port {1,2}
(D-7)
vj= 0
«3=0
u —7~
ll
ft?2
'
l3
=0
= —— - =
vV 3, 1i 3,
/ r 33
of the three port {1,2,3}
F
(D-8)
v2 = 0
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
u = ill
h31
—
= ——- =
Vi V 2 = 0 I , v.
'3=0
VC of the two port {1,3}
/ z ll
v
195
(D-9)
with port 2 shorted to ground
u
33 "
ill
v2 vj=0
=— — =
h
V-)
^ 7 7
/ Z 22
of the two port {2,3}
(D-10)
'■3 = 0
with port I shorted to ground
*32 - ;
vj=0
<2=0
=
Y
/ r 22
of the three port {1,2,3}
(D -l 1)
Summarizing these results we obtain the following conclusions.
1.
If the network in figure D -l is considered to be a 2-port network
(i.e.
leave port 3 open circuited or simply just keep it as an interned node during circuit
simulation), the following is obtained:
'* 1 1
*13^
(Y
f i l,,l
Y
,^
z 12N
,* 2 1
*23,
,*21
*22,
(D-12)
If all three nodes of the network are active, then
r23
r13
*12 - 7 “
; *22 ~ T ~
! *32
r 33
*33
3.
1
•
(D-13)
*33
Shorting node 2 to ground (i.e. only nodes 1 and 3 exist),
Z31
h3l -■
(D-14)
'11
4.
Shorting node 1 to ground (i.e. only nodes 2 and 3 exist), we obtain
(D-15)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
196
In summary, a circuit simulator can now be used to calculate the hparameters of an arbitrarily complex three port network.
This will prove
invaluable when trying to design a microwave frequency current conveyor
Computing H-Parameters using MMICAD bv Qptotek
global
DIM FREQ=le+009 RES=1 COND=0.001 CA P=le-012 &
IND= le-009 LNG=le-006 TIM E=le-012
MSUB ER=12.9 H=100 T=2 RHO=l TAND=0.002 @GAAS
!HA2 Linear FET Model
! VDS=4.0V Vgs=-1.25 0.5 micron symmetric FET
var
Cl=l
R2=10
R4=1000
R6=1000
R5=100
! four MESFETs, no bias or coupling caps
ckt
FET 1 2 3 GM=43 CGS=0.38 RDS=380 CGD=0.0361 &
CDS=0.079 RGS=6.2 TAU=3.79 RG=1 RS=1.05 RD=3.61 &
LG=0.02307 LS=-0.00129 LD=0.01416 IS=1
! cap I 20 c= 0.1
! res 20 2 r= 130
[stabilization
DEF3P 1 2 3 TQFET
FET 1 2 3 GM=240 cgs=0.78 rds=l 11.70 cgd=0.054 &
cds=0.120 rgs=1.25 tau=1.60rg=0.4I70 rs=0.21 rd=l.25 &
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
lg=-0.04 ls=0.008 ld=0.00383
deD p 1 2 3 phemt
tqfet 1 2 6
tqfet 2 3 6
tqfet 3 4 6
tqfet 4 5 6
!tqfet 5 7 6
! phemt 1 2 6
! phemt 2 3 6
! phemt 3 4 6
! phemt 4 5 6
! phemt 5 7 6
DEF3P 1 5 6 C0NVEY4
convey4 1 2 3
open 3
def2p 1 2 convey4a
convey4 1 2 3
shor 2
def2p 1 3 convey4c
convey4 1 2 3
shor 1
def2p 2 3 convey4d
convey4 1 2 3
convey4 4 5 6
res 2 4 r=r4
res 2 6 r=r5
res 3 5 r=r2
res 1 6 r=r6
unit 5 0
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
197
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
cap 3 4 c=c 1
res 1 0 r=30000000
d eflp 1 actind
proc
ycir=actind im[y 11 ]
induct=-le9/(ycir*freq*2*pi)
yadm=actind re[y 11]
q=-ycir/yadm
parres=l/yadm
[compute hybrid parameters
t*************************
! uses node 3 open circuited
hil= convey4a y l 1
hl3=convey4a y 12
h21=convey4ay21
h23= convey4a y22
I*****************
! Uses all three nodes
hl2num=convey4 y 13
hl2den=convey4 y33
h 12= h12num /h12den
h22num=convey4 y23
h22den=convey4 y33
h22=h22num/h22den
h32den=convey4 y33
h32=l/h32den
i* * * * * * * * * * * * * * * * * * * *
! Uses Node 2 shorted to ground
h 3 1num=convey4c z2 1
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
198
Derivation o f 3-Port H-Parameters from 2 and 3 Port Y and Z Parameters
h3 lden=convey4c z l I
h 3 1= h 3 1num /h31den
|* * * * * * * * * * * * * * * * * * * *
[Uses Node 1 shorted to ground
h33num=convey4d z21
h33den=convey4d z l 1
h33=h33num/h33den
i* * * * * * * * * * * * * * * * * * * * *
freq
sw eep 1 10 1
Istep 5
out
actind s 11 smith
actind re[y 11] g rl
actind im[y 11] gr2
outvar refinduct] induct
outvar re[q] q
outvar re[parres] parres
outvar h 11 hybrid t
outvar h 12 hybrid t
outvar h 13 hybrid t
outvar h 2 1 hybrid2 t
outvar h22 hybrid2 t
outvar h23 hybrid21
outvar h 3 1 hybrid3 t
outvar h32 hybrid3 t
outvar h33 hybrid3 t
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199
200
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211
VITA
Jeffrey H. Sinsky was born in Baltimore, Maryland in 1963. He received
his B. Sc. and M. Sc. degrees in Electrical Engineering from The Johns Hopkins
University in 1985 and 1992 respectively. He has been pursuing his Ph.D. at The
Johns Hopkins University in the Electrical and Computer Engineering Department
since September 1993.
He was the recipient of the John Boswell W hitehead
award for outstanding achievement in electrical engineering and computer science
by an undergraduate student, and was also a finalist in the Alton B. Zerby Award
competition for the outstanding electrical engineering student in the USA in 1985.
He is a member of Tau Beta Pi and a member/past chapter president of Eta Kappa
Nu.
Since June of 1985 he has been employed at the Johns Hopkins University
Applied Physics Laboratory. He is currently a senior engineer in the Space
Department. His work experience has included development of real-time missile
tracking software,
design and specification of microwave flight hardware,
microstrip antenna design, microwave synthesizer design, and research in the area
of power GaAs MMIC design.
His interests include microwave circuit design,
microwave theory, and satellite communication systems design.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
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