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MEMS and BST technologies for microwave applications

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UNIVERSITY OF CALIFORNIA
Santa Barbara
MEMS and BST Technologies for Microwave Applications
A dissertation submitted in partial satisfaction
of the requirements for the degree of
Doctor of Philosophy
in
Electrical and Computer Engineering
by
Yu Liu
Committee in charge:
Professor Robert A. York, Chairperson
Professor Noel C. MacDonald
Professor Umesh K. Mishra
Professor James S. Speck
September 2002
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UMI Number: 3064743
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The dissertation of Yu Liu is approved
jlL^Gu V^-i
Committee Chairperson
September 2002
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C opyright by
Yu Liu
2002
iii
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ACKNOWLEDGEMENTS
For the past four years I owe a lot to my advisory committee, my friends, my
family, and many other people who always supported me, without whom it is almost
impossible for me to get this work done. Care and support from all these people gave
me the confidence, their encouragement means so much to me throughout those
countless hard-working days and nights.
I am deeply grateful to my graduate advisor. Professor Robert York. His wide
knowledge, serious research attitude and enthusiasm in work deeply impressed me
and taught me what a true scientific researcher should be. I am also thankful to
Professor Noel MacDonald. Professor Umesh Mishra and Professor James Speck for
their supports and instructions on this work.
My friends in microwave electronics lab not just helped me with my research
work, but also let me enjoy a friendly work environment. Among them, I would like
to specifically thank Amit and Andrea, from whom I learned a great deal when I was
starting my research work. Many thanks also go to Baki, Chris, Erich, Hongtao, Jim,
Joe. Justin. Nadia. Padmini, Paolo. Pengcheng, Pete, Troy, Vicki, Yutaka, and many
other Mishra group members that I cannot enumerate here.
The research presented in this dissertation was supported by a number of
different agencies over the years. I gratefully acknowledge support from the Defense
Advanced Research Projects Agency (DARPA) under the FAME program, the Air
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Force Research Laboratory under the Toyon program and the Army Research Office
(ARO) through DURIP equipment award.
Jack. Bob, Mike, Brian and Neil tried their best to keep the research clean
room function well all the time. I am grateful to all these people for their help and
contributions.
Finally I would like to acknowledge my parents and my sister for their love
and support throughout these years. Only with their love and encouragement to get
this work done is possible.
v
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Curriculum Vitae
Yu Liu
EDUCATION
June 1998
Bachelor of Science,
Electronic Engineering,
Tsinghua University, Beijing, China
June 2000
Master of Science,
Electrical and Computer Engineering,
University of California, Santa Barbara
June 2002
Doctor of Philosophy,
Electrical and Computer Engineering,
University of California, Santa Barbara
PROFESSIONAL EMPLOYMENT
1998 - 2002
Graduate Student Research Assistant,
Department of Electrical and Computer Engineering,
University of California. Santa Barbara
PUBLICATIONS
Journal Publications
1. A. Borgioli. Y. Liu, A. S. Nagra. R. A. York, “Low-Loss Distributed MEMS
Phase Shifter.” IEEE Microwave and Guided Wave Letter. vol. 10. pp.7-10.
January 2000.
2. E. G. Erker, A. S. Nagra; Y. Liu; P. Periaswamy; T. R. Taylor; J. S. Speck; R. A.
York. “ Monolithic Ka-band phase shifter using voltage tunable BaSrTiCb
parallel plate capacitors,” IEEE Microwave and Guided Wave Letters. vol. 10.
pp. 10-12, January 2000.
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3. Y. Liu, A. Borgioli, A. S. Nagra, R. A. York, "K-Band Three-Bit Low-Loss
Distributed MEMS Phase Shifter,” IEEE Microwave and Guide Wave Letter,
vol. 10, pp.415-417, October 2000.
4. Y. Liu, A. S. Nagra, E. G. Erker, P. Periaswamy, T. R. Taylor, J. Speck, R. A.
York, “BaSrTiOs Interdigitated Capacitors for Distributed Phase Shifter
Applications," IEEE Microwave and Guide Wave Letter, vol. 10, November
2000.
5. Y. Liu, A. Borgioli, R.A. York, "Distributed MEMS Transmission Lines for
Tunable Filter Applications,” International Journal o f RF and Microwave
Computer-Aided Engineering, Special Issue on RF Applications o f MEMS and
Micromachining 11:254-260.2001.
Conference Publications
1. P. Jia, Y. Liu. L.-Y. Chen, R. A. York, "Analysis of a passive spatial combiner
using tapered slotline array in oversized coaxial waveguide,” in 2000 IEEE MTTS International Microwave Symposium, Boston, Massachusetts, June 2000.
2. Y. Liu, B. Acikel, A. S. Nagra, R. A. York, T. R. Taylor. P. J. Hansen, J. S.
Speck, "Distributed Phase Shifters Using (Ba,Sr)TiC>3 Thin Films on Sapphire
and Glass Substrates," in 13th International Symposium on Integrated
Ferroelectrics, Colorado Spring, Colorado, March 2001.
3. B. Acikel: Y. Liu; A. S. Nagra: T. R. Taylor; P. J. Hansen: J. S. Speck: R. A.
York. "Phase shifters using (Ba,Sr)Ti0 3 thin films on sapphire and glass
Substrates,” in 2001 IEEE MTT-S International Microwave Symposium, Phoenix.
Arizona, May 2001.
4. Y. Liu; T. R. Taylor; J. S. Speck; R. A. York, “High-Isolation BST-MEMS
Switches," in 2002 IEEE MTT-S International Microwave Symposium, Seattle,
Washington, June 2002.
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ABSTRACT
MEMS and BST Technologies for Microwave Applications
by Yu Liu
Both radio-frequency microelectromechanical systems (RF MEMS) and
Barium Strontium Titanate (BST) ferroelectric thin films are emerging technologies
with great promise for reducing cost and improving performance in modem
microwave radar and communication applications. This work is aimed at developing
and optimizing aspects of these technologies relevant to future commercial
application, including device design, fabrication and processing, and microwave
circuit demonstrations.
Detailed processing techniques and fabrication concerns of RF MEMS
switches using a surface micromachining technique are investigated in order to
improve the switching performance with reasonable DC bias control. Problems
regarding the design of RF MEMS switches for improved yield and reliability are
also addressed. The high performance of RF MEMS switch promises it to be used to
fabricate low cost, high-performance microwave control circuits, such as SPDT
switches, digital phase shifters, and tunable filters.
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In recent years, ferroelectric technologies have received extensive attention
because of their suitability for tunable microwave applications. BST ferroelectric thin
film and device properties are investigated for microwave tuning and control
applications. Interdigital device structure is optimized to minimize device loss and
maintain good tunability. These BST interdigital capacitors are used in varactorloaded transmission line to obtain low loss distributed phase shifters.
Based on the above work, BST thin films are used to replace traditional
silicon nitride dielectric in RF MEMS switches for high-isolation and broadband
applications. The high dielectric constant of BST thin film results in both higher
isolation and smaller device size for RF MEMS switches. An excellent isolation of
more than 30dB is obtained in a wide frequency range from 16GHz to 36GHz.
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Contents
1. Thesis Outline
I
2. Introduction to radio frequency microelectromechanical systems
(RF MEMS) switching technology
3
2.1 Motivation for RF M EM S......................................................................................... 3
2.2 Fundamental switching th eo ry ................................................................................. 5
2.3 Microelectronic RF switching technologies........................................................... 7
2.4 Introduction to the surface RF MEMS switch........................................................ 11
3.
Investigation on surface RF
fabrications and measurements
MEMS
switches:
designs,
16
3.1 Fundamental surface MEMS switch physics...........................................................17
3.2 Fabrication of the surface RF MEMS sw itch......................................................... 20
3.4 Surface RF MEMS switch design considerations................................................. 26
3.5 Microwave characteristics......................................................................................... 32
3.6 Modeling of the surface RF MEMS switch............................................................ 36
3.7 Reliability of surface MEMS switches.................................................................... 39
3.8 RF MEMS switch with metal c a p ............................................................................40
3.9 RF MEMS switch with isolated DC bias line.........................................................45
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4. Surface RF MEMS-based microwave control circuits
51
4.1 Single-pole double-throw (SPDT) MEMS switch................................................. 52
4.2 Distributed MEMS transmission line (D M T L)......................................................56
4.3 Digital DMTL-based delay line.................................................................................60
4.4 Three-bit digital MEMS phase s h ifte r.................................................................... 67
4.5 DMTL-based tunable filter........................................................................................ 72
5. Low loss analog phase shifters based on BST interdigitated
capacitors (IDCs)
81
5.1 Introduction to BST thin film technology...............................................................82
5.2 Parallel-plate vs. interdigitated capacitors (IDCs)................................................. 85
5.3 DC and RF characterization...................................................................................... 90
5.4 Circuits fabrication and measurement..................................................................... 97
6. High-isolation BST-MEMS switches
104
6 .1 Motivation for BST-MEMS sw itches....................................................................104
6.2 Design and fabrication concerns.............................................................................106
6.2 Experimental Results...............................................................................................110
7. Summary and future work
115
7.1 Surface RF MEMS effort ......................................................................................115
7.2 BST-based phase shifter effort................................................................................116
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Chapter 1
Thesis Outline
This thesis deals with the development of two emerging tuning and control
technologies for microwave circuits and antennas applications. Thus the work mainly
focuses on two topics- RF MEMS and BST ferroelectric technologies. This is an
interdisciplinary work that integrates the areas of electrical, mechanical and materials
science. A brief outline of the contents and organization of each chapter is presented
here to serve as a guide for reading this thesis.
The motivation for using radio frequency microelectromechanical systems
(RF MEMS) technology for the control of microwave circuits and antennas is
presented in chapter 2. A brief survey of currently used microelectronic RF switching
technologies is presented. RF MEMS switches with surface micromachining
processes are compared with conventional semiconductor switches. Microwave
circuit and system applications that benefit from the use of surface RF MEMS
switches are listed.
The fundamental electromechanical characteristics of surface RF MEMS
switches are presented in chapter 3. This is followed by detailed processing
techniques and fabrication concerns. Measurements of the microwave properties of
surface RF MEMS switches are presented and compared with the three-dimensional
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high frequency field analysis. Finally two new RF MEMS structures are introduced
to further improve the switch performance.
In Chapter 4, surface RF MEMS technology is used to fabricate low cost,
high-performance microwave control circuits. First, this technology is used to
demonstrate single-pole double-throw (SPDT) MEMS switches. Next, the concept of
distributed MEMS transmission lines (DMTLs) is introduced. High-performance
digital phase shifters and tunable filters based on DMTLs are implemented for future
radar and communication systems.
A brief introduction to BST thin film technology is presented in chapter 6.
BST interdigital device structure is optimized to minimize device loss and maintain
good tunability. A brief description of the monolithic fabrication process is
presented, followed by DC and RF measurements on the fabricated devices. Finally.
BST interdigital capacitors are used in varactor-loaded transmission line to obtain
low loss distributed phase shifters. Over 60'/'dB performance is obtained, which is
the state-of-the-art result for phase shifters using BST thin film technology.
Chapter 7 investigates replacing traditional silicon nitride dielectric with
emerging BST thin film in surface RF MEMS switches for high-isolation and
broadband applications. RF MEMS switches using both BST and silicon nitride
dielectrics were fabricated. Measurements of both devices were compared, followed
by discussions on further improving the performance.
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Chapter 2
Introduction to Radio Frequency Micro­
electromechanical systems (RF MEMS)
Switching Technology
The motivation for using radio frequency microelectromechanical systems
(RF MEMS) technology for the control of microwave circuits and antennas is
presented in this chapter. A brief survey of currently used microelectronic RF
switching technologies is presented. This is followed by an introduction to the
fundamental characteristics of RF MEMS switches. The inherent advantages of these
switches relative to semiconductor switches are discussed. Microwave circuit and
system applications that could benefit from the use of RF MEMS switches are listed.
2.1 Motivation for RF MEMS
The recurring demand for more flexible and sophisticated, yet lightweight
and low power wireless systems, has generated the need for a technology that can
drastically reduce manufacturing costs, size, weight, and improve performance and
battery life. Familiar examples of current and future applications exacting these
qualities include wireless handsets for messaging, wireless Internet services for ecommerce. wireless data links such as Blue tooth and location services exploiting the
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Global Positioning System. With the potential to enable wide operational
bandwidths, eliminate off-chip passive components, make interconnect losses
negligible, and produce almost ideal switches and resonators in the context of a
planar fabrication process compatible with existing IC and MMIC processes. RF
MEMS is widely believed to be just that technology.
Brought to maturity, RF MEMS technology promises to enable on-chip
switches with zero standby power consumption, nano-Joule-level switching power
and sub-5V actuation voltage: high quality inductors, capacitors and varactors:
wideband phase shifters; high stable (quartz-like) oscillators; and high performance
filters operating in the tens of megahertz-to-several gigahertz frequency range [1-4].
The availability of such an arsenal of first-rate RF and microwave components will
provide designers with the elements they have long hoped for to create novel and
simple reconfigurable systems.
Another application where
RF MEMS technology has
made major
contributions is in reconfigurable antennas. Reconfigurable multi-band phased-array
antennas are receiving a lot of attention lately due to the emergence of RF MEMS
switches [5, 6]. A MEMS-switched reconfigurable multi-band antenna, as depicted in
figure (2.1), is one that can be dynamically reconfigured within a few microseconds
to serve different applications at drastically different frequency bands, such as
communications at L-band (1-2 GHz) and synthetic aperture radar (SAR) at X-band
(8-12.5 GHz). The Air Force also uses both ground- and airborne- moving target
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indication (GMTI/AMTI) at these frequencies in order to detect moving targets such
as vehicles on the ground and low observables in the air.
Figure 2.1: Schematic of MEMS-switched reconfigurable multi-band
antenna
2.2 Fundamental switching theory
The two possible configurations using single-pole single-throw (SPST)
switches in an RF circuit— series and shunt connections—are shown in figure (2.2).
I
Series
K}
y jy
Swirch
VW— °--------- t—
o—
+
shunt \
Switch | X
o
Figure 2.2: Ideal single-pole single-throw (SPST) switching circuits
The ideal switch alternates between a perfect open circuit and a perfect short circuit.
Certain microelectronic devices have current-voltage relationships that approximate
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the ideal switch.
The use of such devices as switches facilitates fast switching,
electronic control, and monolithic integration.
Figure 2.3: SPST switching circuit models using a non-ideal switching
device, represented by impedance Z,t.
The non-ideal switching element can be represented symbolically by a twoterminal impedance Zj, as shown in figure (2.3), where Z j is a function of a control
bias applied to the device. The impedance can be switched between low impedance
and high impedance states. An important figure of merit for the switching circuits is
the insertion loss, computed for both the ON and OFF state. This can be derived in
terms of Z,/ as follows [7]
series switch
shunt switch
( 2 . 1)
The insertion loss in the ON state is usually referred to as the insertion loss,
whereas in the OFF state of the circuit is referred to as the isolation. Other important
figures of merit for switches are switching speed, power handling capacity, linearity,
and control power dissipation. Switching speed is the time required for the switch to
respond at the output when the control line input voltage changes. It includes the
driver propagation delay as well as transition time, the time required for the RF
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voltage envelope to go from 10% to 90% for on-time or 90% to 10% for off-time.
Power handling capacity is ultimately limited by the actual microelectronic device
used to implement the switch.
In the high impedance state, each device will be
limited by its maximum sustainable voltage across the terminals, Vmax. In the low
impedance state, each device will be limited by its maximum sustainable current,
Imax■The power handling capacity of the various permutations are shown in Table 1.
In each case, the maximum power represents the maximum incident power from the
generator that can be handled (reflected or transmitted) by the device.
Circuit Configuration
Device state
Low impedance.
Zd « Z 0
High Impedance.
Z d » Z0
Series
P.m ~
P
I nux^t)
=
*
Vmux
1
8Z 0
Shunt
p
1
off
=1 / : z
p
""
g
mix
_
V max
1
o
~>z
—
*-0
Table 2.1: Summary of power handling capacity of the various circuit
configurations.
2.3 Microelectronic RF switching technologies
Traditionally, PIN diode and FET switches are the two most commonly used
switches in RF and microwave regime. The following section gives a brief summary
of these two switching technologies.
PIN Diode Switch
The current-voltage characteristics of a PIN diode are shown in figure (2.4).
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Figure 2.4: Current-voltage (/-VO relationship for a PIN diode.
When forward biased above the threshold voltage V,/„ the device exhibits a
low resistive impedance R,m. In this state the power handling capacity is set by the
maximum current swing that can be sustained by the device (Table (2.1)). At low
frequencies the peak-to-peak current is limited to 2 /^ ,, beyond which significant
waveform distortion occurs due to rectification. However, at high frequencies the
instantaneous current can be sustained at much higher values due to the large amount
o f charge stored in the /-region of the device, which allows Imax to greatly exceed the
low-frequency limit. Therefore, Imax is typically limited by thermal constraints at RF
frequencies [8].
0 ff
o—w ---- 1(—o
Figure 2.5: Equivalent circuit for a PIN diode in the forward bias (On) and
reverse-biased (Off) states.
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When reverse biased, the device is well modeled by a depletion capacitance
Cj, and a small series resistance Rs which is due to the bulk (undepleted)
semiconductor near the contacts.
The depletion capacitance in a PIN diode is
roughly constant once the /-region is fully depleted, which is the case over the typical
range of applied reverse bias. For maximum voltage swing the device is reversebiased at V -V iJl for the high-impedance (off) state, so that Vmar=VbJ2.
The
equivalent circuit for the device is summarized in Figure (2.5).
FET Switches
Three-terminal devices like FETs are commonly used as switches in
monolithic microwave integrated circuit (MMIC) technology.
Like most circuits
using three-terminal devices, FET switching circuits are conceptually more
complicated than two-terminal PIN diode circuits. Current-voltage (I-V) curves for a
typical GaAs FET are shown in Figure (2.6) [9].
On sta te ( v t l =o>
' slope - ///?„_
u.s.v - -
V =-0.5.
\
max
1 t: ptr
slope - l/Rujj
O ff s ta te (V <-v j
I
I
Figure 2.6: I-V curves for a typical GaAs FET device.
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When used as a switch, the FET is usually DC biased at zero drain-source
voltage, Vds=0 V, and the gate is biased at either zero bias or pinch-off from a high
impedance source, i.e. the gate is operated in an RF open condition with a DC
control voltage. The low impedance switching state is obtained at zero DC gate bias,
j=Q V, in which case the active channel underneath the gate electrode (see
figure (2.7a)) is undepleted and therefore there is a direct conducting path between
the drain and source electrode.
resistance,
This region is well modeled by a simple **on”
= /? + 2rt , where R, is the channel resistance and rs is
given by
associated with the drain and source ohmic contacts.
source
gate
source
drain
—
gate
: T
* '•
tit-
substrate
\|
J1
On state (Vg=0)
drain
Cd.f
Off state (Vg <-Vpo)
Figure 2.7: GaAs FET cross section, (a) Fully conducting channel for
V. (b) Fully depleted channel for Vts= Vtd< V^,.
The high impedance state is obtained when the gate is biased into pinch-off
(fully depleted channel), Vg!i = Vgd < Vpo, as shown in figure (2.7b). The depletion
region in this case is represented by capacitors Cg. Since the channel is no longer
conducting, any drain-to-source leakage paths (such as through the substrate or
buffer layer) and/or electrode capacitance will be significant and must be included in
the model, here as
and O v.
These parameters are also present in the low
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impedance state but contribute negligible admittance in comparison to the
conducting channel. The simplified equivalent circuit for the device in the two states
is summarized in figure (2.8).
r
On
o—vW—o
Figure 2.8: Equivalent circuit for a FET diode in the low impedance and
high impedance states.
2.4 Introduction to the surface RF MEMS switch
Radio-frequency microelectromechanical system (RF MEMS) is now an
emerging technology with great promise for reducing cost and improving
performance in certain microwave applications. Various MEMS structural designs
for radio frequency applications from a device perspective are summarized in Yao’s
topical review paper [10]. MEMS device with surface micromachining processes has
attracted a lot of interest because of its compatibility with standard semiconductor IC
fabrication, and potential loss reduction. Surface RF MEMS switches are surface
micromachined devices that use mechanical movement to achieve a short circuit or
an open circuit in the RF transmission line. The forces required for the mechanical
movement can be obtained using electrostatic, magnetostatic. piezoelectric, or
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thermal designs. To date, only electrostatic-type switches have been demonstrated at
0.1-100 GHz with high reliability (100 million to 10 billion cycles) and wafer-scale
manufacturing techniques [11].
MEMS bridge
G
dielectric
w
G
s u b s tra te
s u b stra te
Switch dow n
Switch up
Figure 2.9: Cross section of a surface MEMS membrane switch in the up
(off) and down (on) state.
The physical structure of the electrostatic-type MEMS switching device is
shown in Figure (2.9). Here a thin metal membrane of thickness t is suspended a
short distance g above a conductor. When a DC potential is applied between the two
conductors, charges are induced on the metal which tend to attract the two electrodes.
Above a certain threshold voltage, the force of attraction is sufficient to overcome
mechanical stresses in the material, and the membrane snaps down to the “closed”
position shown on the right of figure (2.9).
C
Off
M EM S
Switch
Z
o
a
O ff
If
-o
Switch up
c
■o
Switch down
Figure 2.10: Equivalent circuits for the MEMs switch in the two states
shown in Figure 2.9.
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Although a true conducting on/off switch appears possible with this
technology, it has proved difficult to achieve reliable metal-to-metal contact in the
down position.
Therefore the prevailing surface MEMS switching technology
employs a thin dielectric coating over the center conductor, as shown in figure (2.9),
so that the device essentially switches between two capacitance states. Typically an
/i=1000 A thick silicon nitride (SiN) film is used with £r=7.5. The equivalent circuit
for the device is therefore summarized in figure (2.10). The capacitance in the two
states can be accurately computed using parallel plate formulas, requiring only
knowledge of the electrode geometries and the dielectric material.
bias
R Fou t
^b ia s
MEMS bridge
R F choke
DC Block
D C Block
co p lan ar
w aveguide
— )l— °
*~on*~ o f f
substrate
RF in
Figure 2.11: Surface MEMS shunt capacitive switch, and a coplanar
waveguide implementation.
A perspective view of a surface MEMS switch in a coplanar waveguide
configuration is shown in figure (2.11). The membrane in this case is an air-bridge
between the ground electrodes, which is a natural component o f any coplanar
waveguide circuit and therefore no unusual processing is required. The switch is
designed so that the off capacitance is small compared to the line capacitance. When
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a bias above threshold is applied between the center conductor and ground, the
switch is closed, throwing a shunt capacitor across the line. The on capacitance is
designed to be an effective short circuit at RF frequencies.
RF MEMS switches offer a substantially higher performance than p-i-n diode
or FET switches. Electrostatic actuation requires 20-80 V but does not consume any
current, leading to a very low power dissipation (10-100 nJ per switching cycle). RF
MEMS switches are fabricated with air gaps, and therefore, have very low off-state
capacitances (2-4fF) resulting in excellent isolation at 0.1-40GHz. In addition,
MEMS switch does not suffer nonlinear I-V relationship, which is common in
semiconductor switches, leading to very low intermodulation product. Finally, RF
MEMS switches can be manufactured with MMIC processes on any substrate
material including silicon, gallium arsenide, glass, and alumina.
The significant performance improvements possible with these RF MEMS
devices compared to typical FET and p-i-n diode switches has important implications
in system designs for both military and commercial telecommunications at
microwave and millimeter wave frequencies. The main application areas of MEMS
switches are:
•
Radar Systems fo r Defense Applications (5-94 GHz): Phase shifters for
satellite-based radars, missile systems, long-range radars.
•
Automotive Radars: 24,60, and 77 GHz.
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•
Satellite Communication Systems (12-35 GHz): Switching networks for
antenna applications. Switched filter banks. Also, phase shifters for
multibeam satellite communication systems.
•
Instrumentation Systems (0.01-50 GHz): These require high-performance
switches, programmable attenuators, SPNT networks, and phase shifters.
References
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
Nguyen, C.T.C. Micromachining technologies fo r miniaturized
communication devices, in Proc. SPIE - Int. Soc. Opt. Eng. (USA). 1998.
Poddar, A.K. and K.N. Pandey. Microwave switch using MEMS-technology.
in 8th IEEE International Symposium on High Performance Electron Devices
fo r Microwave and Optoelectronic Applications. November, 2000.
Bryzek, J., Impact o f MEMS technology on society. Sensors and Actuators A
(Physical). 1996. A56(l-2): p. 1-9.
Ehmke, J., et al. RF MEMS devices: a brave new world fo r RF technology, in
2000 IEEE Emerging Technologies Symposium on Broadband, Wireless
Internet Access. 2000.
Brown. E.R.. RF-MEMS switches fo r reconfigurable integrated circuits.
IEEE Transactions on Microwave Theory and Techniques, 1998. 46( 11, pt.2):
p. 1868-80.
Loo, R. Y., et al. Reconfigurable antenna elements using RF MEMS switches.
in Proceedings o f the 2000 International Symposium on Antennas and
Propagation. 2000.
Pozar, D.M., Microwave Engineering. 1990.
Hines, M.E., Fundamental Limitations in RF' Switching and Phase Shifting
using Semiconductor Diodes. Proceedings IEEE, June 1964. vol. 52(pp. 697708).
Ayasli, Y., Microwave switching with GaAs FETs: Device and Circuit
Design Theory and Applications. Microwave Journal, 1982. 25( II): p. 61-74.
Yao, J.J., RF MEMS from a device perspective, in 2000 Journal o f
micromechanics and microengineering. December 2000. vol. 10(pp. R9-38).
Goldsmith, C., et al. Lifetime characterization o f capacitive RF MEMS
switches, in 2001 IEEE MTT-S International Microwave Sympsoium Digest.
2001 .
15
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Chapter 3
Investigation on Surface RF MEMS Switches:
Designs, Fabrications and Measurements
This chapter starts by first introducing the fundamental electromechanical
characteristics of surface RF MEMS switches. Detailed processing techniques and
some fabrication concerns are presented. This is followed by details regarding the
design of surface RF MEMS switches for improved yield and reliability. The initial
design is optimized for 10 GHz switch-controlled reconfigurable antenna application.
Measurements of the microwave properties of these switches are presented and
compared with the three-dimensional high frequency field analysis. The measured
data is also fitted into a simple lump element circuit model, which can be used easily
to describe the microwave properties of the switch. Some issues concerning the
reliability of surface RF MEMS switches are discussed. Finally two new RF MEMS
structures are introduced to further improve the switch performance: RF MEMS
switches with metal cap increase the down-state capacitance, and thus increase the
off-state isolation; RF MEMS switches with isolated DC bias line enable a direct
metal-to-metal contact in the switch-down position, and thus also improve the
isolation performance of the switch.
16
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3.1 Fundamental surface MEMS switch physics
Though the RF MEMS switches developed today still follow the basic
mechanical laws developed hundreds of years ago. the scale and the forces acting on
the switches are significantly different from what we experience in the macro-world.
Surface forces and viscous air damping dominate over inertial and gravitational
forces. The RF MEMS switches are commonly fabricated using a suspended
membrane traversing across the signal transmission path and are modeled as
mechanical springs with an equivalent spring constant, k [N/m], The spring constant
depends on the geometrical dimensions of the membrane and the Young’s modulus
of the material used (Au, Al. nitride, etc.) [1], which is 5-40 N/m for most RF MEMS
switch designs. The RF MEMS switches inherently have very low mass, usually
around 1 0 lo- l 0 11 kg and. therefore, gravitational forces are insignificant and the
switches are not sensitive to acceleration forces.
Signal ON
double
cantilever
Signal OFF
State
rf iN
rfout
A ir gap
Young’s modulus t
_ _ _ _ _ _ _ _
_______
1-10-10 N7m)
actuation electrode
(Center CPW conductor)
Figure 3.1: Schematic of a typical RF MEMS shunt capacitive switch
The actuation mechanism is achieved using an electrostatic force between the
top and bottom electrodes, and is given by
17
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
f _ Q E _ CVE
*>
■>
CV2
eA V 2
2(g + — )
2( g + ^ ) 2
(3.1)
where V, g, and C are the voltage, gap distance, and capacitance between the lower
and upper electrodes, respectively, and A is the area of the electrode. The bottom
electrode is often covered by a dielectric layer with a thickness (tj) of 100-200 nm
and a relative dielectric constant (£r) between 3 and 8 to prevent a short circuit
between the top and bottom plates. The air gap between the top and bottom plates are
usually 1.5-4 pm. Consider a switch with an electrode area of 100 x 100 pm2, an
applied voltage of 40 V. and a gap of 2.5 pm, then the initial actuation force is only
11 pN. Electrostatic actuation results in very low forces, but this is enough for
MEMS-switch actuation. The reason is, as the switch is pulled down to the bottom
electrode, the gap is reduced, and the pull-down force between the two electrodes
increases. On the other hand, there is a pull-up force due to the spring constant of the
switch. The equilibrium is achieved when both forces are the same and
eAV2
= k(g~g»)
(3.2)
where go is the initial height of the bridge. The solution of this cubic equation in g
results in a stable position up to approximately go/3 and then a complete collapse of
the switch to the down-state position. The voltage that causes this collapse is called
the pull-down voltage and is
18
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Kp s JV-27
z re*Ar
<3-3 )
For k = 10 N/m, A = 100 x 100 pm 2, go =2.5 pm, the pull-down voltage is Vp
=23 V. The applied voltage is typically 1.2-1.4 Vp so as to achieve fast operation of
the switch. Once the switch is pulled down and g is reduced to 0 pun, the electrostatic
voltage can be reduced to 8-15 V while still keeping the switch in the down-state
position. This is done so as to reduce the electric field in the dielectric and the
possibility of dielectric breakdown or charge injection into the dielectric. When the
bias voltage is removed, the displacement of the bridge by go results in a pull-up
force of 30-60 pN for most surface RF MEMS switches. The pull-up force is quite
small and susceptible to environmental changes. It is for this reason that surface RF
MEMS switches are very sensitive to surface physics, humidity, and contaminants
and must be packaged in clean-room conditions.
RF MEMS switches also follow standard Newtonian’s mechanics and, more
specifically, d’Alembert’s equation of motion [2]. The dynamic response is
m g"+ bg'+ k(g0 - g ) = Fe
(3.4)
where m and b are the mass and damping coefficient of the bridge, and F, is the
electrical force given by (3.1). This is a second-order system with a resonant
frequency
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
It is seen that a RF MEMS switch with a spring constant of 5-30 N/m results
in a resonant frequency o f 30- LOO KHz. The damping coefficient can also be written
in terms of the quality factor (Q) defined as Q = k/coob. The damping is a result of
removing the air underneath the bridge when the switch is snapped down. The first
pole at Qwo limits the time-domain response of the switch. Putting the RF MEMS
switch into vacuum working environment can reduce the damping factor. A simple
equation that accurately predicts the switching time is given by [3]
t = 3 .6 7 -^ —
where Vs is the applied voltage. For a switch with a t = 50 kHz and
(3.6)
= 1.3 Vp, the
switching time is 9 ps. Most MEMS switches have a switching/release time of 2-50
ps.
As indicated by (3.6), it is very hard to get a switching time of 0.3 ps. Since a
high resonant frequency can only be achieved using a high spring constant (and a
very low mass), the associated pull-down voltage is high; therefore, V, must be
indeed very high. It is believed that the practical limit of switching time will be
around 1 ps for high-reliability operation [4],
3.2 Fabrication of the surface RF MEMS switch
The RF MEMS switches described above were implemented on 500 pm thick
glass substrate (er = 5.7) mostly for cost concerns, although the process is also
20
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
compatible with other substrate materials such as high resistivity silicon and gallium
arsenide[5-8]. In the following sections we will talk about substrate material
selection. Figure (3.) depicts the detailed process flow of the RF MEMS switch. The
CPW lines are defined using a liftoff process by evaporating a 100/5000 A layer of
Ti/Au. A 5000 A plasma-enhanced chemical vapor deposition (PECVD) SiN layer is
grown and patterned on top. Next, a sacrificial photoresist layer, which determines
the height of the MEMS air bridge, is deposited and patterned. The height of the
bridge above the central conductor is chosen to be 1.5-4 ^m. A 20 minutes reflow on
220°C hotplate is performed to smooth out the edge of the sacrificial layer. Next, a
100/10000 A Ti/Au layer is then evaporated with the evaporating speed of gold less
than 6 A per second and patterned to define the geometry of the MEMS bridges. In
order to strengthen the post support of the switch, the sample is usually put onto a
tilted plate with slow rotation speed during the evaporation. The sacrificial
photoresist is then removed and a critical point drying system is used to release the
MEMS bridges. The yield of the process and the reliability of the switches vary
greatly and depend upon critical parameters such as thickness of the metal
membrane, height of the bridge and residual stress of the metal.
SiN toyer
21
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Socnficoi
photoresist
tPM G I)
PMGI a c rilk a l layer
Ti/Au
S jc n tlc u l
photoresist
• PM GI i
Ti/A u
Sacrificial layer nrmaval
Figure 3.2: Detailed process o f the RF MEMS switch
The initial choice of silicon as substrate for the fabrication of MEMS
switches presented some disadvantages: measurements showed high DC parasitic
capacitances, low breakdown voltage and high leakage currents. The deposition of
gold for defining the metal pads, in facts, produces a region of charge deployment in
the area of silicon in contact with the metal. This creates a DC parasitic capacitance
that is comparable with the capacitance of the MEMS switch itself, making DC
measurements difficult. In addition, during the DC measurement sessions we
observed that biasing a MEMS switch on silicon with a voltage higher than ~60 volts
22
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often induced the breakdown of the substrate and consequently the destruction of the
device. Also, even before the actual breakdown, it is possible to measure a relatively
high leakage current through the substrate.
In the attempt of coping with these problems, samples with a layer of SiN and
o f SiC>2 deposited on top of silicon have been tested. Although the breakdown
voltage was definitely improved, the parasitic capacitances were not completely
eliminated. Sapphire, high resistivity silicon and glass used as substrate, instead,
showed very good characteristics: very high breakdown voltage, no parasitic
capacitances and no leakage currents. Compared with sapphire and high resistivity
silicon, glass substrate is available in large quantity with very low cost, and thus is
ideal to be used in surface RF MEMS switch fabrication.
There are typically two methods to remove the sacrificial layer of photoresist
(PMGI) needed to create the suspended structure: dry etching and wet etching
techniques. In order to use dry etching technique to remove the sacrificial layer,
MEMS switches are fabricated with a set of closely spaced holes in the bridge
membrane [9, 10]. The problem with this method is it is difficult to monitor the
completion of the etching. Residues of the sacrificial photoresist will affect the
critical pull-down voltage and the down-state capacitance. So instead of the dry
etching technique, the RF MEMS fabrication in UCSB uses liquid solvent to remove
the sacrificial layer of the photoresist. But letting water or solvent dry by air causes
the formation of a meniscus’ that pulls down the membrane on the surface of the
23
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wafer (see figure (3.3)). The contact force prevents the membrane from recovering
the suspended configuration anymore. To cope with this problem, a new 'critical
point’ drying system has been set up at the UCSB nanofabrication research lab [11].
Ti/A u
Sacrificial
photoresist
i PM G I)
a) Sample before the removal of the sacrificial photoresist
Water or solvent
b) Formation of a 'meniscus' underneath the membrane
Suction
c) The membrane is permanently stuck on the wafer
Figure 3.3: Stiction phenomenon when air-drying the RF MEMS switch
The system is based on the physical properties of CO 2 to rinse the samples
without causing stiction. In a pressurized chamber liquid CO 2 is brought above
certain temperature and certain pressure, until its 'critical point' is reached; in such
24
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thermodynamic conditions the density of liquid CO 2 is the same as the density of
gaseous CO 2 and the two states are actually merged. Releasing CO 2 in these
conditions, therefore, doesn't induce stiction of the suspended mechanical structures.
An intermediate medium (before CO 2) such as Acetone or Methanol is used to
remove the solvent before putting the sample into the chamber of the critical point
drying system. Figure (3.4) are two SEM pictures of MEMS samples without and
with a critical point drying procedure applied. From the pictures we can see that
stiction occurred for the air-dried sample. The sample with the critical point drying
procedure applied shows a released suspended structure. It should also be noted that
the moisture in the environment could also cause stiction occurs, especially if the
sample is exposed to high-humidity environment for a long time. Thus it is
preferable to put the MEMS samples into nitrogen chamber for storage.
300
0024
2 2 KV
lt'0ur»
Figure 3.4: SEM pictures o f MEMS samples without and with a critical
point drying procedure applied. (left): Stiction occurred in an air-dried
sample, (right): 90° angle view of the released structure after critical point
drier
25
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3.3 Surface RF MEMS switch design considerations
Several designs have been considered and implemented. The goal is to
investigate which design allows best performance in terms of reliability, pull down
voltage, range of capacitances achievable, capacitive ratio
(C o n /C o ff)-
Examples of
various designs implemented are depicted in Figure (3.5). Some MEMS switches are
fabricated with a set of closely spaced holes in the bridge membrane. This is done to
allow the removal of the sacrificial layer using dry etching techniques, and to allow a
faster operation of the switch by reducing the air damping underneath the bridge.
- ■HI U
111! 3 <-•
Figure 3.5: SEM pictures o f the various designs o f MEMS considered
26
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The DC characteristics of these RF MEMS switches have been measured
with a C-V meter. Measured results differ for different MEMS geometries. The
down-state capacitance is measured to be around 2-7 pF, while the up-state
capacitance is about 20-100 fF. The pull-down voltage ranges from 15 to 50 volts.
Generally speaking, those MEMS structures with narrow support arms and large
membrane contact areas have much lower pull-down voltage requirement than
structures with wide support arms and small membrane contact areas. But this also
entails another problem. Those MEMS structures with low pull-down voltages
require more exact process control and are generally more susceptible to failure
during the measurement. While utilizing RF MEMS switches in circuit applications,
an exact control of up/down state capacitances is required, and therefore a simple
MEMS structure is preferable to complex ones, where the fringing field capacitance
of MEMS switches is hard to be modeled and calculated. It is for the above concerns
that many of the subsequent designs resort to simple rectangular bridge membrane
structure to simply device modeling without sacrificing the switch performance.
In DC C-V measurement, though it usually requires a high pull-down voltage
to actuate the MEMS switch, a much less bias voltage is sufficient to maintain the
top membrane in the snap-down state subsequently, as shown in Figure (3.6). This is
because in the down state the spacing between the top and bottom electrodes are
reduced and a relatively small DC bias will generate a high electric field, and thus
strong electrostatic force to balance the intrinsic spring force of the top metal.
27
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2-
IS
d>
O
o
(0
Q.
(0
O
- Increasing DC Dias
■Decreasing DC Dias
os
10
30
20
40
60
V oltage (V)
Figure 3.6: C-V measurement o f RF MEMS switch with forward and
backward DC biasing swing.
Another very important parameter is the voltage necessary to actuate the
switches. Many research works are conducted to design low actuation voltage RF
MEMS switch [12-14]. The actuation voltage of the MEMS switch and its reliability
greatly depend upon the quality and the level residual stress of the upper metal
membrane. The lower is the stress, the lower is the pull down voltage. In the attempt
of investigating the best techniques that give a low stress metal bridge, different
metals (Gold, Nickel, Aluminum, Titanium, etc) and several metal deposition
conditions have been tested. Results showed that, a very slow Gold or Aluminum Ebeam deposition proved to give the best results, in terms of reliability and lowered
pull-down voltage (see Figure (3.7a». In our design, typical pull-down voltages for
these switches are 20-30 V, depending on the E-beam deposition rate, membrane
thickness, resist profile, and vertical stress gradients. Currently, Raytheon has
28
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
developed the standard process o f surface MEMS switch with deviation of only 1.5
V in the pull-down voltage [15]. Nickel has shown an extremely high residual stress
(see Figure (3.7b)), which intends to pull the switch down when the top membrane is
released. Titanium based metal bridges, though worked during the measurement, did
not appear to be a certain alternative to Aluminum or Gold. Titanium e-beam
deposition is unstable and tends to generate a considerable residual stress in the
metal; also Titanium oxidizes very rapidly. This might affect the electrical and
mechanical properties of the switches.
Figure 3.7: (a) (left) Picture of a MEMS switch after the deposition o f
Aluminum, (b) (right) Picture of a MEMS switch after the deposition of
Nickel. The stress of the bridge is evident (the edges of the membrane are
severely curled).
Another important issue in the development of a reliable technique is the
planarization of the upper membrane. For most microwave applications, in order to
reduce signal transmission loss the coplanar waveguide is usually designed to be
around 1 |im thick. Since the height and profile of the metal bridge is determined by
the height and the profile of the sacrificial photoresist (PMGI) spun on the sample, as
29
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shown in figure (3.8), the thick transmission line will result in an irregular surface
profile of the metal bridge. It has been observed that, if the membrane is not
sufficiently smooth, it does not create a good contact when snapped down on the
central conductor, resulting in a value of DOWN capacitance different from what is
expected. In addition, the non-planar profile of the membrane also reduces the tensile
force, and thus the spring constant k in the metal bridge, resulting in slower
switching speed and poorer reliability of the switches. Thus, it is crucial to determine
an effective process to reduce the swing in the profile of the PMGI photoresist. Many
efforts are made to hard reflow the photoresist at very high temperature (~280°C) in
order to flatten the surface of the sacrificial photoresist. Figure (3.9) shows the SEM
pictures of two fabricated samples with and without high temperature reflow process.
In the left picture (the sample without hard reflow process), we can see that the nonplanar profile of the metal bridge is apparent. This irregularity in the profile can be
eliminated with a high temperature reflow on 280°C hotplate for 3 minutes, as shown
in the right picture.
Vfedbnc|e
(a)
(b)
Figure 3.8: Dramatization o f the non-planar profile of the photoresist before
(a) and after (b) the metal deposition.
30
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Figure 3.9: (left) SEM picture o f a sample not processed with a high
temperature reflow: the non-planar profile o f the membrane is evident. The
contact with the bottom conductor is inadequate, (right) SEM picture o f a
sample 'cured' with hard reflow. Many o f the irregularities in the profile
disappeared. The contact with the bottom conductor is improved.
Some new challenges have been encountered in the fabrication of surface RF
MEMS switches for lower than 10 GHz applications. For this purpose, the upper
membrane was designed to be larger (300|j.m x 200p.m) than usual (300(im x 30(im80(j.m). But the augmented area of the upper membrane offers increased chances for
the formation non-uniformities of the metal bridge, as well as greater chances of
failing the critical release without stiction. The yield of the process was quite low.
Only a few MEMS devices were successfully processed without stiction (see Figure
(3.10a». In addition, the devices successfully released did not survive the DC
measurement. By applying a DC bias we were able to actuate the switch from the UP
to the DOWN state. But the removal of the DC bias would not release the membrane
back in the UP position (see Figure (3.10b)).
31
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It is believed that the oversized design is the causes of the problem. The
structures have probably been designed too large; therefore the charging effects in
the silicon nitride dielectric layer are so large that stiction occurs between the
dielectric layer and the metal bridge. The elasticity of the metal bridge is not
sufficient to bring the upper electrode back to the UP state once it has been snapped
into the DOWN state. So for reliable switching operation, the RF MEMS switch
should have the length and width of the top metal bridge within certain ranges. The
rule of thumb is that the length of the metal bridge should not exceed 350 (am, and
the width of the bridge should be within 100-120 pm. For 10-30 GHz applications,
the length and width of the bridge are usually chosen to be 250 ^im and 80 p.m,
respectively.
Figure 3.10: SEM pictures o f the devices: In (a) (left) the structure is
released, in (b) (right) permanent stiction occurred.
3.4 Microwave characteristics
Test switches were built into coplanar waveguide transmission lines for
characterization and modeling. The centerline of the coplanar waveguide provides
32
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both the electrostatic actuation and the RF capacitance between the transmission line
and the switch membrane. When the switch is in the up-state position, it provides a
low capacitance to the ground, around 25-75 fF and does not affect the signal on the
transmission line. When the switch is actuated in the down-state position, the
capacitance to ground becomes 1.2-3.6 pF. and this results in an excellent short
circuit and high isolation at microwave frequencies. Figure (3.11) shows a SEM
picture of a MEMS Titanium-based switch. In this sample the metal thickness of the
upper membrane o f the MEMS switches had been greatly augmented (4 pm rather
than the usual 1-2 pm) in the attempt of improving its stiffness. As a result of this the
measured 'pull-down' voltage was higher than usual: -95 Volts. This sample though
allowed us to perform RF-measurements on the MEMS switches, and to extract
useful information on the electrical parameters at RF.
Figure 3.11: SEM pictures of the RF MEMS device for 10 GHz switching
operation
33
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UP state
-0.5
S21 m easured
S21 HFSS
-10
to
00
■o
ss
CM
-20
-2.5
-25
S 11 m easured
S 1 1 HFSS
(O
-30
-3.5 -
0
>
Q
a
a
-35
•40
5
15
Frequency (GHz)
10
20
DOWN state
S 11 m easured
S 1 1 HFSS
■o
82
to
-10
-15
•10
T-
<M
-20
^
O
a
OB
S21 m easured
S21 HFSS
- -15
-25
-30
-20
5
10
15
20
Frequency (GHz)
Figure 3.12: S-parameter data from both measurements and HFSS
simulations: In (top) the UP state, in (down) the DOWN state.
34
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure (3.12) reports the measured S-parameters in the 0-20 GHz frequency
range, for the UP state and DOWN state of the switch. In this configuration, the S21
measurement in the UP state can be interpreted as the 'INSERTION LOSS' of the
switch and the S 21 measurement in the DOWN state can be interpreted as the
'ISOLATION' of the switch. For 10 GHz switching operation, when the switch is in
the UP state, the insertion loss of the switch is -0.3 dB with the return loss better
than -1 5 dB; when the switch is switched to the DOW^N state, the isolation is -13
dB. The switches are also characterized using a full wave analysis based on finite
element method aiming to extract the S-parameters of the switches. The full wave
electromagnetic simulation of the switch is done using Ansoft High Frequency
Structure Simulator (HFSS). In the simulation a box size 1200 x 1200 x 1000 pm is
used and boundary radiation conditions are imposed on the six sides of the box. After
the full wave analysis is performed, S-parameters are extracted in the frequency
range going from 1 GHz to 20 GHz. The substrate is assumed to be lossless with
relative dielectric constant of 5.7 (correspondent to Glass). The thickness of the
substrate is 500 pm and the CPW conductors and the RF MEMS switch are treated
as perfect conductors. The central conductor of the CPW is assumed to be coated
with silicon nitride layer having relative dielectric constant of 7 and thickness of 0.2
pm. The simulated results are then used to compare with the measured data, as
shown in Figure (3.12). This has been used to obtain high performance MEMS
capacitive switches from X to W band operations [16-18].
35
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3.5 Modeling of the surface RF MEMS switch
While three-dimensional HFSS simulation can accurately describe the
performance of the surface RF MEMS switch, it also consumes long computing time.
It would be desirable to study the MEMS switch based on its equivalent circuit
model. The MEMS switch is modeled by two short sections of transmission line and
a lumped CLR model of the bridge with capacitance having the up-state/down-state
values [ 19, 20]. The parameters of the lumped element model are optimized to fit the
S-parameter obtained from the measured data. Figure (3.13) shows the measured and
fitted S-parameters of the switch in the UP state and the equivalent lumped element
circuit model. The capacitance in the circuit model for this state is 0.075 pF. The
series resistance and inductance of the shunted MEMS bridge are modeled 0.5 Q and
2 pH, respectively. The capacitance value used in the circuit model is a little higher
than what is expected from parallel-plate capacitor model. This is mainly because the
fringing capacitance at the switch edges in the UP state is comparable to the parallelplate capacitance and thus cannot be omitted from the lumped element circuit model.
Since the capacitance is small, the impedance of the CPW line does not change much
with the variation of the parameters, it is difficult to determine the resistance and
inductance associated with the model in the UP state. The discrepancy in the UP state
is due to the inability of the circuit simulator used (HP-ADS) to take into account the
additional losses in the conductor caused by the finite skin depth of the wave.
36
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
UP state
0
-5
-0 5
S 2 i sim ulated
1
S21
measured
-
-1 0
(/>
15
8
</>
2
-20
S i 1 sim ulated
2 5
-25
o
a
OB
■ • - • S i 1 m easured
3
-30
35
-35
0
10
5
-40
15
20
Frequency (GHz)
Oj
CPW pad
Switch UP
|
|
CPW pad
)Q
R = 0.5 £2
L = 2 pH
C = 0.075 pF
Figure 3.13: Simulated and measured INSERTION LOSS of the switch in the
UP state and equivalent theoretical model circuit.
When the switch is in the DOWN state, similar procedure is used and Sparameters obtained from the measurements are compared with those obtained using
the lump element model, as shown in Figure (3.14). The capacitance in the circuit
model for DOWN state is 2.7 pF. The series resistance and inductance of the shunted
37
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
MEMS bridge are still modeled 0.5 Q and 2 pH, respectively. In both switching
states excellent agreement is obtained between the measured data and the lumped
element circuit model. Thus from the S-parameter measurement, a scalable lumped
element circuit model can be extracted to allow easy implementation of the switch
model into available microwave CAD software.
DOWN state
S21 sim ulated
OD
■o
8
s
C4
(ft
-2 0
•25
-20
S 11 m e a s u r e d
0
-25
5
15
10
20
Frequency (GHz)
CPW pad
CPW pad
To
Switch DOWN
L = 2 pH
C = 2.7 pF
Figure 3.14: Simulated and measured ISOLATION o f the switch in the
DOWN state and equivalent fitted model circuit.
38
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.6 Reliability of surface MEMS switches
The reliability of capacitive switches is dominated by stiction between the
dielectric layer and the metal due to the large contact area of the switch
(approximately 100 pm x 100 pm). The major stiction force is due to the charging
effects in the silicon nitride dielectric layer, and, depending on the polarity of the
injected charge, it can cause the switch to either stick in the down-state position or
results in an increase in the pull-down voltage so that the MEMS switch cannot be
used anymore. The electric field can be as high as 3-5 MV/cm in the dielectric layer,
which results in a FP-charge injection mechanism from the metal to the dielectric
[21J. Charge injection is exponential with voltage, and a reduction in the pull-down
voltage by 6 V can result in a lOx increase in the lifetime of the MEMS switch. This
does not automatically lead to the design of low-spring constant, low-voltage
switches (5-10 V) since these switches have a low restoring (pull-up) force. A pull­
down voltage of 25-30 V may be the best compromise. Also, it is well known that
silicon dioxide has a much lower trap density than silicon nitride and may result in
less charging when used in the surface RF MEMS capacitive switch. The penalty
paid is a decrease in the down-state capacitance (or capacitance ratio) due to the
lower dielectric constant of the oxide material. Once the charge injection is solved,
the reliability is limited by stiction due to water vapor (humidity) and organic
contaminants underneath and around the MEMS switch.
39
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3.7 RF MEMS switch with metal cap
One important issue in the design and fabrication of MEMS capacitive
switches is the value of the DOWN capacitance actually achieved by the switch. The
larger the DOWN capacitance, the more isolation can be achieved in the DOWN
state. The designed value of the capacitance of the switch in the DOWN state is
computed by means of the simple laws of electrostatics: a parallel plate capacitor
with a dielectric constant £r gives a total capacitance of CtM = e Qe r — , where A is
h
the area of the parallel plates and h is their distance (Figure (3.15)).
Switch down
Figure 3.15: Parallel plate capacitor configuration.
It is easy to understand that a crucial factor affecting the measured value of
the DOWN capacitance is the quality of the contact o f the upper membrane with the
top surface of the dielectric coating the bottom electrode. Such contact depends
greatly upon the smoothness of both the surface of the metal bridge and the surface
of the dielectric layer. There is basically no practical way to ensure that such contact
is perfect, (i.e. equivalent to a parallel plate capacitor configuration). This results in a
40
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
certain difficulty in controlling and reproducing the expected final DOWN
capacitance o f the switch.
metal ca p
bump
NT
contact
SiN
p ^ & a s i iK sssssn T
is s S S s
______________ _______ _ _ »
h h
S
b b i
Kb
b b m k
II
s u b s tr a te
s u b s tr a te v
Switch dawn
Switch up
Figure 3.16: Novel design of the switches with metal cap.
Our novel design is intended to cope with this issue. As illustrated in Figure
(3.16). unlike the traditional surface MEMS switch structure, a metal cap and a metal
bump have been added right above the dielectric layer by means of two separate
metal evaporations. In this fashion, it is possible to create a perfect, reproducible
contact with the upper surface of the coating dielectric. When the actuation voltage
induces the suspended metal bridge to snap down, an electrical path is created
between the upper bridge and the metal cap by means of the bump. The function of
the bump is to prevent possible stiction due to a full metal-to-metal contact between
the upper membrane and the metal cap.
41
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
This novel design of RF MEMS switch with metal cap is fabricated on glass
substrate with relative dielectric constant of 5.7. A L.5 pm-thick aluminum layer is
deposited as the suspended membrane. The air gap between the metal cap and the
suspended A1 membrane is ~3 pm. The measured pull-down voltage ranges from 40
to 60 volts, depending on the various size and geometry of different switches. Figure
(3.17) is the microscopic photo of two MEMS switches with metal cap. The left
switch is the standard design for 10-20 GHz applications, while the right switch is a
variation of the standard structure for distributed phase shifter applications, which
will be discussed in the next chapter.
I
,
III
l|
I
Figure 3.17: Microscopic photo of the switches with metal cap.
The top plot of Figure (3.18) reports the measured S21 in the 0-30 GHz
frequency range. For the UP state, the insertion loss is mainly caused by input
mismatch and transmission line conductive loss. At 20 GHz, the insertion loss is
42
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
about 1 dB. By increasing the DC bias between the central conductor of CPW and
the suspended membrane, electrostatic force forces the suspended membrane to
deflect down until it makes a single-point contact with the metal bump. By further
increasing the DC bias, the suspended membrane will be forced to bend down more,
and thus not just the contact point with the metal bump, more area of the suspended
membrane will be bent down to make full contact to the metal cap. The schematic of
these phenomena are depicted in the bottom plots in Figure (3.18). It is noted that
when the switch is snapped down to have only single contact point to the bottom
metal layer, all current flows from central conductor of CPW to ground pads have to
pass the metal bump and thus form a very large series resistance in the equivalent
lumped element circuit model. When more contact area to the bottom metal cap is
achieved by increasing the pull-down voltage, the current flow path is shortened and
thus the series resistance is also greatly reduced. The series resistance of the air
bridge plays an important role in the performance of the MEMS switch, which can be
best expressed in the S-parameter plot in Figure (3.18). In the DOWN state S^t
measurements, pull-down voltage is varied so that switches in both single-point
contact and multipie-point contact conditions are measured. From the measurements
we can see that there is a huge difference of S 21 between switches in single-point
contact and multiple-point contact conditions. With single contact point, the MEMS
switch has a very large series resistance ( - 23 £2), which prevents input current to
flow to the ground pads, and in return, decreases lie signal isolation. With multiple
43
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
contact points, the series resistance is reduced to a very low value (~ 2 Q), thus the
parallei-plate capacitance plays a more important role in determining the shunt
impedance and much more signal isolation can be achieved with the increase in
frequency. As shown in the same plot, both measured at 20 GHz, the switch in full
metal contact condition has 22.4 dB isolation, about 15 dB more than the switch in
only single contact condition.
UP state
-to
DOWN state: single contact
CD
0
<
3
SI
•15
-20
-25
DOWN state: multiple contacts
-30
0
5
10
15
20
25
30
Frequency (GHz]
High resistive path (R = 23 a)
Lower resistive path ( R» 2 Q )
substrate
Switch down
Switch down
Figure 3.18: S-parameter data from UP and DOWN states. The DOWN state
S-parameter measurement is taken for different snap-down contact
conditions: (left) single contact point; (right) multiple contact points.
44
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.8 RF MEMS switch with isolated DC bias line
In the standard surface MEMS switch configuration on coplanar waveguide,
DC bias is applied directly between the central conductor of CPW and the ground
pads. In order to avoid a direct metal-to-metal contact when the suspended
membrane is snapped down, a 1000-2000 A silicon nitride layer is coated on top of
the central conductor of CPW. Thus the isolation performance of the switch is
dependent of the DOWN state parallel-plate capacitance value. The lower the
frequency, the smaller the transmitted signal is coupled to the ground pads through
this DOWN state parallel-plate capacitor, and the lower the isolation of the RF
signals. This apparently limits the use of RF MEMS for low frequency switching
applications.
/
Lowlot*sobstate
^ Bias pad
MEMS air
bridge
^ SiN dielectric layer
Figure 3.19: Novel design of the switch with separated DC bias control from
signal flow path.
45
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
In order to improve the performance of RF MEMS switch for low frequency
applications, direct metal-to-metal contact in switch DOWN state is preferred. Thus
the DC switching control cannot be applied on the central conductor of CPW. Figure
(3.19) is a schematic plot of the novel design of the MEMS switch with separated
DC bias control from signal flow path. As shown in the plot, two metal pads sit
underneath the suspended MEMS airbridge. DC bias controls are applied on these
two pads through the NiCr high resistivity feed line, while RF signal flows through
the CPW line separately. When DC voltage is high enough to switch the suspended
membrane down, RF signal will be shorted to ground through direct metal-to-metal
contact. In order to maintain the pull down voltage comparable to that of the standard
MEMS switch, the DC metal pads are designed to have the same DOWN state
contact area so that large enough electrostatic force can be generated between top
and bottom plates in switching operation. Thus the spacing between the center and
ground pads of the CPW is enlarged to leave space for the DC control pads. Figure
(3.20) is a SEM microphotograph of the fabricated newly designed MEMS switch.
The spacing between the center and ground pads of the CPW is augmented from
standard 30-40 pm to 120 pm. This entails the problem of an increased series
inductance in the airbridge that will limit the isolation performance in switch DOWN
state. Fabrication of this type of switch is similar to that of the standard MEMS shunt
switch. A 1000-2000 A silicon nitride layer is also required to be coated on top of
the DC control pads for DOWN state DC isolation.
46
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure 3.20: SEM picture of the fabricated MEMS switch with separated DC
control feed through.
Figure (3.21) shows the S-parameter measurements for the fabricated MEMS
switch. In the UP state, the switch has very good input match and low insertion loss
from DC to 40 GHz. In the DOWN state, the RF signal isolation can be better than 30 dB from DC to 8 GHz, but deteriorates with the increase of frequency. As
mentioned before, the spacing between the center and ground pads of the CPW is
enlarged from 30-40 pm to l2 0 pm, which is equivalent to an increase of the series
inductance of the suspended airbridge from 3 pH to 10-12 pH. With the frequency
increase, the series inductance becomes to be the dominant factor in determining the
shunt impedance in the DOWN state: large shunt impedance limits the RF signal to
flow to the ground pads, and thus limits the isolation performance. So for this novel
design of MEMS switch with separated DC bias control, the DOWN state isolation
performance greatly depends on the series inductance in the suspended airbridge. It is
47
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expected to further improve the isolation performance by lowering the series
inductance in the airbridge.
o -
—
0
-S21 MAG [dB]
- -5
-0 1
-
- -10
2 ,
-0 3 -
- -15
o
<
-0 4
• -20
a>
-05
• -25
a
a
■06 -
- -30
0 7 -
- -35
-0 2
m
CM
<0
OS
5
10
15
c/>
S
- “ -40
20
Frequency [GHz]
S U MAG [dB| |
-10
-10
m
-20
•20
o
<
-30
-30
(0
ID
s
CM
co
-40
-40
>
©
*2
00
■S21 MAG [dB]
-50
-50
-60
-60
5
10
15
20
Frequency [GHz]
Figure 3.21: S-parameter data from UP and DOWN states for the novel
design of the switch with separated DC bias control.
48
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
In summary, we have extensively investigated processing techniques and
fabrication concerns of surface RF MEMS switch in order to improve its fabrication
yield and operating reliability for future RF and microwave applications. The
prototype design is optimized for 10 GHz switch-controlled reconfigurable antenna
application. Measurements of the microwave properties of these switches are
compared with both the three-dimensional high frequency field analysis, and a fitted
simple lump element circuit model. Some techniques in order to further improve the
isolation performance are presented at the end of this chapter also. The possible
applications of this MEMS technology in microwave control circuits will be
discussed in the next chapter.
References
1.
2.
3.
4.
5.
6.
7.
Young, RJ.R.a.W.C., Formulas fo r Stress and Strain. 6th edition. New York:
McGraw-Hill, 1989.
J.W. Weaver, S.P.T., and D.H. Young, Vibration Problems in Engineering.
5th edition. New York: Wiley, 1990.
Muldavin, J.B. and G.M. Rebeiz. Nonlinear electro-mechanical modeling o f
MEMS switches, in 2001 IEEE MTT-S International Microwave Sympsoium
Digest. 2001.
Rebeiz, G.M. and J.B. Muldavin, RF MEMS switches and switch circuits.
IEEE Microwave Magazine, 2001. 2(4): p. 59-71.
Petersen, K.E., Micromechanical membrane switches on silicon. IBM Journal
of Research and Development, 1979. 23(4): p. 376-85.
Yao, Z.J.. et al. Micromachined r f signal switching devices on high resistivity
silicon substrates, in The 1997 ASM E International Mechanical Engineering
Congress and Exposition Proceedings o f Symposium on Micro-mechanical
Systems. 1997.
Hyman, D., et al.. Surface-micromachined RF MEMS switches on GaAs
substrates. International Journal of RF and Microwave Computer-Aided
Engineering. 1999. 9(4): p. 348-61.
49
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
Katehi, L.P.B. Si-based RF MEMS and micromachined circuits fo r wireless
communications systems, in 2000 Topical Meetings on Silicon Monolithic
Integrated Circuits in RF Systems. 2000.
Goldsmith, C., et al. Micromechanical membrane switches fo r microwave
applications, in 1995 IEEE MTT-S International Microwave Symposium
Digest. 1995.
Goldsmith, C., et al. Characteristics o f micromachined switches at
microwave frequencies, in 1996 IEEE MTT-S International Microwave
Symposium Digest. 1996.
Liu, Y., RF MEMS Switches fo r Reconfigurable Antenna Systems. Final
report to DARPA Toyon contract, 2001.
Pacheco, S.P., L.P.B. Katehi, and C.T.C. Nguyen. Design o f low actuation
voltage RF MEMS switch, in 2000 IEEE MTT-S International Microwave
Symposium Digest. 2000.
Shyf-Chiang, S., D. Caruth, and M. Feng. Broadband low actuation voltage
RF MEM switches, in IEEE Gallium Arsenide Integrated Circuits
Symposium. 22nd Annual Technical Digest 2000. 2000.
Park, J.Y., et al. Fully integrated micromachined capacitive switches fo r RF
applications, in 2000 IEEE MTT-S International Microwave Symposium
Digest. 2000.
Raytheon, Workshop on advances in MEMS: Circuits, reliability and
packaging, presented at the IEEE M IT Symposium, Phoenix, AZ, 2001.
Pacheco, S.. C.T. Nguyen, and L.P.B. Katehi. Micromechanical electrostatic
K-band switches, in 1998 IEEE MTT-S International Microwave Symposium
Digest. 1998.
Muldavin, J.B. and G.M. Rebeiz. High-isolation inductively-tuned X-band
MEMS shunt switches, in 2000 IEEE MTT-S International Microwave
Symposium Digest. 2000.
Rizk, J., et al., High-isolation W-band MEMS w itches. IEEE Microwave and
Wireless Components Letters, 2001. 11(1): p. 10-12.
Muldavin, J.B. and G.M. Rebeiz, High-isolation CPW MEMS shunt switches.
1. Modeling. IEEE Transactions on Microwave Theory and Techniques,
2000. 48(6): p. 1045-52.
Muldavin, J.B. and G.M. Rebeiz, High-isolation CPW MEMS shunt switches.
2. Design. IEEE Transactions on Microwave Theory and Techniques, 2000.
48(6): p. 1053-6.
Goldsmith, C., et al. Lifetime characterization o f capacitive RF MEMS
switches, in 2001 IEEE MTT-S International Microwave Svmpsoium Digest.
2001.
50
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Chapter 4
Surface RF MEMS-Based Microwave Control
Circuits
In the previous chapter we have mentioned that the surface RF MEMS
technology has a tremendous potential to improve the performance of microwave
control circuits. Researchers worldwide made a lot of progress to achieve highperformance MEMS-based circuits [1-4]. In this chapter, several microwave circuits
using RF MEMS technology are designed, processed and measured. First, a novel
Single-pole double-throw (SPDT) switch structure is proposed, which requires only
one DC bias to control the signal flow from one path to the other. The concept of
distributed MEMS transmission lines (DMTLs) is introduced. This is similar to the
concept of distributed transmission lines periodically loaded with semiconductor
varactors but potentially has much lower insertion loss. This concept is then used to
demonstrate low-loss distributed MEMS delay lines and multi-bit phase shifters [5,
6]. In addition, surface RF MEMS technology has also been exploited to realize
micromechanical resonators in the form of capacitively coupled DMTLs. In this case,
we are utilizing RF MEMS switches as variable capacitors with much higher Q than
semiconductor-based varactors. And last, tunable bandpass filter based on DMTL
resonators are designed and fabricated for K-band applications [7].
51
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4.1 Single-pole double-throw (SPDT) MEMS switch
Conventional MEMS single-pole double-throw (SPDT) switches have two
complimentary single-pole single-throw (SPST) switches in two different paths (see
Figure (4.1)) [8]. By switching each SPST switch ON and OFF separately, signals
can be guided through one path and isolated from the other. Here two DC biases are
required which is not suitable for applications in beam steering phase array antenna
where large amount of biases are needed. We proposed a novel SPDT switch
structure using two shunted MEMS switches. The advantage of this structure is only
one DC control bias is needed to switch signal from one path to the other without
sacrificing the performance.
Control
Input A
OUTPUT I
INPUT
OUTPUT 2
Control
Input A
Figure 4.1: Schematic of the conventional SPDT switch with two
complimentary SPST switches.
Figure (4.2) depicts the single-controlled MEMS SPDT switch topology. Two
MEMS switches are loaded along the same coplanar transmission line. These
switches can then be actuated by one electrostatic potential to make or break the path
of a microwave signal between the two output ports.
52
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A ir B r id g e
RFout
MEMS bridge
OUT 2
Switefcl w, Switeh2
C^>
OUT 1
IN
AM
RFi
Figure 4.2: Topology of the single-controlled MEMS SPDT switch
Port 3
b o la tc d
Port 3
I Coowh
Port 1
B = > C = 3 —^ 1 =
**
Port I
Port 2
P o r t:
b o la tcd
la) Sw itch Down
lb) S w itch Up
Figure 4.3: Equivalent circuits of the SPDT switch for both UP and DOWN
switch states
DC control bias is applied to the central conductor of the coplanar waveguide
at input port. When bias applies, MEMS top electrode will be pulled down (DOWN
state). The thin dielectric layer between two electrodes provide large DOWN state
capacitance, which is short circuit for RF signal. The quarter wavelength
transmission line will then transform it to open circuit for input signal. In this case,
53
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input signals will be isolated from OUT1 and be guided to OUT2 (see Figure (4.3a)).
When bias is removed, MEMS top electrode will bounce back (UP state) by inherent
metal elasticity and has very small UP state capacitance. Thus OUT2 will be isolated
from input port and signals will then be guided directly to OUT1 (see Figure (4.3b)).
A simulation was performed on HP-ADS for both DOWN and UP states. Parasitic
C
down
and
C up
capacitances are considered. The results showed that as low as
0.25dB insertion loss, >28dB return loss and >30dB isolation at 20 GHz can be
achieved using this structure. The high linearity of MEMS switches makes possible
the handling of much higher power.
The circuit is fabricated on glass substrate. Ground pads are wire-bonded
together to ensure continuous signal flow. Figure (4.4) shows the measured Sparameter results of the MEMS SPDT switch in both UP and DOWN switching
states. For both switching states, the circuit demonstrates good input match and low
thru-path insertion loss near 20 GHz. Since quarter wavelength impedance transition
concept is applied, the circuit inherently can only be used for narrow band
applications. In the switch DOWN state, the circuit shows more than 35dB signal
isolation in the isolated port at 15 GHz. In the switch UP state, the signal isolation in
the isolated port is about 20dB. Signal transmitted along the coplanar waveguide is
coupled through switch one’s UP state capacitance to the isolated port. Apparently,
in order to further improve the isolation performance the UP state capacitance of
switch one needs to be reduced, which can be done by reducing the switch’s size or
54
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
increasing the air gap height of the airbridge. In this design, the air gap of the MEMS
switch is designed to be 2 pm in order to have relatively low pull down voltage (< 30
volts). Thus higher UP state signal isolation can be obtained by sacrificing lowvoltage MEMS switch control capability.
-OS
*10
S2t
•10
8 •«
!
2
i
25
I
-20
•25
-30
sit
S22
-3 5
-35
10
-30
15
20
25
-40
30
15
10
20
25
30
Frequency [Gttel
Frequency [GHi]
(a) Switch UP
10
8
«
-20
•25
-
•25
•X
-30
-35
•10
20
10
25
10
X
20
25
Frequency [Gift]
Frequency [GHz]
(b) Switch DOWN
Figure 4.4: S-parameter measurements o f the SPDT switch for both UP and
DOWN states
55
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X
4.2 Distributed MEMS transmission line (DMTL)
Besides high-performance SPST and SPDT switches, RF MEMS switches
can also be used to implement many other microwave control circuits. In this work,
we focus on using distributed MEMS transmission line (DMTL) to achieve low-loss
phase shifters and tunable filters. This section will introduce the fundamentals of
DMTL. Details of DMTL-based phase shifters and tunable filters will be addressed
in later sections.
The DMTL is comprised of a high-impedance transmission line (>50 Q)
periodically loaded with MEMS variable capacitors as shown in Figure (4.5). The
Bragg frequency (/Bragg) for this periodic structure is given by:
= XyjLriCr + C MEMS)
(4.1)
where L t and C r are the inductance and capacitance per unit length of the unloaded
line. For frequencies well below the Bragg frequency, the DMTL can be treated as a
synthetic transmission line whose capacitance per unit length has been increased due
to the periodic loading of MEMS capacitors [9. 10]. The characteristic impedance
(Z l) and phase velocity (vpluiSf) of the synthetic transmission line are given by
(4.2)
(Ct + C\fEMS )
(4.3)
V
r + ^M EM S )
56
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Transmission line sections
▼
it
MEMS
7
7
MEMS
Equivalent Circuit:
Lt
Ct
C m em s
T T
x x
if
If
T
T
II
Lsect: Length of transmission line per section
C : Transmission line capacitance per section
L : Transmission line inductance per section
Figure 4.5: Schematic and equivalent circuit of a DMTL
At any given frequency, the phase shift of a DMTL with n sections is given
bv
0 -lT tfn
(4.4)
phase
Equation (4.3) and (4.4) indicate that the variation of loading MEMS capacitance
will change the phase shift and thus the electrical length of the DMTL. Thus
depending on operating the R f MEMS as variable capacitor or switch, DMTL can be
used to implement both analog and digital phase shifters and delay lines. Limited by
the small tuning range of MEMS capacitors (< 1.5:1), the DMTL-based analog phase
shifter cannot get as efficient phase shift per section as the DMTL-based digital
57
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phase shifter [11]. In addition, though true-time delay, as in DMTL-based analog
phase shifters, is desirable for phased array antenna applications, quasi true-time
delay can be obtained with multi-bit implementation of DMTL-based digital phase
shifters. Thus, in this work MEMS digital delay lines and multi-bit phase shifters will
be investigated with the focus on phased-array antenna applications.
When used as variable capacitor, RF MEMS can also be used to design
tunable resonators and tunable filters [12-15]. The schematic of a DMTL-based
tunable resonator is shown in Figure (4.6), where a DMTL section is connected to
input and output ports with two coupling capacitors. To a first order approximation
(neglecting loading effects) the center frequency is determined by the frequency at
which the resonators become half wavelength long.
From Equation (4.4), the
resonant center frequency of a DMTL resonator is
OJr
T tV
(4.5)
"Arc,
From the above equation, the tuning range of a MEMS tunable resonator can
be deduced as follows
j +
Aco
CO,
C .WE.W5.0
^ ----[+ v CM£if5.0
Cr
(4.6)
where Cmems.o is the zero-bias MEMS capacitance and y is the tuning factor of the
MEMS variable capacitor, defined as the ratio of the maximum-to-minimum
58
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capacitance. Fundamental electrostatic considerations limit v to a maximum of 1.5
for a simple capacitive membrane.
Coupling
Capacitors
50 £2
50 Q
Input Line
Output Line
DMTL Tunable Resonator
Figure 4.6: Topology of a DMTL-based tunable resonator
The DMTL tunable resonator in coplanar waveguide (CPW) form was
simulated with the Agilent Advance Design System (ADS) software for a glass
substrate (er = 5.7). Uec, and n are chosen to be 260 um and 12 respectively. The
coupling capacitance is 15fF. The simulated S 21 of DMTL tunable resonators is
plotted in Figure (4.7) for a variety of capacitance values. The resonant frequency
can be tuned effectively from 24 GHz to 18.9 GHz with loading MEMS capacitances
Cmems vary from 0 fF to 18 fF. The quality factor (Q) of the resonator is determined
mostly by the CPW line since MEMS devices show very low loss. Substrate leakage
needs to be avoided in high-Q DMTL tunable resonator applications.
59
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15
20
25
30
Frequency [GHz]
Figure 4.7: Simulated S2[ of DMTL tunable resonators with loading MEMS
capacitances CMems vary from 0 fF to 18 fF.
4.3 Digital DMTL-based delay line
In order to maintain an acceptable matching over a wide band for MEMS
based distributed delay line or phase shifter, it is recommendable not to overload the
transmission line with an excessively large MEMS switch capacitance in the DOWN
state. Two important parameters used here are the loading factor “ t ” and the
capacitance ratio "_v” which are defined as follows:
x
*
/
_ C™
ME.WS
'
L
L^ c :
C,
y = C ^ ws/ C ^ M5
60
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(4.8)
The parameter y is the ratio of the minimum-to-maximum MEMS varactor
capacitance. The loading factor (x ) is the ratio of maximum varactor capacitance per
unit length to the transmission line (C/) capacitance per unit length. In order to meet
certain return loss requirement (S//.ma*), the minimum capacitance ratio of the MEMS
switch (ymi/i) is restricted by the following equation,
I-a
x
«»____ _ ✓-♦nun
/ ^-*max
^
- nun “ VvfEWS ' ^ M E M S ” “
(4.9)
where a is defined as
a=
^l1 —s 11.max V
(4.10)
^+ ^U.max j
0.4
20dB
0.35
0.3
0.25
c
E
>.
0.2
0.15
l4dB
0.1
0.05
0
0
2
4
6
8
10
Loading Factor x
Figure 4.8: Plot o f the capacitance ratio ymm as a function o f loading factor x
for different return loss requirements.
61
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure (4.8) shows the capacitance ratio ymm as a function of loading factor x
for different return loss requirements. From the plot we can see that, for DMTL
based delay line or phase shifter applications it is desirable to design the circuit with
small loading factor .r and large capacitance ratio vmm.
Nonetheless, the fabrication of physically small MEMS switches can be a
technological challenge. In fact, to reduce the DOWN state capacitance value of the
single MEMS switch, it is possible to increase the thickness of the dielectric layer
coating the central conductor or shrink the size of the upper membrane.
Unfortunately, both these measures can be exploited only to a certain point, since
they result in inconvenient drawbacks such difficult fabrication, very high actuation
voltages and more critical reliability.
We studied a new topology of MEMS switches that helps to cope with these
problems. The idea is based on a 'series' circuit schematic, as illustrated in Figure
(4.9) (a) and (b). By adopting this configuration, it is possible to achieve relatively
low value of capacitances in the DOWN state with a larger, more reliable, upper
membrane. Also, this design offers other advantages: The quality of the contact of
the membrane over the coated central conductor is often an issue since the inevitable
irregularities in the profile of the SiN film and of the metal bridge make an accurate
control of the value of the final DOWN state capacitances difficult. With a 'series'
configuration, this problem is reduced since the value of the capacitance in the
DOWN state is less sensitive to small aberrations of the contact membrane-dielectric
62
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
film. Also, if the DC bias is applied directly between the membrane and the center
conductor with a dedicated control circuitry, the pull-down actuation voltage can be
significantly reduced.
Substrate
(a)
(b)
Figure 4.9: (a) ’Series’ configuration topology for the MEMS capacitive
switch, (b) Circuit representation for the total capacitance of the MEMS
capacitor.
Figure (4.10) shows pictures of fabrication tests for this type of MEMS
switches, taken with an optical microscope (a) and with a Scanning Electron
63
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Microscope (b). The yield of the process and the reliability of the switches are
critical and depend upon critical parameters such as thickness of the metal
membrane, height of the bridge and residual stress of the metal. A good reliability
and reproducibility of these MEMS switches has been achieved by E-beam
evaporating 1 pm-thick A1 as the suspended airbridge.
(a)
(b)
Figure 4.10: Pictures of the MEMS switch in “series” configuration, taken
with (a) an optical microscope, (b) a scanning electron microscope.
The phase shifter consists of a CPW transmission line, loaded periodically
with MEMS capacitors, as shown in Figure (4.11) (a) and (b). By applying a DC
voltage it is possible to actuate the MEMS switches from the UP state to the DOWN
state, inducing an increase in the value of the loading capacitance: for frequencies
below the Bragg frequency (in our design, 40 GHz), the effect is an increase in the
total capacitance per unit length of the transmission line structure, and hence a
change in the phase velocity and characteristic impedance. The change in the phase
velocity produces a phase shift that is determined by the capacitive ratio
(C
on/C off)
of the MEMS elements and by the original (intrinsic) capacitance of the line. A high
64
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
impedance line is used to start with (Zo=69 £2), so that the loaded line has
characteristic impedance close to 50 £2.
Transmission line sections
(a)
Ground
Ground
••
•*
A — A
MEMS capacitors
(b)
Figure 4.11: (a) Circuit schematic of the phase shifter, (b) Actual photograph
of the phase shifter circuit fabricated at UCSB.
The process flow of the MEMS true-time delay phase shifter is the same as
that of each individual MEMS switch. The circuit is fabricated using CPW
transmission lines defined by evaporating 200/7000/200 A layer of Ti/Au/Ti on a
glass substrate (er = 5.7. tan (6) = 0.001). The widths of the center conductor and of
the gap are chosen to be 100 pm and 60 pm respectively. A 5000 A PECVD SiN
layer is grown and patterned on top. Next, a 3 pm-thick sacrificial photoresist layer,
which determines the height of the MEMS air bridge, is patterned. A 200/10000 A
65
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Ti/Au layer is then evaporated and patterned to define the geometry of the MEMS
bridges. The width and the span of the membranes are 40 pm and 300 pm
respectively. The sacrificial photoresist is then removed and a critical point drying
system is used to release the MEMS bridges. Figure (4.12) and (4.13) illustrate the
measured S-parameters o f the circuit and the differential phase shift as a function of
frequency. The differential phase shift is the relative phase shift in the DOWN state
with respect to the transmitted phase at the UP state of the MEMS capacitors.
DOWN elan
S-paramatara [dB!
UP tut*
S-parameter* [dB]
Stl
*
•20
£
»
a
to
-30
•40
0
S
10
IS 20 29
FroquancY[OK2]
30
•40
39
0
S
10
1S
so
JO
Fraquoncy(OMi|
39
Figure 4.12: Measured S-parameters of the circuit for both UP state (Top)
and DOWN state (Bottom).
As expected, the circuit is capable of producing a phase shift that varies
linearly with frequency. This MEMS true-time delay phase shifter demonstrated a
phase shift of 180° with an insertion loss of 1.17 dB at 25GHz, a phase shift of 270°
with an insertion loss of 1.69 dB at 35GHz. The return loss is better than 11 dB over
a 0-35 GHz frequency band for both UP and DOWN switching states. To the best of
66
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
our knowledge, this is the lowest reported insertion loss for a phase shifter at K/Ka
band reported to date. In the next section, we will try to extend this idea to cascade
several true-time delay phase shifters together to implement multi-bit MEMS-based
phase shifter.
350
—
«•
I
300
-
I
250
-
200
-
150
-
c
sm
&
m
e
S
£
o
—
............................................... ..............................................................................................................................
—
Simulated
- — — Measured
100
50
0
5
10
15
20
25
30
35
Frequency [GHz]
Figure 4.13: Simulated and measured differential phase shift versus
frequency when the circuit is biased (DOWN state). The phase shift is with
respect to the transmitted phase when the circuit is unbiased (UP state).
4.4 Three-bit digital MEMS phase shifter
Utilizing RF MEMS switches in multi-bit phase shifters can drastically
reduce loss, thus can significantly reduce cost and weight for phased array antenna
where thousands of phase shifters are mounted. Since the one-bit distributed phase
shifter based on MEMS switching devices was implemented with low insertion loss,
this technique can then be extended to cascade several one-bit distributed MEMS
67
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
phase shifters together to form a multi-bit-controlled distributed phase shifter.
Recently, researchers have reported several ways to implement multi-bit phase
shifter [16, 17]. Compared with many or these approaches, the distributed phase
shifter presented here demonstrates much lower insertion loss. We fabricated and
measured a 3-bit distributed MEMS phase shifter for K-band applications.
Fabrication and measurement details are described in the following sections.
Figure (4.14) shows the photograph of a K-band 3-bit MEMS phase shifter.
The 3-bit phase shifter consists of three one-bit phase shifters for 180°, 90° and 45°
phase shift, respectively. DC control bias for each one-bit phase shifter is connected
to the ground pad of CPW transmission line while the signal line is connected to DC
ground. DC block capacitors are added between consecutive ground pads to isolate
different DC control bias. Metal-Insulator-Metal (MIM) capacitors with SiN as the
dielectric layer are used as the DC blocks in this circuit. The spacing between
adjacent ground pads is 20 pm. The area of the MIM capacitor is 100 pm x 100pm
and the thickness of SiN is 6000 A. To prevent signal leakage from the discontinuity
at ground pad, DC block capacitors are connected close to the edge of the ground
pad. It should also be noted that the pads for CPW probing at both input and output
ports must be DC decoupled from bordered ground pads in order to prevent the
ground reference in network analyzer from being connected directly to outer DC
power supply.
68
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
DC Block
I--
i
i
i
9CF
+ 4 ~ 45° —►
M
Figure 4.14: Photograph of the 3-bit distributed MEMS phase shifter circuit
fabricated at UCSB and the close-up of each individual MEMS switch
The circuit is fabricated on a glass substrate (er = 5.7, tan(§) = 0.001). The
total length of the circuit is 11 mm. The spacing between the MEMS capacitors is
780 jam. The CPW transmission line has 100 (im central conductor width and the
ground-to-ground spacing is
190 (am. This provides us a high impedance
transmission line (Zup=67Q) when MEMS capacitive switches are at UP states.
When switches are snapped down, the transmission line is periodically loaded with
MEMS DOWN-state capacitors and will resemble a low impedance transmission line
(Z down=37Q). In this way, we can get desired phase shift without sacrificing too
much in return loss.
Figure (4.15) illustrates the differential phase shift as a function of frequency
for all eight switching states. The actuation voltage for MEMS switch is about 60
69
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Volt. Figure (4.16) shows the insertion loss and the return loss for all of the
switching states. The circuit was designed to have 360° -phase shifts at 25 GHz. The
average insertion loss is 1.7 dB at 26 GHz and the worst-case insertion loss is 2.6 dB.
Return loss is better than -7 dB. Besides conductive loss, the mismatch between two
consecutive sections generate wave reflection and deteriorate loss and matching
performance, which accounts for the poor input match at frequency over 30GHz.
Thus it is expected to improve circuit performance by choosing appropriate circuit
parameters to match the circuit for all switching states. Measurement shows the
circuit will have phase shift from 0° to 315° with 45° -phase step at 26 GHz and the
measured phase error for all switching states are less than 8.5°. Detailed phase shift
data is listed in Table (4.1).
2
®
600
500
T3,
—
400
010
100
no
300
100
<6
c
s0)
Is
-loo
o
s
10
IS
20
25
30
35
40
Frequency (GHz)
Figure 4.15: Measured differential phase shift versus frequency at all MEMS
switching states.
70
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In summary, we have designed, fabricated and tested a K-band three-bit
distributed MEMS phase shifter on a glass substrate. The phase shifter demonstrates
an average 1.7 dB insertion loss at 26 GHz with return loss better than - 7 dB. The
circuit produces a phase shift from 0° to 315° with 45° -phase steps and the measured
phase error for all switching states is less than 8.5°. This work can be extended to 4bit or 5-bit phase shifter applications.
0
2
eo
"D
o
■o
Cl
(/>
(0
4
to
S
0
10
IS
20
2S
30
J5
40
10
Frequency (GHz)
IS
20
25
30
IS
40
Frequency (GHz)
Figure 4.16: Measured insertion loss and return loss versus frequency at all
Phase
State
0 .0 °
, 45.0°
90.0°
135.0° ! 180.0°
225.0°
270.0°
315.0°
Measured
0 .0 °
49.5°
85.6°
143.3° I 183.7°
219.3°
262.9°
321.3°
o
o0
MEMS switching states.
-4.5°
4.4°
-8.3°
5.7°
7.1°
-6.3°
Phase
Error
-3.7°
Table 4.1: Phase shift of the 3-bit MEMS phase shifter at 26 GHz.
71
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4.5 DMTL-based tunable filter
The tunable filter topology is shown in Figure (4.17) (a) and is a modification
of the capacitive gap-coupled transmission line filters.
Gxqjimg
Capua tori
50 Q
Rcaormor I
Resonator n
(a)
CPW Ground
Loading MEMS
Cjpaatars
M
<b>
Figure 4.17: (a) Topology of capacitively coupled tunable filter based on
DMTL resonators, (b) Layout of 3-section tunable filter in CPW form.
Filters of this type are commonly used as narrow bandpass filters [18]. Each
section of line is approximately half wavelength long at the passband center
frequency and the coupling capacitors are chosen to give the correct bandwidth. The
bandpass tunable filter shown in Figure (4.17) (b) is based on a generalized design
72
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method for capacitively coupled resonators [18]. A three-pole resonator topology is
chosen for good passband to out-of-band rejection ratio. The center frequency is
designed to be 20 GHz. Following a standard procedure, the coupling capacitances
(C,./.,) and electrical length (/«./«•) of each resonator are given in Table (4.2).
C, ( f l F)
fwt c . i
I
43.04
162.03°
2
10.56
172.44°
3
10.56
162.03°
4
43.04
i
Table 4.2: Summary of C,./, and ltitl
Each resonator is a DMTL section with Bragg frequency much higher than
the designed working frequency range. The loading factor (.t), defined in equation
(4.7), is the ratio of maximum varactor capacitance to the transmission line
capacitance (C/) per unit length. While the loading factor .t is selected to be larger
when a wider tuning range is desired, it should also be noted that x needs to be within
certain range for input match considerations. This is because the impedance of the
loaded lines used to implement the tunable resonators is also a function of the
loading capacitance as shown in equation (4.2). If a large change in the center
frequency is attempted by using bigger variable capacitors in the resonator or by
changing the variable capacitors by larger amounts, then the return loss performance
will suffer due to change in filter impedance. In this design, loading factors of all
73
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
resonators are chosen to be 0.5. When the characteristic impedance of synthetic
transmission line is set to 50 Q, the characteristic impedance (Z,) of the unloaded
transmission line is
Z, =50V T kv
(4.11)
Thus, the loading capacitance (Cvar) and number of sections (n) in each
resonator are given by
C.
V“
x
5 0 ^ /B„ M(l + x)
n—
(4.12)
(4.13)
fo
where / Bragg is the chosen Bragg frequency,
360
is the calculated electrical length of
each transmission line resonator. In order to fit n an integer for all three resonators,
the appropriate / Bragg needs to be chosen accordingly. In this design, the number of
sections in each resonator is II, 12 and 11 respectively. The loading capacitance Cvar
is 12-13 fF when no bias voltage is applied.
This circuit is also simulated in HP-ADS using parameter values provided
above. An optimistic tuning factor of 1.5:1 for all MEMS capacitors is assumed.
Simulated S-parameters results at 12 fF, 15 fF and 18 fF loading MEMS
capacitances are plotted in Figure (4.18) (a) and (b). The simulated data shows the
center frequency shifts from 20.35 GHz to 18.9 GHz when loading MEMS
capacitances vary from 12 fF to 18 fF. Passband return loss is better than -1 0 dB for
74
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
all tuning ranges. Though a tuning factor of 1.5:1 is assumed because of the tuning
limitation set by MEMS capacitors, wider tuning range can be expected if more
sophisticated devices with higher tunability are incorporated in this design.
■20
CD
■a
S . -30
-40
-20
-50
-25
-30
16
18
20
22
•60 —
24
16
18
20
22
Frequency (GHz)
F req u en cy (GHz)
( a)
lb)
24
Figure 4.18: Simulated S-parameter of capacitively coupled MEMS tunable
filter, (a) Return loss Su . (b) Insertion loss S?[.
The 3-pole capacitively coupled tunable filter was fabricated on a 700-pmthick glass substrate (er = 5.7, tan 8 = 0.001) using standard IC processes.
The
overall filter dimension is 8.3 mm x 1.1 mm. Figure (4.19) is a photograph of
fabricated K-band three-pole MEMS tunable bandpass filter. The coplanar
waveguide is l-pm-thick evaporated gold with central signal line width equals 150
pm. Ground-to-ground spacing is 300 pm. The resistive biasing network is
connected to signal lines of each resonator. A bias resistor of 6 K& is used in each
bias path to isolate the DC and RF signals. The width and the span of the membranes
75
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are 30 pm and 240 jam respectively. Since it is risky to design a MEMS switch with
length longer than 300 pm. the new structure shrinks the airbridge length to 240 pm,
which makes MEMS devices steadier and more reliable. Figure (4.20) shows the
SEM microphotographs of the fabricated tunable filter and well-planerized MEMS
airbridge structure.
Leaded Lire tootnlcr
I CPWGund
I
*»*
! ■1,1 n n ' *n ' ! r y M V 1 r ' 1 ’V
*,
'
Bus Rid
M M sG p rite r
Figure 4.19: Photograph of fabricated three-pole MEMS tunable bandpass
filter with DMTL resonators.
Figure 4.20: SEM microphotographs o f fabricated tunable filter and MEMS
airbridge structure.
76
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The two-port S-parameters of the circuit were recorded up to 30 GHz. Figure
(4.21) illustrates the measured S-parameters for MEMS
variable capacitors
controlled by a bias voltage of up to 60 V. The measured results demonstrate a 3.8%
tuning range at 20 GHz with 3.6 dB minimum insertion losses. The relative 3-dB
bandwidth increased from the designed value of 9% to 12%, which is considered to
be due to process variation that makes coupling MIM capacitances larger than
designed values. The out-of-band rejection at 15 GHz and 25 GHz are -36.3 dB and
-30.1 dB, respectively. Return loss varies from -36 dB to - 8 dB in passband at all
tuning ranges. Compared with the simulated data, the difference of insertion loss in
passband is about 2 dB which is considered to be the unaccounted loss from substrate
leakage and radiation. Using micromachined substrate and anti-radiation metal cover
can further reduce these losses. Since silicon nitride layer in each MEMS device is
about 6000 A thick in order to be Fit into the same PECVD process as the coupling
MIM capacitors, the snap-down voltage for MEMS airbridges is about 65 Volt,
which is relatively higher than reported actuation voltage by other researchers and
can be decreased by using a thinner dielectric layer.
The tuning factor of each MEMS variable capacitor can also be extracted
from two-port S-parameter measurement of a DMTL section. As discussed in
previous sections, MEMS capacitance will modify both magnitude and phase
information of measured S-parameters. which in return can then be used to extract
tuning factor of each MEMS device from RF measurements. Detailed extraction
77
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
method can be found in reference [9] and similar techniques have already been used
to design analog and digital MEMS based phase shifters. With 60 V bias voltages,
tuning factor of 1.27:1 is extracted from measured data. As discussed in chapter 3,
the pull-down occurs at go/3 when the pull-down and pull-up forces satisfy the
equilibrium function described in Equation (3.2). So the optimized design of MEMS
variable capacitor will have 1.5:1 tuning range. With further improvements in
MEMS devices, it is expected to tune the MEMS based filter in a wider bandwidth in
the future. In addition, by using RF MEMS as switches instead of variable capacitors
in this circuit topology, it is also promising to implement high-performance MEMS
based diplexers.
10
«0 -20 -
•25
-30
-30 -35
-40
16
18
20
22
-40 -
24
16
18
20
22
24
F req u en cy [GHz]
F req u en cy [GHz]
(a)
(b)
Figure 4.21: Measured S-parameter o f capacitively coupled MEMS tunable
filter, (a) Return loss Su- (b) Insertion loss S2i-
In summary, several microwave circuits using surface RF MEMS technology
are designed, processed and measured. Distributed MEMS transmission line (DMTL)
78
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is investigated for millimeter-wave tuning circuit applications. DMTL-based multi­
bit phase shifters and tunable filters fabricated on glass substrates demonstrate very
low insertion loss due to the low loss advantage of RF MEMS switch. These circuits
are compact, low cost and easy in process, which makes MEMS technology a
competitive approach in future communication IC applications.
3.9 References
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Bozler, C.. et al. MEMS microswitch arrays fo r reconfigurable distributed
microwave components, in 2000 IEEE MTT-S International Microwave
Symposium Digest. 2000.
Brown, E.R., RF-MEMS switches fo r reconfigurable integrated circuits.
IEEE Transactions on Microwave Theory and Techniques, 1998. 46(11, pt.2):
p. 1868-80.
Schaffner, J.H., et al. RF MEMS switches fo r tunable filters and antennas, in
3rd International Conference on Micro Opto Electro Mechanical Svstems.
1999.
Katehi, L.P.B.. et al. RF MEMS fo r wireless communications systems, in
Proceedings o f International Conference on Microtechnologies: MICRO.tec.
2000 .
Borgioli, A., et al.. Low-loss distributed MEMS phase shifter. IEEE
Microwave and Guided Wave Letters, 2000. 10(1): p. 7-9.
Yu, L., et al., K-band 3-bit low-loss distributed MEMS phase shifter. IEEE
Microwave and Guided Wave Letters, 2000. 10(10): p. 415-17.
Liu, Y.. et al.. Distributed MEMS transmission lines fo r tunable filter
applications. International Journal of RF and Microwave Computer-Aided
Engineering, 2001. 11(5): p. 254-60.
Pacheco, S.P., D. Peroulis, and L.P.B. Katehi. MEMS single-pole double­
throw (SPDT) X and K-band switching circuits, in 2001 IEEE MTT-S
International Microwave Svmpsoium Digest. 2001.
Nagra, A.S. and R.A. York, Distributed analog phase shifters with low
insertion loss. IEEE Transactions on Microwave Theory and Techniques,
1999.47(9, pt.l): p. 1705-11.
Rodwell, M.J.W., et al., GaAs nonlinear transmission lines fo r picosecond
pulse generation and millimeter-wave sampling. IEEE Transactions on
Microwave Theory and Techniques, 1991. 39(7): p. 1194-204.
79
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
11.
12.
13.
14.
15.
16.
17.
18.
Barker, N.S. and G.M. Rebeiz, Distributed MEMS true-time delay phase
shifters and wide-band switches. IEEE Transactions on Microwave Theory
and Techniques, 1998. 46(11, pt.2): p. 1881-90.
Jae-Hyoung, P., et al.. Tunable millimeter-wave filters using a coplanar
waveguide and micromachined variable capacitors. Journal of
Micromechanics and Microengineering, 2001. 11(6): p. 706-12.
Hong-Teuk, K., et al. Millimeter-wave micromachined tunable filters, in 1999
IEEE MTT-S International Microwave Symposium Digest. 1999.
Brank, J., et al., RF MEMS-based tunable filters. International Journal of RF
and Microwave Computer-Aided Engineering, 2001. 11(5): p. 276-84.
Muldavin, J.B. and G.M. Rebeiz. X-band tunable MEMS resonators, in 2000
Topical Meetings on Silicon Monolithic Integrated Circuits in RF Systems.
2000 .
Pillans, B., et al., Ka-band RF MEMS phase shifters. IEEE Microwave and
Guided Wave Letters, 1999. 9(12): p. 520-2.
Malczewski, A., et al., X-band RF MEMS phase shifters fo r phased array
applications. IEEE Microwave and Guided Wave Letters, 1999. 9(12): p.
517-19.
G.L. Matthaei, L.Y.a.E.M.T.J., Microwave Filters, Impedance Matching
Networks and Coupling Structures. McGraw-Hill Book Co., New York,
1964.
80
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Chapter 5
Low Loss Analog Phase Shifters Based on
BST Interdigitated Capacitors (IDCs)
Low-cost and high-performance phase shifters are crucial components in
modem phased array antenna systems. Many radar systems require true time-delay
elements in order to minimize beam squint angle in wideband operation. The
varactor-loaded transmission line behaves like a synthetic transmission line with
voltage variable phase velocity and can. therefore, be used as a true time-delay/phaseshift element. In recent years, ferroelectric technologies have received extensive
attention because of their suitability for tunable microwave applications [1-5].
Integrated capacitors using Barium Strontium Titanate (BaxSri.xTi0 3 ) thin film,
which has high tunability, low loss tangent and high power handling capability, are
very promising as a replacement for traditional semiconductor devices. In addition,
the films can be deposited inexpensively using RF magnetron sputtering or MOCVD
and processed using standard monolithic fabrication. These capacitors are used to
implement millimeter wave distributed phase shifters.
The layout of this chapter is as follows. First a brief introduction to BST thin
film technology is presented. Several physical properties of BST thin film relevant to
high frequency applications are discussed. Both parallel-plate and interdigital BST
81
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tunable structures are introduced and compared. BST interdigital device structure is
chosen in order to minimize device loss. A brief description of the monolithic
fabrication process is presented, followed by DC and RF measurements on the
fabricated devices. Finally, BST interdigital capacitors are used in varactor-loaded
transmission line to obtain low loss distributed phase shifters [7, 8 ]. Over 60°/dB
performance is obtained, which is the state-of-the-art result for phase shifters using
BST thin film technology.
5.1 Introduction to BST thin film technology
BST
(Bai.xSrxTi0 3 )
has
a
perovskite
structure,
a
commonly
used
electroceramic in discrete capacitors. Since early 1990s there has been a strong
research effort in developing high permittivity materials such as BST for DRAM
capacitors. The perovskite structure has large barium ions surrounded by twelve
nearest neighbor oxygen ions, and each titanium ion has six oxygen ions in
octahedral coordination. A face centered cubic (fee) lattice is formed by the barium
and oxygen ions while the highly charged titanium ions fit into the octahedral
interstices. In bulk form, BST is a "ferroelectric", which exhibits strong hysteresis in
the electrical polarization versus applied field, below a well-defined Curie
temperature. Above the Curie point the hysteresis disappears, and the material is
"paraelectric” with a high permittivity and strongly nonlinear dependence on applied
82
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field. Figure (5.1) shows the temperature dependence of the permittivity and fielddependence of the polarization in the two states:
Ferroelectric
Paraelectric
InParaelectric Slats
In Ferroelectric Slate
(below Curie Print)
(abcfce Curie Point)
DRAM s
Varactors
Figure 5.1: BST electrical properties, applications, and research objectives
Most interestingly, thin-fiim BST behaves quite differently than bulk BST, in
a way that is generally advantageous for microwave varactor applications. BST thin
film has been realized that simultaneously exhibit large relative dielectric constant (er
-300), electric-field-tunable dielectric constant (>100% tunability) and low loss
tangents (tan 6 < -1 0 °) [9], These properties enable BST thin film a very promising
candidate for high-frequency circuit applications. Phase shifters and phased array
antennas are the most important technologies to be impacted by the development of
BST films. However, inexpensive BST capacitors will find application in tunable
83
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filters, voltage-controlled oscillators (VCOs), matching circuits, and possibly
frequency conversion (mixer and multiplier) circuits. Figure (5.2) summarizes the
key properties of BST thin film and its main applications in high-frequency circuits.
■ ■-
Circuit Implementation
Kev BST Properties
V oltage controlled c a p a c ita n c e
L arge field d e p e n d e n t permittivity
Phase shifters
Oscillators
Tunable filters
Compact tunable circuits
Intrinsically fast field re sp o n se
V an ab le p h a s e velocity
tran sm issio n line
Fast switching speeds
High breakdow n fields. >3x10® V/cm
Phase shifters
Delay lines
High power handling capability
N onlinear r e a c ta n c e
Low drive cu rren ts (dielectric leak ag e)
Frequency multipliers
Mixers
Low prime pow er requirements
Sym m etric nonlinearity
What is reauired
Low cost high power - zero bias
multipliers
• Low lo ss ta n g e n ts
• W id e tunability
S im ple fabrication
• Low le a k a g e , long lifetime
Low cost
• R ep ro d u cib le grow th
Figure 5.2: BST thin film electrical properties, applications, and research
objectives
In order to use BST thin films as frequency-agile dielectric elements in
microwave applications, several relevant materials properties of BST thin films need
to be concerned: dielectric constant, electric-field tunability, dielectric loss, DC
leakage current, breakdown strength. The magnitude of the dielectric constant and
loss in BST thin films is controlled by many materials properties: alloy-composition,
stoichiometry, microstructure, stress state, electrode material, film thickness and
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thermal processing history [10]. Similarly, the electric-field tunability is dependent
on the same set of materials parameters and processing variables. For the dielectric
constant and tunability, the dominant effects are the alloy composition and film
stoichiometry since the Ba/Sr and (Ba+Sr)/Ti ratios control the ferroelectric transition
temperature [II]. Although the highest dielectric constant is found at a (Ba + Sr)/Ti
ratio of one, for Bao 7SrojTi 0 3 films the best lifetime performance and maximum
resistance degradation lifetime is with a slightly Ti rich composition ( - 8 % excess Ti).
Films with adequate dielectric properties have been produced with up to 15% excess
titanium, which greatly exceeds the solubility of excess Ti in bulk BST of -0.1% .
The dielectric loss is dominated by extrinsic contributions from defects and
interfacial contamination [12]. Leakage currents can become significant for insulating
films at high electric fields and are the dominant limitation on retaining high bias
voltages across tunable BST-based microwave elements. They also determine the
prime power requirements of these elements.
5.2 Parallel-plate vs. interdigitated capacitors (IDCs)
The distributed phase shifter periodically loaded with BST thin film
capacitors has the same configuration as the RF MEMS switch-loaded transmission
line in the previous chapter. BST-based phase shifters are an emerging technology
that is competitive with GaAs-based devices. Along with BST-based technologies
are microelectromechanical systems (MEMS)-based varactors. Table (5.1) compares
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the three types of technologies and both BST and MEMS technologies show
significant promise. MEMS devices offer low loss performances, but their price is
driven by the need for high cost vacuum packaging. A very important feature of the
BST technology is its compatibility with a wide variety of large area microwave and
mm-wave substrates.
By using inexpensive substrates (glass, fused quartz, or
sapphire) and demonstrated high volume deposition and fabrication technologies a
low cost tunable RF circuit technology could be possible.
Tunability
2-3:1
< 1.5:1
2-3:1
RF Loss (Q)
Q < 60
Q < 200
Q < 100
Control Voltages
< 10 V
<60 V
< 5-30 V
Tuning Speed
Fast
Slow
Fast
Power Handling
Poor
Excellent
Trades with
control voltage
Reliability
Excellent
Poor
(tood
Packaging
Hermetic. (Up,
bump, C&W
Hermetic,
vacuum. ??
nip. b u m p . C & W
Cost
High
(@ high O)
Non-hermetic.
Low
Table 5.1: Comparison of different varactor technologies for phase shifter
applications
The total insertion loss of the phase shifter has two components- BST variable
capacitor loss and transmission line loss. Figure (5.3) shows the theoretically
calculated insertion loss of 360 degree BST distributed phase shifter on silicon
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substrate with different effective device loss tangent at 20 GHz. BST capacitor is
assumed to have tunability of 2.5. Figure (5.4) shows another plot of theoretically
calculated insertion loss with different BST thin Film tunability and loss tangent. It is
apparent that both the effective BST device loss tangent and the tunability are key
parameters in determining the total circuit loss. It is desirable to improve both BST
device tunability and the effective device loss tangent. But it should also be noted
that as long as the device has enough tunability (> 2 :l) total circuit loss would not
benefit much from improvement in tunability, so the device loss tangent plays a more
important role in this case. Our research focuses on reducing BST device loss tangent
without sacrificing much of its tuning capability.
N
X
«
m
Distributed Circuit Phase Shifter
BST on Silicon, Tunability: 2.S
5
4
Total Loss
I
■o
o
8
o
n
2,
«N
o
3
2
CPW conductor Losa
0.05
0.04
0.03
0.02
0.01
0
Effective Device Loss Tangent at 20 GHz
Figure 5.3: Theoretically calculated insertion loss of BST phase shifter on
silicon (specified at 20 GHz) versus effective device loss tangent.
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8
Silicon Substrate
N
z
0
7
«
m
6
i
5
■o
4
e
CM
o
8
5
m
■o
BST
BST Loss Tangent=0.02
3
2
BST L oss Tangent=0.01
1
0
1.6
1.8
2
2.2
2.4
2.6
2.8
3.2
BST film tunability
Figure S.4: Theoretically calculated insertion loss of BST phase shifter on
silicon (specified at 20 GHz) versus BST thin film tunability.
Parallel-piate and interdigital capacitor structures are commonly used to form
variable capacitors. As shown in Figure (5.5). parallei-plate structure usually has two
parallel-piate capacitors in series configuration to maintain device symmetry, which
is very important for implementing frequency multiplier circuits. BST thin film is
deposited on top of a pre-pattemed Pt bottom electrode. Then the BST thin film is
patterned and etched in buffered hydrofluoric acid, and a thick layer of lowpermittivity dielectrics is coated on top. Next, two open windows are etched through
the thick low-permittivity dielectric layer to the top of the BST thin film. The area of
the two open windows determines the total device capacitance value. Finally, top
metal contacts and thick signal lines are deposited by e-beam evaporation. Parallel-
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plate capacitor structure confines the electric field effectively between the top and
bottom electrode, thus the device has as much tuning capability as the BST thin film
can provide. Experimental results show that BST parallel-plate capacitor can provide
>3:1 tuning range. The main limitation for BST parallel-plate capacitors is that the
total device loss at microwave frequency is quite high which is probably due to the
BST material degradation in process flow. In addition, BST parallel-plate capacitors
requires six-layer mask in fabrication, which is not desirable for low-cost circuit
applications [13].
Figure 5.5: Parallel-plate and interdigital BST device structures.
To compare with the performance of BST parallel-plate structure, BST
interdigital structure is also proposed. As shown in Figure (5.5), BST interdigital
capacitor is very easy to be fabricated. BST thin film is directly deposited on top of
insulated substrate. Then the BST layer is patterned and etched in buffered
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hydrofluoric acid. Finally, the interdigital metal fingers and signal lines are deposited
on top. Only three-mask-layer process is required in BST interdigital capacitor
fabrication, which is desirable for low-cost circuit applications. In addition, since no
bottom electrode is required, this type of structure eliminates the microstructural
degradation induced in the dielectric-electrode interface. Electric field between
adjacent interdigital metal fingers is distributed in air, BST and substrate, not
confined entirely in the BST thin film. So the effective tuning range of BST
interdigital capacitor is lower than the tuning capability of the BST thin film. The
finger-to-finger spacing of interdigital capacitor is usually 1 fim , limited by optical
lithography limitation, so BST interdigital capacitor structure can handle much higher
breakdown voltage than parallel-plate capacitor structure, which is desirable for some
high power phased array antenna applications.
5.3 DC and RF characterization
Static field analysis was used to analyze the capacitance of BST interdigitated
capacitors [14, 15]. Adjacent fingers are considered to be at a potential of +V/2 and V/2 so that the plane of symmetry between the two fingers can be replaced with a
perfect electric conductor. Figure (5.6) shows the section used to make the static field
analysis. As shown in Figure (5.6), the finger width is w, the finger-to-finger spacing
is 5, BST thin film thickness is d and the substrate thickness is h. Poisson’s equation
was applied to each layer. By meeting the boundary conditions between consecutive
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layers the amount of charge Q on the finger can be determined as a function of
applied DC bias. Interdigitated capacitor can be modeled as parallel resistorcapacitor, and then the capacitance can be easily determined. Figure (5.7) shows the
calculated capacitance per micron length between adjacent interdigital metal fingers
as a function of BST thin film thickness. The finger width w and the finger-to-finger
spacing s are 2 (im and l^un, respectively. The permittivity of BST is assumed to be
200. The capacitance increases with the increase of BST thin film thickness. This is
because with the same applied voltage between adjacent metal fingers more energy
can be stored in the BST layer. However, continuing increase the thickness of the
BST layer will make the capacitor resembles as fabricated on BST substrate, which
sets the capacitance limit for BST interdigital capacitors.
*
PEC
V -0
d
i.
PEC
V -0
st
s/2
;
w/2
-a/2
Figure 5.6: Schematic of BST interdigitated capacitor for static field analysis
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500
w=2 f i m
400 ~
s=l /im
c b s t =200
300 -
8
u
200
<0
a.
100
*
9
o -------------------------------------- ------------------0
05
1
15
2
25
3
BST thickness h2 [pm]
Figure 5.7: Theoretically calculated capacitance of adjacent interdigital metal
fingers as a function of BST thickness.
Both glass and sapphire are considered as candidate substrates for BST
interdigital capacitors. Silicon is not considered because of its high substrate leakage,
which is not suitable for millimeter wave circuit applications. Glass is a good
substrate candidate for phase shifter applications because of it has very low dielectric
constant, but BST thin film sputtered directly on glass substrate demonstrates rather
low tunability (<1.5:1). Sapphire was chosen as a primary substrate due to its
excellent insulating properties at microwave frequencies and its availability in
optically polished surfaces at low cost. In addition, BST films sputtered on c-axis
sapphire substrate show much higher tunability than the films deposited on glass
substrate. Although increase ferroelectric thin film thickness d could increase the
tunability, it also increases dielectric loss.
Decrease in quality factor as film
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thickness increases has been attributed to increased resistive losses as the overall
volume of the dielectric increases. Since the tuning range of BST interdigital
capacitor reaches very close to the thin film tunability with BST thickness over 100
nm, 100 nm BST interdigital capacitor is chosen subsequently for investigation.
n - 1 > p «r» > U it4 t k j t>o
65
S
Io 55
3.
S
5
45
•
Width=2um. Soaong=tum
•
Spacinq_2um
3.5
*20
0
20
40
60
80
100
DC BlM (V)
*c)
Figure 5.8: (a), (b) Schematic plot and electric field distribution of the BST
interdigitai capacitor (c) Capacitance vs. DC control bias for i) finger
width=2pm. spacing=lpm ; ii) finger width=2pm. spacing=2pm
Figure (5.8) shows the measured capacitance variation as a function of DC
bias for two capacitor structures with different finger-to-finger spacings. From the
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plot it can be seen that the capacitor with spacing 2 pm has much lower tunability
because the DC bias is not large enough to tune the capacitor effectively. Since the
dielectric constant of BST is controlled by the effective electric field inside the
material, with the same DC bias, the electric field in the thin film with spacing 2pm
will be much lower than the one with spacing 1pm. To further reduce required DC
bias, we could shrink the spacing between adjacent fingers to as small as the
lithography technique permitted.
DUT
dew
Figure 5.9: RF characterization layout for the BST interdigital capacitor and
its equivalent circuit expression.
RF characterization was made by one-port reflection measurements on a HP
8722D network analyzer. The measured S-parameters are then used to extract the
quality factor and the capacitance value. Figure (5.9) shows the layout used to make
RF characterization of the BST interdigital capacitor. The BST interdigital capacitor
is connected to the end o f a short 50-ohm coplanar waveguide. To take into
consideration of the parasitic effects induced from the coplanar waveguide pads, two
similar open and short pad structures are also fabricated on the same wafer. By
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removing the parasitic parameters, the capacitance C and the quality factor Q of the
BST interdigital capacitor can be described as [16]
= G + icoC
(5.1)
y * -y L
(5.2)
Where Yop, YSh, Yl are measured admittance for the open, short and DUT
pads, respectively. Two loss mechanisms limit the quality factor of BST interdigital
capacitors- conductive loss in interdigital metal fingers and dielectric loss in BST
films. Still with 2 pm and 1 pm finger width and spacing, and assume the gold finger
length and thickness are 10 pm and 0.5 pm respectively, the quality factor
contributed from conductive loss is over 1000 at 10 GHz, while the best measured
quality factor of BST thin films is approximately 50. Thus the main loss mechanism
in BST interdigital capacitors is the dielectric loss in BST thin films.
Compositions
of BST were
investigated
to improve
the
film
loss
characteristics. As mentioned before, the intrinsic values for dielectric constant,
tunability, and loss are determined by the Ba to Sr ratio in BST. Low-Barium films
produced better RF devices in terms of loss, while still maintaining a useful
tunability. Figure (5.10) shows the quality factor of BST interdigitated capacitors
with different Ba to Sr ratio extracted from one-port S-parameter measurements.
These two capacitors are fabricated under the same process flow. We can see that the
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capacitor fabricated on low-Barium film (Ba/Sr = 30/70) demonstrates much lower
loss than the capacitor fabricated on high-Barium film (Ba/Sr = 50/50). There are two
possible explanations for that: either the low-barium films can be grown with reduced
defect concentrations, or the low-barium films/targets do not incorporate carbon as
readily as high-barium material. Though lower the Barium composition in BST films
can improve the loss performance, it also reduces the tuning capability. Measured
SrTiCh film shows only 1.5:1 tuning range. As a tradeoff, Bao.3Sro 7TiC>3 thin film is
chosen for both loss and tunability concerns. Figure (5.11) shows the measured
capacitance of Bao 3Sro 7Ti0 3 thin film at different DC biases. The capacitor
demonstrates over 2:1 tuning range.
40
3
o
20
0
----------------------------------------------------5
10
IS
20
25
30
35
40
Frequency [GHz]
Figure 5.10: Extracted quality factor of BST interdigitated capacitor with
different Ba/Sr compositions.
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Measurements at I MHz also show that the Bao.3Sr0 7T 1O 3 thin film
demonstrates film quality factor of about 230, whereas the quality factor of
Bao sSrosTi03 js about 120. Because of the improved device properties, our materials
and circuits effort has shifted its focus to films with low-barium/high-strontium
concentrations. The reduction in tunability due to lower barium concentrations seems
to be more than compensated by lower loss characteristics.
80
60
«u
e
«
um
a(B.
o
40
30
20
0V
40V
100 V
0 -----•-------------------------5
10
15
20
■
-25
30
35
40
Frequency [GHz]
Figure 5.11: Extracted capacitance of BST interdigitated capacitor at 0 V.
40V and 100V DC bias
5.4 Circuits fabrication and measurement
Using the proper design technique provided in chapter 4, voltage variable
BST interdigital capacitors are periodically loaded along a high impedance
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transmission line to form the distributed phase shifter circuit. The operating
frequency for the phase shifter was first designed to be 20 GHz. The Bragg frequency
for the periodically loaded line was chosen to be 40 GHz. The zero bias capacitance
of each interdigitated capacitor used in the design was 82fF. Due to symmetry
considerations, the capacitor was divided in half (4 IfF each) and connected in
parallel from the center CPW line to either ground pad. The circuit was fabricated on
sapphire (c-axis orientation) using standard monolithic fabrication techniques. BST
for the tunable capacitors was deposited by high temperature RF magnetron
sputtering. A postdeposition anneal (1000- 1200°C) is conducted to improve the
dielectric Q [17]. 4000 Angstroms thick gold was evaporated on BST to make the
interdigital pattern. The BST in the capacitor active region was covered by
photoresist and BST film elsewhere was etched away by buffered hydrofluoric acid.
Finally, l.5nm gold was deposited as the coplanar transmission line.
The two-port s-parameters of the phase shifter circuit were recorded up to 35
GHz. Figure (5.12) shows the return loss and insertion loss of the phase shifter circuit
at 0V, 40V and 100V DC biases. The return loss is less than -14 dB over all phase
states and the insertion loss is smaller than 4 dB in 0-20 GHz frequency range. Figure
(5.13) shows the differential phase shift (with respect to the zero bias insertion phase)
as a function of frequency for DC biases at 40V and 100V. It can be seen from this
graph that, at 20 GHz, the differential shift is continuously variable from 0° to 110°
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by adjusting the DC bias on the CPW center conductor. The phase shift varies
linearly for frequencies up to 20 GHz.
0
-
10:
3
N
as
■o
-10
-20
-30
-40
-15
-50
-20
0
-60
10
15
20
25
30
35
0
Frequency (GHz)
5
10
15
20
25
30
Frequency (GHz)
Figure 5.12: Su and S^i of BST interdigitated capacitor loaded distributed
phase shifter at 0V. 40V and 100V DC bias.
350
£
300^
“2 250^
J
a.
■S21 ©V=0V (degree)
■S21 ev=40V (degree)
■S2i SV=100V (degret
200 r
£
s
2
&
5
5
10
15
20
25
Frequency (GHz)
30
35
Figure 5.13: Differential phase shift at 40V and 100V DC control bias
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35
From the RF characterizations of BST interdigital capacitors we can see that
the capacitors show high Q in low frequency range. So in addition to 20 GHz
applications, phase shifter using interdigital capacitors is also designed for C/X-band
operation. Figure (5.14) is a picture of a C/X-band 360° distributed phase shifter and
the zoomed-in photograph of each interdigital BST device. The circuit has a
dimension of 15mm by 15mm. 96 individual BST interdigital capacitors are
periodically loaded along the meandered coplanar waveguide. Each capacitor is
designed to have a capacitance of 90 fF at zero bias, assuming a 2:1 capacitance
variation. The center conductor width and the ground-to-ground spacing of the
coplanar waveguide are 200 (am and 880 (im, respectively. The length of each
transmission line sections is 1300 pm.
15mm
Figure 5.14: Photograph of the fabricated 360° phase shifter and the zoomedin pictures of individual BST interdigital device.
100
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0
2
-5
-10
-4
o
5
*-
a
g
CM
15
•20
cn
■25
.10
ov
40V
10GV
•12
•35
-u
0
2
4
8
1
10
Frequency (GHz)
0
2
4
6
8
10
Frequency (GHz)
Figure 5.15: S-parameters of the 360-degree BST interdigital capacitor based
phase shifter on sapphire substrate for C/X-band operation.
The two-port S-parameters of the phase shifter circuits were recorded from
DC up to 10 GHz. The DC bias is applied up to 100 V. Figure (5.15) shows the
measured S-parameters of the phase shifter circuit at different DC biases. The return
loss is less than -10 dB over all phase states. Figure (5.16) shows the differential
phase shift as a function of frequency for DC biases at 40V and 100V. This phase
shifter provides a 0-360° continuous phase shift at 8.2 GHz with a maximum
insertion loss of only 4.9 dB, which is the state-of-the-art performance for C/X-band
phase shifter using BST thin film technology.
In summary, BST thin film technology is investigated for high frequency
applications. Both parallel-plate and interdigital structures are analyzed and
interdigital structure is chosen because of its low conductive loss and ease in
fabrication. Material deposition and device fabrication are optimized in order to
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achieve low loss and high tuning range. And finally, these BST interdigital capacitors
are used to implement very low loss distributed phase shifters. Not limited to phase
shifters, it is expected to enhance the performance of many other contemporary
circuits and systems by utilizing this BST thin film technology in the future.
600
500
« 0V
—• — 40 V
400
—
— 100 V
£
c.)
V
em
fm
&
m
i
300
200
100
£
S
-100 ---------------------------------------------------------------------------------------------
0
2
4
6
8
10
Frequency [GHz]
Figure 5.16: Differential phase of the 360-degree interdigital capacitor based
phase shifter on sapphire substrate. The circuit demonstrated a phase shift of
360 degrees with an insertion loss of 4.9 dB at 8.2 GHz.
References
1.
2.
De Flaviis, F., N.G. Alexopoulos, and O.M. Stafsudd. Planar microwave
integrated phase-shifter design with high purity ferroelectric material. IEEE
Transactions on Microwave Theory and Techniques, 1997. 45(6): p. 963-9.
Van Keuls, F.W., et al. Room temperature thin film BafSrt.xTi0 3 Ku-band
coupled microstrip phase shifters: effects o f film thickness, doping, annealing
and substrate choice. 1999.
102
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3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
Van Keuls, F.W., et al., (YBa 2Cu307 ,Au)/SrTi03 /LaAl 0 3 thin film
conductor/ferroelectric coupled microstripline phase shifters fo r phased
array applications. Applied Physics Letters, 1997. 71(21): p. 3075-7.
Varadan, V.K., et al., A novel microwave planar phase shifter. Microwave
Journal, 1995. 38(4): p. 244, 248, 250, 253-4.
Kozyrev, A., et al. Ferroelectric films: nonlinear properties and applications
in microwave devices, in 1998 IEEE MTT-S International Microwave
Symposium Digest. 1998.
Erker, E.G., et al.. Monolithic Ka-band phase shifter using voltage tunable
BaSrTi0 3 parallel plate capacitors. IEEE Microwave and Guided Wave
Letters, 2000. 10(1): p. 10-12.
Yu, L., et al., BaSrTiC>3 interdigitated capacitors fo r distributed phase shifter
applications. IEEE Microwave and Guided Wave Letters, 2000. 10(11): p.
448-50.
Yu, L., et al. Distributed phase shifters using (Ba,Sr)Ti0 3 thin film s on
sapphire and glass substrates. 2001.
Padmini, P., et al., Realization o f high tunability barium strontium titanate
thin film s bv r f magnetron sputtering. Applied Physics Letters, 1999. 75(20):
p. 3186-8. '
Jaemo, I., et al. Bai.xSrxTiC>3 thin film sputter-growth processes and electrical
property relationships fo r high frequency devices. 2000.
York, R.A., et al. Synthesis and characterization o f (B a ^ r /.x)Ti / +yO thin
film s and integration into microwave varactors and phase shifters, in Twelfth
International Symposium on Integrated Ferroelectrics. 2001.
Jaemo, I., et al., (BavSri.x)T ii+y0 3 +z interface contamination and its effect on
electrical properties. Applied Physics Letters, 2000. 77(16): p. 2593-5.
Acikel, B., et al. Tunable strontium titanate thin film s fo r microwave devices.
in Twelfth International Symposium on Integrated Ferroelectrics. 2001.
Al-Shareef, H.N., et al., Tunability and calculation o f the dielectric constant
o f capacitor structures with interdigital electrodes. Journal of
Electroceramics, 1997. 1(2): p. 145-53.
Alley, G.D., Interdigital capacitors and their application to lumped-element
microwave integrated circuits. IEEE Transactions on Microwave Theory and
Techniques, 1970. MTT-18(12): p. 1028-33.
Ikuta, K., Y. Umeda, and Y. Ishii, Measurement o f high-frequency dielectric
characteristics in the mm-wave band fo r dielectric thin film s on
semiconductor substrates. Japanese Journal of Applied Physics, Part 2
(Letters), 1995. 34(9B): p. L1211-13.
Wontae, C., et al.. The effect o f annealing on the microwave properties o f
Bao _cSrof f i 0 3 thin films. Applied Physics Letters, 1999. 74(7): p. 1033-5.
103
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Chapter 6
High-Isolation BST-MEMS Switches
In this work, we investigated replacing silicon nitride with emerging
(Ba,Sr)TiC>3 (BST) thin film as the dielectric layer in RF MEMS switches. With high
dielectric constant of BST thin film (£r>200), it is expected to meet the requirements
for both higher isolation and smaller device size. In the following sections, we will
first present the properties of BST thin film and some fabrication concerns when BST
thin film is utilized in RF MEMS switches. RF MEMS switches using both BST and
silicon nitride dielectric layers were fabricated. Measurements of both devices were
compared, followed by discussions on further improving the performance.
6.1 Motivation for BST-MEMS switches
RF MEMS capacitive switches are currently being investigated for use as
high-performance control components for broadband applications. The bandwidth is
directly related to the ratio of the capacitance in the UP state, which limits the high
frequency performance, to the capacitance in the DOWN state, which limits the low
frequency performance. With fixed UP state capacitance, it is desirable to increase the
DOWN state capacitance for better low frequency isolation performance. In chapter
3. we already discussed two novel approaches to improve the DOWN state isolation
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performance: MEMS switch with metal cap and MEMS switch with separated DC
control. Both of these two approaches use silicon nitride as the isolation layer.
Another possible approach for improving the isolation performance in MEMS switch
is to replace the silicon nitride layer with high dielectric constant thin film [1,2]. This
has two-fold advantages: increased dielectric constant means large DOWN state
capacitance and thus more signal isolation compared with that currently achieved
using conventional dielectrics; device size can be minimized in favor of integration
without sacrificing the switching performance. BST thin film technology is a very
good candidate for this approach [3]. BST thin film has the relative dielectric constant
£r over 200, much higher than that of PECVD-deposited SiN dielectric (£r ^ 7).
Figure (6.1) shows a BST-MEMS switch in both up and down switch states. The
switch has very low capacitance (—lOfF) between top membrane and bottom central
signal line in the switch-up position. But when the top membrane is switched down, a
metai-BST-metal capacitor is formed, which provides a very large capacitance to
change signal flow to the ground pads.
Barium Strontium Titanate (BST)
Switch up
Switch down
Figure 6.1: RF MEMS shunt switch using BST thin film to replace
conventional silicon nitride layer in both switch up and down states.
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6.2 Design and fabrication concerns
The material and electrical properties of BST thin film is greatly dependent
upon the deposition condition. We investigated several issues in order to optimize
BST thin film for RF MEMS application. Some fabrication concerns are also
presented.
A. BST Thin Film Properties
In the RF MEMS switch, BST thin film is deposited on top of a bottom
electrode. This is different from the interdigital capacitor mentioned in Chapter 5,
where BST thin film is directly on top of the substrate. Early research at UCSB
focused on BST thin film growth on silicon substrates. High resistivity (HR) silicon
was chosen to reduce substrate losses.
Silicon wafers had a 100 nm dry thermal
oxide, 100 nm sputtered TiOi adhesion/diffusion barrier, and a 100 nm sputtered Pt
layer to serve as the bottom electrode. A dry thermal oxide layer had to be used
because wet oxidation resulted in void formation from the temperature cycling and
TiOi film deiamination.
Processing BST based microwave devices on platinized
silicon posed several challenges. Pt adhesion on silicon requires an adhesion/diffusion
barrier because of the poor adhesion of Pt to SiO: and to avoid silicide formation.
The Pt metal must be deposited at elevated temperatures to avoid hillocking upon
cooling after BST film deposition due to the thermal expansion mismatch between the
Pt film (8.8XICT6 °C @ 25°C) and Si substrate (2.618XKT6 °C @ 25°C). BST and Pt
film deiamination plagued devices on silicon. Measurements also found that the HR
106
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silicon did not remain so after BST film deposition and exposure to an elevated
temperature cycle.
Sapphire is commonly used as a substrate for microwave circuits because of
its low microwave loss. The resistivity of sapphire (~1012 Q cm) is higher than that
of silicon (-0.01-10 Q, cm) and HR silicon (~102-104 Q cm). Pt has been routinely
deposited directly on sapphire substrates for giant magnetoresistance (GMR) devices,
and epitaxial growth on sapphire has been reported.
The better thermal match
between Pt (8.8xl0'6 °C @ 25°C) and sapphire (6.0xl0‘6 °C @ 25°C) reduces the
chances for hillock formation in the metal film, promotes the growth of smooth films,
and simplifies integration techniques. Sapphire is a better candidate as a substrate for
BST thin film varactor technology.
Platinum deposition has been optimized for use as a bottom electrode. BST
and Pt film growth are carried out in a custom built RF magnetron sputtering system
specifically for oxide film growth. Pt films were grown on (000L) sapphire wafers.
Smooth epitaxial platinum thin films with a 3 A rms roughness were deposited at a
surface temperature of 600° C. Film composition is also an important factor to
determine the electrical properties of BST thin film. Table (6.1) shows the relative
dielectric constant and quality factor of 100 nm BST thin films with different film
stoichiometries. In these three sets of measured data, we can see that the loss
performance can be improved by reducing Strontium composition in BST thin film.
But in order to have large dielectric constant, we also prefer high Ba/Sr ratio. Thus
107
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we choose low-Barium Bao 3Sro.7Ti 03 film in the RF MEMS switch to produce better
RF performances in terms of loss and isolation. Figure (6.2) shows the K (relative
permittivity) and quality factor of the lOOnm sputtered BST thin film as a function of
bias voltage. This film is deposited in 700 °C sputtering chamber with 150 W RF
power. Detailed deposition conditions can be found in related published paper [4].
100 nm thick films
Dielectric constant
Film quality factor
BaosSrosTiOs
500
120
BaojSrojTiCh
315
230
SrT i03
190
300+
Table 6.1: Relative dielectric constant and film quality factor of the 100 nm
sputtered BST thin films with various film compositions.
350
1000
300 -
800
K w/ Reid
2
250
600
200
400 £
o
150
200
iZ
*
*
0
100
-10
-5
0
5
10
Voltage (V)
Figure 6.2: Relative permittivity K and quality factor Q of the 100 nm
sputtered BST thin film as a function of bias voltage.
108
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B. Fabrication Concerns
Though platinum is an ideal bottom electrode in BST thin film deposition, it
has much lower conductivity than gold, resulting in higher loss in signal transmission.
To
solve
this
problem,
we
tried
a
multi-layer
deposition
of
Ti/Au/Pt
(100A/1000A/1000A) as bottom electrode on sapphire substrate. BST thin film is
then sputtered on this multi-metal-layer bottom electrode. The measured materials
properties of BST thin film turn out to be comparable to that of previous measured
films. The surface roughness of the dielectric layer is within the range of 100 A.
Figure (6.3) is a microscopic picture of the BST-MEMS switch in fabrication.
Figure (6.4) shows the SEM photograph of the fabricated BST-MEMS
switches for K/Ka band applications. The switches are fabricated on a 300 fim-thick
sapphire substrate. From previous low-frequency measurements, the estimated
breakdown voltage for BST thin film is about 10-12 volts per 1000 A deposition.
Considering the pull-down voltage is in the range of 20-30 volts, we sputtered 3000
A BST to avoid voltage breakdown in operation. BST layer was patterned by etching
in a buffered HF solvent with an etching rate of 150A per minute. The CPW lines
have 200 p.m signal line width, and 280 pm ground-to-ground spacing. The process
flow is the same as the standard surface MEMS switch fabrication discussed in
Chapter 3. The air gap between the suspended airbridge and the dielectric contact is
2.5 ^m. The MEMS air bridge length is 240 pin with a width of 60 |im. The
109
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measured pull-down voltage was 35 volts, and no breakdown through BST dielectric
occurred in these measurements.
Figure 6.3: Microscopic photo of the BST-MEMS switch in fabrication
Figure 6.4: The SEM picture of the fabricated BST-MEMS switches for
K/Ka band applications.
6.3 Experimental results
Figure (6.5) presents RF measurements for the fabricated BST-MEMS switch
in both UP and DOWN state positions. The insertion loss in the UP state is -0.88dB
110
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at 20GHz and -1.5 ldB at 40GHz. The reflection coefficient in the UP state is less
than -lO dB from DC up to 30GHz. Insertion loss is a little high because the CPW
lines are only 3000 A thick. Thus much lower loss can be achieved by increasing the
thickness of the CPW lines. An equivalent LCR circuit was used to fit the measured
data. The fitted UP state capacitance is 40fF. Series inductance and series resistance
of the switch are 5pH and 0.35S2, respectively.
In the DOWN state position, more than 20 dB signal powers can be isolated to
ground at 10GHz, and the maximum isolation is 35.6dB at 26GHz. The fitted DOWN
state capacitance and series inductance are 7pF and 5pH respectively, resulting in a
down-state resonance at around 26GHz. Thus an excellent isolation of more than
30dB is obtained in a wide frequency range from
16GHz to 36GHz. The
corresponding parallel plate capacitance for 3000 A-thick BST thin film at near
breakdown voltage bias is around 40pF, which is much larger than the measured
DOWN state capacitance of 7pF. This is partly due to the surface roughness of the
MEMS air bridge and the BST layer. In addition, switch-down voltage was not
applied beyond 35 volts in order to avoid breakdown in the BST layer. The MEMS
air bridge and the BST layer are not in full contact, which also results in much lower
DOWN state capacitance. Despite of all these factors, the measured Cj/Cu ratio is
175:1. compared with 20-30:1 C yC u ratio of the SiN-based MEMS switch. MEMS
switch using SrTiO^ as the isolation layer is also fabricated, and it demonstrates
comparable DOWN state isolation performance.
Ill
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S2I
-5
a>
-
Gu=40 fF
-15
Measured
Fitted
-25
/
-30 ----------------------------------------------------------0
5
10
15
20
25
■----------- -----------30
35
40
Frequency [GHz]
-1 0
<0
w
«
E
S
a
o.
</)
-2 0
-3 0 f
-40 h
I
I
l
Measured
“
Fitted
-50 ----------------------------------0
5
10
15
20
25
30
■----------35
40
Frequency [GHz]
Figure 6.5: Measured S-parameters of BST-MEMS switch: (top) in the
state position and. (bottom) in the DOWN state position.
112
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To better understand the performance of BST-MEMS switches, devices of the
same physical structure and size but using silicon nitride as the isolation dielectric
layer were also fabricated and measured. Figure (6.6) shows the DOWN state
isolations of both BST-MEMS and SiN-MEMS switches. From the comparison we
can see that BST-MEMS shunt capacitive switches result in much higher signal
isolation than SiN-MEMS switches. For frequency bands lower than the DOWN state
LC resonant frequency of the MEMS switches, the larger the DOWN state
capacitance, the more signal isolation can be obtained when the device is switched
DOWN. In this case, higher isolation is expected by increasing the DOWN state
capacitance, which requires more investigation on the dependence of the electrical
properties of BST thin Film on film composition, electrode and the deposition
conditions. On the other hand, since the dielectric constant of BST thin film is a
function of applied voltage, it's desirable to reduce the applied voltage so higher
dielectric constant of BST film can be utilized for better performance.
In summary, we investigated replacing traditional silicon nitride dielectric
layer with emerging (Ba,Sr)Ti03 (BST) thin film in surface RF MEMS switches.
Materials properties of BST thin film with relation to film composition, electrode and
the deposition conditions are addressed. The high dielectric constant of BST thin film
results in both higher isolation and smaller device size for RF MEMS switches. An
excellent isolation of more than 30dB is obtained in a wide frequency range from
113
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16GHz to 36GHz. Performance of BST-MEMS switches can be further improved
with the development of BST thin film technology in the future.
■o
-25
S21 BST-MEMS [dB]
S21 SiN-MEMS [dB]
-30
0
5
10
15
20
Frequency [GHz]
Figure 6.6: Comparison between BST-MEMS switch and SiN-MEMS switch
for DOWN state isolation performance.
References
1.
2.
3.
4.
Park. J.Y., et al. Fully integrated micromachined capacitive switches fo r RF
applications, in 2000 IEEE MTT-S International Microwave Symposium
Digest. 2000.
Park, J.Y., et al. Electroplated r f MEMS capacitive switches, in Proceedings
IEEE Thirteenth Annual International Conference on Micro Electro
Mechanical Systems. 2000.
Kirchoefer, S.W.. et al.. Barium-strontium-titanate thin film s fo r application
in radio-frequency-microelectromechanical capacitive switches. Applied
Physics Letters. 2002. 80(7): p. 1255-7.
T.R. Taylor. P.P., R. Seidel, J.S. Speck and R.A. York, RF sputtered high
tunability Barium Strontium Titanate (BST) thin film s fo r high frequency
applications. IS IF 2000 Conference, 2000.
114
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Chapter 7
Summary and Future Work
7.1 Surface RF MEMS effort
The motivation for using surface RF MEMS switch for the control of
microwave circuits has been presented. Surface RF MEMS switch has been
extensively investigated to increase fabrication yield, reduce insertion loss, and
improve isolation performance for various application requirements. Surface RF
MEMS switches posses the potential for very low loss, reasonable switching speeds,
and operation with no quiescent current consumption. The successfully fabricated RF
MEMS switches are used to implement low-cost, high-performance SPDT switches,
analog and digital phase shifters, tunable filters. However, in order to commercialize
this new technology there are still many problems that need to be further investigated
in future work.
The main challenge is still the reliability of the surface RF MEMS devices.
Though effective switching control of these MEMS capacitive switches has been
demonstrated in research lab, future work should concern the reliability of the switch
for long-term applications. For high power applications, the power handling
capability of the switch is the major concern. Most surface MEMS switches cannot
115
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handle more than 20-50 mW. Surface MEMS switches that handle 0.2-10 W with
high reliability simply do not exist today. Currently, electrostatic surface MEMS
switches require 20-80 V for reliable operation, and this necessitates a voltage upconverter chip when used in portable telecommunication systems. In addition, higher
pull-down voltage entails other problems, i.e. the charging effect in the dielectric
isolation layer, which will degrade the reliability and lead to operation failure.
Finally, MEMS switches need to be packaged in inert atmospheres (nitrogen,
argon, etc.) and in very low humidity, resulting in hermetic or near-hermetic seals.
Packaging costs are currently high, and the packaging technique itself may adversely
affect the reliability of the MEMS switch. Thus the packaging technique must also be
investigated extensively in the future in order to improve performance and reduce the
total fabrication cost of the switches.
7.2 BST-based phase shifter effort
The emergence of low-loss and reproducible BST thin films will quickly
translate to cost and performance advantages in a number of important commercial
and military high frequency electronics systems. Phase shifters and phased array
antennas are the most important technologies to be impacted in the near term by the
development of BST thin films. Compared to BST parallel-plate capacitor. BST
interdigital capacitor has the advantage of ease in fabrication. Conductive loss from
interdigital metal fingers is much less important than BST material loss, and thus the
116
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total device loss is limited by BST material loss. BST thin film is characterized and
BST interdigital capacitors are used to fabricate low-loss distributed phase shifters,
which have commensurable performance, compared with traditional semiconductorbased phase shifters. Besides phase shifters, inexpensive BST capacitors will also
find application in tunable filters, voltage-controlled oscillators (VCOs), matching
circuits, and possibly frequency conversion (mixer and multiplier) circuits.
Ferroelectric thin films are still a relatively immature area. Future work
includes a better understanding of loss and tunability as a function of growth,
materials composition, microstructure, chemical defects, etc., including ultimate
limitations of the materials with respect to these properties. Temperature-dependent
measurement is another topic need to be carefully addressed in the future for harsh
environment applications. It is believed that the thermal mismatch between a
ferroelectric thin film and the substrate has a pronounced effect of the film dielectric
permittivity. Additionally, dielectric breakdown, and DC or low-frequency leakage
currents, which directly affect power handling and reliability, must also be explored
for high power microwave circuit applications.
117
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Appendix A
Detailed Fabrication Process Steps for
Surface RF MEMS Switch
1. Wafer clean
•
Acetone (ACE) rinse for 3 min
•
Isopropyl alcohol (ISO) rinse for 3 min
•
De-ionized water (DI) rinse for 3 min
•
Dehydration bake for 15 min in 120° C oven
2. CPW lithography
•
Spin on HMDS at 5000rpm for 30 sec
•
Spin on AZ5214 at 5000rpm for 30 sec
•
Soft bake on 95°C hotplate for 1 min
•
Image exposure for 25 sec @ 7.5 mW/cm2 intensity w/o Filter
• Post bake on 105°C hotplate for 1 min
• Flood exposure for 75 sec @ 7.5 mW/cm: intensity w/o filter
• Develop in AZ400K:DI (1:4 by volume) for I min
• DI rinse for I min. blow dry with Ni
•
Check the pattern with microscope and Dektek
3. CPW metallization
•
O: plasma descum (300 mT, I00W, low frequency) for 30 sec
•
Dip in NH4OH: DI ( 1:10) for 30 sec
118
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•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to I LO'6 Torr
•
Ti (100 A at 2 A/sec)
•
Au (5000-7000 A at 10 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N 2
4. Si3N4 lithography
•
O2 plasma descum (300 mT, 10OW, low frequency) for 30 sec
•
PECVD: Deposit 2000-5000 A Si3N4 (the thickness is decided by certain
design requirements)
•
Solvent clean: ACE, ISO, DI
• Dehydration bake for 15 min in 120°C oven
• Spin on HMDS at 4000rpm for 40 sec
• Spin on AZ4330 at 4000rpm for 40 sec
• Soft bake on 95°C hotplate for I min
•
Image exposure for 60 sec @ 7.5 mW/cm" intensity w/o filter
• Develop in AZ400K:DI (1:4 by volume) for lmin
• DI rinse for I min, blow dry with N2
•
Check the pattern with microscope and Dektek
•
O2 plasma descum (300 mT, 100W, low frequency) for 30 sec
•
CF4 plasma etching (300 mT, 100W, low frequency) to pattern the Si3N4 layer
(Etch -1000 A Si3N4 per min)
•
O 2 plasma descum (300 mT, 300W, low frequency) for 10 min to clean
chamber, then turn power back to 10OW
• Check with microscopy and DekTek
119
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5. “Cap” metal lithography
•
Solvent clean: ACE, ISO, DI
•
Dehydration bake for 15 min in 120°C oven
•
Spin on HMDS at SOOOrpm for 30 sec
•
Spin on AZ5214 at 5000rpm for 30 sec
•
Soft bake on 95°C hotplate for I min
•
Image exposure for 25 sec @ 7.5 mW/cm2 intensity w/o filter
• Post bake on 105°C hotplate for I min
• Rood exposure for 75 sec @ 7.5 mW/cm2 intensity w/o filter
•
Develop in AZ400K:DI (1:4 by volume) for lmin
•
DI rinse for I min, blow dry with Ni
•
Check the pattern with microscope and Dektek
6. “Cap” metal metallization
•
Oj plasma descum (300 mT. 100W, low frequency) for 30 sec
•
Dip in NHtOH:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to 1 10'6 Torr
•
Ti (100 A at 2 A/sec)
•
Au (2000 A at 10 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N;
7. PMGI patterning
•
Spin on SF11 at 4000rpm for 30 sec
120
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•
Soft bake on 200°C hotplate for I min, then cool down for 30 sec
•
Spin on SFLI at 4000rpm for 30 sec
•
Soft bake on 200°C hotplate for 1 min, then cool down for 30 sec
•
Spin on SFL I at 4000rpm for 30 sec
•
Soft bake on 200°C hotplate for I min, then cool down for 30 sec
•
Edge bead removal
•
Soft bake on 300°C hotplate for 4 min to planerize the surface
•
Check it from the microscope
• Spin on AZ4330 at 4000rpm for 40 sec
• Soft bake on 95°C hotplate for 1 min
•
Image exposure for 60 sec @ 7.5 mW/cm: intensity w/o Filter
•
Develop in AZ400K:Dl (1:4 by volume) for Imin
•
DI rinse for I min, blow dry with N:
•
Check the pattern with microscope and Dektek
•
DUV exposure
•
DUV exposure for 200sec with chuck rotated
•
Develop in SAL 101 for Imin with hand agitation
•
DUV exposure for 200sec with chuck rotated
•
Develop in SAL 101 for Imin with hand agitation
•
DUV exposure for 200sec with chuck rotated
•
Develop in SAL 101 for Imin with hand agitation
•
Acetone (ACE) rinse for 3 min
•
Reflow on 210°C hotplate for 30 min
8. Span metal lithography
•
Oz plasma descum (300 mT, 10OW, low frequency) for 30 sec
•
Spin on HMDS at SOOOrpm for 40 sec
121
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
•
Spin on AZ4330 at 5000rpm for 40 sec
•
Soft bake on 95°C hotplate for L min
•
Image exposure for 20 sec @ 7.5 mW/cm2 intensity w/o filter
•
Image reversal bake in Ammonia oven
•
Flood exposure for 60 sec @ 7.5 mW/cm2 intensity w/o filter
•
Develop in AZ400K:DI (1:4 by volume) for 4 min
•
DI rinse for 1 min, blow dry with N:
•
Check the pattern with microscope and Dektek
9. Span metal metallization
•
O t plasma descum (300 mT, 100W, low frequency) for 30 sec
•
Dip in NHjOHrDI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to 1 lO"6 Torr
•
Ti (50 A at 1 A/sec)
•
Al (10000 A at 5 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N:
•
Check the pattern with microscope and Dektek
10. PMGI removal
•
Put solvent 1165 on hotplate to heat up to 80°C
•
Dip the sample into solvent 1165 at 80°C for 5 min
•
Clean sample in methanol without exposing in air
•
Remove methanol with critical point drier
122
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Appendix B
Program to Determine Tuning Range and
Capacitance of the BST Interdigital Capacitor
Mathematica program
v
A
A
PEC
V= 0
d
0
-h
Global Constants
Off[OonaKal: :apalll];
$TaxfcStyl* = {Fcntnndly -> "Halvatica", ItntSiza -> 12);
daar[kl, k2, k3, Ito, ■, a , v, a, w, h, d, e x , din, Clinh,
Clini]
123
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60 = 8.854 10'u ;
c l = 3 . 0 108;
an = 10"2;
am = 10"3;
m = 10'6;
Physical Layout
Silicon substrate with a thin BST film:
h = 500 om;
d = 0 .1 om;
w = 2 am;
s = lom ;
a = w+ ■ ;
Calculation
Electrostatic solution
= 50;
« r l := c r [[1 ] ] ;
«r2 := 6 r [[2 ] ] ;
«r3 := e r [ [3] ] ;
«r4 := e r [ [4] ] ;
tto ;= n * 7 r / a ;
k l := Sinh[ A h ] ♦ — Ooah[ ftoh ];
«rl
k2 :=
«r3
Ooah[ Itoh] ♦
mr^
« r l« r 3
Sinh[ Itoh] ;
klOcah[ fid] ♦ k2 Sinh[ ttod] _
k2Coah[ ttod] * klSiuhf ttod] '
k3
2
r ttow
Vfa := ---------------- -------- n— al T| 0 , -------1;
«r4k3 + «r3 neO tt
1
2 J
V := 8 a [V b , {n, 1, 2 tfcmOtanm, 2 }];
Clin :=
;
V
124
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Appendix C
Detailed Fabrication Process Steps for the
BST Interdigital Capacitor
1. Wafer clean
•
Acetone (ACE) rinse for 3 min
•
Isopropyl alcohol (ISO) rinse for 3 min
•
De-ionized water (DI) rinse for 3 min
•
Dehydration bake for 15 min in 120°C oven
2. Interdigital finger patterning
•
Spin on 950 at 3000rpm for 30 sec
•
Soft bake on 90°C hotplate for I min
•
Spin on CEM365 at 3000rpm for 30 sec
•
Exposure for 2.2 sec with focus -2 8 on stepper
•
Post bake on 100°C hotplate for 2 min
•
Develop in 701 for 2min
•
DI rinse for I min. blow dry with N:
•
Check the pattern with microscope and Dektek. This gives 0.9 pm thickness
3. Interdigital finger metallization
•
O: plasma descum (300 mT. 100W. low frequency) for
•
Dip in NRtOHrDI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to I 10'6 Torr
•
30 sec
Ti (100 A at 2 A/sec)
125
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•
Au (5000-7000 A at 10 A/sec)
•
Ti (100 A at 2 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N t
4. BST Etch
•
O: plasma descum (300 mT. IOOW, low frequency) for 30 sec
•
Spin on HMDS at 5000rpm for 30 sec
•
Spin on AZ4210 at 5000rpm for 30 sec
•
Soft bake on 95°C hotplate for 1 min
•
Image exposure for 0.64 sec with focus -4 0 on stepper
•
Develop in AZ400K:DI (1:4 by volume) for Imin
•
DI rinse for I min. blow dry with N:
•
Check the pattern with microscope and Dektek
•
O 2 plasma descum (300 mT, 100W, low frequency) for 30 sec. make sure no
photoresist residues left on wafer
•
Etch in BHF:DI (1 :10),-500 A/min
•
DI rinse for I min, blow dry with N 2
•
Acetone (ACE) rinse for 3 min
•
Isopropyl alcohol (ISO) rinse for 3 min
•
De-ionized water (DI) rinse for 3 min
•
Dehydration bake for 15 min in 120°C oven
•
O 2 plasma descum (300 mT, 100W, low frequency) for 30 sec
•
Check the pattern with microscope and Dektek
5. CPW lithography
126
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
•
Solvent clean: ACE, ISO, DI
•
Dehydration bake for 15 min in 120°C oven
•
Spin on AZ4210 at 5000rpm for 30 sec
•
Soft bake on 95°C hotplate for I min
•
Image exposure for 0.64 sec with focus —40 on stepper
•
Rinse in Toluene for 7 min
•
Blow dry with N t , (Do not use DI water)
•
Develop in AZ400K:DI (1:4 by volume) for Imin
•
Develop in AZ400K.DI (1:4 by volume) for Imin
•
DI rinse for I min, blow dry with N t
•
Check the pattern with microscope and Dektek
6. CPW metallization
•
O: plasma descum (300 mT. 100W, low frequency) for 30 sec
•
Dip in NHjOITDI (1:10) for 30 sec
• Load immediately in E-beam evaporator
•
•
Evaporate the following metals after pumping down to I 10'6 Torr
•
Ti (100 A at 2 A/sec)
•
Au (15000 A at 10 A/sec)
Liftoff the undesired metal by removing photoresist in ACE
• ISO and DI rinse
• Blow dry using Ni
127
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