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High-performance gateless III-nitride microwave switches

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High-Performance Gateless III-Nitride Microwave Switches
By
Jingbo Wang
Bachelor of Science, 2005
Nanjing University of Posts and Telecommunications
Nanjing, Jiangsu, China
Submitted in Partial Fulfillment of the Requirements
for the Degree of Doctor of Philosophy in
Electrical Engineering
College of Engineering and Computing
University of South Carolina
2010
Accepted by:
Grigory Simin, Advisor
Goutam Koley, Committee Member
Mohammod Ali, Committee Member
Xiaodong Li, Committee Member
James Buggy, Interim Dean of the Graduate School
UMI Number: 3402859
All rights reserved
INFORMATION TO ALL USERS
The quality of this reproduction is dependent upon the quality of the copy submitted.
In the unlikely event that the author did not send a complete manuscript
and there are missing pages, these will be noted. Also, if material had to be removed,
a note will indicate the deletion.
UMI 3402859
Copyright 2010 by ProQuest LLC.
All rights reserved. This edition of the work is protected against
unauthorized copying under Title 17, United States Code.
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c Copyright by Jingbo Wang, 2010
All Rights Reserved.
ii
Dedication
For Love and Truth.
iii
Acknowledgments
Had there been enough space allowed, I would love to list all the people I have
encountered so far in my life: friends, adversaries, and strangers, for each of you
have helped to shaped my path, and guided me to whom I am today. But among
all the names, faces, and voices, the one that I would love to thank most is my
advisor Dr. Grigory Simin. I became under his guidance four and half years ago
with zero knowledge of the world, as well as of myself, and come out today to be a
self-confidant individual, carrying not only a humble portion of his vast knowledge
and experiences, but also his optimism and methodology in getting through obstacles,
both in research and in life. Therefore I am greatly in debt to him for his selfless
and endless care in this four and half years, and will carry his invaluable influence on
me throughout my life. I would also thank my colleagues and fellow Ph.D. students
Ajay, Bilal, and Faisal for their numerous help and valuable discussions in research.
Ajay has been providing perfect device samples that truly turns my designs on paper
in to a real-life satisfaction, while Bilal and Faisal’s continuous support on simulation
and measurements has greatly shortened my research period, and their kindness has
let me find out my mistakes many times. I will miss those heated discussions as
we struggled to meet our common research goals. Special thanks are given to Dr.
Deng and Dr. Hu at Sensor Electronic Technology (SET), for their flawless works
on RF measurements and device fabrication. In fact I would like to thank SET in
whole, for your superior wafer and device quality has given a great advantage for my
design to stay competitive in the more and more crowded GaN world. Finally, the
most valuable appreciation should give to my parents and my lovely friends, for it is
iv
you who filled my life with laughters and joys, letting me understand how close one
person’s life is tied to the others.
v
Abstract
Radio-frequency (RF) switches using Field-Effect Transistors (FETs) have low
loss, fast switching speed, and simple fabrication process, which allows for simple integration with other components such as power amplifiers, phase shifters arrays, etc.
Recent advancements in III-nitride heterostructure field-effect transistors (HFET)
have led to RF switches with outstandingly low loss and high power handling capability, ideal for numerous applications. However, relatively high ohmic contact resistivity, large OFF-state capacitance, and difficulty in gate alignment limit HFET’s
application for RF switching to frequencies not exceeding 6 GHz. In this dissertation,
a new type of gateless microwave switch using capacitively-coupled contact (C3 ) is
presented, which operates under very different mechanism than conventional ohmic
HFET, and has lower loss, smaller OFF-state capacitance, and better high power
capability at frequencies exceeding 10 GHz, as well as the privilege of self-aligned
fabrication process. To fully demonstrate the capability of this new device type, a
novel design of MMIC traveling-wave switch using proposed gateless device is presented, with sub 1 dB insertion loss and above 40 dB isolation measured on-wafer
at 12 - 20 GHz, as well as more than +40 dBm power handling capability. To the
author’s best knowledge, it is up-to-date the best performance of III-N switch ever
reported. A conceptual design for even higher frequency range is also presented,
which functions at 30 - 70 GHz with same performance based on realistic numerical
simulation.
vi
Contents
Dedication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iii
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iv
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ix
Chapter 1. Introduction to III-Nitride Microwave Switches . . .
1
1.1. Microwave Switches and Applications . . . . . . . . . . . . . . . . .
2
1.2. III-Nitride Heterojunction Field Effect Transistor . . . . . . . . . . .
4
Chapter 2. Capacitively-Coupled Contact . . . . . . . . . . . . . . .
7
2.1. Ohmic Contact on AlGaN . . . . . . . . . . . . . . . . . . . . . . . .
8
2.2. Capacitively Coupled Contact . . . . . . . . . . . . . . . . . . . . . .
9
2.3. C3 -MOSHFET and D-MOSH . . . . . . . . . . . . . . . . . . . . . .
13
Chapter 3. Gateless Microwave Switch . . . . . . . . . . . . . . . . .
15
3.1. Issues of Gate in Conventional HFET . . . . . . . . . . . . . . . . .
16
3.2. Gateless Switch with Side Control . . . . . . . . . . . . . . . . . . .
16
3.3. Small-Signal Model and OFF-Capacitance Extraction
. . . . . . . .
18
3.4. Large-signal Analysis and Switching Speed . . . . . . . . . . . . . . .
22
3.5. Experimental Results and Discussion . . . . . . . . . . . . . . . . . .
25
3.6. Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
Chapter 4. High-Frequency Switching Using Gateless Devices .
32
4.1. Introduction to High-Frequency Switching . . . . . . . . . . . . . . .
33
4.2. III-N Traveling-Wave Switch Design Using Gateless Devices . . . . .
36
4.3. Series Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
39
vii
4.4. Shunt Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
4.5. Quarter-Wave Transformer . . . . . . . . . . . . . . . . . . . . . . .
41
4.6. Layout Arrangement . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
4.7. EM Simulation and Layout Tuning . . . . . . . . . . . . . . . . . . .
44
4.8. Experimental Results and Discussion . . . . . . . . . . . . . . . . . .
51
4.9. Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
56
Chapter 5. Conclusion and Future Work . . . . . . . . . . . . . . .
57
5.1. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
5.2. Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
Appendices:
Appendix A. Current Crowding in Multi-Finger Devices . . . . .
61
A.1. Introduction to Current Crowding . . . . . . . . . . . . . . . . . . .
62
A.2. Current Crowding in Multi-Finger Layout . . . . . . . . . . . . . . .
63
A.3. Experimental Validation . . . . . . . . . . . . . . . . . . . . . . . .
68
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
71
viii
List of Figures
Figure 1.1
Block diagram of a 3G front-end module showing use of microwave
switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Figure 1.2
AlGaN/GaN HFET and MOS-HFET . . . . . . . . . . . . . .
6
Figure 2.1
TEM image of ohmic contact on AlGaN/GaN before and after
annealing [10] . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2.2
Schematic diagram of a pair of ohmic contacts and capacitively
coupled contacts . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2.3
10
Impedance of capacitively coupled contact of ohmic contact over
frequency range . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2.4
9
12
2D numerical transient simulation of a pair of capacitively
coupled contacts, which shows channel modulation under largesignal bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Figure 2.5
Schematic diagram C3 -MOSHFET and D-MOSH . . . . . . .
14
Figure 3.1
Schematic diagram of gateless swtiches with side-control . . .
17
Figure 3.2
CCD image of a gateless series switch with 2×300µm multi-finger
design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3.3
17
A typical gateless shunt switch design with series control resistor
merged with mesa . . . . . . . . . . . . . . . . . . . . . . . .
19
Figure 3.4
Small-signal model of conventional HFET and C3 gateless switch 19
Figure 3.5
Extracting OFF-capacitances from isolation measurements on
switches with varied peripherie . . . . . . . . . . . . . . . . .
ix
21
Figure 3.6
2D numerical transient simulation of a C3 pair depleted by ohmic
control electrodes placed outside . . . . . . . . . . . . . . . .
Figure 3.7
Large-signal lumped-element model of C3 , with added fringing
capacitors on both edges . . . . . . . . . . . . . . . . . . . . .
Figure 3.8
24
Design layout of two test switches with identical geometries:
ohmic MOS-HFET and C3 gateless switch . . . . . . . . . . .
Figure 3.10
23
Transient simulation of ohmic MOS-HEFT and C3 gateless switch
using Agilent ADS . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3.9
22
26
Insertion loss comparison of test switches, both measured and
simulated . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
Figure 3.11
Isolation comparison of test switches . . . . . . . . . . . . . .
27
Figure 3.12
High power measurements on test devices . . . . . . . . . . .
27
Figure 3.13
Insertion loss of 2 × 300 µm gateless switch and analytical model
with and without current crowding effect . . . . . . . . . . . .
Figure 3.14
29
Isolation comparison of 2 × 300 µm C3 gateless switch and DMOSH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
29
Figure 4.1
Schematics of single series switch and series-shunt switch . . .
33
Figure 4.2
Small-signal comparison between single series switch and seriesshunt switch . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.3
33
Optimized design of series-shunt switch at specific frequencies
with fixed isolation . . . . . . . . . . . . . . . . . . . . . . . .
34
Figure 4.4
Schematics of traveling-wave switch concept . . . . . . . . . .
35
Figure 4.5
ADS model of a L-C network of 10 cells simulating traveling-wave
switch in ON-state . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.6
37
Insertion loss of the L-C transmission line model with varied
number of cells (N ) and electrical length (θ) . . . . . . . . . .
x
38
Figure 4.7
Illustration of SPDT switches using shunt switches, with and
without quarter-wave transformers . . . . . . . . . . . . . . .
Figure 4.8
Layout arrangement of proposed traveling-wave switch (only one
cell is shown) . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.9
42
43
ADS Momentum model of traveling-wave switch for 20 GHz
operation (one cell), and current distribution in ON- and OFFstate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
45
Figure 4.10
Insertion loss and isolation for one cell . . . . . . . . . . . . .
46
Figure 4.11
Schematic simulation with 5 cell components . . . . . . . . . .
47
Figure 4.12
Insertion loss comparison of Momentum simulation . . . . . .
47
Figure 4.13
Isolation comparison of Momentum simulation . . . . . . . . .
48
Figure 4.14
Momentum model of 40 GHz traveling-wave switch with input
and output ports . . . . . . . . . . . . . . . . . . . . . . . . .
49
Figure 4.15
Insertion loss of 40 GHz traveling-wave switch simulation . .
49
Figure 4.16
Isolation of 40 GHz traveling-wave switch simulation . . . . .
50
Figure 4.17
Current distribution result of 40 GHz traveling-wave switch
simulation at different signal phase . . . . . . . . . . . . . . .
Figure 4.18
Layout of two 20 GHz traveling-wave switches: half-wave and
quarter-wave . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.19
50
52
Measured insertion loss (amplitude and phase) of two 20 GHz
traveling-wave switch designs . . . . . . . . . . . . . . . . . .
53
Figure 4.20
Measured isolation of two 20 GHz traveling-wave switch designs 53
Figure 4.21
Measured return loss of two 20 GHz traveling-wave switch designs 54
Figure 4.22
Fundamental and second harmonic output power of quarter-wave
traveling-wave switch measured at 2 GHz . . . . . . . . . . .
xi
55
Figure 5.1
ADS simulation of a 20 GHz SPDT traveling wave design with a
two-way splitter and matched passive quarter-wave transformer 59
Figure 5.2
Small-signal performance of the 20 GHz SPDT traveling wave
design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
Figure 1.1
Parallel layout . . . . . . . . . . . . . . . . . . . . . . . . . .
63
Figure 1.2
Multi-finger layout . . . . . . . . . . . . . . . . . . . . . . . .
64
Figure 1.3
Semi-series layout small-signal model diagram and parameters
65
Figure 1.4
Integration path for total voltage calculation . . . . . . . . . .
67
Figure 1.5
Significance of current crowding in multi-finger layout as the
function of finger length . . . . . . . . . . . . . . . . . . . . .
69
Figure 1.6
Two-finger test structure with varied length . . . . . . . . . .
69
Figure 1.7
Comparison between measured and modeled results . . . . . .
70
xii
Chapter 1
Introduction to III-Nitride Microwave Switches
1
1.1. Microwave Switches and Applications
Microwave switches are passive components controlled electrically to pass, block,
and/or redirect electrical signals oscillating at microwave frequencies, which is defined
from 300 M Hz to 300 GHz, with most of the applications within 1 - 100 GHz range.
a microwave switch’s performance is generally evaluated by the following aspects:
the first aspect is how well the switch can transfer power, which is determined by
the amount of power lost on the switch when the switch is passing microwave signals
through, called insertion loss. Insertion loss expressed in dB is the ratio of output
power delivered to the load at the switch’s output port and input power generated
by the signal source, which is expressed as:
IL(dB) = Pout (dBm) − Pin (dBm)
(1)
When assuming matched condition, s-parameter between input and output port of
the switch (S21 ) in ON-state is the switch’s insertion loss; the second aspect is how
well the switch can block power, called isolation, which is measured in the same way
as insertion loss, but when the switch is in OFF-state; the third aspect is the maximum power the switch can transfer, which typically defined as the point of input
power where insertion loss starts to drop by 0.1 dB or 1 dB, due to degradation of
the switch at extremely high power, and is called 0.1 dB or 1 dB power compression
point. There are many additional aspects that are less critical and fundamental than
the previous three, but also important in practical application, such as return loss,
noise, and linearity. Return loss is the amount of signal reflected to the source while
the switch is in ON-state (S11 ). Return loss indicates how well the switch is matched
to the source since in perfectly matched condition, return loss should be zero (negative infinite in dB scale). Noise and linearity belong to large-signal performance of
the switch. Both address the amount of degradation the switch causes signals that
pass through it. Yet noise is random and distributed across very wide spectrum, while
non-linearity brings harmonics to the signal and introduces inter-band crosstalk when
2
signals with more than one frequency are transmitted together.[28]
High power microwave switching elements are key components for radar transceiver
modules, multi-band wireless and aerospace communications (Figure 1.1), and phase
shifters for beam steering in phased array antenna technology [9], and other reconfigurable passive microwave elements [42][6]. The state-of-art microwave switches of
such application are typically less than few mm2 in device area, with less than 1 dB
insertion-loss in ON-state and more than 25 dB isolation in OFF-state. Frequency
range varies from several GHz to over 100 GHz, depending on application, while
power handling capability can be as low as in milliwatts or as high as tens of watts
per each discrete device. In the past, high power microwave switches were made of silicon p-i-n diodes, which have large size, and require large bias current and long switch
settling time for high power operation.[4][15] The micro-electrical-mechanical system
(MEMS) technology developed in the past decade has drawn much attention for its
potential of delivering low loss and high isolation radio-frequency (RF)/microwave
switching with compact size.[27][18] However, researchers are still struggling to improve large-signal performance and reliability of MEMS based switches to meet the
practical application need. On the other hand, solid-state field-effect transistor (FET)
based switches offer compact size with reliable performance. GaAs FET based microwave switches is widely and commercially available, yet suffers with relatively low
power capability due to nature of the material.[24][43]
In 2002, R. Caverly and his colleague at Villanova University first explored possibility of using AlGaN/GaN heterjunction FET (HFET) as high power microwave
switch.[8] Soon afterwards, AlGaN/GaN HFET and later metal-oxide-semiconductor
HFET (MOS-HFET) have demonstrated outstanding capability of high power, high
frequency microwave switching.[14][20] Although less matured as compared to power
amplifiers, III-nitride microwave switches have tremendous advantages over most
other RF switch types, not only because of the material’s high breakdown voltage
and decent heat conductivity, but also the high density two-dimensional electron gas
3
Figure 1.1. Block diagram of a 3G front-end module showing use of
microwave switches
(2DEG) channel whose resistivity is comparable to that of metals.[1] Past efforts in
III-Nitride materials and devices were mainly focused on power amplifiers; however
many technology improvements resulting in lower channel and contact resistance,
surface breakdown elimination etc. lead to high performance III-N switches with the
best combination of low insertion loss, high isolation, high switching powers and speed
among most of other switch types.
1.2. III-Nitride Heterojunction Field Effect Transistor
Since its invention almost two decades ago [17], III-Nitride Heterojuction Field Effect Transistor (HFET), also known as High Electron Mobility Transistor (HEMT),
has generated a great amount of interest among researchers, as well as several big
players in semiconductor industry and numerous start-ups and spin-offs. Compared
with more widely used Si and III-As transistors, III-N HFET has high saturation
current, low channel resistance, high breakdown voltage, good thermal stability and
4
thermal conductivity. And after 20 years of continuous development, its technology
is approaching maturity, and commercialized products for civilian markets have been
announced in recent years.
III-N HFET typically consists of a thick layer (about 2 µm) of GaN crystal grown
on sapphire or SiC substrates, and a thin layer (about 10 - 20 nm) of AlGaN crystal
deposited on top of it. Typical composition of Al in the AlGaN layer is between 15
- 30 nm in order to obtain enough polarization potential at the heterojunction, and
thus enough polarization charges to form 2DEG channel, while maintaining the material’s quality.[1] Polarization in AlGaN/GaN heterojunction can be divided into two
kinds: spontaneous polarization and piezoelectric polarization. Spontaneous polarization is generally found in materials with wurtzite crystal structure. The electrical
force between Ga atomic monolayer and N atomic monolayer in GaN creates spontaneous polarization pointing from Ga-face to N-face. Piezoelectric polarization only
occurs in heterojunction, where difference in lattice constants between AlGaN and
GaN creates mechanical strain to the latterly-grown top AlGaN layer, in which atoms
are forced to shift off from their electrically neutral positions, and therefore creates
piezoelectric polarization. When engineered correctly, in terms of growth condition,
layer thickness and Al density, both kinds of polarization combined can be strong
enough to attract large amount of free electrons at its positive side at the heterojunction interface, and create so-called 2DEG channel. The 2DEG is electrically coupled
by positive charges trapped at the top surface of AlGaN, where the polarization is at
its negative end. The trapped surface charges are much less mobile than 2DEG, and
therefore do not affect the design to operate as a transistor.
Figure 1.2 shows a Heterojunction Field Effect Transistor (HFET) and a MetalOxide-Semiconductor HFET (MOS-HFET). Both devices have ohmic contacts (source
and drain) connecting the 2DEG channel to create a signal path. When used as microwave switches, the devices’ insertion loss is then channel resistance pluses two
contact resistances. A thin metal gate is placed in the middle of the path. For power
5
Ohmic
Schottky
contact
Ohmic
Gate
2DEG channel
HFET
Negative
DC Bias
ON
Dielectric layer
added to reduce
gate leakage
Ohmic
MOS-HFET
Gate
2DEG channel
Ohmic
ON
Channel
Depleted
OFF
Negative
DC Bias
Channel
Depleted
OFF
Figure 1.2. AlGaN/GaN HFET and MOS-HFET
applications, the gate is placed closer to source than to drain, while for microwave
switching, more than one gate can be used [33] yet the geometry should be kept
symmetrical. When negative bias is applied to the gate, it’s electric potential pushes
free electrons in the 2DEG channel beneath the gate away. When the negative bias
is high enough, channel beneath the gate can be completely depleted, and the signal
path from one ohmic to the other is then cut. Such voltage is called threshold voltage
or pinch-off voltage, and is typically 4 - 6 V .
6
Chapter 2
Capacitively-Coupled Contact
7
2.1. Ohmic Contact on AlGaN
Unlike heavy doping in Si, ohmic contact on AlGaN is formed by quickly annealing
a stack of specific metal layers at very high temperature, usually at 800 to 900 C for
less than a minute.[3] The reason doping does not work on AlGaN is mostly due
to the material’s tough chemical nature and its very wide bandgap. The key player
in rapid thermal annealing (RTA) process to form ohmic contact on AlGaN is the
bottom Ti layer in the metal stack before annealing. Based on several studies on
ohmic contact, at high temperatures Ti penetrates and reacts with AlGaN to form
conducting TiN clusters and creates N vacancies inside AlGaN, which in addition act
like n-type dopant to increase the affected region’s conductivity. The penetration can
be several tens of nanometers, enough to reach the heterojunction interface, where the
2DEG channel is. One theory suggests that it is the spikes of TiN penetrating through
heterojunction that connect directly [41][10] to the 2DEG channel loosely preserved in
the contact region (Figure 2.1). Therefore the annealing condition should be carefully
controlled in order to achieve optimum conductivity, for too low temperature or too
short annealing time will not create enough penetration, while too high temperature
or too long annealing time will flood the heterojunction region with alien materials
and destroy 2DEG channel.[29]
Despite a decade of effort to improve quality of ohmic contact on AlGaN, the
contact’s conductivity is still several times higher than those on Si and GaAs. A
typical Ti/Al/Mo/Au ohmic contact have around 0.5 Ω×mm contact resistance, while
most of the GaAs ohmic contacts have less than 0.1 Ω × mm. Several recent efforts
have been reported to push contact resistance below 0.3 Ω × mm by exploring on new
contact materials and additional surface treatments, but have yet been mature enough
to be widely adopted.[40][21] Large contact resistance adds more loss in the switch’s
operation. If assuming a typical AlGaN/GaN HFET/MOS-HFET configuration, with
0.5 Ω × mm contact resistance, 300 Ω/sqr channel sheet resistance, and 5 µm sourceto-drain spacing, ON-state loss (insertion loss) due to contact resistance then accounts
8
Anneal
Figure 2.1. TEM image of ohmic contact on AlGaN/GaN before and
after annealing [10]
for 40% of the total loss, calculated based on equation Ron = 2Rc + Rsh × Lds .
High temperature annealing process also posts limits to fabrication steps and
device design. Ohmic contact requires a separate mask, and can only be put in the
beginning of fabrication, due to its high temperature requirement. Notable surface
roughening and area expanding as the result of high temperature annealing degrades
the device’s morphological quality, and will see increased RF resistivity and decreased
critical breakdown voltage. It also makes it difficult to build metal line bridge over
rough ohmic contact.
2.2. Capacitively Coupled Contact
Unlike power amplifiers, microwave switches do not require DC current flowing
between the input and output ports. This enables more flexibility in switch design.
Instead of using ohmic contact to inject microwave signal directly into HFET’s active
region, it can be achieved using capacitive coupling between metal electrode and the
9
Ohmic contacts
Current flow
(DC and/or AC)
2DEG channel
C3 contacts
Dielectric layer
Current flow
(AC only)
2DEG channel
Figure 2.2. Schematic diagram of a pair of ohmic contacts and capacitively coupled contacts
channel beneath, which then eliminates the need of ohmic contacts.[34] Comparison
between ohmic and capacitively coupled contacts (C3 ) are shown in Figure 2.2. A
thin dielectric layer (5 - 10 nm) is formed on top of AlGaN before C3 deposition, in
order to passivate AlGaN surface and reduce potential leakage current when C3 is
under heavy bias voltage. No annealing is needed to form C3 , which makes it easy to
be integrated into standard metal deposition mask and incorporated into self-aligned
process of very fine device designs. No multilayer metal stack is needed as well, compared to ohmic contact, and the choice of material is solely based metal conductivity,
for which Au is the obvious candidate.
Under small-signal assumption, sheet resistance of 2DEG channel of the capacitively coupled region remains constant since the signal it carries is too small to
modulate the channel. Therefore, small-signal model of C3 can be thought as a periodic ladder of shunt capacitors and series resistors, which in respect represents the
coupling effect and channel resistance occur in C3 . The impedance of such model
10
can be further thought as an open-ended transmission line, and accurately expressed
using lossy transmission line model at a specific RF frequency ω, as presented in
(2).[28]
ZC 3 = Z0 coth (γLC 3 )
(2)
p
Rch /(jωCC 3 )
(3)
where,
Z0 =
γ=
p
jωRch CC 3
(4)
In the equations above, LC 3 is contact length, CC 3 is coupling capacitance per contact
length, and Rch is channel resistance per contact length. If channel width W is known,
CC 3 and Rch can be calculated from:
d1 d2
+ )
1
2
(5)
Rsh
W
(6)
CC 3 = W 0 (
Rch =
in which d1 and 1 are thickness and dielectric permittivity of AlGaN layer, while
d2 and 2 are those of dielectric layer deposited on top of it. Rsh is sheet resistance
of 2DEG channel, which remains constant under small-signal assumption. When the
physical length of C3 is sufficiently smaller than its characteristic length 1/γ, then
equation (2) can be approximated as a series resistor with one-third of total channel
resistance of the C3, and a series capacitor with capacitance equals to a parallel
capacitor of same size as the C3 , as expressed in (7).
1
1
ZC 3 ≈ Rch LC 3 +
3
jωCC 3 LC 3
(7)
If assuming 20 nm of AlGaN layer and 10 nm of SiO2 layer, and the channel sheet
resistance to be 300 Ω/sqr, calculation in Figure 2.3 shows that the absolute value
of total impedance |ZC 3 | of a 3.5 µm long C3 drops below that of a 0.5 Ω × mm
ohmic contact at frequencies above 45 GHz. Yet since only the real part of the
11
Typical Ohmic vs. 3.5 um C 3
2
10
Ohmic
|ZC3|
contact resistance, Ohm-mm
Re(ZC3)
1
10
0
10
X: 1e+010
Y: 0.3489
-1
10
9
10
10
10
frequency, GHz
11
10
Figure 2.3. Impedance of capacitively coupled contact of ohmic contact over frequency range
impedance Re(ZC 3 ) causes loss, while the imaginary part can always be matched
through external methods, the real contact resistance of such C3 is only 0.35 Ω × mm,
30% lower than that of a typical ohmic contact. It is to be noticed that based on
(2), there is an optimal contact length LC 3 corresponding to the minimum |ZC 3 | at
certain frequency. Though Re(ZC 3 ) is linearly proportion to contact length LC 3 , when
contact length gets too low, it then requires very large inductance to compensate the
tiny capacitance and match the device, which sometimes can be impractical. So the
proper choice of C3 ’s length is a trade-off between better capacitive coupling and
larger resistance caused by longer channel.
Large-signal 2D numerical simulation using Synopsys Sentaurus [13] reveals
electron transportation in 2DEG channel between a pair of C3 s under 5 V , 1 GHz
sinusoid wave bias. Polarization charges that lead to 2DEG channel are addressed
as fixed positive dielectric charges at heterojunction interface and donor-like trap
centers at top surface. Free electrons are inserted to the interface and top surface,
to be either confined in the quantum well or got trapped, in order to mimic the real
process of how 2DEG is formed.[12] Figure 2.4 shows electron concentration of one
12
Figure 2.4. 2D numerical transient simulation of a pair of capacitively coupled contacts, which shows channel modulation under largesignal bias
bias period at different phase. The floating 2DEG channel is modulated according to
bias, and through the oscillating movement of free electrons in the channel, the RF
signal is passed from one contact to the other.
2.3. C3 -MOSHFET and D-MOSH
C3 was initially proposed as a simple substitution to more complicated ohmic
contact technology. And the first device reported using it was solely based on this
purpose. C3 -MOSHFET is a C3 version of MOSHFET, and was shown to have advantage in power performance even at relatively low frequencies (Figure 2.5).[35][19][33]
Yet, the most unique attribution of C3 comparing to ohmic is not its low impedance at
high frequencies, but the fact that its impedance is bias dependent. Taking Figure 2.4
13
Negative bias
Gate
C3
C3
C3-MOSHFET
Depletion
Negative bias
C3
No gate
C3
D-MOSH
Depletion
Figure 2.5. Schematic diagram C3 -MOSHFET and D-MOSH
for example, the simulation clearly shows that charge density in 2DEG channel can be
influenced by bias. Now imagine a very large DC bias applied across two C3 s, so that
all the electrons under the negatively biased C3 are driven out of the contact region.
In such case, one of the two C3 s is fully depleted, capacitive coupling is lost, and the
contact’s impedance gets extremely high. Simple C3 pair as shown in Figure 2.2 then
has the ability to pass or block RF signals based on DC bias applied across it, and becomes a RF/microwave switch. Such device was called dual MOSH capacitor switch
(D-MOSH) in [34], due to its nature of two back-to-back metal-oxide-semiconductor
heterojunction capacitors. Yet the drawbacks of such device are not only limited to
awkwardness of having only two signal ports and missing a separate control port, but
also the relatively low isolation due to the inefficient method of depleting only one C3
instead of both. This issue will be visited and fully explored in Chapter 3.
14
Chapter 3
Gateless Microwave Switch
15
3.1. Issues of Gate in Conventional HFET
As shown in Chapter 1, a thin metal gate line is placed in the center of channel
between two ohmic contacts in a conventional HFET microwave switch, in order to
turn the channel on and off. To reduce insertion loss, device’s periphery needs to be
expanded dramatically, by employing multi-finger layout with channel length as short
as a couple of micrometers (very narrow drain-to-source gap). Such design forces gate
to be zig-zagging through narrow gap between two sets of ohmic fingers, which makes
alignment in gate processing technologically challenging. As mentioned in Chapter 2,
replacing ohmic fingers with C3 ones can solve difficulty in gate alignment, since both
C3 and gate can be processed with one mask and self-aligned. Yet having a metal
gate between two fingers takes up extra channel space (additional channel resistance)
and posts risks for premature gate breakdown when switching high power signals.[48]
It is also mentioned in Chapter 2 that C3 itself can be used as switching element
since its impedance is bias dependent: the impedance of C3 is only low when its
potential with respect to channel is sufficiently above pinch-off (threshold) voltage,
which is typically between -6 and -4 V . When DC bias is below pinch-off voltage, the
channel under C3 is fully depleted and the contact’s impedance becomes very high.
This feature allows for efficient control of RF signal transmitted through C3 device
by changing C3 ’s DC potential without the need of gate between source and train.
3.2. Gateless Switch with Side Control
D-MOSH is the first proposed device taking advantage of C3 ’s unique bias dependent impedance.[34] To turn D-MOSH off, DC bias is applied between two RF
electrodes, and therefore one C3 is turned into depletion mode while the other into
accumulation mode. However, only depleting one of the two C3 s makes it inefficient
in terms of isolation in OFF-state. Besides, lacking a separate control port appears to
be unpopular for circuit level designers since external circuits are required to isolate
DC control from RF path.
16
DC0
DC0
Port 1
Port 2
ON
Al0.25Ga0.75N
Control
SiO2
L
DC0
Port 1
Port 2
SiO 2
Al0.25Ga0.75N
GaN
GaN
DC+
DC-
Port 1
Port 2
DC+
SiO 2
Control
OFF
DC0
Al0.25Ga0.75N
DC-
DC-
Port 1
Port 2
SiO2
Al0.25Ga0.75N
GaN
GaN
(a) 2-terminal
(b) 3-terminal
Figure 3.1. Schematic diagram of gateless swtiches with side-control
Figure 3.2. CCD image of a gateless series switch with 2 × 300µm
multi-finger design
Such difficulty is solved by adding a third electrode, made of ohmic contact, to
the side of D-MOSH to provide DC bias (Figure 3.1). For illustrative purpose, only
a pair of C3 fingers and one ohmic control electrode are shown in Figure 3.1 while
multi-finger designs with control electrodes on both sides are more advantageous
(Figure 3.2). Given that RF ports are normally DC grounded in many applications,
especially when the switch is connected to an amplifier, when positive DC bias is
17
applied to the control electrode, it creates negative potential difference between C3 s
and the channel, and therefore both C3 are depleted in such way. Since the ohmic
control electrode is placed outside RF signal path (active region), it does not affect
insertion loss and isolation as a gate in conventional HFET does. Even under large
bias, potential in switch’s active region (between C3 fingers) remains flat, which significantly alleviates the risk of breakdown when the switch is biased in OFF-state and
signal drop across the switch is also high. Since distance between control electrode
and switch’s active region is not critical to device’s performance, the ohmic control
electrode does not have to be placed very close to the nearby C3 , and therefore does
not require accurate alignment. High value resistor (a few kΩ) is integrated in series
to the control line (see Figure 3.2), as it does in conventional HFET, to block RF
signal from leaking into control line. Therefore the quality of control contact does not
affect the device’s RF performance as well (poor ohmic contact also works perfectly).
Figure 3.3 shows an alternative multi-finger gateless switch in shunt configuration,
with narrow line series control resistor merged with device’s active region (mesa).
The rectangular mesa is tapered on both sides before connecting with series resistor
to ensure smooth current flow when DC bias occurs.
3.3. Small-Signal Model and OFF-Capacitance Extraction
Figure 3.4 compares small-signal model of gateless switch with that of conventional
HFET. C3 ’s frequency-dependent impedance, shown as a block, is calculated using
equation (2) in Chapter 2. In OFF-state, channel resistance is small compared to the
impedance caused by small parasitic capacitances, and therefore in OFF-state both
conventional HFET and C3 gateless switch appears to be nearly purely capacitive.
There are 3 types of OFF-capacitance involved to determine the switch’s isolation.
The first type is so-called ”fringing” capacitance due to RF coupling between the
edge of electrodes (gate in case of conventional HFET and C3 in case of gateless
18
Ground plane
Mesa
C3 multi-fingers
Control line
Ohmic contact
Series resistor
Signal path
Figure 3.3. A typical gateless shunt switch design with series control
resistor merged with mesa
Gate
Ohmic
C3
Ohmic
C3
ZC3
2DEG
2DEG
C3 gateless ON
Ohmic ON
Gate
Ohmic
C3
Ohmic
2DEG
ZC3
C3
2DEG
2DEG
C3 gateless OFF
Ohmic OFF
Figure 3.4. Small-signal model of conventional HFET and C3 gateless
switch
switch) and corresponding edge of the channel at depletion boarder. Since the distance between two edges is only a few tens of nanometers, this type of capacitance
19
is the largest among three. The second type I call it coplanar parasitic capacitance,
since it is due to RF coupling between conducting objects of the same plane, such
as between gate and ohmic contacts in case of conventional HFET, and between a
pair of C3 fingers in case of gateless switch. A very special case of coplanar parasitic
capacitance is the coupling between channel at two sides of the depletion boarders,
once ignored in the past, but has been discovered to be fairly important recently.[33]
Both fringing and coplanar capacitances are periphery dependent, which means that
their values are proportional to the switch’s total channel width W . The third type of
OFF-capacitance is not shown in Figure 3.4, because it is not related to the switch’s
active region, and is not periphery dependent. I call this type the pad capacitance,
which includes all the coupling effects of external contact pads and lines.
All three types of capacitances add together to address the switch’s isolation,
and cannot be separated with single measurement. But in designer’s perspective,
it is important to know how much each type of capacitances is affecting isolation,
since potential methods of reducing OFF-capacitance varies from type to type. For
instance, increasing AlGaN barrier height can reduce fringing capacitances, but on
the other hand degrades C3 ’s capacitive coupling. Under large DC bias fringing
capacitance tends to decrease, possibly due to small surface charge injection at electrode’s edge when electrical field is high, that pushes channel depletion further away
from electrode’s edge. Increasing spacing between electrodes can significantly reduce
coplanar parasitic capacitances, but this usually means additional channel length and
therefore more insertion loss. Influence from pad capacitance decreases as switch’s
periphery increase, but needs to be found out accurately in order to de-embedding
test designs with relatively small peripheries.
Total OFF-capacitance of a switch (COF F ) can be accurately extracted by fitting
it’s isolation (ISO) with series capacitor model, as shown in (8).
ISO(dB) = −20 log(1 +
20
1
)
2Z0 ωCOF F
(8)
O F F C a p a c ita n c e , p F
0 .0 2 0
0 .0 1 6
F o r
C p d
T h e
0 .1 3
0 .0 1 2
5 0 x 2
e v ic e ,
le c ta b le .
0 .0 5 7 p F /m m
to ta l C o ff is :
m
5 0 x 1
d u m m y
s w itc h
0 .0 0 8
0 .0 7 4 p F /m m
0 .0 0 4
0 .0 0 0
la r g e d
is n e g
re fo re ,
1 p F /m
0
p a d c a p a c ita n c e : C p d = 0 .0 0 3 3 5 p F
2 0
4 0
6 0
8 0
C h a n n e l W id th ( u m )
1 0 0
1 2 0
Figure 3.5. Extracting OFF-capacitances from isolation measurements on switches with varied peripherie
where Z0 = 50 Ω for standard microwave system. Switches with at least two different
peripheries need to be measured, in order to separate periphery-independent pad
capacitance and the rest two frequency-dependent capacitances. In the case shown
in Figure 3.5, a 2-finger 50 µm device and a 3-finger 100 µm device are used. A
dummy ”open” device that has the same geometries of a normal switch but without
the mesa is used to determine the size of fringing capacitance and coplanar parasitic
capacitance. The dummy switch does not have fringing capacitance since it does not
have a channel. It is shown in Figure 3.5 that a normal switch has additional 0.057
pF/mm capacitance than dummy switch, due to fringing capacitance, but this does
not mean that the fringing capacitance is 0.057 pF/mm in total. In normal switch,
coplanar parasitic capacitance tends to be much less than 0.074 pF/mm as in dummy
switch, because only upper half (in the air) of the coplanar parasitic capacitance
remains when fringing capacitance dominates the lower half of the plane (in the
dielectric). If assuming dielectric permittivity of the lower half to be 9 (GaN), then
coplanar parasitic capacitance in the normal switch is approximately only one tenth
of 0.074 pF/mm, and the remaining 0.1236 pF/mm belongs to fringing capacitance.
21
C
4 0
C
3
3
e D e n s ity , 1 0
1 8
c m
-3
3 5
3 0
2 5
0 n
0 .1
0 .2
0 .3
0 .4
0 .8
2 0
1 5
1 0
0
5
0
5
1 0
x , u m
1 5
s
n s
n s
n s
n s
n s
2 0
Figure 3.6. 2D numerical transient simulation of a C3 pair depleted
by ohmic control electrodes placed outside
3.4. Large-signal Analysis and Switching Speed
Figure 3.6 is Synopsys Sentaurus simulation result showing channel at the edge of
C3 region depletes faster than its inner side. Transient current reaches maximum when
the channel is almost depleted at the edge while charges from inner side of contact region keeps rushing out, a mechanism similar to gate pinch-off at high source-to-drain
bias.[37] It is easy to understand that the more C3 fingers and longer contact length
of each finger, the longer time it takes to deplete all the fingers. Yet the simulation
also shows that such transient time due to resistance in C3 itself is only a fraction
of nanoseconds, and is easily dwarfed by the RC time of the whole control line when
the large series resistance is taken into consideration.
Large-signal simulation using 2D numerical simulation tool such as Synopsys
Sentaurus is slow and inflexible. Figure 3.7 shows a much faster and more robust
lumped-element model later developed, using a series of MOS-HFET model to account for channel modulation, as well as current saturation in C3 under large signal
condition. The model is built and simulated in Agilent Advanced Design System
22
Metal electrode
Fringing capacitance
Fringing capacitance
2DEG channel
Figure 3.7. Large-signal lumped-element model of C3 , with added
fringing capacitors on both edges
(ADS) [38], while the GaN MOS-HFET model used in the circuit is a customized
version of ADS’s original GaAs HEMT model, tuned to fit our need. Each MOSHFET in Figure 3.7 represents a fraction of C3 , as C3 itself resembles a MOS-HFET
with extremely long gate and no contact (zero ohmic contact resistance, zero sourceto-gate and gate-to-drain spacing). A string of MOS-HFETs are connected in series
in order to address distributive phenomenon occurs in C3 as shown in 2D numerical simulation in Figure 2.4. Additional capacitors were manually added at both
ends of the string to simulation fringing capacitance when all the MOS-HFETs are
turned off. Switch-settling time are compared between ohmic MOS-HFET switch
and C3 gateless switch in ADS transient simulation with this C3 large-signal model.
Both devices have 1 kΩ series resistance connected to gate of ohmic MOS-HFET and
control electrode of C3 gateless switch. Due to RC constant, the bigger this series
resistance is, the slower DC bias can reach the device, while 1 kΩ is sufficient to
effectively block RF signal from leaking through DC line. The carrying RF signal
23
Ohmic
100
0
-5
Vg, V
I_out.i, mA
50
0
-10
-50
-100
-15
0
5
10
15
20
25
30
35
40
45
50
55
60
time, nsec
C3
gateless
100
15
10
Vg, V
I_out.i, mA
50
0
5
-50
-100
0
0
5
10
15
20
25
30
35
40
45
50
55
60
time, nsec
Figure 3.8. Transient simulation of ohmic MOS-HEFT and C3 gateless switch using Agilent ADS
has 0.5 W power at 2 GHz, and the bias pulse is +15 V for C3 switch and -15 V
for ohmic MOS-HFET. The pulse started 10 ns after start time, and has 5 ns rise
and fall time, and 25 ns width. Figure 3.8 shows that both devices are able to turn
OFF and ON when bias is applied and removed. Ohmic MOS-HFET turned OFF
almost immediately as bias reaches beyond pinch-off voltage (-6 V ), while C3 gateless
switch spends several nanometers more to turn OFF and turn ON completely. This
is because gate capacitance of ohmic MOS-HFET is much smaller than the total C3
capacitance of gateless switch. On the other hand, Figure 3.8 also shows that such
delay is still well below the requirement of most practical applications.
24
3.5. Experimental Results and Discussion
Two types of test switches with almost identical geometry, standard Ohmic MOSHFET and C3 gateless switch, were fabricated on AlGaN/GaN grown on 2-in sapphire substrate. The device’s layout is illustrated in Figure 3.9. The AlGaN/GaN
heterostructures for this study were grown by using proprietary MEMOCVD deposition technique.[34] The sheet resistance of as-grown structure was about 280 Ω/sqr.
The mesa structure was formed using RIE etching prior to dielectric deposition. Both
types of switches have 120 µm wide 5 µm long channel, defined by a pair of 5 µm
long input/output electrodes, made either of Ti/Al/Ti/Au Ohmic contact or C3 . For
standard MOS-HFET, a 1.5 µm gate was placed in the middle of the channel; for
C3 gateless switch, Ohmic control contacts were placed 5 µm away from C3 . In both
cases, the DC control bias was applied through a 1.5 kΩ resistor integrated into the
RF switch MMIC in order to isolate RF signal from being grounded. To reduce
reverse leakage currents through the gate or C3 , a 10 nm-thick layer of SiO2 was
deposited under the input and output electrodes using PECVD technique.
Small-signal measurements up to 20 GHz were taken on-wafer using RF probestation and HP-8720ES Microwave Vector Network Analyzer (VNA). Bias-tees were
inserted at the input and output ports to provide DC and ground reference. Insertion
losses were measured in terms of |S21 | at zero DC bias. Isolations were measured at
-15 V at the gate of MOS-HFET and +15 V at the control electrode of C3 gateless
switch. Insertion loss results are shown in Figure 3.10. Unfortunately, due to uncertainty in processing, the ohmic contacts fabricated on the sample has high resistance
and appeared to have capacitive behavior as well, possibly due to insufficient annealing time. (But I decide to use this result because of an very useful convenience it has
when it comes to large-signal performance comparison, which will be discussed soon
afterwards.) As the reference of how the ohmic switch’s small-signal performance
should have been, analytical results calculated using small-signal model based on the
device’s geometry, material properties, and 0.5 Ω × mm Ohmic contact resistance
25
ground pad
120 μm
120 μm
active area
signal pad
series resistor
ground pad
control pad
Figure 3.9. Design layout of two test switches with identical geometries: ohmic MOS-HFET and C3 gateless switch
0
in s e r tio n lo s s , d B
-1
-2
-3
-4
-5
-6
-7
-8
5
1 2 0 µm
O h m ic ( 5
m e
3
C g a te le
m e
3
C g a te le
m o
1 0
µm )
a s
s s
a s
s s
d e
1 5
u re
(5
u re
(3
le d
d
d
m o d e le d
µm )
µm )
2 0
m o d e le d
m o d e le d ( m a tc h e d )
2 5
fre q u e n c y , G H z
3 0
3 5
4 0
Figure 3.10. Insertion loss comparison of test switches, both measured and simulated
26
0
is o la tio n , d B
-1 0
-2 0
-3 0
O h m ic m e a s u r e d
3
C g a te le s s m e a s u r e d
3
C g a te le s s m o d e le d
-4 0
-5 0
5
1 0
fre q u e n c y , G H z
1 5
2 0
Figure 3.11. Isolation comparison of test switches
in s e r tio n lo s s ( o r ) is o la tio n , d B
0
-5
-1 0
-1 5
IL C
IL O
IS C
IS O
-2 0
-2 5
3 g
h m
3 g
h m
a te le s s
ic
a te le s s ( + 1 5 V )
ic ( - 1 5 V )
b u rn e d
-3 0
-3 5
5
1 0
1 5
2 0
2 5
3 0
in p u t p o w e r , d B m
3 5
4 0
Figure 3.12. High power measurements on test devices
assumption were compared with the measured data. Small-signal model used for C3
switch simulation is explained in previous sections in this chapter, with correction of
current crowding that is analyzed in Appendix A. Without any intentional fitting,
27
simulated insertion loss of C3 gateless switch matches its the measured data very well.
Simulated data for ohmic MOS-HFET appears to be much better than measure one,
most likely due to poor ohmic contacts. According to simulation, C3 gateless switch
outperforms ohmic MOS-HEFT in insertion loss at frequencies above 38 GHz, which
confirms the analysis about C3 in Chapter 2. However, taking advantage of having
no gate, C3 gateless switch can safely has its channel length shortened from 5 µm
to less than 3 µm without compromising breakdown voltage and other high power
performances, or causing noticeable change in isolation. The improved C3 switch then
outperforms standard ohmic at frequencies above 14 GHz. Furthermore, by matching the C3 switch impedance with an series inductor (0.5 nH in the example), its
insertion loss can be further reduced at desired frequency with adequate bandwidth,
due to very small inductor required. Currently adding an 0.5 nH inductor can achieve
about as high as 0.3 dB further improvement in insertion loss at frequencies up to 30
GHz of the 120 µm test C3 gateless switch. As the device’s periphery increases in
practical applications when sub 1 dB insertion loss is desired, even smaller inductor
is needed for impedance matching, and results in even wider bandwidth. Isolation of
both ohmic and C3 switches are quite close, since it is the fringing capacitance that
dominates total OFF-capacitance. Yet, when looking closely, C3 gateless switch outperforms ohmic MOS-HFET by 1 dB at frequencies above 2 GHz. This is possibly
due to reduced coplanar parasitic capacitance for C3 of having no gate.
C 3 gateless test device with 2 × 300 µm periphery as shown in Figure 3.2 is
also measured in two configurations, in order to show current crowding effect and
difference between C3 gateless switch and D-MOSH. Figure 3.13 shows that due to
current crowding along its 300 µm long fingers, the actual insertion loss is much lower
than expected. When the control electrode is not used, and DC bias is applied across
input and output through external bias-tee, the switch then operates as D-MOSH.
Figure 3.14 shows that C3 gateless switch has 12 dB more isolation than D-MOSH
with same geometry (same device, different biasing method), due to the full depletion
28
0 .0
In s e r tio n L o s s , d B
-0 .5
-1 .0
-1 .5
-2 .0
-2 .5
-3 .0
2
m e a su re d
s im u la te d :
w /o c u rre n t c ro w d in g
w . c u rre n t c ro w d in g
4
6
8
F re q u e n c y , G H z
1 0
1 2
Figure 3.13. Insertion loss of 2 × 300 µm gateless switch and analytical model with and without current crowding effect
0
Is o la tio n , d B
-5
-1 0
-1 5
-2 0
-2 5
-3 0
2
D -M O S
m
C 3 g a te
m
4
H :
e a su re d ,
le s s :
e a su re d ,
6
8
s im u la te d
F re q u e n c y , G H z
s im u la te d
1 0
1 2
Figure 3.14. Isolation comparison of 2 × 300 µm C3 gateless switch
and D-MOSH
of both C3 s.
The available setup I have for high power measurement have maximum +40 dBm
power and up to 2 GHz frequency, which is not enough for C3 that typically operates
29
at frequencies above 10 GHz. A typical ohmic MOS-HFET can have much lower
impedance (as well as insertion loss) than C3 gateless switch at 2 GHz. This makes
large-signal comparison between the two unfair, because power compression point of
transistor-type switches is impedance dependent.[45] Fortunately, the sample ohmic
MOS-HFET measured here has poor ohmic contact that makes its impedance (insertion loss) almost the same as that of the C3 ’s at 2 GHz. Although 1 dB power
compression point can be much higher for a normal ohmic MOS-HFET, it can also
be equally higher for C3 at its normal operating frequencies. Therefore, high power
measurements were taken at 2 GHz with input power varying from +10 dBm to
+40 dBm. Both insertion loss and isolation at low input power range match the
result from small-signal measurements. In ON-state, with increased power level, the
insertion loss of both ohmic and C3 switches degrade as output power get saturated,
though the saturation mechanisms of two device types are slightly different: in ohmic
case, channel pinches off at the gate’s two edges alternately when voltage swing across
the device is higher than twice of the channel pinch-off voltage; while in C3 ’s case,
channel pinches off at the edge of either C3 alternately, but at the same level of voltage
swing as in ohmic’s case. Therefore, both devices show 1 dB compression power at
about +30 dBm for the 120 µm channel width, which is translated into more than 8
W/mm power handling capability. In OFF-state, isolation of Ohmic device increased
slightly as input power increased, while that of C3 device remained relatively flat at
lower power range. The slightly better isolation of Ohmic device in large-signal condition can be attributed to the -15 V biased gate in the middle of the channel, while
the DC potential of C3 device is constant since the control electrode is located outside
the channel region. Yet, for the same reason, Ohmic device burned at much lower
power than its C3 gateless counterpart in OFF-state, due to much larger peak field
between the gate and the Ohmic contacts, which makes the power handling capability
of the ohmic switch to be much lower. Other factors that make ohmic MOS-HFET
more vulnerable compared to C3 gateless switch are also related to alignment of gate,
30
and the roughness of ohmic contacts due to annealing process. The inevitable gate
misalignment and spiky edge of ohmic contacts further increase local electrical field
under large voltage swing, which C3 gateless device does not have.
3.6. Summary
III-N gateless microwave switch using capacitively-coupled contacts has demonstrated lower insertion loss, higher power handling capability than conventional III-N
ohmic HFET. The gatless switch does not suffer from premature breakdown and high
OFF-capacitance, which is related to gate, and offers self-aligned fabrication process,
which can easily be incorporated into large-scale MMIC designs. Compared with the
two previously reported novel switches using C3 technology (C3 -MOSHFET and DMOSH), the gateless switch has lower insertion loss than C3 -MOSHFET due to the
advantage of not having a gate, while has 12 dB higher isolation than D-MOSH, due
to the advantage of depleting both C3 s.
31
Chapter 4
High-Frequency Switching Using Gateless
Devices
32
Single Series Switch
Series-Shunt Switch
ON
OFF
ON
OFF
Figure 4.1. Schematics of single series switch and series-shunt switch
0
S 2 1 , d B
-1 0
-2 0
-3 0
1
2
8 -c
8 -c
8 -c
8 -c
h s in
h s in
h s e
h s e
3
g le
g le
r ie s
r ie s
e le
e le
4 -c
4 -c
4
m e n
m e n
h s h
h s h
t O N
t O F F (2 0 V )
u n t O N (0 V , 2 0 V )
u n t O F F (2 0 V , 0 V )
5
F re q u e n c y , G H z
6
7
Figure 4.2. Small-signal comparison between single series switch and
series-shunt switch
4.1. Introduction to High-Frequency Switching
Demand for fast, compact, efficient, and reliable switches at frequencies of several
tens of gigahertz has increased dramatically, as technologies keep advancing in fields
like wireless communication (1 - 10 GHz), high precision radar detection (20 - 40
33
3
1 .5
2
C h a n n e l W id th , m m
O p tim a l In s e r tio n L o s s , d B
2 .0
1 .0
0 .0
1
S e r ie s D e v ic e
S h u n t D e v ic e
0 .5
0
2
4
6
8
1 0
F re q u e n c y , G H z
1 2
1 4
0
Figure 4.3. Optimized design of series-shunt switch at specific frequencies with fixed isolation
GHz), and high-definition video signal transmission (60 GHz). On the other hand,
while semiconductor-based switches seem to be known as fast, compact, efficient, and
reliable, they all suffer from relatively large OFF-capacitance compared with their mechanical counterparts (MEMS) [30], due to small vertical geometry of semiconductor
devices structures. A single III-N HFET switch with 1 mm periphery has estimated
insertion loss of 0.2 dB (do not count losses from packaging and wiring), but has only
5 - 8 dB isolation at 10 GHz, while typical demand for isolation is about 25 - 30 dB.
One popular solution to this problem is sacrificing some of the bandwidth in insertion
loss to improve bandwidth in isolation, by adding a shunt switch that turns ON when
the series switch is OFF, so that it bypasses any RF signal leaked to the output and
increases isolation (Figure 4.1). Yet as shown in the performance of a sample seriesshunt switch in Figure 4.2, the switch’s insertion loss degrades at higher frequency
because of OFF-capacitance of the shunt element. Such trade-off can conveniently
be expressed analytically, in order to find the optimum design in terms of minimum
insertion loss of a given isolation target at specific frequency. Figure 4.3 shows change
of design and corresponding insertion loss of III-N HFET series-shunt switch when
34
Traveling-Wave Switch
ON
Shunt switches are OFF
OFF
Shunt switches are ON
Figure 4.4. Schematics of traveling-wave switch concept
isolation is to be no less than 30 dB. The minimum insertion loss a series-shunt
switch can achieve drops beyond 1 dB at frequencies above 8 GHz, which is still not
quite suitable for high frequency application mentioned in the beginning.
In the past, traveling-wave RF switches using GaAs HEMTs [26][25][22][39], Si
CMOS technology [5], and InGaAs PIN diodes [44] have been reported with operating frequencies up to 135 GHz. The achieved insertion loss was typically below 3 dB
and isolation from 20 to 40 dB.
As shown in Figure 4.4, a traveling-wave switch is a periodic structure of shunt
switching elements and series inductors. The obvious advantage is that it has a large
bank of shunt switching elements to ensure high isolation in OFF-state, while using
series inductors to compensate OFF-capacitance of the shunt elements and form an
artificial transmission line in ON-state so that signal at certain frequency can pass
through with almost no loss. Yet, the problem with traveling-wave switch is that, for
broadband performance the switch should contain significant (≥ 10) number of unit
cells, each comprising multi-finger FETs. To make this technology feasible, either
35
relatively small number of cells are used, or the unit cell periphery is decreased or
the source-to-drain distance is being increased. Any of these measures deteriorate
the performance. In addition, Si and GaAs RF switches have relatively low power
handling capability, high insertion loss and low maximum operating temperatures
limited by fundamental material properties.
4.2. III-N Traveling-Wave Switch Design Using Gateless Devices
III-N switches has the best combination of low insertion loss, high isolation, high
switching power and speed among most of other switch types. In 2007, M. Yu, et. al.
at Rockwell Collins Inc. and Nitronex Co. demonstrated a AlGaN/GaN-on-Si based
DC - 1.5 GHz single-pole four-throw (SP4T) microwave switch using series-shunt
configuration, which has around 1 dB insertion loss and 25 dB isolation at 1 GHz
frequency, with 0.1 dB power compression at +43 dBm.[47] In 2009, A. Bettidi,
et. al. in Italy reported a AlGaN/GaN based X-band (8 - 12 GHz) single-pole
double-throw (SPDT) switch using traveling-wave concept, which has less than 2 dB
insertion loss and more than 45 dB isolation in its frequency range, with 1 dB power
compression at +38 dBm.[2] In Bettidi’s traveling-wave SPDT switch design, 3 cells
were used in each arm, with MMIC spiral series inductor and ohmic HFET with gate
periphery of 2 × 100 µm in each cell. The limited number of cells and small periphery
ohmic HFET in each cell, and as the result of that, the cumbersome and lossy spiral
series inductors together are likely yield relatively high insertion loss at relatively low
frequency range, where series-shunt switches are still competitive.
Therefore, the goal in this chapter, as well as the entire dissertation, is to develop
a III-N based microwave switch that can operate at frequencies above 10 GHz, while
having insertion loss below 1 dB and isolation above 30 dB. Based on previous
analysis, traveling-wave switch concept appears to fit this goal best, while the selfaligned C3 gateless switches that has better performances than conventional ohmic
36
Figure 4.5. ADS model of a L-C network of 10 cells simulating
traveling-wave switch in ON-state
HFETs become the ideal candidate as the shunt switching elements in travelingwave switch design, especially when as many as 10 cells are desired for broadband
performance, where gate alignment of a design of such complexity can be a problem
if conventional ohmic HFETs are used.
Since a transmission line is approximated by repeating L-shape LC circuits as
shown in Figure 4.5, the following formula to determine series L and shunt C are also
derived from formula of lossless transmission line, by replacing value per unit length
(L and C) in transmission line model [28] with value per unit cell (the new L and
C) in traveling-wave model, and total length (l) in transmission line model with total
number of cells (N ) in traveling-wave model:
r
L
C
√
β = 2πf0 LC
Z0 =
37
(9)
(10)
0
0.0
0.0
-0.2
-2
-0.2
-0.4
dB(S(4,3))
dB(S(6,5))
dB(S(2,1))
-0.4
-0.6
-0.8
-4
-6
-0.6
-1.2
-8
200
200
200
100
100
100
0
phase(S(4,3))
-0.8
phase(S(6,5))
phase(S(2,1))
-1.0
0
0
-100
-100
-100
-200
-200
-200
0.4
0.5
1.0
0.4
0.8
0.2
0.1
mag(S(3,3))
mag(S(5,5))
mag(S(1,1))
0.3
0.3
0.2
0.0
0.0
0
10
20
30
40
50
60
0.4
0.2
0.1
0.0
0.6
0
10
20
30
40
50
60
f req, GHz
f req, GHz
0
10
20
30
40
50
60
f req, GHz
Figure 4.6. Insertion loss of the L-C transmission line model with
varied number of cells (N ) and electrical length (θ)
θ = βN
(11)
where Z0 is characteristic impedance of this artificial transmission line, f0 is signal’s
frequency, and θ is total electrical length (phase change) of this transmission line.
Solving L and C from the equations above, we then have:
L=
Z0 θ/2π
f0 N
(12)
C=
θ/2π
Z0 f0 N
(13)
If assuming the traveling-wave switch to have 10 cells (N = 10) and 180 degree long
(θ = π), and to be matched to 50 Ω system (Z0 = 50 Ω) at 20 GHz (f0 = 20
GHz), equation (12) and (13) give L = 0.125 nH and C = 0.05 pF . Ignoring all the
losses, Figure 4.6 shows insertion loss and return loss of such design (left column),
38
together with the design that has only half number of cells and half the electrical
length (center column), and the design that has half number of cells but still 180
degree electrical length (right column). In each plot set, the top plot is transmission
(S21 ) in dB, the second one phase of transmission, and the bottom one magnitude
of insertion loss (S11 ). Comparing results of three sets of plots, we can draw two
conclusions: firstly (comparison between left and middle sets), due to finite number
of cells, multiple L-C oscillation modes (ripples) exist, and perfect matching occurs
when θ = nπ (n = 1, 2, 3...); secondly (comparison between left and right sets), for
same θ, decreasing N will increase value of L and C in each cell, and therefore result
in stronger oscillation (bigger ripples). By considering the goal of small size, low loss,
and wide bandwidth, I then take two designs with same L and C: N = 10 and θ = π,
and N = 5 and θ = π as the right traveling-wave switch design to pursuit.
4.3. Series Inductor
Major part of insertion loss in traveling-wave switch at matched frequency is
metal loss along the signal path, since the shunting switches are almost purely capacitive in their OFF-state. Therefore the design’s layout should be kept as short
and straightforward as possible along signal path. Second concern is that making
micro-strip waveguide on GaN wafer is hard since etching a via hole though GaN and
its substrate to connect the ground plate generally does more harm than benefit to
the device’s performance. So coplanar waveguide [36] with signal trace in center and
ground plate on both sides is popular in GaN-based MMIC design.
Given the nature of relatively small inductance required (0.125 nH), short transmissionline with high characteristic impedance seems to be the best choice for our inductor
design, because of its simplicity and little parasitic elements compared with spiral
inductor and meandering inductor. When the transmission line is short enough
(l λ/8), and characteristic impedance not too smaller, if not larger, than its load,
39
it can be approximated as a series inductor. The input impedance of a short transmission line with length of l and characteristic impedance of Z1 (not to be confused
with Z0 in 9), the characteristic impedance of the traveling-wave switch in ON-state),
terminated with arbitrary load ZL , is calculated using equation (14).
√
Z
ZL + jZ1 tan βl
1 l ef f
Zin = Z1
≈ ZL + jZ1 tan βl ∼
(14)
= ZL + jZ1 βl = ZL + jω
Z1 + jZL tan βl
c
where ef f is the short transmission line’s effective permittivity, and c is speed of light
in vacuum. The right side of (14) is then analogy to a series inductor connected to
the load, with inductance as:
√
Z1 l ef f
L=
c
(15)
Then in turn, when value of inductance is known, the length of this short transmission
line is then:
l=
cL
√
Z1 ef f
(16)
For coplanar waveguide, the effective dielectric constant is,[]
ef f =
1 + r
2
(17)
When L = 0.125 nH, ZL = 100 Ω, r = 9 (GaN and sapphire substrate), length of
the short coplanar waveguide that represents a series inductor is l = 168 µm, 1/40
of total 6.7 mm wavelength of 20 GHz signal on this waveguide. In order to reduce
metal loss of the possibly 1 - 2 mm long traveling-wave switch, it is important to have
trace of the coplanar waveguide as wide as possible. For trace width to be 40 µm, and
characteristic impedance around 100 Ω, based on analysis on coplanar waveguide [36],
trace-to-ground separation is about 175 µm, while 150 µm separation gives about 95
Ω characteristic impedance, which is more practical for traveling-wave switch design.
40
4.4. Shunt Capacitor
Multi-finger gateless switches with C 3 fingers are used as shunt switching elements
in traveling-wave switch design. The fingers are set to be 4 µm wide each to ensure
low contact resistance while not raising metal loss along the finger, and have 3 µm
separation between fingers to minimize channel resistance. With current width, the
fingers should be no longer than 100 µm, so that current crowding and its result,
effective channel shortening, as discussed in Chapter A, is not significant.
In the traveling-wave switch’s OFF-state, all shunt elements are turned on, and
enough circuit shorting is provided to achieve very high isolation; while in the switch’s
ON-state, the OFF-capacitance of the shunt elements should accurately match with
series inductors. Therefore periphery of each shunt element is determined only by the
value of required OFF-capacitance, which in this case, is 0.05 pF. Both measurements
on test devices (see Chapter 3) and analytical 2D simulation using Ansoft Maxwell
2D [7] confirms that OFF-capacitance of gateless switch described in this section is
about 0.133 pF/mm, which means that the periphery of each shunt element is about
376 µm, obtained from (18).
w=
C
COF F
(18)
4.5. Quarter-Wave Transformer
When the traveling-wave switch is OFF, ideally it shorts signal line and ground,
so when looking from its input, the input impedance is very small. For single-pole
single-throw (SPST) switching, RF signal is then reflected back to the input port,
with 180 degree of phase change. This 180 degree phase change in reflection seems to
be acceptable, as long as no RF signal escapes to the output port. But when using
more than one traveling-wave switches in parallel to perform single-pole multi-throw
(SPMT) switching, the shorted arms in OFF-state then short the whole switch and
no RF signal can reach the arm in ON-state (see Figure 4.7). One solution to this
problem is adding a series switch in each arm, which has similar effect as in SPMT
41
Current flow
out1
in
out1
in
out2
SPDT without
Quarter-wave transformer
out2
SPDT with
Quarter-wave transformer
Figure 4.7. Illustration of SPDT switches using shunt switches, with
and without quarter-wave transformers
series-shunt configuration. But when frequency gets higher, the series switch becomes
less effective, and should be replaced with a complete passive part called quarter-wave
transformer.
The quarter-wave transformer is a short piece of transmission line that has exactly
λ/4 length (π/2 in phase). Assuming a 50 Ω system, then according to transmission
line theory [28], the 50 Ω quarter-wave transformer appears to have infinite input
impedance (open circuit) when its output is shorted, while appears to be 50 Ω again
when the output is terminated with matched load. A quarter of the wavelength of
20 GHz signal in 50 Ω coplanar waveguide can be almost 2 mm long, but the size
can be much smaller when using an artificial transmission line structure not different
from the traveling-wave switch design. We can conveniently use the L and C value in
Section 4.2, and by letting number of cells N = 5, the electrical length of such design
is then θ = π/2. To be noted that a quarter-wave transformer is a passive device and
does not need to be able to switch, so that all the mesa and control lines of the shunt
42
Figure 4.8. Layout arrangement of proposed traveling-wave switch
(only one cell is shown)
elements can be removed, and they become dummy switches as mentioned in Chapter
3. The advantage of doing so is that it should result in a little lower insertion loss,
since the shunt elements now contain no resistive part. COF F of a dummy switch is
about 0.07 pF/mm, obtained both from measurement and simulation. According to
(18), the total channel width is then 714 µm.
4.6. Layout Arrangement
Figure 4.9 shows the layout of one cell, as the building block of traveling-wave
switch design. Each cell is connected to its left and right neighbors through 5 horizontal paths parallel to each other: two wide ground lines at the outsides, two narrow
control lines placed close to both ground lines, and a signal line in the center. The central signal line, two ground lines, and the empty space between them forms a section
43
of 95 Ω coplanar waveguide, and act as a series inductor (show half the inductor on
both left and right in Figure 4.9). The multi-finger gateless shunt switching element
is placed on both sides of the signal line, so that its total periphery should be the sum
of the two switches on both sides. The ohmic control contacts of switches are placed
out side the switch’s area, and are connected through resistors made of narrow lines
of mesa (2DEG channel) and merged into switch’s active region. Dielectric bridges
are used so that control lines can jump over the shunt switch area without interruption. The whole layout arrangement is guided by simplicity and straightforwardness,
in order to avoid unwanted local modes and additional metal loss.
4.7. EM Simulation and Layout Tuning
According to previous discussions, the series inductor’s length is calculated to be
168 µm, and the shunt gateless switch’s periphery 376 µm. In order to verify the
design before final layout masks are drawn, a series of 2.5D EM simulations using
Agilent ADS Momentum [] are conducted. The model has open air layer on both
bottom and top. The first layer at the bottom is 300 µm thick sapphire, then 2
µm GaN, 20 nm AlGaN, 10 nm SiO2 and 1 µm bridge oxide made of SiO2 as well.
2DEG channel is defined as a conducting layer between GaN and AlGaN, having 2 nm
thickness and 300 Ω/sqr sheet resistance. The gold metal layer, where trace lines and
C3 contacts are formed, is defined on top of SiO2 , with 0.5 µm thickness and twice
of bulk gold’s conductivity, due to the quality of metal deposited. Ohmic contact
is defined as resistive Via that simulates 0.5 Ω × mm contact resistance. Dielectric
bridge that connects control lines are defined with additional metal layer on top of
bridge oxide layer, and Via that goes through the oxide. The switch’s ON- and
OFF-state are simulated separately with slight difference in 2DEG channel layer. In
OFF-state model, 2DEG channel layer covers whole active region according to design
(C3 gateless switches are all ON); while in OFF-state model, the layer is patterned to
cover only the active area where 2DEG channel is not depleted (C3 gateless switches
44
40
100
150
200
80
Unit: μm
ON
(partial 2DEG)
OFF
(full 2DEG)
Figure 4.9. ADS Momentum model of traveling-wave switch for 20
GHz operation (one cell), and current distribution in ON- and OFFstate
are all OFF). The model is simulated at wide frequency range with coplanar stimulus
ports (ground-signal-ground).
Instead of simulating the whole device that can be as long as 2 mm, only one
cell of the design is simulated, based on the assumption that there is no coupling
effect between cells. This assumption appears to be valid at frequencies below 20
GHz, given the size and geometry of the cell. When s-parameters of one cell is
obtained through simulation, the model is then turned into schematic component,
and simulated with multiple cells connected in series to represent whole travelingwave switch (see Figure 4.11). This method is much faster than simulating the whole
device in Momentum, with very adequate accuracy. Figure 4.9 shows the Momentum
model with finalized geometries, together with RF current density of both ON- and
45
S12
0.00
Mag. [dB]
-0.05
-0.10
ON
(partial 2DEG)
-0.15
-0.20
0
10
20
30
40
50
Frequency
S12
0
Mag. [dB]
-5
-10
OFF
(full 2DEG)
-15
-20
0
10
20
30
40
50
Frequency
Figure 4.10. Insertion loss and isolation for one cell
OFF- model obtained by simulation. Signal trace has 40 µm width and 150 µm
signal-to-ground separation, as discussed in Section 4.3. Each ground plate is 200
µm wide, enough to shield the signal from EM leaking. Finalized inductor section
is 160 µm long. Each C3 finger in shunt switching elements is 4 µm wide and 100
µm long. Total 4 channels of each switching elements accounts for 400 µm finalized
periphery. When the cell is ON, two shunt C3 gateless switches are OFF, and the
current passes on signal line from left to right with minimum loss. when the cell is
OFF, two shunt C3 gateless switches are ON, and conducting RF signal to the round
plates. Figure 4.10 shows simulation results of the one-cell model, which shows very
low insertion loss due to very short geometry, and some resonance near 20 GHz in
isolation.
Two types of traveling-wave switches are simulated, as planned in the beginning
of this chapter. One switch as 5 cells, and therefore has 90 degree (quarter-wave) phase
shift. The other switch as 10 cells, and 180 degree phase (half-wave) shift. Quarterwave transformer discussed in Section 4.5 is not designed separately but using half
46
Figure 4.11. Schematic simulation with 5 cell components
q u a rte r O N
h a lf O N - O N
0 .0
-0 .2
S 2 1 , d B
-0 .4
-0 .6
-0 .8
-1 .0
-1 .2
0
5
1 0
fre q , G H z
1 5
2 0
Figure 4.12. Insertion loss comparison of Momentum simulation
of the half-wave switch, so only the other half of it is switching. Using a quarterwavelength of the traveling-wave switch in ON-state as quarter-wave transformer
47
0
S 2 1 , d B
-2 0
-4 0
-6 0
q u a rte r O F F
h a lf O N - O F F
0
5
1 0
fre q , G H z
1 5
2 0
Figure 4.13. Isolation comparison of Momentum simulation
has disadvantage of having more losses due to existence of the lossy 2DEG channel.
Yet it simplifies design, and adds more flexibility as the part used as quarter-wave
transformer can also be switched OFF if necessary. Figure 4.12 and Figure 4.13 shows
comparison in performance of the two type of switches. Both have same isolation in
this SPST configuration, since both have the identical switching section. But in
SPDT configuration that uses two switches (one for each arm), the one with quarterwave transformer will show much better performances. The shorter switch has lower
insertion loss, and ripples seen in lossless conceptual simulation in Figure 4.6 is totally
overwhelmed by metal loss. The higher frequency, the more metal loss is, due to skin
effect in metal lines.[28]. Overall, the simulation shows lower than 0.5 dB insertion
loss up to 20 GHz, and about 60 dB isolation at 20 GHz. 90 degree and 180 degree
phase shift near 20 GHz for quarter-wave and half-wave switches further validates
the two traveling-wave switch designs.
Since metal loss is crucial to insertion loss, it may be beneficial to design a switch
that operates at even higher frequencies, because according to (12) and (13), the
higher f0 is, the smaller both L and C are, which will then result in smaller geometry
48
Figure 4.14. Momentum model of 40 GHz traveling-wave switch
with input and output ports
s e g m e n t
w h o le
In s e r tio n L o s s , d B
0 .0
0 .5
1 .0
1 .5
2 .0
2 .5
0
2 0
4 0
6 0
F re q u e n c y , G H z
8 0
Figure 4.15. Insertion loss of 40 GHz traveling-wave switch simulation
of these components, and therefore smaller losses. The only concern is that once
the device’s geometry gets smaller, localized resonance mode, for instance, coupling
between two neighboring cells, may deteriorate its performance. For convenience, the
inductor length and shunt periphery in the 20 GHz traveling-wave switch design are
49
s e g m e n t
w h o le
0
Is o la tio n , d B
1 0
2 0
3 0
4 0
5 0
6 0
0
2 0
4 0
6 0
F re q u e n c y , G H z
8 0
Figure 4.16. Isolation of 40 GHz traveling-wave switch simulation
ON
OFF
0 deg
60 deg
120 deg
180 deg
Figure 4.17. Current distribution result of 40 GHz traveling-wave
switch simulation at different signal phase
50
Table 4.1. General design parameters of 20 GHz traveling-wave switch
Signal trace width
Ground plate width
Signal-to-ground gap
series inductor length
Shunt finger width
Shunt finger gap
Shunt finger length
Number of channels
Series resistor
Control line width
Control-to-ground gap
40 µm
200 µm
150 µm
160 µm
4 µm
3 µm
100 µm
4 µm
1500 Ω
5 µm
8 µm
cut in half, and according to estimation, the new design should be able to function
at twice the frequency, which is 40 GHz. Both single cell and the whole layout is
simulated in Momentum, since the layout is only half the size than before, which
shortens simulation time and becomes feasible for whole layout simulation. The
whole layout used in Momentum simulation, with input and output ports, is shown
in Figure 4.14. Small-signal results of both simulation methods are compared in
Figure 4.15 and Figure 4.16. Both methods gives very close results at frequencies
below 30 GHz, but deviate from each other at higher frequencies, especially when a
strong resonance occurs in insertion loss at 55 GHz possibly due to localized modes.
At 40 GHz, simulation shows impressive 0.5 dB insertion loss and 52 dB isolation,
despite that skin effect in signal race is quite significant at 40 GHz. Figure 4.17
shows current density versus signal phase in the device in both ON- and OFF-state.
In ON-state, it is very clear that current wave travels from left to right, at the speed
much slower than light speed, and this is how traveling-wave switch gains its name.
4.8. Experimental Results and Discussion
As shown in Figure 4.18, two traveling-wave switches for 20 GHz operation are
designed and fabricated. The longer half-wave switch has two controls, each covers
51
1 mm
Figure 4.18. Layout of two 20 GHz traveling-wave switches: halfwave and quarter-wave
half of the the switch, and can be used as quarter-wave transformer. Important geometries of the design are listed in Table 4.1. Due to limitation in testing capability,
40 GHz designs are not fabricated. Fabrication process is mostly the same as that
of C3 gateless switches described in Chapter 3, except for two additional masks for
control line bridge fabrication. Thick dielectric passivation layer is grown uniformly
on top after metal contacts are formed. Then via windows are opened through wet
etching for bridge connection. Finally metal bridge lines are formed on top of passivation and connect between via windows.
Small-signal measurements are taken up to 20 GHz, on probe station with RF
and DC probes. Two bias-tees are inserted at both input and output RF ports and
DC grounded. The system is calibrated with on wafer Short-Open-Load-Thru (SOLT)
calibration kit. Insertion loss is measured when +15 V DC bias is applied to all the
52
q u a rte r O N
h a lf O N - O N
0 .0
-0 .2
1 8 0
S 2 1 , d B
-0 .6
0
-0 .8
-9 0
-1 .0
-1 .2
0
5
1 0
1 5
fre q , G H z
2 0
S 2 1 , d e g
9 0
-0 .4
-1 8 0
Figure 4.19. Measured insertion loss (amplitude and phase) of two
20 GHz traveling-wave switch designs
0
n o is e flo o r ( o p e n a ir )
q u a rte r O F F
h a lf O N - O F F
S 2 1 , d B
-2 0
-4 0
-6 0
0
5
1 0
fre q , G H z
1 5
2 0
Figure 4.20. Measured isolation of two 20 GHz traveling-wave switch
designs
control pads, and the results are shown in Figure 4.19 Big oscillation occur above
12 GHz due to frequency limitation of bias-tees used in the measurement. At 20
GHz, quarter-wave switch shows about 0.5 dB insertion loss, while half-wave switch
(a quarter-wave switch plus a quarter-wave transformer) shows about 1 dB insertion
53
0
q u a rte r O N
h a lf O N - O N
S 1 1 , d B
-2 0
-4 0
-6 0
0
5
1 0
fre q , G H z
1 5
2 0
Figure 4.21. Measured return loss of two 20 GHz traveling-wave
switch designs
loss. From phase plot, it can be found that matching condition is reached at about
17 GHz (90 degree for quarter-wave and 180 degree for half-wave). Comparing with
simulated results in Figure 4.12, the measured data shows increase in insertion loss
and shifted matching point. Increased insertion loss is possibly due to poorer metal
deposition quality and lower line thickness, while phase shift is probably caused by
unexpected localized modes. The switches’ isolation is measured when zero bias is
applied to the control pad of the quarter-wave switch, while a +15 V and a zero DC
biases are applied to each of the two control pads of the half-wave switch, so that half
of the switch stays ON and acts as a quarter-wave transformer. The isolation data is
shown in Figure 4.20, which shows about 38 dB isolation for quarter-wave switch and
52 dB isolation for half-wave switch at 20 GHz. Comparing with simulated results in
Figure 4.13, the measured data shows lower isolation at high frequencies, but much
wider bandwidth. In addition, having a quarter-wave transformer shows significant
improvement in isolation, which is not seen in simulation. Most likely this is due to
54
6 0
T W S q u a rte r
@ 1 .9 9 & 2 G H z
4 0
P o u t, d B m
2 0
0
-2 0
-4 0
-6 0
1 5
2 0
2 5
3 0
3 5
In p u t P o
F u
O N P o w
F u
O F F P o
F u
4 0
P in , d B m
w e r
n d
IM 3
e r
n d
IM 3
w e r (+ 1 0 V )
n d
IM 3
4 5
5 0
5 5
6 0
Figure 4.22. Fundamental and second harmonic output power of
quarter-wave traveling-wave switch measured at 2 GHz
unforeseen localized resonance modes or coupling effect that is not addressed in simulation. Low return loss (< -25 dB) is also observed during measurement, as shown
in Figure 4.21, indicating good matching condition throughout wide frequency range.
Power measurement is done on the quarter-wave design at 2 GHz, with power
sweep from +10 dBm to +40 dBm, due to limits on test equipments. The results
shown in Figure 4.22 suggests no power compression in ON-state can reached within
that range, which indicates at least over +40 dBm handling capability. Power level
of the second harmonic measured at the output port using spectrum analyzer shows
over lap with that of the system measured using a Thru, which indicates very good
linearity. Since the system has around +58 dBm third-order interception point (IP3)
[31], the measured traveling-wave switch should have performance at least equals to
that, and most likely much better.
55
Table 4.2. Summary of recently reported III-N microwave switches
Work
Year
Type
Design
[14]
2005
SPDT
[16]
2005
SPDT
[46]
2008
SP4T
[23]
2008
SPDT
[23]
2008
SPST
[2]
This
work
2009
2010
SPDT
SPST
seriesshunt
seriesshunt
seriesshunt
shunt
+ λ/4
shunt
+ λ/4
TWS
TWS
Size
Freq
(mm2 ) (GHz)
2.0×0.6 0 - 1
IL
(dB)
0.26
ISO
(dB)
27
P1dB
(dBm)
46
1.6×1.0 0 - 3
0.9
38
30.2
1.6×1.2 0 - 2
0.95
> 28
45
-
15 - 20
1.4
> 35
36
-
18
0.6
36
-
2
<1
> 40
> 50
38
> 40
3.2×1.2 2 - 18
1.8×0.7 14 - 20
4.9. Summary
Table 4.2 listed recently reported III-N microwave switches, their design details,
and small-signal and power performances. Series-shunt designs dominate lower frequency range (0 - 3 GHz), while traveling-wave switch (TWS) concept appears to be
the best choice for frequencies above 10 GHz. My traveling-wave switch design has
relatively small chip size and better small-signal performances, partly because it is a
single-pole single-throw switch, while mainly due to innovative design that pays a lot
of attention to reducing losses, and the advantage of using gateless devices.
56
Chapter 5
Conclusion and Future Work
57
5.1. Conclusion
In this dissertation, I have presented a new type of microwave switch that uses
novel capacitively-coupled contacts, and taking advantage of having the control electrode placed out side the RF signal path. Various types of small- and large-single
models of the proposed gateless switch are presented, and compared with experimental results. Various test devices of both novel gateless switch and conventional
HFET are designed, fabricated, measured, and compared side-by-side. Results show
that gateless switch has better small-signal and high power performances than conventional HFET. Based on such work, a new type of traveling-wave switch that uses
novel gateless switch concept is presented. Details in design and analysis are presented. Comparison with other recently reported III-N microwave switches show the
best overall performance, due to advantage of gateless device and innovative layout
design. The goal of designing a microwave switch that has less than 1 dB insertion
loss and more than 40 dB isolation at 20 GHz, with more than +40 dBm power
handling capability and good linearity is therefore fully fulfilled.
5.2. Future Work
First of all, high frequency operation of the traveling-wave switch design is not limited to 20 GHz. As shown already in Chapter 4, Figure 4.14, with doubled frequency,
the corresponding design has only half of the size, while maintaining competitive performances. Yet localized resonance becomes more prominent at such high frequency,
and measures such as ground bridges on coplanar waveguide to suppress resonance
will be needed.
Secondly, single-pole multi-throw switch should be the next step. Performances
are expected to degrade as more signal paths, as well as a signal splitter, are inserted to the design. Yet by carefully tunning the layout to achieve better matching
condition, impressive performances are obtainable. Figure 5.1 shows an example of
SPDT design simulated in ADS. 1 dB insertion loss and 65 dB isolation are shown
58
Figure 5.1. ADS simulation of a 20 GHz SPDT traveling wave design
with a two-way splitter and matched passive quarter-wave transformer
m1
0
-10
-2
-4
-20
-6
-30
m1
freq= 20.00GHz
dB(S(2,1))=-0.967
-10
-4
-6
-40
dB(S(1,1))
-8
m2
freq= 20.00GHz
dB(S(3,1))=-64.699
m2
-50
-8
-10
-12
-12
-60
-14
-70
-16
-16
-80
-18
-18
-90
-20
200
200
200
150
150
150
100
100
100
50
50
50
0
-50
-14
phase(S(1,1))
phase(S(3,1))
phase(S(2,1))
dB(S(2,1))
0
dB(S(3,1))
0
-2
0
-50
0
-50
-100
-100
-100
-150
-150
-150
-200
-200
0
5
10
15
20
freq, GHz
25
30
35
40
m4
m4
freq= 20.00GHz
dB(S(1,1))=-16.330
-200
0
5
10
15
20
freq, GHz
25
30
35
40
0
5
10
15
20
25
30
35
40
freq, GHz
Figure 5.2. Small-signal performance of the 20 GHz SPDT traveling
wave design
59
in Figure 5.2. Relatively high return loss (-16 dB) indicates that the design is not
very well matched to 50 Ω, and requires additional tuning. Once a better matching
condition is provided, better small-signal performance is expected.
Thirdly, a long traveling-wave design can be turned into a reflective phase shifter,
once individual cell in the device is biased independently. Taken half-wave travelingwave switch shown in Figure 4.18 for example, if individual bias lines are connected to
each cell, we are able to create a reflective phase shifter from 0 degree to 180 degree,
with 18 degree step. Such phase shifter can act as a shunt inductor or capacitor,
providing tunable element for automatic impedance matching circuit.
60
Appendix A
Current Crowding in Multi-Finger Devices
61
A.1. Introduction to Current Crowding
No matter it is a transistor, a schottky diode, a capacitor, a LED, a optoelectronic sensor, or a solar cell, it is generally desired for a device to have as large active
periphery per wafer size as possible. If it’s a planar device, the effort of extending the
channel within a confined area is further limited by metal loss on the conducting lines
that inevitably get thinner to yield more space for channel. As it will be shown in this
chapter, such metal loss not only consumes additional electrical power and degrades
its performance, but also causes current to concentrate only at a certain portion of the
channel, leaving the rest wasted; the effect commonly known as ”current crowding”.
Many past efforts in studying current crowding in planar semiconductor devices are
mostly related to diodes, especially LEDs when the vertical current crowds at the
edge of contacts as the doped bottom contact has relatively high resistivity compared
to top metal contact.[11][32] Yet little attention has been paid to similar effect in
multi-finger coplanar devices such as HFETs, which can cause notable reduction in
effective channel length in unchecked designs. Furthermore, few has realized that
current crowding in multi-finger devices is quite different from that in diodes, which
requires a separate analysis.
Figure 1.1 shows the most straightforward way to extend a planar device’s periphery (channel width), by simply (and literally) extending the width of both source
and drain contacts. Though in reality people use multi-finger structure to fold the
channel and save space, parallel layout is a convenient example to start with to explain
current crowding. In the case when metal resistance of the contacts is comparable to
channel on-resistance, current is more willing to flow in the area close to the center of
the channel (lower total resistance) than on the two edges, which makes the equivalent
channel width less than its actual width, and thus makes the device more resistive
in on-state than it is expected by design. By noticing that this parallel layout is
analogy to two open-ended lossy transmission-lines connected back-to-back in parallel, the transmission-line theory is adopted in the calculation of current distribution
62
Figure 1.1. Parallel layout
and equivalent on-resistance.[28] Current crowding that occursing in many vertical
devices such as p-i-n diodes and light-emitting diodes also fall into this category and
is usually analyzed using transimission-line theory.
A.2. Current Crowding in Multi-Finger Layout
Multi-finger layout is one more step further to extend a planar device’s periphery (Figure 1.2), and since the fingers are long and narrow, current crowding occurs
between each pair of fingers, with similar but not the same mechanism as in parallel layout, in which current flows in and out at the same position (middle) of two
extended electrodes so that they can be viewed as two open-ended transmission-line
connected in parallel. Current in semi-series layout flows from one side of one stripshaped contact (finger) to the other side of the other (Figure 1.2). This asymmetric
configuration makes transmission-line model invalid in the calculation of current distribution and equivalent on-resistance; thus it requires a new analysis yet based on
similar approach of that of the transmission-line model. Though this type of current
63
Figure 1.2. Multi-finger layout
crowding widely exists in not in multi-finger transistors and switches, but in solar-cell
modules and LEDs with coplanar contacts as well, a detailed analysis has never been
seen in literatures.
The model in Figure 1.3 consists infinite number of periodic ”cells”. It has a basic assumption that current is flowing horizontally only in both fingers, and vertically
only across the space between them. This assumption is generally valid in practical,
since the fingers have low resistivity, and their length is much bigger than the space
between the fingers. Parameters Z1 and Z2 are metal resistance per unit length of
the two fingers, and Z3 is the total resistance times unit channel width (equivalent to
one over conductance per unit width) between two fingers. By their definitions, we
then have equations (33) and (20) to determine their values in practice.
Z1,2 =
ρm
dm Wf inger
Z3 = 2Rc + Rsh Lch
64
(19)
(20)
Figure 1.3. Semi-series layout small-signal model diagram and parameters
In (33), ρm is resistivity of finger material (metal), while dm and Wf inger are thickness
and width of fingers. Rc and Rsh in (20) are finger-to-channel contact resistance
and channel sheet resistance respectfully, while Lch is gap width between two fingers
(channel length). Current i1 (x) and i2 (x) in Figure 1.3 are distributed currents along
two fingers; j(x) is the vertical current density (current per unit length here) that
flows from one finger to the other; v(x) is the voltage between two fingers at position
x.
Firstly, it’s obvious that a small amount of current j(x) is transferring from i1 (x)
to i2 (x) in each cell, which gives the differential equation of the currents as:
−
∂i2 (x)
∂i1 (x)
=
= j(x) = Y v(x)
∂x
∂x
(21)
Secondly, v(x) in each cell is changing from that of its previous neighbor, due to
voltage drop across Z1 and Z2 , which leads to the differential equation of voltage:
−
∂v(x)
= Z1 ix − Z2 i2 (x)
∂x
65
(22)
Thirdly, since the currents never flow outside the device except at input and output,
from current continuity point of view, total horizontal current in any cell should be
constant and equals to the total current that flows in and out of this model at input
and output correspondingly. This gives the relationship between i1 (x) and i2 (x) as:
i1 (x) + i2 (x) = I
(23)
And therefore the boundary conditions are:
i1 (0) = i2 (L) = I; i1 (L) = i2 (0) = 0
(24)
where L is length of two fingers.
Now we start with solving i1 (x) using (21), (22) and (23) by eliminating i2 (x) and
v(x) from the equations, which gives:
∂ 2 i1 (x)
− (Z1 + Z2 )Y i1 (x) + Z2 Y I = 0
∂x2
(25)
It is worth pointing out that the only difference in (25) from that of the transmissionline model described in [28] is that this equation has a constant term Z2 Y I. When
Z2 = 0, all the equations developed in this section should reduce to their counterparts
in transmission-line model, which, in tern is a good way to check this model’s validity.
General solution to the second-order linear partial differential equation (25) is:
i1 (x) = C1 exγ + C2 e−xγ +
Z2 Y I
γ2
(26)
where,
γ=
p
(Z1 + Z2 )Y
(27)
By applying boundary conditions (24) to it, and after some tedious algebra work,
i1 (x) is then solved as:
i1 (x) = I
(e(L−x)γ − 1)[eLγ (Z1 + Z2 exγ ) + (Z1 exγ + Z2 )]
(Z1 + Z2)(e2Lγ − 1)
66
(28)
Figure 1.4. Integration path for total voltage calculation
Thus the vertical current density j(x) from (21) becomes:
j(x) = −
∂i1 (x)
exγ (Z1 + Z2 eLγ ) + e(L−x)γ (Z1 eLγ + Z2 )
=I
∂x
Z0 (e2Lγ − 1)
(29)
where,
r
Z0 =
Z1 + Z2
Y
(30)
Therefore, according to Ohm’s Law, the voltage v(x) is then,
v(x) =
j(x)
exγ (Z1 + Z2 eLγ ) + e(L−x)γ (Z1 eLγ + Z2 )
=I
Y
γ(e2Lγ − 1)
(31)
In order to calculate the total impedance, total voltage drop from input to output
V as the function of total series current I is then calculated by integrating every
voltage drop along the path from input to output. Though there are infinite number
of such integration paths, two most straightforward ones are marked in Figure 1.4,
which gives total voltage V as:
ZL
V =
ZL
Z1 i1 (x)dx + v(L) = v(0) +
0
Z2 i2 (x)dx
0
67
(32)
By applying (??) and (31) to the equation above, and using Ohm’s Law, we then
have total impedance of the model as:
Z=
(Z 2 + Z22 )(e2Lγ + 1) + Z1 Z2 [4eLγ + Lγ(e2Lγ − 1)]
V
= 1
I
γ 2 Z0 (e2Lγ − 1)
(33)
Since in most cases, two fingers in the model is identical to each other, which result
in Z1 = Z2 . Then (33) can be further simplified into a much nicer form:
Z=
k k ek + 1
( +
) × Zideal
2 2 ek − 1
(34)
where k is the ration between finger length L and the model’s characteristic length
1/λ:
k = Lγ
(35)
and Zideal is the ideal impedance of the model ignoring metal loss Z1 and Z2 , and
resulting current crowding.
Zideal =
1
YL
(36)
Figure 1.5 shows significance of current crowding in semi-series layout addressed as
Z/Zideal as a function of k. It is shown that when finger length L equals to the model’s
characteristic length 1/λ (k = 1), the real impedance is 33.2% higher than ideal case
that is without current crowding.
A.3. Experimental Validation
Current crowding effect of single-pair-of-finger structure is verified experimentally
with two-finger test structures fabricated using conventional AlGaN ohmic HFET
technologies. As shown in Figure 1.6, each finger is 5 µm in width, and 100 mum,
200 mum, 400 mum, and 600 µm in length. Space between two fingers is kept as 5
µm. Sheet resistance and contact resistance of test structures are 285 Ω/sqr and 0.52
Ω × mm, which are obtained from standard TLM characterization []. Total resistance
of each pair is measured, and 2.0 Ω probe-to-probe resistance is subtracted from the
68
2.5
Ztotal / Z ideal
2
1.5
X: 1
Y: 1.332
1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
k
Figure 1.5. Significance of current crowding in multi-finger layout as
the function of finger length
Figure 1.6. Two-finger test structure with varied length
data. Both measured impedances and analytical results according to the discussion
in previous section are shown in Figure 1.7. 0.78 µm metal thickness is assumed
in modeling to achieve best matching to the measured data, which corresponds to
0.6 - 0.8 µm estimation made according to processing condition. Analytical result
without current crowding is also shown in the plot, which deviates from measured data
and modeled result with current crowding, especially when finger length L becomes
longer.
69
30
tested data
crowding
ideal
25
Rtotal (Ohm)
20
15
10
5
0
0
2000
4000
6000
8000
10000
1/W (m-1)
Figure 1.7. Comparison between measured and modeled results
70
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