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NONLINEAR BEHAVIOR IN MICROWAVE GALLIUM-ARSENIDE MESFET AMPLIFIERS

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8609838
Gilmore, Rowan John
NONLINEAR BEHAVIOR IN MICROWAVE GALLIUM-ARSENIDE MESFET
AMPLIFIERS
D.Sc. 1984
Washington University
University
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WASHINGTON UNIVERSITY
SEVER INSTITUTE OF TECHNOLOGY
NONLINEAR BEHAVIOR IN MICROWAVE
GaAs MESFET AMPLIFIERS
by
ROWAN J. GILMORE
Prepared under the direction of Professor F.J. Rosenbaum
A dissertation presented to the Sever Institute of
Washington University in partial fulfillment
of the requirements for the degree of
DOCTOR OF SCIENCE
December, 1984
Saint Louis, Missouri
[
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WASHINGTON UNIVERSITY
SEVER INSTITUTE OF TECHNOLOGY
ABSTRACT
NONLINEAR BEHAVIOR IN MICROWAVE
GaAs MESFET AMPLIFIERS
by
Rowan J. Gilmore
ADVISOR:
Professor F.J. Rosenbaum
December, 1984
Saint Louis, Missouri
GaAs MESFETs are increasingly finding application in
power amplifiers, as solid-state replacements for TWT amp­
lifiers, the output component in many microwave transmit­
ters.
Nonlinear behavior of the amplifier can result in
intermodulation distortion, with distortion of existing
frequency components within the transmission bandwidth,
and the creation of spurious components outside it.
Such behavior affects both the capacity and quality of
communications links; its analysis is necessary to be
able to control these parameters.
A large-signal, numerically efficient MESFET model
together with a harmonic balance technique is used to
examine the interaction between the MESFET and its circuit
at different power levels.
Under single-frequency
excitation, it is found that the device can be represented
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ABSTRACT Continued
in a quasilinear fashion through its large-signal S-parameters, which are functions of the incident power at both
ports.
These are found to give good characterization at
the fundamental frequency for incident power levels up to
the 1-dB compressed output power of the MESFET.
The bandpass sampling theorem is used to modify the
harmonic balance approach to allow efficient analysis of
the MESFET when driven by two closely spaced, nonharmonically related frequencies.
Aliasing, introduced by sampling
the signal waveform below the Nyquist rate, is accounted
for and effectively removed by a repetitive frequencyshift technique.
This enables the two-tone intermodulation
response of the amplifier to be studied, as well as gain
suppression effects in limitihg amplifiers.
Device-circuit
interactions and the effects of bias and harmonic termina­
tions are studied, and compared with experimental results.
A novel scheme for intermodulation distortion reduc­
tion is proposed.
It is expected that large-signal
S-parameters will prove useful in the design of oscil­
lators and amplifiers, and that the modified harmonic
balance technique will prove to be a necessary analy­
tical tool in the design of highly linear MESFET
amplifiers.
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iv
TABLE OF CONTENTS
No.
1.
Page
Introduction....................................
1.1
1.2
Description of Nonlinear Effects in a
Microwave Circuit.........................
Existing Analyses of Nonlinear and
Intermodulation Distortion in a MESFET...
7
10
1.3
The Standard Harmonic Balance Method
29
1.4
Review of Fourier Theory.................
36
1.4.1
2.
1
Properties of the Discrete
Fourier Series.....................
42
1.5
The Madjar-Rosenbaum FET M o d e l ..........
44
1.6
Output Parameters from Analysis.........
52
1.7
Introductory Review......................
53
The Applicability of Large-Signal S-Parameters
to GaAs MESFET Circuit Design.................
55
2.1
Development of Uniqueness Criteria......
56
2.2
Determination of S-Parameters.........
63
2.3
Experimental S-Parameter Simulation.....
75
2.4
Design Examples...........................
90
2.4.1
FET Amplifier......................
90
2.4.2
FET Oscillator.....................
95
Discussion.................................
98
3. The Modified Harmonic Balance Method...........
102
2.5
3.1
Bandpass Sampling.........................
102
3.2
Nonbandlimited Signals.................... 108
3.3
Controlled Aliasing.......................
113
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V
TABLE OF CONTENTS
(Continued)
o.
Page
3.4
Solution for the Unknown Amplitude
Components.................................
3.4.1
Modified Harmonic Balance
Procedure..........................
126
Achieving Convergence.............
130
Limitations of the Technique.............
134
Testing the Modified Harmonic Balance Method..
139
3.4.2
3.5
4.
4.1
Linear Test......
4.2
Fifth-Order Nonlinearity Test............ 141
4.3
Application to a Simplified MESFET Model. 144
5. Modelling of Nonlinear Amplifier Behavior
6.
140
153
5.1
Preliminary Matching of the Model to
the NEC72089............................... 153
5.2
Amplifier Simulations and Measurements... 157
5.2.1
Intermodulation Distortion........ 161
5.2.2
Gain Suppression in Limiting
Amplifiers.........................
190
Conclusions and Recommendations...............
196
6.1
The Modified Harmonic Balance Method
6.2
Intermodulation Distortion in MESFET
Amplifiers.................................
198
Improving Intermodulation Distortion:
A New Approach............................
203
Acknowledgements...............................
213
6.3
7.
118
196
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vi
TABLE OF CONTENTS
(Continued)
No.
8.
Page
Appendices......................................
214
Appendix 8.1 Relationship Between the 1-db
Compressed Power and Third-Order Intercept
Point for a Third-Order Nonlinearity...........
215
Appendix 8.2 Error Analysis of S-Parameter
Test Setup......................................
217
Appendix 8.3
The Bandpass Sampling Theorem... 220
Appendix 8.4 Establishment of the Band-Edge
Criterion.......................................
222
Appendix 8.5 Software for Time-to FrequencyDomain Conversion...............................
226
Appendix 8.6 Calculation of Coefficients
Used in the Frequency-to Time-Domain
Conversion......................................
227
Appendix 8.7 Software for Frequency-to TimeDomain Conversion...............................
229
Appendix 8.8 The Modified Harmonic Balance
(MHB) Algorithm.................................
230
Appendix 8.9 Test of Software Using a
Fifth-Order Nonlinearity.......................
235
9.
Bibliography....................................
238
10.
V i t a .............................................
243
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vii
LIST OF TABLES
No.
2.1
2.2
4.1
5.1
Page
Large-Signal S-Parameters as a Function
of Incident Power at the Respective P o r t ......
66
Errors in Reflected Voltage, Power, and
Phase Using Both Small-Signal and
Large-Signal S-Parameters......................
73
Comparison of Analytical and Computer
Generated Terms for a Test Nonlinearity......
143
Device Performance as a Function of
Geometric and Material Parameters.............
189
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viii
LIST OF FIGURES
No.
1.1
Page
Intermodulation-Distortion Spectrum
and Measurement Setup.....................
9
1.2
Heiter's Nonlinear Channel Model.........
12
1.3
Relationship Between Power Parameters
for an Amplifier...........................
17
1.4
Tucker's MESFET Circuit M o del ............
21
1.5
Minasian's MESFET Circuit M o del..........
26
1.6
Linear and Nonlinear Partitions
for a General Circuit.....................
30
1.7
Partitioning of a MESFET Circuit.........
33
1.8
Fourier Transform Obtained from a
Sequence of Periodic Samples.............
39
1.9
Madjar-Rosenbaum Basic MESFET M o d e l ......
46
1.10
Three Terminal Nonlinear Capacitance
47
1.11
MESFET Model with Gate Charging Resistor
Replaced with a Time Delay Element.......
48
Drain Current and Output Conductance
for Modified Model........................
51
Smith Chart Plot of Large-Signal
S-Parameters...............................
67
1.12
2.1
2 . 2 (a,b,c)Relative Errors in Reflected Voltage
Waves, Assuming Linear Superposition of
Large-Signal S-Parameter Components......
2.3
Large-Signal Experimental Test S e tup
69,70,
71
77
2.4
FET Output Power Versus Input Power......
81
2.5
Smith Chart Plot of Reflection
Coefficient Loci at the Drain............
82
2 . 6 (a,b,c)Scaled Reflection Coefficient Loci
at the Drain...............................
84,85
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LIST OF FIGURES
(Continued)
o.
Page
2.7(afb,c) Scaled Reflection Coefficient Loci
at the Gate...............................
2.8
88,89
FET Amplifier Equivalent Circuit
Schematic.................................
91
FET Amplifier Output Power Versus
Delivered Power..........................
92
2.10
FET Oscillator............................
97
3.1
Bandpass-Sampled Spectrum of
Simplified Distortion Spectrum..........
104
Fourier Representation of a Slowly
Sampled Bandlimited Signal..............
106
3.3(a,b,c) Bandpass Filter Spectral
Characteristics..........................
112
2.9
3.2
3.4
Bandpass-Sampled Spectrum After
Frequency Translation.................... 116
3.5(a,b,c) Aliased Spectrum and the Foldback
Technique.................................
4.1
4.2(a,b)
Replacement of a Series Resistor
by a Delay Element.......................
121
146
Output Power Versus Input Power for
Optimum Gain and Optimum Power Loads.... 149,150
5.1
Complete FET M o del........................
156
5.2
Complete FET Amplifier Circuit and
Parasitics................................ 158
5.3(a,b)
Power
Curves for V GS=-0.25 V o lts........
162,164
5.4(a,b)
Power
Curves for V GS=-0.50 V o lts........
167,168
5.5(a,b)
Power
Curves for V Dg=4.0 V o lts.......... 170,171
5.6(a,b)
Power
Curves for RpB=100ft...............
174,176
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X
LIST OF FIGURES
(Continued)
No.
Page
178,179
5.7(a,b)
Power Curves for RpB=1000Mft..............
5.8 (a,b)
Power Curves at Optimum Bias P o i n t
5.9
Unequal-Level Tone Power Curves,
3 dB Apart...............................
192
Unequal-Level Tone Power Curves,
5 dB Apart...............................
193
5.10
181,184
6.1
Linear Output Characteristics............ 200
6.2
Novel Intermodulation Distortion
Improvement Scheme.......................
6.3(a,b,c) Power Curves Using IMD Improvement
Scheme....................................
8.2.1
Signal Flow Graph of Large-Signal
Test Setup...............................
205
207,208
211
218
8.3.1
Minimum (bandpass) Sampling Frequency... 221
8.4.1
Illustration of the Bandedge Criterion.. 223
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NONLINEAR BEHAVIOR IN MICROWAVE GaAs MESFET AMPLIFIERS
1.
INTRODUCTION
In the last decade, the GaAs MESFET has become firmly
entrenched as the major microwave solid-state device for
use in amplifiers and has demonstrated its significance
in applications ranging from oscillators to mixers.
Within
the last year, MESFETs have become commercially available
in K-band (30 GHz), while devices have been experimentally
tested at frequencies as high as 60 GHz.
Initially used
solely as components in microwave receiving systems,
their increasingly higher power-handling capability has
now enabled them to be used as the power amplifier stages
in microwave transmitters.
Solid state powers of 20 W in
C-band, and 5 W in Ku-band are achievable with existing
commercial devices.
Furthermore, the advent of monolithic
microwave integrated circuits has ensured that the GaAs
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-2MESFET will remain the cornerstone of microwave solid-state
technology for the foreseeable future.
During this time, considerable effort has been expended
*
on developing models to describe FET behavior
[1-6] .
The
need for device models is readily apparent, particularly at
microwave frequencies where physical measurements, typic­
ally power based, are not only more difficult to make but
reveal less information than can be found from observation
of voltage and current waveforms at different circuit points
as can be done in lower frequency circuits.
Because of its
physical size, it is often difficult to make measurements
at intermediate points in a microwave circuit, and if the
circuit could be broken to do this, its behavior would be
quite different because of its distributed nature, and
the altered loading effects thereby introduced.
The pre­
sence of parasitic elements is an additional burdensome
factor in microwave measurements; these are the critical,
and often dominant, passive elements in microwave and
millimeter wave devices.
The continuity of the ground
plane must also be assured in microwave testing.
Finally,
the expense of the device itself, and the cost and diffi­
culty of fabrication of microwave circuitry (microstrip,
fin-line, stripline, etc.) often prohibits extensive
test and bench development time.
*
The numbers in parentheses in the text indicate
references in the Bibliography.
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-3Simple linear device models at first sufficed for
analysis of microwave circuits containing MESFETs and
gave a good understanding of circuit operation and design
that could not be achieved through measurement alone.
For example, modelling of the FET gate-to-source input
as a simple series resistor-capacitor combination gives
insight to the design needed to develop a broadband
amplifier.
Such modelling enables existing linear, two
port techniques to be used to model transfer character­
istics, input impedances, and even noise figures.
The
linear device models could be represented by compact,
two port matrix elements
(small-signal S-parameters), as
linear circuit models suitable for use with nodal analysis
programs
(such as SPICE
[7] or COMPACT [8]), or represented
as analytical equations for use with the circuit mesh equa­
tions.
Linear models in these forms enabled the develop­
ment of many low-noise receiver amplifiers and helped
establish the MESFET as an important microwave device.
The shortcomings of the linear FET model are fairly
apparent.
Many components rely on nonlinear effects for
their operation-mixers, oscillators, and frequency
doublers being
three.
In devices such as amplifiers, non­
linear effects limit the usefulness of the device.
In
order to characterize these traits and design for them, a
nonlinear model and suitable analytical methods are needed.
It is the purpose of this work to provide such tools.
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-4In an imperfect communications channel, two types of
distortion are present.
caused by dispersion.
The first, linear distortion, is
Parameters such as gain and group
delay (phase slope) have a sloped frequency response.
This causes pulse-shape distortion, as the different
spectral components comprising the pulse undergo different
gains and transit times through the channel.
Typically,
this can be equalized at the receiver by introducing an
inverse frequency characteristic.
The second type of
distortion is nonlinear distortion, which is of a more
serious nature as new spectral components can be produced.
This is caused when the channel gain is dependent on the
level of the RF signal through it.
In a microwave trans­
mission system, nonlinear distortion is a limiting factor
in the information handling capacity of a given channel.
Reduction of such distortion allows, for example, the
replacement of FM by SSB AM for analog transmission, or
an increase in the number of signal states for digital
transmission.
In a microwave transmitter, the microwave
power amplifier is usually the major contributor of non­
linear distortion.
Although the level of nonlinear dis­
tortion can be reduced by techniques such as feedback,
feedforward, and pre- and post-distortion 19], these are
extremely complex -to design.
In addition to requiring a
nonlinear model for the amplifier to be predistorted, the
predistorter must be useful over a suitable dynamic range,
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-5and must not apply frequency shaping to the input of the
power amplifier.
Yet again, the need for adequate device
description in its nonlinear regime becomes apparent.
The purpose of this dissertation is to provide a
means to model and characterize nonlinear behavior in a
GaAs MESFET circuit.
There are several ways to describe
the effect of a nonlinearity.
The next chapter will
investigate a quasilinear approach to describing the cir­
cuit, using a two-port, large-signal S-parameter matrix
capable of describing single-frequency behavior of the
FET.
Such a characterization has proven useful in micro­
wave oscillator design
[10,11],
The remaining chapters
will consider an alternate description, giving the dis­
tortion caused by the MESFET when driven with more than
one spectral component.
This multi-frequency input
problem, while using the same nonlinear model, is much
more complex to analyze because of the presence of nonharmonically related frequency components.
The FET model
remains the same; only the tools of analysis differ.
The remainder of this chapter will be devoted to a
review of the FET model to be used in this work, together
with the consideration of a computationally efficient algo­
rithm (the harmonic balance method) which enables the
single-frequency response of a circuit to be determined from
the model.
Chapter 2 then presents some results of this
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-6-
analysis and investigates the description of large-signal,
single frequency phenomena by quasi-linear two-port tech­
niques.
The validity of such description is both the­
oretically and experimentally determined.
In Chapter 3, a new analytical method is described
which allows additional nonlinear parameters to be derived
from a device model.
Known as the modified harmonic
balance (MHB) method,
the level of new frequency components
generated by mixing of two applied tones can be determined
and both circuit and device effects investigated.
Chap­
ter 4 compares the results of the MHB method with previous
Volterra series analyses, using a simplified FET model.
A single stage FET amplifier was then built to experi­
mentally examine the circuit, bias, and RF-level effects
on the interaction of two input signals.
Comparisons with
simulations using the FET model and the MHB technique
showed good agreement as different circuit parameters
were altered.
Finally, in Chapter 6, some conclusions are
drawn about the design of microwave circuits, the limita­
tions of the modelling approach are discussed, and dis­
tortion reduction methods are assessed.
General comparisons
with previous experimental observations are also made.
The
Appendices contain portions of software that are unique
to the modified harmonic balance method, with analysis
which is pertinent to conclusions made in the text.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-7In the next few sections we shall examine the means
of characterizing nonlinear behavior through measurement
and review some analytical tools which can be used with
a nonlinear model to portray nonlinear characteristics.
1.1
DESCRIPTION OF NONLINEAR EFFECTS IN A MICROWAVE CIRCUIT
Consider firstly the case of single tone excitation
applied to a GaAs MESFET.
At low signal levels for which
the device is fairly linear the output signal will be a
linear reproduction of the input.
However, as the signal
level is increased and the device enters saturation, the
gain will drop and the phase of the output may change.
These effects, known as AM/AM and AM/PM conversion, re­
spectively, are direct manifestations of the nonlinearity
of the device.
The former is of concern in amplitude
modulated systems, the latter in phase or frequency
modulated ones.
When two tones, typically equi-level and closely
spaced in frequency are applied to a MESFET, another phe­
nomenon known as intermodulation distortion results.
If
the two tones are at frequencies of f^ and f2 separated
by A = f 2 -f^, new sidebands at nf 1 - m f 2 are generated,
where n and m are integers.
If
|n-m| = 1, these products
will appear in the frequency band around f^ and f2 and are
spaced from the original signals by a small frequency m A.
i.1.
They are caused by the (n + m)
order term in the Taylor
series expansion of the nonlinear transfer characteristic
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-8of the device.
In a MESFET power amplifier, the predomi­
nant intermodulation products for most input levels are
the third-order intermodulation terms at 2f 2 ~ f]_ and
2f^ - f 2
(n,m=l,2), arising from the third-order non-
linearity of the MESFET.
The power level of the third-order intermodulation
products in a power amplifier is a useful performance
measure in describing the linearity of its behavior at
a given operating condition.
It is a useful parameter for
system design as it is indicative of the degree of line­
arity of the amplifier, its power handling capability,
and its ability to handle modulated information at desired
power levels.
Because new frequency components are genera­
ted due solely to the action of the amplifier, it is of
considerable interest to the communications systems designer
that the level of third-order intermodulation products,
at rated output power, be minimized.
The measurement of the intermodulation products, as
illustrated in Figure 1.1, is relatively simple.
are fed through isolators
one source to another)
Two tones
(to prevent injection locking of
to a 3-dB coupler where the signals
are combined and input to the amplifier.
The output of
the amplifier is viewed on a spectrum analyzer.
In addi­
tion to the third-order intermodulation products and the
two fundamental output signals, a DC component, sum and
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AMPLITUDE
UH
Amplifier
Spectrum
Analyzer
Applied Signals
Third-Order
Intermodulation Products
0
f2-f,
2frt
I '2
jJ L l
y/y/- x
, f2 2f2-f,
2f| f,+f2 2f2 3f|
3fj
FREQUENCY
Figure 1.1
Spectrum produced by a nonlinearity excited with two signals a
frequencies f. and fp.
The inset shows a typical system for
measuring intermodulation and harmonic distortion products.
-10*difference frequency components, and higher harmonics can
be visible if the bandwidth of the amplifier is sufficient­
ly wide.
At power levels approaching those needed to saturate
the amplifier's power response, fifth and higher order
intermodulation products also occur.
Obviously, the inter­
modulation products are all level dependent, decreasing
rapidly as the output power is reduced and the amplifier
made to operate in its linear regime.
This in fact is one,
very common, means of controlling nonlinear distortion.
Amplifiers are specified with saturated output power levels
far in excess of the intended range of operation.
The
drawbacks of operating in the "backed-off" mode, high cost
and high power consumption, rapidly worsen as the linearity
requirements are tightened.
is the GaAs MESFET.
The source of the distortion
As a first step in attempting to
control device and circuit design to minimize nonlinear
effects, we turn briefly to examine existing means of
analysis of nonlinear distortion before considering a
newer method.
1.2
EXISTING ANALYSES OF NONLINEAR AND INTERMODULATION
DISTORTION IN A MESFET
Numerous authors have developed models for the GaAs
MESFET and used them to seek solution of a variety of
problems.
Various methods have been applied to analyze
nonlinear distortion, each of which has its own advantages
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-11-
and limitations.
areas:
They may be broadly classified into four
analytical methods, physically motivated analytical
circuit models, integral methods
(including time domain
integration and the Volterra series), and harmonic balance
methods.
This dissertation presents a new approach in the
last category.
The first two methods have a common element:
the
nonlinear equation or model is derived from consideration
of device behavior under single frequency excitation.
The
application to the intermodulation problem with two, nonharmonically related frequencies as the excitation, follows
as an extension.
Several authors have derived analytical expressions
for nonlinear distortion products by expansion of a non­
linear function in terms of its Taylor series
most straightforward of these is due to Heiter
[12-15].
[12].
The
The
nonlinear channel is assumed to be of the form shown in
Figure 1.2.
The transfer function for this channel is
represented by an expansion of the form
eQ (t) = cQ + c ^
(t-tj^) + c 2ei2 (t-t2) + c 3e i3 (t-t3),
(1.1)
where eQ (t) and e^(t) are the instantaneous output and
input voltages, respectively.
The presence of order-
dependent time delays tj enables both amplitude and phase
nonlinearities to be accounted for i.e. both AM/AM and
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-12-
in p u t
LINEAR
WITH
MEMORY
NONLINEAR
MEMORYLE8S
8 C A L IN G
AND
8U M M A TIO N
Figure 1.2
Heiter's nonlinear channel model.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-13AM/PM effects.
For the case when time delays of all orders
are equal, the model reduces to a conventional amplitude
model, as it is then essentially memoryless.
A memoryless
approach will be inadequate to represent distortion at
higher frequencies when the distortion is noticeably fre­
quency dependent.
As stated earlier, excitation with a single frequency
provides a simple means of separating amplitude and phase
nonlinearities.
By substituting a voltage e^(t) = A cos a t
into (1.1) and expanding trigonometric products, the fun­
damental output component becomes
e
oa
3 3
(t) = [Ac. + t - A c, cos a(t, - t,) ] cos a t
1 4
3
3
1
(1.2)
+
3 3
[j A Cj sin a (t3 - t^) ] sin a t = Aa cos a t + B Qsin a t,
where the subscript a indicates the relevant frequency
component.
By defining aj°^ A cj cos a(tj-t^) and
where the subscripts j indicate here the
b1j°^ £ cjsina(tj-t1),
order of
the co­
efficient and the superscripts the relevant frequency, we
can write
A a = a lA + T a 3A
and
B a = bjA + J b 3A 3
(bx= 0) •
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-14-
Thus
eo a (t) = >/A a 2 + B a 2 cos <a t + V
because B
<< A
OL
= A a cos (at +
'
for c-j small, and where
—
(X
$ =arctan
a
B
(^-)
a
B
.
a
Single tone tests can be made to allow determination of
the unknown coefficients.
The gain coefficients
determined by plotting the oiltput power
1 2
can be
2
= A a versus
input level A, and the phase coefficients bj by noting the
phase change versus A.
The sign of a^ determines the na­
ture of the amplitude nonlinearity, being "expansive" for
a^ > 0 and compressive for a ^ < 0.
Most practical devices
are compressive and frequently specified in terms of the
1 - dB gain compression point Pa
which is the output
power level where A / a ^ A = 0 . 8 9 i.e a reduction of 1 - dB
from linear power.
The AM - PM conversion coefficient k a can
in degrees/watt of
input power. For third-order
be expressed
devices
operated in the linear region where A a = a^A,
k
<j>
- b~
~ — S- = x —
a ,2
4 a.
A
1
= constant
is independent of power level and a convenient measure of
the phase nonlinearity of the device.
For the case when
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-15(memoryless model) , <|»a = 0 and AM/PM effects are
absent from the modelling.
Heiter
[12] then examines two-tone, three-tone, and
noise loading tests as a means of classifying the nonlinearity, the intent being to probe the signal spectrum
as closely as possible to that of the actual system load.
For the purpose of microwave amplifier design, the two-tone
intermodulation test is the most widely accepted (if
imperfect) way of indicating amplifier performance in a
communications system.
The device is excited by two equal-level tones at
radian frequencies a and 8:
e (t) = A (cos at + cos 6t) .
o
By substitution into the nonlinearity and expansion as be­
fore, the output components are of the form
e
na + m 3
(t)
= A„„ , ~cos (na + mg) t + B_„ , _ Qsin (na + mg) t
na + mg
na + mg
with amplitudes
+ 9/4 a(3a) A 3 + .. .
A a=
A
2a±B
= — a (2a±g)^3
4 3
** *
(1.3)
(1.4)
u
'
and corresponding expressions for B a and B 2a+g*
These results are highly instructive in yielding
several useful
described by
rules of thumb for devices which can be
a third
order nonlinearity. The output
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-16amplitude of the fundamental A a increases linearly with
input power A until the second term in Equation (1.3)
causes gain expansion or compression (depending on the
size of aj) .
The third order intermodulation distortion
products (henceforth abbreviated as IMD) increase as the
cube of input power.
On a logarithmic (dB) scale, this
is a rate increase of 30 dB/decade.
As shown in Figure 1.3,
the intercept point is defined as that power level Pj at
which the IMD power ^ 201-8 wo u 13 intercept
results were extrapolated (dotted lines)
power region.
if low-level
into the high-
All power levels are referred to on a
per-carrier basis (and not total power).
It can be shown
(Appendix 8.1) from these results that for third-order
devices,
PI = P a , l d B +
where
10 *6
[dBm],
is the output power level at which 1-dB gain
compression has occurred for a single input tone.
Further­
more, because the second term in (1.3) is now propor­
tional to 9/4 ajA^ (and not to 3/4 a^A^ as in (1.2)), the
new ldB gain compression point at the output, determined
by measuring the total power in the two output signals,
will be log^g(3/2) = 1 . 7 6 dB lower than that for a single
carrier.
This is intuitively understood by considering
the additional power "lost" in the intermodulation side­
bands when two carriers are present.
The total (wideband)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-17-
Px
Figure 1.3
Relationship between fundamental
output Pew third order intermodu­
lation product T?2 a_g/ an^ input
power P IN per carrier for a thirdorder nonlinearity, showing the
third-order intercept point Pj
and single-tone 1 dB compressed
point Pa>ldB.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-18power will be the same in both cases.
Perlow [13] has
also performed some interesting analytical third-order
distortion
analysis.
He notes that the outputs at
2ot±£ appear to be caused by the mixing of the second
harmonic of one signal and the fundamental of the other.
This might result in the erroneous conclusion that if the
second harmonic is eliminated, intermodulation distortion
will be eliminated.
Second harmonic reduction may be
accomplished by decreasing the magnitude of C 2 , the second
order term in (1 .1), as for example, by using a balanced
configuration.
However,
if this decrease in the magnitude
of C 2 does not affect the magnitude of 03 (hence a^), the
outputs at the intermodulation distortion frequencies are
not affected.
A major strength of the modified harmonic
balance technique presented later is that higher order
effects,
such as arising from impressing a second harmonic
signal onto the PET with a fundamental, can be accounted
for relatively easily.
Perlow [13] also derives a very
simple expression relating the intermodulation distortion
ratio for a third order device to the AM/AM and AM/PM
conversion characteristics measured for a single signal.
The gain saturation, g c ' , is defined as the ratio of the
fundamental output amplitude to the small-signal fundamen­
tal output amplitude, for a single signal of input level
A^'.
gc' is a complex quantity accounting for both
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-19-
amplitude and phase distortion.
The intermodulation
distortion ratio, imr, is defined as the ratio of the
amplitude of the intermodulation distortion to the ampli­
tude of the fundamental output.
If the total power of
two signals of level A 1 each is equal to the power of
the single signal i.e.
1 2
2
(Ax )2 = 2A1^ /
the intermodulation distortion ratio is given by
imr = gc
I
- 1.
This is most easily determined graphically.
Recalling
Equation (1.4), the phase angle of imr must remain cont
stant.
The locus of points corresponding to gc - 1 is
therefore a straight line extending radially from the
origin at an angle
|gc 'I sin A
0 = arctan (--- ;------ a--- ) ,
|gc |cos <f>g-l
where
|gc | and <}>g are the magnitude and phase of the gain
saturation at any point.
Takayama et al
[14] have derived a fifth-order
analytical expression relating input and output voltage
which is curve fitted from single tone measurements of
AM/AM conversion and AM/PM conversion.
By using the same
expression for two-frequency inputs, good agreement was
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-20achieved between the calculated and measured third-order
intermodulation distortion spectra.
Analytical approaches are useful in predicting gen­
eral trends of most of the nonlinear performance indicators
for the GaAs MESFET.
These approaches work particularly
well for the Si bipolar transistor, which is accurately
described by a third-order power series.
such approaches are poorly motivated.
Unfortunately,
They provide no
cause-effect relationship, and give no insight to either
the semiconductor or circuit designer.
They rely on empir­
ical measurements and curve fitting to quantify the nonlinearity chosen.
Finally, higher order effects due to the
presence of higher harmonics as voltage inputs, and self
biasing, are not accounted for at all.
By extending small-signal, linear models into the
nonlinear realm it is possible to derive analytical ex­
pressions for intermodulation distortion products that are
physically motivated
[16,17].
The major problem in
"nonlinearizing" a small-signal model is in determining
which elements of the model should be nonlinear, and to
what degree.
The small-signal model used by Tucker [16]
is given in Figure 1.4.
of Minasian
This is basically similar to that
[18], which will be considered in more detail
in the next section and in Chapter 4, when used to test
the modified harmonic balance method.
Tucker's model is
a simplified unilateral model which incorporates
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-21-
GATE
Figure 1.4
DRAIN
Tucker's extended small-signal model
for the GaAs MESFET and embedding
circuit.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-22nonlinearities in the gate (C^), the transconductance (gm ) ,
and the drain of the device (gD and CD ) .
consists of two components,
The drain current
dependent on the input
circuit voltage v^(t), and iy(t), dependent on the output
circuit voltage.
Third-order analytical expressions
are used to represent these currents as functions of the
relevant voltage.
The coefficients of these expressions
must be obtained either from low-frequency measurements
of each of the nonlinearities, or from measured distortion
data at microwave frequencies.
Tucker obtained the linear
terms from small-signal scattering parameter measurements;
higher order terms were derived from a series of smallsignal intermodulation measurements as a function of
load, and from measured gain compression data.
Having
found the coefficients empirically, analytical expressions
for AM/AM, AM/PM, and third-order intermodulation distor­
tion products could be calculated at a number of different
power levels, in a manner very similar to that used by
Heiter
[12].
The advantage of this approach, i.e. of
incorporating analytical expressions into a conceivable
device model, is that the mechanisms causing distortion
are more readily apparent, and circuit effects can be
accounted for.
As before, the same parameters that
affected the values of AM/AM and AM/PM also determine
the intermodulation distortion, but no simple relation
exists between them.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-23The work of Higgins and Kuvas
[17] is also noteworthy,
as the nonlinearities in gD , gM , and CQ (using the same
model) were taken to the eighth power, and CQ was assumed
linear.
In this case, the coefficients were calculated
for several different one-dimensional doping profiles.
A modified Shockley model for the FET was used to establish
the current, gate capacitance, transconductance, and output
conductance over a range of bias conditions; from these,
the polynomial expansion coefficients could be obtained
directly.
Tucker
By using the analytical expressions derived by
[16], predictions of IMD level for different
doping profiles were obtained.
The limitations of approaches such as these are
clear.
By attempting to extend a small-signal circuit
model to the nonlinear regime, arbitrary assumptions must
be made in choosing which elements are to be nonlinear.
Minasian
[18], for example, has derived a nonunilateral
model, in which the gate-drain feedback capacitance is
nonlinear, but the output drain-source capacitance is not.
Gupta
[20] assumes the contribution of the output conduct­
ance G q to the intermodulation distortion is small and
neglects its effect, while Higgins et al [17] believe that
this in fact provides the dominant contribution at low
power levels.
The second area of difficulty with such an
approach lies in the extensive characterization needed to
determine the coefficients in the Taylor series expansion.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-24While a useful technique for pinpointing the mechanisms
causing intermodulation distortion and for providing broad
circuit related guidelines, it is of limited use in
circuit design due to the extensive device characterization
needed to describe different devices at more than one
bias level.
The third category of nonlinear analysis methods is
those that can be treated using integral techniques. Perhaps
the most widely used steady-state dynamic nonlinear circuit
analysis method is numerical time-domain integration [21 ,22 ].
State-variable differential equations are derived for the
circuit, and initial guesses are assigned to the state
variables.
This results in an initial value problem.
Numerical integration then proceeds until steady-state is
achieved; that is, all of the state variables assume the
same values at the beginning and end of a period.
This
method can be used for autonomous systems such as the
oscillator, or for driven systems such as the frequency
doubler
[22].
It has not been used for intermodulation
performance prediction because the modulation and beat
frequencies are typically orders of magnitude smaller
than the microwave carrier frequency.
This would necessi­
tate integration over hundreds or thousands of microwave
periods after steady-state has been achieved in order to
extract the intermodulation response.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-25Another approach involving integration is the use of
a Volterra series expansion [18].
The Volterra series can
be regarded as a nonlinear generalization of the familiar
linear convolution integral.
The time domain output v(t)
of a nonlinear circuit can be found from the nonlinear
transfer functions hn (T]/T 2 '* *Tn^ usin9
*<«where
v^t) =
n l l vn (t)'
|
—
00
oo
v 2 (t ) =
| { h 2 (T1 ,T2)Vi n (t-T1)V.n (t-T2) dTLdT 2
— 00
OO
vn tt)=
| |... |
V
Tl'T 2' " Tn> ”
— 00
A
V i n (t' Tn,aTnJ.
An equivalent frequency domain representation is achieved
by using the Fourier transform to yield terms of the form
00
vn (t) = {}•*•} Hn (u)l,(1)2 /’ *
— oo
^
,(V i=1 v in (fi) exP
.n
(j2nfit)dfi*
In order to obtain the higher order Volterra kernels
H n (^i,... d)n ) , a large-signal circuit model is also re­
quired.
The model used by Minasian is shown in Figure 1.5
and incorporates a feedback capacitance CD -
The higher
order transfer functions can be found recursively from
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-26-
II
bRflIN
Co •
t v LA5 1
T
-
Sate
*
i
C f .a a a pF
CbS»-067 pF
Ri-- 4 f a
Figure 1.5
Minasian's extended small-signal
model for the GaAs MESFET.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-27the lower order transfer functions, using Kirchoff's law
and writing nodal equations for the model.
The expressions
for the fundamental and third order intermodulation output
voltage respectively are
V0 l " Vi J Hl (“l) I cos ( w ^
3
Vg3 _ j
3
+/&,(m,) ]
(j^) I cos [(210^-0)2)
/
,
enabling the intermodulation distortion to be determined.
The limitations on the use of a Volterra series approach
are that the Volterra kernels are extremely awkward to
measure and nearly as difficult to calculate if a model is
available.
Furthermore, the degree of nonlinearity must be
mild, as the representation otherwise requires an intract­
ably large number of terms for adequate modelling precision.
In this instance the use of a Volterra series to analytical­
ly extract the intermodulation distortion from an analyti­
cal model (rather than with measured Volterra kernels)
is
of limited interest.
The final category of analytical tools is the harmonic
balance approach.
This is a hybrid time-and frequency-
domain approach, which allows all the advantages of a time
domain device model to be combined with the strengths of
steady-state frequency-domain techniques to represent the
lumped and distributed circuit elements in which the device
is embedded.
The time-domain model can be completely
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-28general; laborious determination of coefficients by curvefitting over different bias levels is bypassed.
The
approach requires a large amount of software to be set up
initially.
However, like SPICE, the routines need not be
devised around one particular model, and permit great
flexibility in the choice of both embedding circuit and
device model.
The drawback of the harmonic balance approach is that
it has been used principally for harmonically related
frequency inputs i.e "single-tone" excitation.
It has been
useful in the design of amplifiers and oscillators
[23,24],
and in the modelling of harmonic distortion effects, such
as gain compression and AM/PM conversion.
Kawano
In 1982,
[25] devised a method of bandpass-sampling that
allowed, for the first time, the efficient analysis of two
nonharmonically related inputs to the MESFET model.
An
effective downconversion of the two signals was achieved
by sampling the time domain output waveform at a slow
rate, and, in the Fourier transform, translating the new
frequency origin to a point exactly between the two driving
tones.
This enabled the third order intermodulation pro­
ducts to be effectively treated as a third-harmonic signal.
However, the analysis was strictly small-signal, as the
aliasing effects of higher harmonic signals were not
considered; additionally, only equal-level input tones
were possible.
A contribution of the present work is to
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-29-
remove these
restrictions
and to allow the power of the
harmonic balance technique to be applied to the general case
of nonharmonically related inputs of any amplitude
1.3
[26].
THE STANDARD HARMONIC BALANCE METHOD
The harmonic balance method
[27,28] is an important
means of analysis for nonlinear systems.
Consider the
system shown in Figure 1.6, in which a device model,
including its parasitic circuit elements, is embedded in
some linear circuitry,
so that the total circuit performs
some desired function.
When partitioned as shown in the
figure, all of the nonlinearities associated with the cir­
cuit are lumped into the "nonlinear" side of the circuit;
the device parasitics
which are constant, linear elements,
and the embedding circuitry, are partitioned into the
"linear" portion.
In circuit analysis, nonlinearities are most usually
represented by relating terminal quantities, such as vol­
tage or current, to each other by some nonlinear function
g (•).
The parameters of g (•) are typically functions of
time.
For example, for a simple Schottky diode, the diode
current i(t) is related to the terminal voltage v(t) at
the same instant of time by a relation such as i(t) =
Ig exp
[ ^ v(t)].
Similarly, for the MESFET, the gate
current i^(t) and drain current i 2 (t) can be given (in
matrix notation) by an explicit nonlinear function g(*),
the parameters of which are the gate and drain voltages
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-30-
NONLINEAR
LINEAR
Embedding
Circuitry
Device
Porosities
FREQUENCY
DOMAIN
Figure 1.6
Device
Model
TIME
DOMAIN
Division of a general circuit into
nonlinear and linear partitions
(frequency and time domains).
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-31and their first order time derivatives at the same instant
of time
[i(t) ] = [g( [v(t) ], [ * ^ 1 ] ) ] .
A similar time-domain representation could be found to
represent the linear partition.
If each branch of the
linear circuit contained both inductors and capacitors,
then the current in that branch could be related to some
control voltage by a second-order, linear differential
equation.
The set of such equations representing the
linear partition could be solved simultaneously, in terms
of the variables at the partition interface, and time-domain
integration then used to achieve a solution.
The disadvan­
tage of this approach for steady-state, nonlinear analysis
is that if the time constants associated with the linear
partition are large (as with bias and blocking capacitors
and RF chokes), many cycles of integration may be required
until a steady-state solution is achieved.
The harmonic balance method presents a much more
efficient approach for steady-state nonlinear analysis
whenever the nonlinear function g(.) relates several
parameters at the same instant in time.
The efficiency
is achieved by treating the linear partition in the fre­
quency domain i.e. by using phasor representation.
In
this way, elements of differing time constant correspond
simply to elements of differing amplitude.
Furthermore,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-32a compact two-port matrix representation H[f] can be used
to represent a linear network of any size by relating
only the desired interface terminal quantities to each
other.
The partition between the time and frequency domains
(corresponding to the nonlinear-linear interface) naturally
suggests the use of Fourier theory to achieve a steady-state
solution.
A review of the discrete Fourier transform will
be given in the next section; however, in order to motivate
that section, the standard harmonic balance technique will
be outlined here.
The linear-nonlinear partitioning has been applied to
the circuit in Figure 1.7.
The linear circuit is de­
scribed, at some frequency u>, through a hybrid matrix H[<o]
and its phasor input quantities
(applied voltages)
and currents i^/i 2 (assumed known):
r
“i
V1
V2
T
CM
|-H
1
J
.1
C “
H
to
V2
--- 1
L
Z1
H(w)
(All quantities are assumed to be phasor quantities unless
specifically represented as functions of time).
The left
hand side of the equation represents the output variables.
Similarly, the nonlinear MESFET model relates the terminal
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
STANDARD HARMONIC BALANCE
-T
'
*2^
Drain
i
2
Linear
Circuit
And
Parasitics
Nonlinear
•
•
Ji
Gate
MESFET
Model
l « ■ « (*!),“ ? )
wi
Source
I
FREQUENCY
DOMAIN
I
TIME
, DOMAIN
I
I
Figure 1.7A partitioned MESFET circuit.
Applied gate
and drain
voltages and relevant terminal voltages and currents
are indicated.
I
u>
(.0
I
-34-
voltages and their derivatives to the terminal current,
at each instant in time
dv, (t)
2^ '
dt
dv-(t)
'
cFE
(1 .6)
^'
The problem is then one of finding a self-consistent
set of parameters at the interface, I^,I 2 ,i^,i 2 ,v^,v2 , so
that both the linear and nonlinear constraints are simul­
taneously satisfied.
Once this has been achieved, the
total currents 1 ^ and I 2 delivered from external voltage
sources
and V 2 are then easily found.
The constraint
may be expressed mathematically by
[iv (t) ] = Re E
[I. (nw) exp (jnoit) ] ,
n=0
K
(1.7)
which is just a statement of Kirchoff's current law at the
interface nodes.
A similar expression relates the phasor
components v^(nui) and v 2 (nw) at the interface to v^(t) and
v 2 (t).
For simplicity, only the first N harmonic compo­
nents are considered (N=7 here).
The harmonic balance
algorithm then proceeds as follows:
1.
Initial guesses are established for the terminal
interface current phasors I(nw) at the DC, fundamental,
and harmonic frequencies (n=0 ,l,...7).
2.
The hybrid matrix H(nu))
at each harmonic,
is calculated at DC and
for the. linear circuit.
This is used in
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-35-
(1.5), with I(noj) and the known applied voltages V.^ and
V 2 , to calculate the phasor components v^(nu>) and V 2 (nw).
3.
Using an expression similar to (1.7), and its
derivative, time values for v(t) and
ted from the phasor components.
may be calcula­
Using (1.6), the corres­
ponding interface currents i(t) may be found.
4.
Using the discrete Fourier transform the harmonic
phasor components i(nw) may be extracted from i(t), if
time samples of i(t) are available at the Nyquist rate.
5.
An error function is formed to compare the pre­
vious current estimates with those just calculated
N
E ^i l ,i2 ,^l'^2^= n- 0 ^ i l^na)^
6.
2
+ !i 2 (na)) “ ^2
2
I ^
The error function is minimized by forming new
initial guesses for the current phasors I(no)
from the old
estimates, and repeating steps (2 )-( 6) until the error
function lies below some threshold.
At this stage, the
linear and nonlinear partitions give self-consistent
results, since the currents in the interface branches are
self-consistent.
Transformation from the frequency domain to the time
domain is easily achieved, since the phasor quantities
are simply coefficients of a corresponding sinusoid, as
given in Equation (1.7).
The inverse transform, from the
time to the frequency domain, is also needed to recover
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-36-
the phasors from the waveform samples given by the non­
linear model.
This necessitates calculating the value of
the waveform at several instants of time.
If the instants
in time are periodically spaced, the discrete Fourier
transform may be used to achieve the desired conversion.
1.4
REVIEW OF FOURIER THEORY
Since extensive use of the discrete Fourier transform
is made in the remainder of this work, a brief review of
its major elements is in order.
Consider an analog signal *a (t) with Fourier trans­
form X
cl
(jft).
The signals are related
[29] according to
OO
*a(t)
-Er
) Vi«>e3ataB
or, alternately
OO
The proof is simply by backsubstitution, interchanging
the order of integration, and using orthogonality.
We may then derive a sequence of points x(n) from x a (t)
by periodic sampling every T seconds, where
OO
x(n) = x & (nT) =
X a (jfi) e ^ nTdSi.
(1 .8)
An alternative approach to consideration of discrete­
time signals is to consider a linear system with transfer
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-37-
response h(t).
If a sequence x(n) = e^un for -<»<n«® is
input to the system, then the output y(n)
is given by
convolution as
y (n) =
E*
h(k)ejw(n~k)
k=-~
= e^“n E°°
h(k)e-^ ^
k=-»
By defining Hgfe-^) =
^k=-«» k(k)e ^u k r
(1.9)
(sampled Fourier transform), one can write y (n)=Hg (e^a))e -1u n ,
where H ( e^ ^
b
describes the change in amplitude and phase
of a complex exponential as a function of frequency a).
Equation (1.9) is simply a Fourier series, where the
Fourier coefficients
are h(k).
Multiplying
e -5**311 and integrating
over w, and using
(1.9) by
orthogonality one
obtains
i;
(1.10 )
h(n)=^ r j
H s (eja))eja)ndu).
— 7T
Comparing Equations (1.8) and (1.10), which are two
representations for the discrete time sequence, changing
variables in (1.10),
and letting ui=QT, yields
„ , ju>.
1
v ,jw , .2irr.
X s (eJ ) = = I
X ( ^ - + D - f “ ).
r=-<»
...
(1.11)
The dimensions of u are radians, so that ft corresponds
to an analog frequency.
Recall that T is the sampling
interval.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-38-
The importance of the result (1.11) is shown in
Figure 1.8.
An analog waveform x, (t) has the spectrum
ci
shown at the top of the figure, which is just X_(jft).
a
For the case shown,
the signal is bandlimited to
If x (t) is not known at all instants of time, but known
a
only at x(n),
using
(n=-«to n=+~) , then Xg(e^a>) may be calculated
(1.9), and is shown at the bottom of Figure 1.8.
Because of the periodicity of the phase angle u», the re­
sultant waveform obtained is a scaled, periodically
repeated version of the original frequency spectrum X (jft),
(2q
as given by Equation (1.11).
For -j-< ir/T i.e. fsampie=
1/T >
, then no aliasing, or overlap of the periodically
repeated waveforms, occurs.
Nyquist sampling:
This is just a statement of
if time domain samples of an analog
waveform are taken at a rate at least twice the highest
frequency component of X a (jfl) , then Xg(e3ai) is identical
to X (3“/T)
easily shown
in the interval -ir<a)<ir.
Furthermore, it can be
[29] that the original analog time waveform
may be reconstructed from the samples using
x (t) =
a
Z*
x (kT) si.n[(VT) (t-kT) ]
- oo a
(tt/t ) (t-kT) *
jU
The problem with finding the Fourier transform of a
lowpass signal x_(t) from its samples using Equation (1.9)
a
is that an infinite number of samples are required in the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-39-
SL
-27V
Figure 1.8
The bottom curve shows the Fourier
transform of the sequence obtained
by periodically sampling the waveform
whose spectrum is shown at the top.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-40summation (but the frequency spectrum is then continuous
and may be found at all values of to) .
In the special case
of a periodically repetitive waveform, which has only a
finite number of spectral components, a discrete Fourier
series may be used.
The discrete Fourier transform (DFT)
is similar to this, and is a Fourier representation of a
finite length sequence which is assumed periodically
repeated.
The discrete Fourier transform corresponds to
samples, equally spaced in frequency, of the Fourier
transform of the signal.
Because we are restricting our
attention only to certain values of frequency, the summa­
tion need no longer be performed over an infinite number
of time-samples.
The construction of the discrete Fourier transform
is most easily achieved by applying the same approach as
above to an infinite length sequence.
sequence
Now, however, the
is periodic, with period equal to the finite
length of the desired waveform interval.
Consider an
N-point sequence periodically repeated:
x(n)
x(n) = x ( n + kN)
If x(n)
n = 0 , 1 , 2 . . .N-l, with period N
k an integer.
is represented as a Fourier series, with radial
terms that are integer multiples of the fundamental angle
2tt/N associated with the periodic sequence, then the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-41-
highest harmonic angle that need be considered is the
(N-l)st, due to the periodicity of angles greater than
2tt .
Thus let
i
N—1
x(n)=±-Z
N k=0
• / 2 tt« .
X (k) e^
N
,
(1.
where the desired Fourier coefficients are X ( k ) .
multiply
N-l
Z
(1.12) by e“ ^ ( ^ ) nr and sum from n = 0
.,2tr.
. N-l
x(n)e'](T )nr = h
n=0
N-l
. Z
n=0
N-l
= Z
X(k)
k=0
,N-l
Z
Nn=0
12)
Now,
to N - l ,
,2tk
Xfkje3 ( N )n(k”r)
k=0
. ,2ir.
, ,
eD ( N )(k-r)n]
N-l
= Z
X (k) 6.
k=0
Kr
N-l
..2irv
X (r) = Z
x(n)e-:j N
n=0
or
N-l
.,2ik
X(k) = Z
x(n)e-^ N
n=0
.
(1 .13)
Comparison with (1.9) reveals that this is equivalent to
the sampled Fourier transform given there; now, however,
the summation is finite, and only discrete angular fre­
quencies to are considered.
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-42-
Note that the Fourier coefficients X(k) given by
(1.13)
are periodic in N,
X(k) = X ( k + i n t e g e r x H) /
so that there are only N distinct coefficients in the
Fourier series representation of a periodic sequence.
_ -i ( I Z . )
By letting WN = e J
N
, the discrete Fourier series pair
may be written from (1.12) and
X(k)
(1.13) as
N-l
.
= I
x(n)W„
n=0
(1.14)
x(n)
1.4.1
1 N_1
-kn
X(k)W„ Kn
N k=0
N
Properties of the Discrete Fourier Series
In practice, equation (1.13)
is not directly used to
extract the desired fundamental and harmonic components
of frequency from the time samples x(n)(n=0,1,...N-l),
'obtained from the nonlinear model.
algorithm
Rather, a Goertzel
[29] is used, which exploits some of the
symmetry properties of the transform, thereby enabling
considerable improvement in computational efficiency.
However, the basic properties of the discrete Fourier series
may be related directly to Equations
(1.13) and (1.14).
Although elementary in nature, their understanding is
essential for later development when aliasing will be
considered in the case of band-pass sampling.
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-43-
(1)
Shift of a sequence:
Because the Fourier
coefficients are a periodic sequence, the values of the
periodic sequence X(k+1) with 1 an integer, are just the
Fourier coefficients of the sequence W Nn ^x(n) (using
Equation
1>N
(1.14)). Any shift 1 greater than the period
cannot be distinguished in frequency from a shorter
shift 1- = lmodulo
(2)
Symmetry properties:
Re[X(k) ] = Re[X(-k) ]
Im[X(k) ] = - Im[X(-k) ]
(from (1.14), using real and imaginary parts of WN ) .
Thus, once N/2 Fourier coefficients of the N-point
sequence x(n) have been obtained, the remaining N/2
coefficients may be obtained using the symmetry property.
This is simply a statement that the frequency spectrum
of a waveform is even in real part and odd in imaginary
part about the origin.
Due to the periodicity introduced by the sampling
process, aliasing results in exactly the same way as
before, when an infinite-sequence length was used and the
sampling interval chosen was too long.
By using a discrete
Fourier transform, the frequency spectrum can be found at
discrete frequency points, with fundamental radian angle
w=
2ir
/N, corresponding to fundamental radian frequency
2 tt
/NT, with T = sampling interval.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-44-
In the case of the standard harmonic balance method,
where a single frequency excitation fo is used
[27], the
resulting time waveform at the linear-nonlinear interface
will also have fundamental frequency fo.
However, due to
the nonlinearity, higher harmonics may be generated.
Since
the resulting frequency spectrum of the interface waveform
will be discrete, with frequency components at DC, fo, 2fo,
3fo,
..., choosing T = sampling interval= 1/15fo and N = 15
will be satisfactory for DFT representation if harmonics
greater than the seventh are negligible.
This is because
the sampling rate is greater than the Nyquist rate (to pre­
vent aliasing), and the discrete Fourier transform will
yield coefficients with fundamental frequency
its first seven harmonics.
an^
Note also that the applied
excitation could have harmonic content as well, with no
change needed in the time to frequency algorithm.
In
this case, the discrete Fourier transform gives the total
frequency spectrum (a line spectrum)
as only the funda­
mental and its discrete harmonic frequencies are present.
1.5
THE MADJAR-ROSENBAUM FET MODEL
A large-signal, physically based, time domain model
for the FET has been extensively studied by both Madjar [1,2]
and Green
[22].
The input data required by this model
includes gate length and width, active layer height,
built-in potential of the Schottky barrier, and physical
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-45-
constants associated with GaAs.
In addition to the drain
conduction current, the Madjar-Rosenbaum model calculates
transconductance gm, GD0M=
d /^ v d s
^V D S =
e lectron transit
time t , and R , an effective series gate-charging resistance.
The equivalent circuit is illustrated in Figure 1.9.
An incremental capacitance matrix is also determined, to
allow calculation of the gate and drain displacement cur­
rents from the first order time derivatives of v^ and v 2 .
The current-voltage relationships for this three terminal,
nonlinear, nonreciprocal capacitance are shown in
Figure 1.10.
A more complete model, which includes gate conduction
current diodes to account for forward and reverse breakdown
effects, is shown on the top of Figure 1.11.
By modelling
the effect of the series gate-charging resistor R
as a
time delay element in the gate voltage applied to the
three terminal capacitance, as in Green [22], explicit
calculation of total gate and drain currents i^ and i2 is
now directly possible from the Fourier components of the
time delayed voltage v^, and the drain voltage v 2 .
modelling change is shown in Figure 1.11.
This
Such a step is
essential in efficient calculation of network response,
because it enables the interface current arising from the
nonlinear MESFET model to be calculated explicitly as
functions of the applied voltages at the interface
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-46-
MESFET CROSS SECTION
"ACT IVE*
REGION
SOURCE
GATE
Jjn^n£
DRAIN
J
EPI
SUBSTRATE
EQUIVALENT CIRCUIT
DRAIN
;dk
GATE
#
SOURCE
Figure 1.9
Equivalent circuit for the MadjarRosenbaum basic MESFET model.
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-47-
te l — [V I — Pcn Cizl A. f"vi
UoJ “
LfeJ
~
L?zi CzzJ" lVs.
WHERE:
C«=C^(v,,Vj)
/^--V2
Figure 1.10
Terminal currents and
voltages for the non­
linear, nonreciprocal
three terminal capaci­
tance of Figure 1.9.
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-48-
iw r
tv?
W W
BMW*
ISPLACEMENT
"H
lu
CO*V
GO
X3
fv?
y n ( M >
GATE CONDUCTION
CURRENT DIODES
Figure 1.11
GATE VOLTAGE
DELAY
<r seconds)
THREE TERMINAL
NONLINEAR,NONRECIPROCAL
CAPACITANCE
MODELLING DISPLACEMENT
DRAIN
CONDUCTION
CURRENT
The nonlinear MESFET model shown with a
gate charging resistor R , and an equiva­
lent representation in wnich the effect
of R c has been accounted for by a time
delay of t seconds in the gate voltage V^.
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-49-
terminals.
Previous authors [28] had to use numerical
integration to calculate the currents arising from the
terminal voltages due to the use of more complex model
topologies.
This represented a considerable burden since
integration was required every iteration of the harmonic
balance loop.
The explicit representation of the currents
i in terms of the applied voltages v and their time de­
rivatives enables this model to be readily adapted to
frequency-domain simulation techniques such as harmonic
balance.
As shown on the figure, the drain current consists
of three components:
the displacement current through the
nonlinear capacitances, which are calculated by the Madjar
model,
the conduction current, and the current due to re­
verse breakdown of the gate-drain diode.
In this work, an
alternate expression for the conduction current component
was used, similar to that developed by Curtice
[4],
It
consists of two t e rms:
I
('V c ^ - V J * [8tanh (nV_Q )+
(1.15)
0
The first term of the sum accounts for behavior at
low V D S , and the saturation effect of the current as the
drain voltage is increased.
The second term is similar
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-50-
to a leakage current term, and accounts for the finite
incremental output conductance GD of the FET (i.e. it
measures the slope of the current characteristic).
The
square-law relationship of current to gate voltage is
typical of FETs in general.
These terms are illustrated
in Figure 1.12.
The coefficients B and o are obtained indirectly from
the Madjar model, which yields values of saturated drain
current ID S S » pinchoff voltage Vp , and GD Q M .
Matching at
the condition that v s G = ®'
p „ IDSS
P
2
vp
and
„
g dom
I
DSS
The term G SUBST
be .045 xG„_„,
DOM
in (1-15) is taken in this work to
from measurements made of the small-signal
output impedance of the FET.
This factor also accounts
for leakage current through the bulk semiconductor.
Agreement with measured DC drain current was found to be
good over a range of biases.
The Madjar model could not be called directly from
the harmonic balance software because of its large memory
requirements.
Rather, it is called once first to enable
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-51-
Figure 1.12
Drain current predicted by the
Curtice expression (1.15) as a
function of V Dc showing both
components, ana output con­
ductance Gn as a function of
V SG*
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-52-
the creation of a data look-up table, which contains the
basic model parameters.
With this modification, quasi-static
large signal analysis could be efficiently achieved by means
of the harmonic balance loop, which accesses the data
look-up table.
1.6
OUTPUT PARAMETERS FROM ANALYSIS
The purpose of the harmonic balance loop is to equalize
the nonlinear and linear current flowing in the (same)
branches at the partition interface.
Once these are known,
the current in any branch of the circuit may be found from
the linear circuit matrix.
Usually, the current sourced
by the generator, and the current flowing in the load are
required.
These are easily found by using the hybrid
matrix H(w) which is used to model the linear circuit in
the harmonic balance algorithm.
If V GS is the applied
external voltage at the gate and IG the current sourced
through source characteristic impedance ZQ , then
V„ = V_„ - I„Z^ is the voltage at the terminals of the
b
bb
b O
physical FET circuit (including matching).
The impedance
presented by the FET and its circuit at this point is
Z« = VG/I-,
so the reflection coefficient at the gate
matching network is p =
known quantities.
ZG-Zo
+ z , and may be calculated from
G o
The desired, observable parameters of
interest at the gate are then
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-53-
1
*
Pdel = delivered power = ^ Re (VQ IG )
2
reflected power =
incident power
=
■*p
1- p 2
del
(VG S )2
.
o
Similarly, the current ID in the drain load Z i s
easily calculable from the hybrid matrix, so that the output
power is simply
pout = Re I ^ d ^ d I21Although the currents and voltages are of interest in
determining the operating regime of the FET, the parameters
of interest to compare with measurement are the powers
calculated above.
These will be of primary concern in
later analysis.
1.7
INTRODUCTORY REVIEW
This chapter has laid the foundations for solving sys­
tems with excitations which are harmonically related.
We
have reviewed all the necessary tools needed to proceed:
measurement descriptions, existing analyses, the harmonic
balance method, a complete FET model, and simple Fourier
theory.
We are in a position to move on to consider the
more difficult case, but one of great interest, when two
signals, closely spaced in frequency, interact with a
system nonlinearity to produce new, nonharmonically related
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-54signals which fall inband.
This "crosstalk in the fre­
quency domain" is potentially troublesome, and is not
readily handled by the standard harmonic balance technique.
This is because the discrete Fourier transform yields a
point spectrum best suited to handling harmonically re­
lated spectral lines.
However, a modification to allow
analysis of this more complex case is possible through
the use of controlled aliasing, which will be discussed
in Chapter 3.
Before this complete, nonlinear method is tackled,
however, we digress to consider an alternative representa­
tion for describing the nonlinear behavior of the MESFET
under single signal excitation.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-552.
THE APPLICABILITY OF LARGE-SIGNAL S-PARAMETERS TO GaAs
MESFET CIRCUIT DESIGN
Scattering parameters are a matrix representation of a
linear circuit, relating transmitted and reflected voltage
wave information
at the
have found wide
afforded
passive and active
As a
by this
desire to use
result
of
the ease
formalism, there
and
is an
them for the large-signal
The purpose
convenience
understandable
single frequency
are a linear system
validity for describing
must be established.
design, and
such as power FETs
However, since S-parameters
concept, their
They
microwave small-signal
characterization of nonlinear devices,
[30,31],
ports.
application in the analysis,
measurement of
components.
circuit's external
nonlinear systems
of Sections 2.1 and 2.2
is to examine the assumptions inherent in the extension of
the
linear circuit
S-parameter
concept to
levels, to consider the circumstances
extension is meaningful
present
a rigorous
obvious
modifications,
applies
to
under which such an
in the case of GaAs
basis
the
large-signal
for
following
impedance
of Sections 2.3
experimentally the
FETs, and to
their application.
representations for nonlinear two-ports
The purpose
large-signal
discussion
or
also
admittance
[32].
and 2.4 is
applicability of
With
to establish
the characterization
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-56-
to microwave MESFETs and to present experimental data used
in design examples.
2.1 DEVELOPMENT OF UNIQUENESS CRITERIA
For a linear two-port, reflected voltage waves V ^
and
V 2 “ can
be related
V^+
and V 2+ ,
311
to
incident voltage
S-parameter
matrix at
waves,
each
<
m
+ N '
S2 2 (u)
m
(2 .1 )
---- 1
S2 1 (u)
S12 (u)
sl2(u)
—
Sn (w)•
*
1 ... " ■1 1
<
fo< 1
H* 1
1
1
1
1
frequency of interest:
This formalism implies the linear superposition of V 1+
and V,+ terms.
Z
Moreover, the S • .(u) *s
lj
are not, in
general, uniquely defined by
arbitrary values of V 1+ ,
v2+ , v,-,
because Equation
and V 2_ .
(2.1) represents
unknown
This is
only two equations
matrix
elements
small-signal case,
the matrix
additional constraints
setting
must
be
from which
determined.
elements are
which are obtained
the four
In
the
defined from
by alternately
and V2+ to zero:
v‘
i« fa) ■
^
(2 .2 )
o, k i j
j
This
procedure
two-ports
V
because
presents
the
no
difficulty
j ( w ) 1s
are
with
linear
independent
of
or V 2+ *
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-57For nonlinear two-ports under large-signal conditions,
incident
and reflected
voltage
waves
simple sinusoidal time dependence,
by
sums
of
harmonically
single-frequency
input).
Fourier coefficients of
for
each
harmonic
describing
of
(for
the
these voltage waves can
frequency
component
functions
[33].
discussion, only the fundamental
a
These
For
the
a
complex
be taken
to
derive
are also known
sake
of
this
frequency component will
be considered, as is customary.
applied to
sinusoids
ratios
large-signal scattering parameters.
as
have
but may be represented
related
The
need not
Similar analysis could be
the harmonic components provided
the harmonic
terminating impedances are known.
For nonlinear two-ports in
general, the relationships
among reflected and incident voltage waves are expressed:
1
1 *H
>
*
" F1
(2.3)
. v
Furthermore,
V VP
for
representation,
V2>_
a
large-signal
it is necessary
to
S-parameter
decompose V^- and
V 2” into unique components according to
v vl-
vP
VP sl2<vp VP
21^1*
vp S22(Vl '
1
x-s
V*
V2(V1’ V2>
11^’
(2.4)
2 J
In general such a decomposition m a y not be possible.
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-58-
Consider the first row of Equation (2.4):
V V1’ V? " S11(V1* V2)V1 + si2(Vr v2)v2
To
define
equation.
S1 1 ,
set
V 2+
to
zero
in
(2*5)
the
above
The S12 term is eliminated and (2.5) yields:
.
V"(V+
0)
su tvi> 0 > " ' ^ —
1
This determines
respect
l2-6)
the functional
dependence of
with
to V^+ , but gives no information regarding its
dependence
on V 2+ .
Similarly,
one cannot directly
determine the functional dependence of S 12 on V 1+ .
Now consider the
matrix
special case
elements in
incident voltage wave;
the row
Assuming that the
one of the
a function
V 1+ if this element
first column, or V 2+ if this
column.
is
in which
of only one
is in the
element is in the second
first column element satisfies
this requirement we have:
v - ( v j, v+> - sl l ( v X
Now setting V 2
+ s12(v+ v X
(2-7)
to zero yields:
,
. Vi(TI l ^
SlltVl,
V+
V1
(2.8,
which is independent of V 2+ .
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-59-
Knowing
sn ( v i+ ) one
can indirectly
determine
S1 2 :
+
*!»<
+
v 2> - su (vi ,v i
V vr
V2> -
V
■ -1
(2.9)
2
The problem with
is now no
such a two-step procedure
way of determining whether
assumption
of the
independence of
valid solely on the basis
as the measurement
example presented
V 2+ would be
S11
not the initial
on V 2+
is
of the voltage wave information
of S^1 assumed V 2+
=0.
For the
here, whatever dependence
attributed to S12 as
using Equation (2.9).
this case
or
is that there
has on
it is determined
Thus the matrix that is obtained in
depends upon the
assumptions made
in deriving
it; consequently it is a non-unique representation.
To
be
S-parameter
able
to
construct
representation, we
a
unique
must
large-signal
first consider
the
restrictive case in which the matrix elements in the first
column are not
the
functions of V 2+ , and
second column
are not
dependence is sufficient
large-signal
S-parameter
the elements in
functions
to be able to
matrix.
We
of V^+ .
Such
uniquely define a
will
call
this
condition the uniqueness criterion.
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-60-
If
this condition
applies, then
setting V 1+
to
zero in Equation (2.9) yields:
c
fv+. _
S.« (V~) —
12 2
Now, V^+
is no longer
validity
of
the
nature of
V I (V2>
v+
2
used to determine
assumption
the output of
V 2+
) should
unchanged
concerning
the
the
to the input and
the device, and our
,
at
s^2*
and S12 may now be checked.
simultaneously apply V^+
+
(2.1C)
by the
and
For if we
V 2+ to
application of
s i2^V 2+ ^
application of
functional
assumption is correct,
be unchanged by the
output,
T^e
should
V 1+
be
at the
input;
v iz .:
V- -
su
( v
X
«
i 2( v
(2al1
X
for all V 1+ and V 2+ .
If, in fact,
the superposition
V^~ is not the same
technique of
as predicted by
equaton (2.11)
when both
V 1+ and V 2+ are non-zero, then S11 or S12 must
differ from
the values
postulated by
the assumption of functional dependence
be incorrect.
measurement,
i.e.,
has been shown to
Similar arguments apply to the output, with
V 2” predicted by
V2 ' S21<V1)V1 + S22(V2)V2
(2-12)
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-61-
An exception
is in the
special case of
device when s^2=0, or w ^en
in a
row is
as
zero.
In that
sn ^ v i+ 'v 2+ ^
may be directly
one
a unilateral
the S-parameter terms
case, the
representation of
alwaY s uni<jue,
as it
determined from Equation (2.5),
with the
last term identically zero.
Another
exception
is
the
special
case
where
the
S-matrix elements are not functions of the relative phases
of the
incident voltage
waves, i.e.
only to the incident powers.
and van der Puije [341,
the uniqueness
element is
and,
for
the
)V^+ |, and
only of
uniquely
the first
both
|V1+ 1
defined
however, the
determine
degenerate
are
every
these
case
in
functions only
of
column elements
is assumed [30,31].
in which
and |V2+ \>
case,
column elements
the second
|V2*|/
Using the method of Mazumder
S-parameter matrix
Generally,
sensitive
one could conceivably demonstrate
a function of
elements.
which
of an
they are
are functions
Such
a case does
satsify the uniqueness criterion; however, the validity of
such a representation to a particular device must still be
established.
In the
this representation
application to a GaAs
which will
2.3, since it is from this
MESFET, it is
be considered
in Section
special case that the historic
usage of the term "large-signal" S-parameters prevalent in
the literature [30,31] is derived.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-62-
As we
have just noted, large-signal
determined
from
incident
and
reflected
information by alternately setting
zero,
as
is
done in
S-parameters.
the
S-parameters are
voltage
wave
v ^ + and V 2+ to
measurement
of
However, additionally, the
small-signal
validity of the
representation in the large-signal case must be checked by
comparison with results when both
simultaneously
locus method
used.
A
non-zero.
Alternatively,
of Mazumder
measurement
large-signal
and Van der
technique
S-parameters
was
applied
to Si
will b e
used for GaAs MESFETs
applicability
v ^ + and V 2+ are
for
MESFET will be
the
circular
Puije [34]
may be
determination
presented
bipolar transistors.
of
the
by
them,
of
and
The same
technique
in Section 2.3,
where the
quasilinear
representation
investigated for different levels
to
a
of bias
and drive.
It
is
worthwhile
assumptions made.
frequency domain
conditions,
at
this
point
The device has
to
the
been represented in the
in a quasilinear manner.
its response to
state
Under certain
a single frequency excitation
can be completely described by
the S-parameter matrix, at
the same frequency.
intermodulation, and other
nonlinear effects
are
the
have been
advantages
representation
circuit
Harmonic,
design
for
of
lost.
a
Offsetting
this loss
frequency-domain
two-port
the device:
techniques
(but
availability
at
of
applicable
linear
power
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-63-
levels),
ease
of
use,
and
a
compact
representation.
Whilst an alternative
characterization would be to
nonlinear time-domain
model to
characterize the
thereby allowing complete description
at
multiple
frequencies,
device,
of device behaviour
the assumption
considering only fundamental
use a
made
here
in
response allows considerable
simplification.
Instead,
the circuit
order frequency
terms have been
effects of
included in
higher
the overall
single-frequency response to the same order as they appear
in the measurement circuit.
Furthermore,
device
impedance
changes in
in
the
of
level changes
gain
compression
manifest
S-parameters,
However,
S-parameters can
unique
not be found
uniqueness
described
purpose of
the next
simulations) how
a
above
which
set
of
level
large-signal
conditions for
are satisfied.
closely these
as
and hence
are now
unless the
section to
and
themselves
the fundamental frequency response,
the large-signal
dependent.
effects
It
is
the
determine (by
numerical
conditions are
satisfied
for the GaAs MESFET.
2.2
DETERMINATION OF S-PARAMETERS
When the large-signal model for the MESFET [11 is used
with
the
standard
functional dependencies
Using appropriate
harmonic-balance
technique,
discussed above can
the
be examined.
external circuits, S-parameters
can be
determined from the model under varying drive voltages, as
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-64-
given in Equation (2.2).
An NEC type 869177 Ku-band
modelled at 10 GHz.
and
the
common-source GaAs FET was
I(jss for this transistor is 230 mA,
output power
specification
compression point is 22 dBm at 11 GHz.
internal
impedance
internal
matching
matching
stubs
the 1
the FET chip could be directly
gain
However,
removed
modelling and the measurement, so
dB
The transistor has
elements.
were
stubs reduced the measured 1
at
for
the
both
the
that incident powers on
noted.
The removal of the
dB compression point to 20.8
dBm.
In
order
large-signal
to
investigate
S-parameters,
S-parameters satsify the
the
applicability
initially
assume
of
that
the
required relationships for their
unique determination by measurement:
S12 = S12 *V2+)
(2.13)
S22 = S22 *V2+)
Furthermore,
and
V 2+
assume
do
not
S-parameters i.e.
the
incident
assumption
is
that the
determine
is
the
values
of V ^ +
of
the
the S-parameters are functions
power
on
certainly
uniqueness criterion.
case
relative phases
interesting
the
respective
not necessary
However, such
because,
experimental determination
if
to
only of
ports.
This
satisfy
the
a highly restrictive
valid,
of the S-parameters
it
allows
by direct
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-65-
measurement.
Under
these conditions,
voltage wave
need be
present at
relative phase is now arbitrary.
such a
representation also
accepted (but by
only one
any instant,
incident
since its
It should be noted that
corresponds to
the generally
no means established) usage
of the term
'large-signal S-parameters1 prevalent in the literature.
With
such
a
representation,
S-parameters S ^
and
simulated using
the large-signal
S12 and
S21 can be uniquely
S22 are unique and
incident
the
power levels
defined and
model [11.
can be found
on the
large-signal
output
Similarly,
for various
port.
The
values
obtained from the simulation at power levels between 0 dBm
and 24 dBm
incident on the respective ports
Table 2.1,
and are plotted on
2.1.
Their
power
the Smith Chart
dependence
large-signal S-parameter
are shown in
is
in Figure
similar
results reported by
to
the
Tucker [30]
and Johnson [31].
The most evident variation in
the S-parameters is the
gradual reduction in S21 along a line of constant phase,
with the
powers
change becoming
in
excess
of
quite rapid
16
dBm.
practically independent of drive,
movement
results,
towards
a
match only
indicating
small
large-signal S-parameters,
recessed gate structures
at incident
S^
and
S12
input
are
and S22 exhibits some
at
high
drive.
power-variation
appear typical
These
of
the
for FETs
with
[35].
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-66-
Table 2.1
Simulated values of FET s-parameters
as functions of incident power.
Pin
dBm
S11
0
4
8
12
16
20
24
.9106 A 162
.9106/-162
.9107 /-162
.9110/-162
.9117/-162
.9134/-162
.9171/-162
S12.
•1032/-21.4
.1032/-21.4
.1032 /-21.4
.1032/-21.4
.1032/-21.4
.1034/-21.4
.1020/-21.Q
S21
S22
1.089 /48.5
1.088/48.5
1.085/48.5
1.078/48.5
1.060/48.5
1.014/48.4
.9063/48.3
.7284 /-76.3
.7284/-76.3
.7284/-76.3
.7285 Z-76.3
.7286 /-76.3
.7320/-76.2
.7050/-76.3
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-67-
Figure 2.1
Smith chart plot of the FET S-parameters
for incident power between 0 and 24 dBm.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-68-
The
assumption
stated
in
necessary condition in order
definition, but is
It can
for a
predicted
valid,
particular MESFET
S-parameters
previously
the
V^“
(2.11)
level
and
the
deviations
from
at
V 2“
the
appropriate
using the FET model
incident power
at both
a comparison is
superposition at a large-signal
nonlinear
assumed
simulation.
functional
(2.13) will then cause deviations
Any
dependence
in
in the calculated value
and V 2~SP comPare(* to t*ie true values
of
V 1~SIM
to
the
Effectively,
"correct"
the
If the
identical to those given
application of
being made between linear
by applying
(2.12), using
b y the complete nonlinear simulations
the input and output ports.
and
and
calculated
incident power levels, should be
with simultaneous
a
the MESFET.
at the two ports.
then
from Equations
is
to permit unique S-parameter
simultaneous incident voltages
is
(2.13)
not necessarily valid for
be verified
assumption
Equation
V 2~SIM*
the calculations
Equations (2.11)
(T^ e subscript
performed
or (2.12);
by
into a
be expressed in
matched load;
difference.
power, and phase
angle,
to the
The relative error in
also be
presents the
in both
various drive level combinations.
in
complete
terms of voltage
there will
Figure 2.2
superposition, as
SIM refers
nonlinear simultaneous simulation).
magnitude can
SP refers
or power
a phase
angle
relative error
in
and V 2 “ , for
The relative powers are
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-69-
INPUT eDBM}
<?°
Uji
Figure 2.2
Relative errors in V^~ and T f ~ when obtained
by assuming linear superposition of largesignal S-parameter components as functions
of incident power,(a) relative error in the
magnitude of |V^~|2 .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-70-
PINPUT (DBM)
0
4
8
12
16
2 0
24
i
I
I
Figure 2.2
(b) relative error in magnitude of |v2” |2 .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
P INPUT (D B M )
Figure 2.2
(c) phase angle error in V 2 .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-72-
plotted as
functions of
input- (Figure
input and
output power
2.2a) and output-ports (Figure
for the
2.2b); the
phase angle error at the output is plotted as a surface in
Figure 2.2c.
plotted,
The phase-angle error
at the input
is not
as the error is within one-half a degree over all
combinations of incident power.
The relative error in power
_ 2
|V^ | , is less than 2 percent.
since S11 and S12
reflected from the input,
This is to be expected
are practically constant.
However,
2
the relative error in |V2 I exceeds 40 percent when
both
input
and output are
simultaneously
incident
powers of
24
dBm.
Table
relative
errors in
V^”
and
V 2 “ at
condition, when V ^ g p
using
incident
V 1~SIM
S-parameters,
large-signal
powers,
the
V 2~SIM are
when small-signal
the
this drive
rather
S-parameters.
errors
aP P r°ximately
At
While the
S-parameters
some
the
these
with
double
used rather
large-signal S-parameters.
in
than
on comparison
S-parameters are
results
2.2 compares
with
and V 2”gp are calculated
small-signal
corresponding
driven
than the
use of large-signal
improvement
over
the
small-signal case, it has been demonstrated that the often
tacitly made
assumption of Equation
valid beyond
a certain range
(2.13) ceases
of drive levels,
to be
for which
the errors increase significantly.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-73-
Table 2.2
Comparison of relative errors in V “ and V ”
expressed as voltage, power, and pnase-angle,
when calculated
(i) assuming linear superposition of smallsignal S-parameter components, and
(ii) assuming linear superposition of largesignal S-parameter components.
Reference values are calculated from nonlinear
simulations at the + 2 4 dBm drive level.
24 dBm IN
24 dBm OUT
Simultaneous drive
TERMINAL
ANtt
AP%
A e
Small signal
S-parameters
GATE
DRAIN
1.71
-39.83
3.387
-95.51
.237° _
-12.87
Large signal
S-parameters
GATE
DRAIN
.899 .
-19.54
1.792
-42.89
.364°
-5.38°
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-74-
Were
(2.13)
the necessary
exact,
the
defined would
condition
use of
For
dBm.
Since
compression point of
this is
either
less than two
port does
close to
not
the quoted
the FET, this gives
level, below which the
we
two and a half degrees in
if the incident power at
exceed 20
so
the transistor
relative errors will be
percent in power, and less than
angle,
Equation
large-signal S-parameters
give zero errors.
have modelled, the
expressed in
ldB
a maximum power
(unique) large-signal S-parameters
so defined can be successfully used.
The
importance
of
representing
the
device
as
a
function of its incident power levels is essential in this
characterization.
near-conjugate
In the
matching
typically never zero
of the
at
in
a
the
direct
wideband
undesirable at
power
in an
S-parameters
that
Takayama [36], these
should
due to reflection
matching circuit.
where
or in
the case
amplifier,
at the FET
The levels of both
are thus important in the
is
some
for gain flatness (although
an oscillator, V 2+
will be nonzero.
requiring
V 2+
amplifier
the output),
interstage matching
design of
output,
the reactive
reactive mismatch is required
this is
of amplifiers
at the FET drain,
output power from
Similarly,
case
or in
of
the
output port
V 1+ and V 2+
determination of the applicable
be
used.
As
voltage waves and the
described
by
phase between
them effectively set the impedance of the circuit in which
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-75-
the device is embedded.
large-signal
The
representation of the FET by
S-parameters, as
possible means
presented
by which device
herein, is
effects may
one
be compactly
represented in the frequency domain.
2.3
EXPERIMENTAL S-PARAMETER SIMULATION
In
order
to
experimentally
verify
the
model
and
demonstrate the quasilinearization techniques discussed, a
set of
independent experiments
intended
to
prove
(2.12) are valid.
Equation
directly that
Equations
They are
(2.11)
and
Dividing Equation (2.11) by V^+ and
(2.12)
assumption that
was performed.
by
V 2+ , and
using
the S-parameters
the
additional
are phase
independent,
gives
(2.14)
12 = S22(|V2+ |) + S21(|V1+ |) v +
where
is the input
e -j<}>
(2.15)
reflection coefficient
the output reflection coefficient, and
and
the angle between
the incident waves V^+ and V2+ .
Equation (2.14)
is the locus
coefficient when the
gate and
drain.
circle
with
S1 2 ^ V 2+ ^
times
gate reflection
FET is simultaneously driven
Provided Equation
+
for constant |V1 [
locus of
of the
center
and
S1 1 ( |V1+ 1)
|V2+/ V 1+ |, as
the
(2.11) is
at the
valid, the
+
lv2 I is a
and
radius
phase
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-76-
between
locus
V^+ and
of
the
|V1+ I and
V 2+ is
drain
varied.
reflection
IV2+ I are held
between
them
s22(lv2+ l)
is
radius
a
the
coefficient
constant and
varied)
and
Similarly,
(as
the phase
circle,
S2 1 (|V1+ |)
with
center
times
|vi+/v2+ 1*
A measurement technique to obtain the loci of
r2 has
been previously reported for
characterization [ 34 1 and for
of power FETs
in our
[36].
the phase
A
load-pull characterization
Rectangular
shifter and
available.
bipolar transistor
Figure 2.3 shows
experiments.
the apparatus used
waveguide was
variable attenuators
waveguide
and
bandpass
filter
used, as
were readily
was
used
to
prevent propagation of harmonically-generated higher order
modes;
the
loci
were
then
obtained
directly
from
a
standard harmonic convertor and network analyzer test set,
using
suitable
attenuation
in the
reference
and
test
channel arms.
Although
the
determine all
V^+ ,
the phase
sources
calibration
usefulness
could
four S-parameters
v 2+ / and
several
system
of
of
the
in a
arise
and
method
applied
somewhat dependent
to
directly
linear system
make
would
in
(if
known),
which
which
Principally, the harmonic convertor
analyzer is
used
are accurately
errors
difficult,
be
[34]
accurate
limit
and
the
[ 36] .
output to the network
on its
reference-channel
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-77-
HP-84J0B
Network
Analyzer
Test
Gunn Diode
Channel
V L 0-20dB
Atten
TWT
Amp
Plotter
Device
Under
Test
Isolator
Dir Coupler
BPF
8 -12GHz
Figure 2.3
Experimental test setup used to obtain
large-signal loci at independent levels
of incident drive V^+ and V 2+ e ^ .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-78-
input
level.
As
the
incident power
on
the device
increased, the
reference-channel power level
and
a slightly
result in
coefficient, even
linear (i.e. constant P w i t h
individual locus
of
will change
different measured
if the device
However, since each
was made at
a constant
j.
reference-channel
I
1
level
of
either
(according to whether
or
measured), this is not a problem.
between two loci at different
be observed
due to the
reflection
under test is perfectly
drive).
or
is
^
2
|V2 |
or
was being
However, a slight shift
reference power levels will
action of the
harmonic convertor
under different input levels.
A
second source
directivity of
through
of error
the directional couplers.
piece of
waveguide
replacing
test, perfect circles with the
obtained, since the
linear
and
arises due
to the
For
the
a straight
device under
origin as center should be
"device under test" is
matched.
finite
Calibration
now perfectly
curves
under
this
condition yield circles which are slightly offset from the
origin.
The radius of each
circle was constant to within
a maximum deviation of 3% (possibly also due to the effect
of
nonlinearities within
the
network analyzer
itself).
The radius of each circle should also be proportional to a
factor
depending
of
1V1+/V2+ |
upon which
When the radii of the
(or
channel
|V2+/ V 1+ 1,
is
chosen as
reference).
calibration curves were compared to
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-79-
the respective
incident voltage ratio, the
was less than 1% over all
a lower
power levels.
bound on the accuracy
maximum error
These errors set
of results to
be expected
from the measurement system.
As
a
consequence
circles,
accurate
ANAs)
were to
of
algorithm (as
be used
method.
shifting
center
S 22
and
using this system.
to
large-signal S-parameters
by this
the
values
presently be obtained
error correction
of
Since
account for
the
cannot
However,
employed in
could be
of
if an
small-signal
the shifts,
all
determined accurately
the purpose
of the
measurements
here is only to observe the circularity of the loci as the
reference power
the error
is changed, and
sources noted
about S12
this is
(see Appendix
invariant under
8.2),
information
S21 can still be easily extracted, as an
indication of any device departure from linearity.
Common-source
measurements were
made
at
10 GHz
at
three different gate bias levels, corresponding to Class A
and Class C operation.
were
used
at
matching stubs
limited by the
both
Incident power levels up to 24 dBm
the gate
and
were removed from
the
drain
(internal
the dev i c e ).
This was
maximum safe FET DC gate
current (set by
either the reverse breakdown of the drain-gate junction or
forward conduction
of the gate-source junction).
At all
bias levels measured, the maximum safe gate current rating
of 1.3mA DC was attained for some combination of phase and
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-80-
incident power levels less than
the 24 dBm available from
the
complete
setup.
Consequently, the
useful
dynamic
range of the FET could be tested.
Scalar power
later
measurements of
comparison with
The experimental
the FET
the large-signal
gain saturation
were made
value of
S2 1 .
characteristics of
unmatched FET are shown in Figure
for
the
2.4, for the three bias
levels investigated.
As can be seen,
at a gate
-3V, the small-signal
value of S21 calculated
bias of
from the
power gain is approximately unity (in close agreement with
that measured on an ANA).
The power
out at the 1 dB gain
compression point is 20.8 dBm corresponding to an incident
input power of 22.2 dBm.
compression point
(with
bias of -IV, the 1 dB gain
occurs at an
input power
considerable
At a
gain
of 19.4
output power of
dBm).
expansion
At a
occurs
estimated 1 dB compression point.
18.6 dBm
bias of
right
up
-5.5V,
to
the
However, this point is
an estimate only, because the DC gate
current was limited
to its maximum safe rating before the incident power could
be raised to a suitably high value.
The locus
of f 2 as the
shown on the Smith Chart of
.
at the drain
12
|V2
dBm, while
levels.
+
Smith Chart
Figure 2.5.
is driven
extend beyond
because under
varied is
The signal input
2 •
| is held constant at
the gate
The loci
phase shift ^ is
a level of
at several
the
different
boundaries of
certain phase
the
conditions more
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
/ /
d 20
J i- 'b
Volts
-I V o lts //
•o
z
N
cc
tii
£
a.
o
K-
3
Q.
h
3
O
"
5.5
20
INCIDENT POWER lv,+l2 IN dBm
Figure 2.4
Plot of FET output power in dBm vs. incident input
power for DC gate bias voltages of -1 V, -3 V , and
-5.5 V. The 1-dB compression points are indicated
for the -IV and -3V bias levels.
25
-82-
22
v.
Figure 2.5
Smith chart showing reflection co­
efficient loci at the drain {T
under simultaneous drive conditions,
as the relative phase between drive
signals is varied.
|V2+ |2 is 12 dBm;
|v^+ |2 is the parameter.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-83-
power is returned from the drain than was incident, due to
drive at the gate.
These
loci
loci, which
The
are generally
loci in
made
of a
for
+2
and |V2 I
the two
distinguished
Figures 2.5-2.8
measurements
+ 2
|V1 |
should be
from
far more
complex shape.
are reflection
constant
pull measurements,
loci of
powers
to
as the phase is
however, are
coefficient
incident
simultaneously applied
ports of the FET,
load-pull
varied.
Load
constant output
power as the terminating impedance of the FET is changed.
Complete
2.6a-c for
scaled loci
are
shown in
three different drain drive
first Figure 2.6a,
where
small incident
power on
seen,
a
this is
circles.
of f2
levels.
at a relatively
the drain (12
dBm).
case,
as
As
can be
the loci
with zero incident power
(corresponding to a
Consider
[*£ is plotted
nearly linear
Note that
Figures
are
at the gate
50 ohm termination t h e r e ),
the locus
collapses to a single point, which is just S22<
Even at
a gate
loci from
drive of +24 dBm,
the deviation of the
the average circle it represents
is within the
of S 21
times
measurement system error bound.
is then given
IV2+/Vi+ I.
magnitude of
dBm;
b y the
With
1.0 at
gives s ^ d V ^ I )
atlv-j4]2 =20
is less than 2.5%, which
S21
12 dBm
radius of the
normalized
incident on
as .991 at I v ^ 2 = 16 dBm;
.856 at J v ^ 2 = 22
The value
circle, R,
to
a
the gate,
this
.931
dBm; and .755
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-84-
|VJ|2 = Z4dBm
22
20
22
Figure 2.6
Scaled reflection coefficient loci at the
drain (r2 ) under simultaneous drive con­
ditions as the relative phase between drive
signals is varied.
|'Vi+ |2 is the parameter,
and increases from 12 dBm to 24 dBm.
(a) |V2+ |2 = 12 dBm.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure 2.6
(b)
|Vj"*”|^ = 20 dBm.
22
K l
20
22
24
Figure 2
+ 12 = 24 dBm.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-86-
at !v ll2
= 24
dB®*
Since the
1 dB
gain compression
point using this method is then just under 22 dBm incident
gate power,
good correspondence
2.4, which
was measured
by an
is obtained
with Figure
independent, and
simple,
power measurement.
As the
reference-channel (i.e.drain)
increased
to 20
dBm and
respectively), the
becomes
more
dBm (Figure
degree of
pronounced.
reasonably circular (to
up to 22
24
power level
2.6b and
departure from
The
locus
dBm incident power on
remains
average circle)
the drain, but at
incident power, there is marked deviation,
the use of the S-parameters S21
2.6c
circularity
of
within 6% of the
is
24 dBm
indicating that
and S22 is invalid at
this drive level.
The loci
information
of
(Figures
concerning the
2.7a,2.7b, and
values
of
2.7c) give
and
S1 2 .
Figure 2.7a shows the locus of T^, recorded on the Smith
chart.
Figures
2.7b and 2.7c,
drive,
are scaled
at higher levels
accordingly,
examination of their shape.
to
allow more
of gate
detailed
As might be expected, the FET
gate exhibits substantially greater nonlinearity than does
the drain.
At
12 dBm incident input power
(Figure 2.7a), the
loci are circular, although
drain drive the circularity error
of S1 2 ( \^ 2
when
1) *s 9iven bY R times
normalized
onto the gate
to
1.0
at
12
is 7.5%.
at 24 dBm
The magnitude
lv 1+/v 2+
dBm,
the
values
are
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-87-
1.005,1.016,1.040,
and
1.178 respectively,
at
powers on the drain of 16, 20, 22, and 24 dBm.
of gate nonlinearity is seen
b y the incident
little effect on the locus shape.
define, but is of
input
of
24
drain power has
At an input power of 20
average deviation from circularity
is harder to
drive
The degree
to be prinicpally controlled
input power on the gate;
dBm (Figure 2.7b), the
incident
dBm
obviously so noncircular
the order of 13%.
(Figure
2.7c),
the
At an
locus
that S-parameters are of
is
no use
in this case at all.
Finally, the
loci were observed
-IV and -5.5V, beyond the
at bias
pinchoff voltage.
voltages of
The limiting
factor in this case was the gate current when large drives
were applied.
terms
of
However,
arcs
At both voltages,
nonlinearity
in Class
of circles
observed (i.e.
even up
At -1
essentially
C operation, the loci
in
the areas
with DC gate
in
V gate
biases.
remained
they could
of 22 dBm on
the loci
corresponding loci
of
at -3V
be
1.3 mA),
the gate.
were less
and -5.5V
gate
The error at a relatively low incident gate power
16 dBm
expected
bias however,
of
which
in
unaffected.
currents less than
to incident power levels
circular than
of
was
the behaviour of
was 18%
since the
at this
onset of
bias level.
the 1
This might
dB gain
be
compression
point occurs earlier at this bias level (Figure 2.4).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-88-
0.1
10.2
-
0.5
20
0.2
22
*24
0.5
Figure 2.7
z
Scaled reflection coefficient loci at the
gate (r^) under simultaneous drive condi­
tions, as the relative phase between drive
signals is varied.
|V2 I is the parameter,
and increases from 12 dBm to 24 dBm.
24dBm
22-20--
Figure 2.7
(b)
|vn+ |2 = 20 dBm.
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
Figure 2.7
(c)
|V1+ |2 = 24 dBm.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-90-
2.4
DESIGN EXAMPLES
Having justified the quasilinearization
through
the
use
worthwhile to
of
large-signal
now illustrate
of the MESFET
S-parameters,
ways in
it
which they
is
may be
used in the modelling and design of microwave circuits.
Two
examples serve
first example
shows the
fundamental output
may
to
b e derived
demonstrate
their use.
analytical ease
power response
using simple
of a
with which
the
MESFET amplifier
linear circuit
while the second example notes their
The
techniques,
use in the design of
an FET oscillator.
2.4.1
FET Amplifier
Using the FET described above,
constructed with
2.8.
the equivalent
The measured
a 10 GHz amplifier was
circuit shown
input-output
in Figure
characteristics of
amplifier are plotted on Figure 2.9.
the
Shown for comparison
is a simulation of the amplifier using the time-domain FET
model and
the standard harmonic-balance routine
previously used in the theoretical
that was
analysis to derive the
large-signal S-parameters.
In order
S-parameter
to analyze the
linearization,
partition the device from
system using
it
from this
at the FET
first
necessary
to
the surrounding linear network.
Although the incident power from
incident power
is
the simplified
the source is known, the
terminals must first
to determine the applicable
be found
s-parameters.
The
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-91-
Zl -
•24 pF
Figure 2.8
s o n
Lumped-element equivalent circuit
schematic of FET amplifier.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-92-
MEASURED
S PARAMETER
SIMULATION
CmW)
700
80
-
GO
OUTPUT
POWER
.7 — FULLY
/ / SIMULATED
VGS - -3.0 V
20
YDS - 7.5 V
20
DELIV ERED
Figure 2.9
40
POWER
50
80
(m W)
Plot of FET amplifier output power as a
function of delivered power, showing measured
and simulated results.
Simulated results were
obtained using a complete nonlinear analysis,
and also by using large-signal S-parameters.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-93-
following procedure outlines the modelling process.
For a known incident circuit power:
1. Determine the incident power
not the
incident circuit
at the gate.
power if
(This is
matching elements
are used).
2. From an estimate of
output
the system gain, determine the
power reflected
back onto
the
drain by
the
output matching elements and load.
3.
Determine the
applicable S-parameters
to use
to
describe the FET.
4.
Use
linear
elements
with
analysis
the
to
cascade
FET, using
determine a system S-matrix.
reflection coefficient,
its
the
matching
S-parameters
to
From this, determine the
p, and
power gain,
Ap for
the entire system.
5. Check
and drain
the calculated incident
using the values of
necessary, revise
the
values of
powers at
£ and A^
the S-parameters used
incident
power
the gate
found.
If
according to
just calculated,
and
repeat step (4).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-94-
6. Determine the output power
from Ap and the known
delivered input power.
Linearization by
step (4), as
S-parameters is extremely
linear system concepts can
for optimization and analysis.
noted
that
if
elements, it
the
device
However,
is
is necessary to
useful in
then be employed
it must still be
surrounded
de-embed these
by
matching
elements in
order to determine the incident power on the FET itself.
This procedure was carried out
experimental
single-stage
FET amplifier.
relative insensitivity of
and
a good estimate of system
made.
device itself.
S-parameters
Because of the
S12 to drive level,
reflection coefficient could be
This enabled relatively
correct values of
in the analysis of the
|V1+ | and
to the
JV2+ I incident on the
Consequently,
are readily
quick convergence
the applicable large-signal
selected,
allowing a
complete
analysis of the system to be made.
The results
of this analysis
are shown as
labelled "S-parameter simulation" on
shows
the results
results
of the
values
of
S-parameters.
S-parameters
of the
second
As
iteration, using
can be
does not
Figure 2.9.
first iteration;
)V1+ 1,|V2+ 1, and
seen, the
give strictly
higher power levels; this was
the curve
Curve 1
curve 2
the
self-consistent
large-signal
use of
large-signal
correct results
at
foreshadowed in the earlier
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-95-
modelling analysis.
error
will be
acceptable
approach,
and
analysis.
As can
the
becomes great at
1-dB
considering
accuracy
be
compared
seen from
the
to
computer-aided
point.
design
of
small
error
power, or
is well beyond
Applications
schemes
the
signal
figure, the
power on the FET, which
compression
such an
the ease
approximately 28 mW delivered
22.7 dBm incident
its
However, in many instances,
relying
on
include
matrix
manipulation techniques (such as COMPACT [8 ]).
2.4.2
FET Oscillator
A second
example of
the
the application
S-parameters
is
design
Intuitively,
the oscillator
of
an
works by
of large-signal
FET
oscillator.
feeding back
some
output power to the input,
to act as drive for the device.
If not enough power is fed
back, the device is not driven
hard enough,
power is
output
power results.
fed back, the device
power
feedback.
1V^+ 1
and low output
and
again
Because
1V 2+ |
is in saturation,
suffers due
of
is
the
If
to
feedback
critical
that
lost
loop,
to obtain
too much
but the
through
control
of
maximum
power and to sustain oscillation.
In the example
|V1+ J
and
|\?2+ 1
given previously [10] , an
is
used
S-parameters.
The
actual
chosen
can
then
|V1+ |
S-parameters) from
to
set
value of
be
the
the oscillator
device
|V2+ I
obtained
estimate of
for
the
(given
the
design equations.
If
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-96-
the value
estimate,
of IV2+ |
does not
|V2+ | and the
agree with
the initial
selected S-parameters must be
adjusted until a consistent result is achieved.
of
output
power
self-consistent
varying the
the power at
for
|V2+ 1
the
may then
IV^*! chosen
given
be
The value
|V1+ | and
calculated.
and repeating
each operating point may
By
the process,
be determined, and
an optimum found.
The
predicted
obtained by
power
+ 2
|V1 |
curve
versus
repeating the process
obtained experimentally using
so
is very close to that
power-added considerations,
indicating the usefulness of the large-signal S-parameters
in
predicting
output p o w e r .
By
oscillator at the optimum power
23.9 dBm was
of 24.8
dBm.
the
level, an output power of
obtained, very close to
The oscillator
constructing
the predicted level
circuit design is
shown in
Figure 2.10.
In this instance,
used
to set
below
the compression effect of
the operating
saturation but
point to
above the
S21 is
the optimum
point,
small-signal area
where
output power is low (i.e. close to the maximum power-added
efficiency p o i n t ) .
+ 2
|V2 |
was 19.3
The optimum
value of
+ 2
|V1 | and
and 21.1 dBm respectively,
for the
same FET discussed earlier.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Zo=75a
Hh
L = .073x0
II
-
Z0= 50a
L «.076Xg
Zquj = 50a
=t=z0 =50a
l = .052x9
RFC
.In H
'6S
Figure 2.10
FET oscillator designed using largesignal S-parameters.
R eproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-98-
2.5
DISCUSSION
In general, a unique,
large-signal S-parameter matrix
for a nonlinear two-port can
reflected
voltage
wave
column
elements are
second
column
Using this
be derived from incident and
information only
not functions
elements
are not
of
setting
Alternatively,
V 1+
functions
and
V 2+
only incident voltage wave
the circular
locus method of
be verified by
are
zero.
magnitudes, then
Mazumder and van
comparison with results where
must
S-parameters
determined by
be
are to
der Puije
either case, these assumptions must
simultaneously
criterion
V 1+ .
are assumed to be
functions of
In
first
the
of
to
if the S-matrix elements
(34) may be used.
the
V 2+ , and
assumption, matrix elements are
alternately
V 2+
if
non-zero.
satisfied
be
used
The
if
V 1+ and
uniqueness
the
large-signal
with circuit-analysis
and
design techniques developed for linear circuits.
It should be
also
be
noted that the uniqueness
applied
determined
terminals
from voltage
of
a
large-signal S-,
be uniquely
to large-signal
Y-
and current
nonlinear
If
of
the
the
representations can
a nonlinear
be converted to the other
using standard linear
techniques, even though the other
parameters
one
measurements of
two-port, then it can generally
two representations
Z-
information at
two-port.
Y-, or Z- parameter
determined from
or
criterion can
circuit theory
two m a y not be uniquely
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-99-
determinable
directly
from measurements.
However,
for
nonlinear circuits characterized by S-parameters which are
obtained independently of phase (i.e. as functions only of
incident p o w e r s ), the Y- and Z-parameters obtained through
conversion
will
be
meaningless,
voltages and currents can no
solely by the
argument
that
only
of the
while
definable, must be functions
their
voltages.
magnitudes
magnitude
and phases
of
the
nonlinear
device can
be
varied
incident
power.
Y-parameters
large-signal
However,
of the sources supplying
keeping
This
that
terminal
by a similar
earlier,
respective terminal
varying the phases
power,
For example,
presented
Y-parameters, to be uniquely
the
longer be uniquely specified
incident power.
to
because
should
the incident
constant,
terminal voltages
will
at will,
affect
be
used;
by
for
the
at
the
the
constant
applicable
however,
the
S-parameters, which are postulated to be dependent only on
the magnitude of the incident
In
this
case
it
is
powers, will be unaffected.
meaningless
to
convert
between
large-signal parameter matrices.
When using Y-parameters the
in terms
of terminal voltages
power flow.
A high incident
and currents,
waves.
To
or a low terminal voltage,
relative phases of the
define
a
rather than
power flow can correspond to
either a high terminal voltage
depending on the
designer must work solely
linear
regime
incident voltage
for
large-signal
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-100-
Y-parameters in
terms o£
incident power
levels is
both
demonstrated
that
inappropriate and incorrect.
In
this
chapter,
computer simulation
GaAs
MESFET
has
been
and experimental
verify
S-parameters (when
it
the
applicability
large-signal
modelled as functions of
the incident
up to 20 dBm for this
accordance with theoretical
that level,
a
of
power at each port) at drive levels
FET, in
measurements for
predictions.
higher order nonlinear effects
Beyond
will manifest
themselves as large deviations from the circular impedance
loci presented
of
in Section 2.3.
greatest loci
peak DC
sharp
noncircularity correspond
gate current.
peaks
correspond
at
to
the
For
left
-1mA
nonlinearity
and
and
conduction of
it is
high DC
is
to areas
of
of
2.7c, the
the
figure
respectively.
This
mechanism controlling severe
of
the
the gate-source Schottky
gate current,
loci, which
bottom
+1. 3mA
breakdown
highly undesirable
the regions
example, in Figure
indicates that the principle
FET
Furthermore,
to operate in
operation at
correspond to lower
gate-drain
junctions.
an area
Since
of such
safer points
DC gate current
and
on the
and are
also more circular, will result
in the device behaving in
a
At
these
will
be
more
linear
S-parameter
fashion.
description
Generally, however,
incident powers
the representation
operating
more
applicable.
is not
(after removing the effects
points,
valid for
of matching)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-101at either
port greater
than the
1-dB compressed
output
power of the device.
As seen in the design examples, the approximation made
in linearizing
the MESFET
entirely satisfactory in
response,
if the
about its
operating point
is
predicting fundamental frequency
uniqueness conditions
remain valid
at
that operating point.
This
chapter
simulating) a
and
output
has
shown
that
by
particular MESFET under
drive
conditions,
determined and a set
a
measuring
(or
simultaneous input
power
range
can
be
of large-signal S-parameters defined
that are valid for use at that power level.
We have
examined one way in
which the device
can be
represented in the nonlinear realm when driven b y a single
tone.
but
The extension to
considerably more
harmonic excitations is possible,
complex.
complete nonlinear analysis is
accounts for
In
the
next chapter,
introduced.
nonharmonically related
This analysis
excitation and
additional frequency components generated,
a
the
and enables the
device to be studied under multiple-signal excitation.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-102-
3.
3.1
THE MODIFIED HAEMONIC BALANCE METHOD
BANDPASS SAMPLING
In the analysis of intermodulation distortion using
the standard harmonic balance method, excitation is applied
at frequencies f^ and f 2 .
Since the output intermodulation
components at (2f1~f2) and (2f2~f1) are also desired, the
Fourier components of the interface current at these fre­
quencies must be found.
For the present, we will neglect
the components at (3f^-2f2) and (3f2-2f^)
(fifth-order
intermodulation products), as well as those at 2f^, 2f2 ,
3f1 , 3f2 , etc.
(higher harmonics), although they will be
present in the time-domain waveform generated by the nonlinearity g(v(t),
Let a = ^2” ^1 k e the frec3uencY
spacing of the two applied signals.
In order to include
the components at f^-A, f^, f 2 , and f2 + A as consecutive
coefficients in the discrete Fourier transform,
A must be
the "fundamental", frequency for the Fourier series.
Additionally,
if (2f2-f1)= f 2+ A is the uppermost fre­
quency component to be considered, then to prevent alias­
ing in the transform, sampling at the Nyquist rate would
2f2~f
require an N-point sequence, where N = 2 ( — ~ — — ) . For
a typical case of f 2 = 2 GHZ and A = 2 M H Z , approximately
2000 time-domain samples would be needed in the sequence
to enable all the frequency components up to
(f2 + A)
R eproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
-103-
to be found.
This is obviously an enormous number of
samples, particularly since the number of operations
2
needed in the DFT increases as N .
The numerical reso­
lution of the computer would also rapidly be approached
if such a high number of samples were used.
If one were able to obtain the point spectra from such
a large number of time samples, most of the consecutive fre­
quency "slots" spaced by A would be zero.
For the simpli­
fied intermodulation case just considered, the only
frequency components present are at DC, f2-f^(the beat
frequency),
f1~A, f^, f 2 , and f2 + A, as shown at the top
of Figure 3.1.
at
With the exception of the beat frequency
s^9na^-
bandlimited i.e. all frequency
components lie between f^-A and f2 + A .
This observation
suggests the use of bandpass sampling.
The bandpass sampling theorem states that if a bandlimB
B
ited signal lying between f - -j- and fQ + - y is suitably
centered above the origin at fQ , then the waveform may be
completely reconstructed from time-domain samples of the
signal taken at a rate 2B.
The advantage of using this
property is that the sampling rate 2B is now very much
less than the Nyquist rate 2(fQ + /2).
The proof follows
easily from Equation (1.11) and the properties of the
sampled Fourier transform.
A complete statement of the
theorem is given in Appendix 8.3.
Qualitatively, if T = ^
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
AMPLITUDE
-104-
L
I
fi-A
Periodic Sampling
f,
f2
f2+A FREQ.
AMPLITUDE
O
ET
b+c
£
1
A
Figure 3.1
2A
3A
4A B
FREQ.
Simplified intermodulation distortion spectrum,
with higher frequency terms omitted for clari­
ty.
The spectrum at the bottom of the figure
results from bandpass sampling of the waveform
at the top.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-105is the sampling interval, the effect on the Fourier trans­
form of sampling the analog waveform xa (t) is to frequency
translate the analog frequency spectrum X (jfi) along the
CL
u
axis in multiples of 2tt, and to alter the scales accord­
ing to n = w/T.
From Figure 3.2, no aliasing occurs if
(2irB)T = ir, so the sampling frequency V t
must equal 2B.
The sampled Fourier transform X g (e^w) (Equation 1.9) thus
yields the Fourier coefficients of the spectra in Figure 3.2.
Since the spectra is periodic, we need only consider the
baseband interval - ir<o)<u.
Because the baseband spectra of
X g (e^a>) is simply a frequency translated version of Xa (jft),
the Fourier coefficients are identical to those of the
original waveform.
The above representation applies to a continuous line
spectra for which an infinite number of samples can be
taken to determine the function at any frequency within
the band.
However, in exactly the same way as before, a
discrete point frequency spectrum can be obtained for a
periodic band-limited waveform by considering a finite
number of samples equally spaced within the period.
In
our case, a discrete Fourier transform ma y be used in the
same way to extract the frequency components at f ^ - A ,
f2 , and f 2 + A.
at a rate ^
f^,
By the bandpass sampling theorem, sampling
= V 9 A will ensure no overlap between
periodically repeated spectra resulting from the Fourier
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
ANALOG FOURIER TRANSFO RM
Figure 3.2
SAMPLED FOURIER R EPRESENTATION
A bandlimited spectrum is shown on the left, with bandwidth B.
VJhen this waveform is sampled at a rate 2B and represented as
a Fourier series in (e3“>) t the periodic spectrum on the right
is obtained,
fl is a radian frequency; w a radian angle.
-107-
transform.
The discrete Fourier transform then allows us
to use only a finite number of samples.
of 9 samples
cj=
(N=9) ,
By taking a total
the fundamental radian angle will be
2 tt
/N, corresponding to a fundamental radian frequency
of n =
the point frequency spacing required.
In this way, the sampling and DFT process will yield the
frequency coefficients of the terms at A, 2A, 3A, 4A,
...9A,
which are just the downconverted terms due to f-^-A, f^, f2 r
and f 2 + A respectively, with the coefficients at 5A to 9A
being just the complex conjugate of the terms 4A to A
(symmetry property) .
In this way, the number of samples
needed to find the intermodulation products has been reduced
from 2000 to 9, through use of the bandpass sampling theorem.
One criterion of the bandpass sampling theorem thus
far glossed over is the need for suitable centering of the
waveform above the origin.
The bandlimited signal shown
in Figure 3.1 was assumed to be an exact integral multiple
of 2B above the origin.
The dot in the figure at f ^ - 2 A ,
corresponds to a vacant frequency "slot" so that, upon
shifting of the waveform along the frequency axis in
integral multiples of 2B, the component at DC aligns
exactly with this slot.
This is known here as the band-
edge criterion, and enables the DC to be reconstructed
from the signal, as no overlap occurs at this frequency.
The band-edge criterion is achieved in the software by
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-108-
slight ly adjusting A so that the bandedge at f 1 - 2A is
an exact integral multiple of the sampling rate 2B = 9A
(Appendix 8.4).
In this way, the lowest intermodulation
product at f^ - A is downshifted to fall at the fundamental
frequency A.
Effectively, nine time samples are taken
within one cycle of oscillation of frequency A, to obtain
the Fourier coefficients of the first four (downshifted)
harmonics and DC.
3.2
NON BANDLIMITED SIGNALS
It should be noted that the beat frequency at f2 ” ^1
will also be translated by integral multiples of 2B upon
sampling.
For the case of zero translation, the beat
component will occupy the frequency slot at A. Similarly,
f 1_2A
when downshifted — — times, the component at f^ - A will
also occupy the frequency slot at A.
Since, by Equation
(1.11), the sampled frequency spectrum is given by the
sum of the analog spectra over all possible periodic
translations,
the component given by the DFT as the funda­
mental frequency at A will not be the lowest order inter­
modulation product (that at (f^-A) downshifted)
alone,
but will be this component summed with the beat frequency
component.
The bandpass sampling theorem is seen not to
be truly applicable in this instance because the waveform
being sampled is not truly bandlimited i.e. it has a
component at fj - f^/ which lies outside our assumed
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-109-
bandlimited region extending from f ^ - 2A to f2 + A.
Although
we effectively overcame this problem for the DC component
by leaving a "vacant" slot in the band window (at f^-2A)
into which the out-of-band component fell after periodic
translation, this way of avoiding the problem becomes
increasingly complex as soon as the other out-of-band
components at f^ + f2 ,
2^2' e t c * are included in the
analysis.
It is necessary to note here that although the higher
harmonics and beat frequencies may be negligible in the
final physical solution (e.g. such components may be
shorted out by the linear embedding network), they are of
appreciable magnitude within the harmonic balance loop at
the stage at which they are considered.
As an example, a
single sinusoid V cos oi^t applied to a square law device
2
with a nonlinear functional relationship i = g(v) = v will
2
give phasor currents of value V / 2
2
at DC and V / 2
at 2oi^.
The next step in the harmonic-balance algorithm is to apply
these phasor quantities to the linear network, where there
they may be effectively blocked.
However, the DFT must
first find the phasor currents developed by i = g(v), with
v known, before any bandlimiting effects are introduced by
the external,
linear circuit.
For this reason, nonlineari­
ties of high order become increasingly difficult to handle
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-110-
analytically, due to the large number of new frequency com­
ponents generated by the- nonlinearity, even though very few
new frequency components may be observed externally.
The effect, then, of the new frequency components
generated by any nonlinearity is to extend the bandwidth
of an applied signal, even if the desired output components
and input signals are eventually bandlimited by a linear
embedding network.
In this work, a nonlinearity of up to
fifth-order (when expanded in a Taylor series) was assumed.
This was felt to be of high enough order to examine the
third-order intermodulation properties of any general device
(up to a certain operating level) without introducing ex­
cessive complexity.
Previous analytical attempts at describ­
ing the microwave MESFET have principally used a third-order
model
[16,18],
Given that higher-order components are
present in the waveform generated by the raw nonlinearity,
some means must be found to enable the desired components
to be correctly found.
There is no problem with a single
frequency excitation, as in that case the only new frequency
components generated are those at integrally related higher
harmonics.
The standard harmonic balance technique may be
used in this case.
The more difficult problem is for two applied signals
at frequencies f^ and f2 which differ by A i.e. the inter­
modulation case.
In this case, for a fifth-order
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-111-
nonlinearity, there are 31 distinct frequency components
present in the waveform generated by the nonlinearity.
highest of these components is at 5f2*
The
In the prior example,
where f ^ = 2 GHz and A = 2MH2., the standard harmonic balance
technique could be used bu'c with a fundamental frequency
of 2 MHz.
However,
10,000 time samples would be needed to
include all the new frequency components up to 5f 2 .
To
perform a DFT on a sequence of this length would be
staggering.
As discussed previously, the use of bandpass sampling
greatly reduces the number of time-samples required, but
aliasing will result because the true bandwidth of the
nonlinear partition signal is not confined solely to the
eventual band of interest.
The out-of-band components of 1(f)
by convolving i(t)
could be eliminated
in the time-domain with a bandpass filter
characteristic prior to sampling:
00
iBANDLIM (t) = J
i (t ) h ( t - x ) d x
— 00
00
i.e. i(k)
= I
(3.1)
i(n)h(k-n).
For a bandpass characteristic as shown in Figure 3.3
h
Dr
(t) = 2H_B sine B(t-t_) cos oj (t-t_) .
O
O
O
O
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-112-
t*—
-fc
fi-
(a)
(b)
(c)
Figure 3.3
(a) The bandpass filter spectral
characteristic.
(b) The impulse response of the bandpass
filter shown in (a).
(c) The impulse response of a bandpass
filter with bandwidth B = fQ .
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-113-
By choosing B = fQ , all out-of-band components are elimina­
ted, and the sine function in hgpCt) oscillates only several
times before dying off.
There are several drawbacks to performing such a
convolution.
One is the additional integration step re­
quired to find each new time sample.
integration in Equation (3.1)
To perform the
(particularly with sufficient
resolution to extract a weak intermodulation response from
a strong fundamental signal), many additional time samples
i(n) are needed to calculate each i(k).
A second, and
perhaps more severe restriction, is that the effect of any
harmonics or difference frequencies outside the band of
interest is lost.
By including the numerical bandpass
filter, a physically unrealistic step has been introduced
into the model.
Some studies have shown [18,19] that the
effect of second harmonic source termination has signifi­
cant effect on the level of intermodulation product.
Such
an effect would be completely lost if the time-domain con­
volution were used to bandlimit the signal of interest.
3.3
CONTROLLED ALIASING
It was noted in the previous section that if the
standard harmonic balance technique were to be used, a
10,000 point sequence would be required to include all
31 frequency components generated by the fifth-order
linearity.
Since 5000 independent frequency coefficients
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-114-
can be obtained from this sequence, each spaced by A,
signals in most of the possible frequency "slots" will be
zero.
Although considerable aliasing would occur by
selecting a band window B = 4 . 5 A followed by bandpass
sampling at the rate of 1/2B, most of the aliased com­
ponents would be zero and thus not contribute to the
sampled spectrum.
Furthermore, the exact frequency of the
non-zero components causing aliasing can be calculated,
and their location in the aliased spectrum easily deter­
mined.
This suggests the use of the controlled aliasing
technique to determine the magnitude of these components.
The waveform in Figure 3.1 has previously been con­
sidered in the application of the bandpass sampling
theorem.
Periodic sampling results in the aliasing shown
in the bottom of this figure, where the components labelled
b and c overlap in the spectrum obtained after sampling
the time-domain waveform.
x s (eja))
E°°
xa ( ^
r=-~
Using
+ j^r>,
(3-2)
setting r = 0 yields the components labelled a and b at
the angle corresponding to frequency 0 and A.
Setting
(f1-2A) ,
r = + -- — --- (which is an integer because we have ensured
that the bandedge criterion is satisfied) translates the
components c, d, e, and f into the frequency slots
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-115-
corresponding to A, 2A, 3A, and 4A, respectively.
sampled spectrum X
The
at baseband is the sum of the spectra
corresponding to these two values of r (all other values
of r translate X_(jfl)
outside the baseband interval under
cl
consideration:
the periodic repetition in X s results from
this), as shown at the bottom of the figure.
The magnitudes
a, d, e, and f can be directly determined from the Fourier
coefficients, but only the total magnitude of
(b + c) is
known.
The heart of the controlled aliasing technique is to
solve for the remaining unknown magnitudes by simple,
linear algebra.
Suppose the same two input signals of
relative magnitude d and e are applied, as before, to the
system, but at frequencies shifted down by A to
f
as shown in Figure 3.4.
and
For a low-Q device model (i.e.
one in which the output signals are not greatly frequency
dependent, such as for a resistive nonlinearity), the
magnitudes a through f generated by the nonlinearity will
be essentially unchanged; however, their frequencies will
be altered according to the order of their product.
The
beat frequency at A will be unchanged; however, the
intermodulation products will lie an amount A lower than
in the first case.
Furthermore, because the position of
the applied signals is different relative to the bandedge,
(fl-2A)
different aliasing will occur.
Now , when r = + --- — -—
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AMPLITUDE
-116-
f.
Periodic Sampling
FREQ.
AMPLITUDE
O
b*d
,0+C
I I I I'
Figure 3.4
J
L
FREQ.
Simplified intermodulation distortion
spectrum when the two applied fundamental
tones are shifted down by A to f-.-A
and f2"A = f1 .
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-117-
in Equation
(3.2), the band edge, occupied by the component
c, will overlap with the DC component, to give a total
component (a + c) at zero frequency
(DC) , and the component
at f^ - A, now of value d, will overlap with the beat
component at A, b, to give a total Fourier coefficient at
A of amplitude (b + d) .
Since a and d were found from the
first application of the DFT, the value of the components
b and c can be directly obtained by simple subtraction.
What has effectively been achieved here is the follow­
ing:
by sampling the time-domain nonlinear current wave­
form at a very slow, bandpass rate, a total of N Fourier
coefficients have been obtained from the DFT.
By frequency
shifting the two input signals a total of A, recalculating
the time-domain waveform, and resampling, N additional
Fourier coefficients can be obtained from the DFT.
If
the frequency translation, sampling, and DFT are repeated
a total of m times, a total of mN Fourier coefficients are
obtained.
Because the way in which the new frequency com­
ponents will alias is known beforehand, a system of mN
linear algebraic equations can be obtained, with right
hand side equal to the DFT coefficients.
By inverting the
system of equations just once, the unknown amplitudes
of any frequency component can be obtained from the
(universal)
inverse
matrix and the DFT coefficient
column matrix.
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-1183.4
SOLUTION FOR THE UNKNOWN AMPLITUDE COMPONENTS
In the example just given, only two frequency shifts
were required, since only 6 frequency components were
present.
The formulation and selection of independent
equations and their solution for the unknown amplitudes
was trivial in this case because all higher frequency
components were ignored.
In the case of two input signals
to a fifth order nonlinearity, in which 31 frequency com­
ponents are present
(including D C ) , the bandwindow of
interest will consist of 6 signals each spaced by A (two
fundamental and two each of third and fifth order inter­
modulation products)
so that for bandpass sampling, a
13-point sequence of time samples spaced V l S A in time may
be used.
Since 7 real and 6 imaginary Fourier coefficients
will be obtained from each 13-point sequence (DC, A, 2A,... 6A),
a minimum of 5 frequency shifts of the input signals will
be needed to ensure a sufficient number of equations is
obtained to enable solution of all 31 unknowns.
Two sets
of equations are thereby obtained; a set of 35 equations
relating their real parts and DC; and a set of 30 equations
relating their imaginary parts.
Selection of a 3 1 x 31
matrix set (or 30 x 30 matrix set to define the imaginary
parts of the coefficients) from the equations to be inverted
is not as trivial as in the example given, and constituted
much of the work of the present dissertation.
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-119-
We have elected here to choose a bandwindow of 6.5A
and calculate the Fourier coefficients from a sequence of
13 time samples sampled at a bandpass rate.
components are aliased.
The resulting
However, by shifting the input
frequencies slightly, different aliasing products will
result.
By repeating the shifting 5 times, it is possible
to deembed the desired components from the aliased products.
However, it is worthwhile to note at this stage that
several alternative schemes are possible to deembed the
aliased spectra.
The bandwindow of interest could be made
wider than the 6.5A chosen.
This would open up more vacant
slots and simplify the aliasing, but require more time
samples and be less computationally efficient.
Alterna­
tively, certain symmetry properties might be used - if the
two input signals were to be always of equal level, the
intermodulation products and harmonics would also be the
same amplitude, and the number of unknowns nearly reduced
by half.
This was not done so that the gain of a small
signal in the presence of a closely spaced, but larger,
saturating signal could be studied.
Finally, for certain
nonlinearities, the sum and difference frequencies
generated will be equal in magnitude.
This fact could
again be used to reduce the number of unknowns,- and
simplify the matrix set.
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-120-
At first glance it might appear difficult to determine
where each frequency component will fall after aliasing
i.e. after periodic translation to baseband.
However, by
recalling the symmetry properties of the DFT covered in
Chapter 1, and noting that the original band-edge frequency
satisfies the band-edge criterion i.e. always translates
to DC, a simple "foldback" technique can be used to deter­
mine the baseband position of each component after aliasing
has occurred.
Consider the spectrum shown in Figure 3.5.
The com­
ponents at d and e are the two tones at f1 arid f2 = f1 + A.
a is the DC component, b and g the fifth-order intermodula­
tion products, and c and f the third-order products.
When
(f1-3A)
r = + -------- in Equation (3.2), and is an integer because
2B
of the band-edge criterion, the components a-g will occupy
the baseband frequency slots OA, A, 2A,...6A after
sampling.
Consider now the second harmonic of f^, at
a
2 (fi~3A)
2 ( f ^ - 3 A ) + 6A. When r = r^ = + — — ----, which is again an
integer, the component labelled h will fall into the base­
band slot at 6A.
The second harmonic of f2 , labelled j,
is at 2(f1-3A) + 8A.
When r = r^ this component does not
fall into the baseband window, since 8A is outside this
window.
When r = r 1 ~l,
the component j falls into the
slot at (8A-2B), or at -5A, and again is not in the
baseband window for the DFT.
However, when r = - r ^ + l ,
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-121-
a)
k Xa (j’A)
d*e.
AflNOCtfF AT
2 f £ - ^
c
..
. V
&
,
■If
Kfi-65^
Xs(e^)
fr a ia tu c
&
b)
S
h
- ^ i
J
I
aTSfe'
a m p l in g
d
c
|f
. b
A
jl
-
_ O L
-/
2A 3A 4& f A £A
4 .
fi
c)
A»
4. e
| Reflection
i.
0
t
I.
L
3
+
S
6176
K .M
Figure 3.5
3
10
11
12 13 ft fS
* + + * + *
(a) A more complex distortion spectrum.
(b) Spectrum showing aliasing that has
occurred due to bandpass sampling.
(c) The simple foldback technique that
assists in the determination of
this aliasing. The frequency scale
in (b) and (c) has been increased
to allow greater resolution.
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-122-
the negative frequency component of the second harmonic
component of f2 (i.e. at -2f2) is translated in the
positive frequency direction and falls into the slot at
+ 5 A, which is now in the DFT baseband window.
Because of
the symmetry properties of Xa (jft), the component at -2f2
has the same real but inverted imaginary part to that at
*
2f2 .
Thus the aliased component is labelled j
because
of the inversion of its imaginary part (see Figure 3.5(b)).
A simple foldback technique allows quick recon­
struction of the aliased spectrum.
With the original
bandedge labelled slot 0 (since it translates to 0 fre­
quency) , consecutive slots are labelled 1-13 within the
total bandwindow (see Figure 3.5(c)).
The slot 13 will
also translate to zero frequency upon aliasing because
it is a unit multiple of 2B in frequency above the bandedge (the DFT is periodic with frequency period 2B ) .
Slots greater than 13 are again labelled 1, 2,...13.
Within the total bandwindow, slots labelled 7 through 13
can be treated as if they reflect in an imaginary mirror
located at 6.5A, with inversion of the imaginary quanti­
ties occurring upon reflection in the mirror.
Physically,
these slots correspond to negative values of r, in which
the negative frequency components of the signal will alias
into the baseband window 0 to 6.5A.
Alternatively, they
can be thought of as periodic with slots -6 to -1, located
2B = 13A further down the frequency axis.
Because they
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-123-
then represent components of frequency on the negative axis,
the complex conjugate of their component amplitudes is taken
when they appear in the baseband window 0 to 6.5A.
Now, because the periodicity of the band has been
accounted for by resetting the bandedges to an origin of
0, frequencies such as 2 f 2 , 3f2, 2f 2~f^, etc. are found
simply by using the new coordinate system.
Thus in
Figure 3.5(c), with f 2 in slot 4, 2f2 falls into slot
2 x 4 = 8 which reflects into slot 5, taking the conjugate;
this is the same as derived from the first principles
Equation (3.2). • The component 2f^, on the other hand,
falls directly into the slot at 2 x 3 = 6, and is already
inband.
This enables the total positive and negative
frequency axes to be
wrapped around onto the baseband
window of interest.
Using this technique, five sets of translations of
the two input signals were made with the lower input signal
lying in turn at f^-2A, f^-A, f^, f^+A, and f^+2A.
The
resulting aliased spectra were found by the foldback tech­
nique in each case, as a function of the unknown amplitudes
of the 31 frequency components (31 real and 30 imaginary
unknown amplitudes, as the DC is real only) .
On applica­
tion of the discrete Fourier transform to the output
waveform, each translation set yielded 7 real Fourier
coefficients and 6 imaginary Fourier coefficients
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-124-
(the DC slot yielding only a real number).
As a result
of the 5 translations, 35 real equations and 30 imaginary
equations were obtained.
The resulting equations were
sparse with coefficients of either + 1
or - 1, as each
amplitude appears only once for each set of translation.
The 30 x 30 matrix relating imaginary amplitudes to
the imaginary parts of the Fourier coefficients is uniquely
invertible.
Selecting 31 independent, real equations from
the 35 options and trying to solve for the 31 real ampli­
tudes proved to be far more difficult.
The inversion procedure was first tried for a thirdorder nonlinearity.
Three translations were required to
solve for 13 real unknowns, as each translation set
yielded five equations.
A linearly independent set of
equations could be obtained by deleting one equation from
two of the translation sets, and using the remaining
thirteen equations as a basis.
For the fifth-order problem each translation set
yielded seven equations in the real amplitudes.
One equa­
tion in turn of the total of seven was dropped from four
of the translation sets to reduce the total set to 31
equations in all.
Numerous equations were deleted in
turn, but no matrix of sufficiently small condition number
was ever found to give a reasonable inverse matrix.
Using the APL compiler running on an I B M - P C ,
determinants
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-125of the 3 1 x 31 matrices tried ranged between 10- ^® and
3 x i o ® , but in all cases the conditioning was so poor
that the inverse
was useless.
The inversion process was
also attempted on an IBM - 370 mainframe computer using a
sophisticated IMSL matrix routine
[37]; error messages
always showed an "algorithmically" singular condition.
The problem of sparse matrices and the selection of
an independent basis is an interesting mathematical puzzle
that arises naturally here.
In system theory, the problem
can be solved by a least squares approach
[38].
For a
linearly dependent system of equations,
[A] [x] = [b],
where A has more rows than columns, a least squares fit
can be obtained by premultiplying both sides of the equation by A
T
and solving the resulting equation
[AT ] [A] [x] = [AT ] [b].
Here,
m
[A ] is the transpose matrix.
T
The new matrix [A A]
is now square and under certain conditions will be inverti­
ble.
The additional cost is that the known column vector
T
[b] must now first be premultiplied by A .
In our case, because of the very poor condition of any
equation set, an additional orthogonal equation was obtained
from a sixth translation, which positioned the lowest input
tone right on the bandedge (f^-3A) .
In this translation set,
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-126-
the term at 5f2 fell into a slot alone.
This equation was
obviously orthogonal to any of the other 35 equations.
By then removing 1 equation from each of the other trans­
lation sets, an invertible, well conditioned,
31x31
matrix set was obtained.
The inverse matrices could then be used to operate
on the column vectors of Fourier coefficients obtained
from the six translations, to yield the desired amplitudes
of all 31 unknown frequency components.
3.4.1
Modified Harmonic Balance Procedure
Because of the additional frequency shifts required
to deembed the aliased amplitudes, several modifications
were made to the standard harmonic balance software.
Surprisingly, no changes were required in the DFT Goertzel
algorithm that performed the time-sample to frequency conversion.
Given the fundamental angle,
2ir
/N,
and the time
samples, the routine simply performs the summation given
by Equation (1.13),
(but in a more efficient manner), in
order to calculate the Fourier coe fficients.
This routine
is effectively blind to the aliasing and frequency shift­
ing of the time-domain waveform (Appendix 8.5).
On the other hand, the routine performing the phasor
(frequency) to time transformation was considerably more
complex.
In order to obtain the nonlinear current
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-127time-samples from the model, the inputs of gate and
drain voltage and their derivatives, at the same periodic
time instants, had to be calculated from their phasor
values.
At this point, a total of eleven phasor voltages
were impressed upon the model, to allow for higher order
effects.
These were the basic input voltages at DC,
f^, and ± 2 >
addition to the self-generated
voltages at f^-2A, f^-A,
^2+
2f^, 3f^, 2f2, and
3f2 (caused by the nonlinear .currents in the linear circuit
and the developed voltages across the model terminals).
The frequency-to-time-domain conversion necessitated
the calculation of terms like cos 2ir(fn-2A)t ,
l
s
sin 2ir (f^-2A) t g , cos 2tt (f^-2A) (tg -T) , and sin 2tt (f1-2A) (tg -T)
etc. to transfer the phasors to the time domain.
These
sinusoidal and delayed sinusoidal terms were stored in
6x11x13 arrays, calculated once at the beginning of the
program:
6 frequency shifts, 11 phasor components, and
13 sampling time-instants.
Because the frequency shifts
were in multiples of A, many of the frequency components
had common values.
This overlap was used to improve the
efficiency of setting the arrays (Appendix 8.6).
The vol­
tage derivatives were obtained by simple analytic differentation (multiplying by jw).
The total time sample was
then obtained by summing the contribution from each of the
phasor components
(Appendix 8.7).
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-128-
The process of deembedding the aliased components
also necessitated software modification to the standard
harmonic balance method.
The inverse matrices were read
from a data file and stored in 3 1 x 31 and 30 x 30 arrays.
The 7 Fourier coefficients from each of the 6 frequency
translation sets were held in 6 * 7 arrays.
The deembedding
process then simply consisted of matrix multiplication,
taking care to eliminate, in the multiplication routine,
those elements of the Fourier array corresponding to equa­
tions not used in calculating the inverse matrix.
However,
all 30 equations due to the first five translation sets
were used in finding the inverse matrix for the imaginary
components of the phasor amplitudes, so all imaginary
Fourier components were used.
Additional changes were also needed in the harmonic
balance loop.
Although a total of 31 frequency components
are generated in the current waveform by the nonlinearity
in response to an excitation at f^ and ± 2 , only 11 of these
(stated earlier) were of sufficient magnitude to generate
a voltage worthy to be reimpressed as an input to the
model.
This enables the effect of DC, fundamental, second,
and third harmonic terminations to be examined (while any
fourth and fifth harmonic voltages would effectively be
shorted o u t ) .
For a solution to be achieved,
consistency
had to be obtained in both the real and imaginary parts of
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-129-
all eleven phasor currents, at both the gate and the drain
on both sides of the linear-nonlinear interface .
This
solution is obtained by the iterative nature of the harmonic
balance method.
During each iteration of the loop (i.e.
steps 2-6 in Section 1.3), step 3 must now incorporate the
six frequency translations to calculate the six sets of
time samples sampled at the bandpass rate.
Step 4 must
perform a DFT on each set to calculate the Fourier coeffi­
cients, and finally perform the inverse matrix multiplica­
tion to deembed the desired phasor current components.
The
error function in step 5 is calculated as a squared ampli­
tude error sum based on the eleven predominant phasor
components,
and the minimization is attempted by adjusting
these values accordingly (see Section 3.4.2) .
Looping to
step 2, these new currents are then fed back to the linear
circuit to calculate new phasor voltages
predominant frequencies)
(at the eleven
to reimpress upon the model
(Appendix 8.8).
The savings are quite substantial using the MHB tech­
nique.
Six sets of frequency translation, each requiring
13 time samples are needed i.e. 78 time samples are re­
quired to deembed all 31 frequency components.
This is
several orders of magnitude improvement over the crude
Nyquist method, which would have required 10,000 time
samples to achieve the same result.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-1303.4.2
Achieving Convergence
The aim of the harmonic balance loop is to minimize
the error function.
For zero error function, the currents
sunk by the nonlinear model are exactly equal to those
sourced by the linear partition at every point in time
(or frequency), given equal node voltages at the interface.
Usually, convergence is deemed to occur whenever the error
function falls below a certain threshold.
At this point,
the gate and drain current phasors (at the eleven predomi­
nant frequencies) on the two sides of the partition are
deemed to be equal for all practical purposes.
What forces the error function to zero on successive
iterations of the harmonic balance loop?
Basically, the
initial guesses made for the terminal interface current
phasors at the beginning of each iteration are made closer
to their true value each time.
As the current phasors are
complex quantities, there are a total of 44 real variables
that must be adjusted (accounting for both gate and drain
branches) on every iteration of the loop.
Initially, an IMSL routine
the error function.
[39] was used to minimize
This routine uses a quasi-Newton
optimization algorithm to alter the input variables
current phasors)
to minimize the error function.
(the
However,
it was found that this gradient method would not converge
for more than 7 or 8 variables and that the number of
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-131-
iterations through the loop exceeded 1000 for this many
variables. Convergence
10 variables,
was never achieved for more
while the number
than
of loop iterations increased
dramatically as extra variables were added [pg. 121, r e f . 22].
The fixed-point iterative method of Hicks and Khan
[40]
was found better to adjust the current phasors to ensure
convergence.
Because the FET model solves for gate and
drain current as implicit functions of the terminal vol­
tages, the current was always the dependent variable;
however, the current was also used as the variable updated
each iteration.
After the k ^ 1 iteration of the loop,
consider a general current
i
_I
v
a
x^lt)
=
x^
e J _j1{noj,+ma)9)
2 t ,
n, m
nro
so that i.
is one of the eleven phasor currents
n,m
arising from the nonlinear partition, with corresponding
Ik (t)=Z
I
ej(na)i+ma)2}t
n,m Urn
arising from the linear partition.
then carried out with
The next iteration is
(t) having components
I <k+1>™n
m
nm = P i *„,n
nm + a ~ P ) l * rnm
where p is determined by convergence considerations and
0<p^l.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-132Hicks and Khan
[40] show that the rate of convergence
is dependent on the ratio of the impedance of the nonlinear
partition to that of the linear partition at each harmonic.
This may be altered by inserting an "identity" network at
the interface.
Because of the implicit form of the non-
linearity, adding a shunt impedance element to the non­
linear partition, and a corresponding negative shunt
element to the linear partition, will alter this ratio.
This alters the calculation of the hybrid matrix H(nu), and
consequently the magnitudes of the phasors being updated,
without altering the overall observed circuit performance.
Furthermore, the loop was modified slightly so that initial­
ly the terminal voltage phasors were estimated and
consequently updated rather than the current phasors.
This would enable the error magnification factor defined
in [40] to be controlled by the choice of shunt element
used in the identity network, and the loop would then
correspond directly to the voltage update method described
therein.
Both the current update
(guess the initial current)
and voltage update (guess the initial voltage) methods
were applied to the same problem, the latter incorporating
a variable identity network for convergence acceleration.
Both methods were found to give the same, externally
observable results whenever convergence was achieved.
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-133The shunt identity element was found to be of no
assistance in accelerating convergence for this problem.
The shunt resistance in the identity network was varied from
-100 ohms up to +50 ohms before convergence was finally
achieved.
Even with a shunt impedance of 1000ft, conver­
gence was much slower than for the current update method
for which no identity network was present.
The value of the first guess for the current or voltage
phasors was invariably zero.
If some other value was used
as a uniform guess for the 44 unknown phasor quantities,
the error function was generally too large for convergence
to ever be achieved.
In an attempt to equalize the rela­
tive contribution of the phasors to the error function,
the DC and two fundamental terms were weighted more lightly
than the other contributions because of their larger
magnitudes.
This, of course, did not affect the rate of
convergence as the error function is used only as a means
of establishing a convergence criterion.
However, by
slightly adjusting the point at which convergence was
deemed to have occurred, the relative accuracy of each
of the phasor terms can be altered.
For typical intermodulation simulations, a value of
the iteration constant p between .2 and .3 proved to have
the quickest convergence.
was set at 1 0 ~ ^ .
The error function threshold
At low signal levels, approximately
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-13430 iterations of the harmonic balance loop were required
per simulation.
As the signal level approached saturation
and the model became more highly nonlinear, up to 120 itera­
tions were required.
If greater than 150 iterations were
needed, or the error function grew to exceed 10^°, cutoff
occurred and a new value of the iteration constant p was
requested.
In all the similations presented in the follow­
ing chapters, convergence was achieved within 150
iterations.
With 44 variables to equalize, this system is
one of the largest applications of the harmonic balance
technique yet reported.
3.5
LIMITATIONS OF THE TECHNIQUE
The modified harmonic balance technique is the first
reported application of the harmonic balance method which
is able to handle nonharmonically related signal excita­
tions in a nonlinear circuit of potentially any complex­
ity
[26].
As such, it is a tool capable of handling, in
considerable detail, the analysis of nonlinear and
intermodulation distortion, crosstalk on communication
channels, the suppression of small signals in the presence
of larger ones in a nonlinear system, and the analysis
of other parametric devices such as mixers.
One assumption and one limitation have so far been
made.
Both of these are critical only because of the
dynamic range we are demanding of the system.
In the
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-135-
case of intermodulation distortion in amplifiers, we
need to be able to simultaneously observe both the funda­
mental output signals, and the intermodulation products,
which may be 60 dB below the fundamental.
The dynamic
range of the system must thus be at least 60 dB, or the
accuracy with which all computations must be performed
is one part per million.
It is this extreme resolution
that ultimately limits the performance of this analytical
technique.
The assumption we have made, and carried through the
work,
is that the nonlinearity is of no more than fifth -
order.
Any higher order frequency products generated by
a nonlinearity of order higher than the fifth will cause
aliasing that has not been accounted for and will not be
deembedded.
In the FET model, for instance, the drain
current is modelled as a hyperbolic tangent function of
the drain voltage,
and as square law in the gate voltage.
Expanding ID as a power series,
ID^VDS^ ~ tank(nVDg)
-
I ^ d s '
-
1
^
D
S
1 3
+
T S
( '
"
W
5
*
^
D
S
1 7
+
• • •
At small values of V D g , the seventh order term makes
negligible contribution to the current ID , so that fifth
order behavior is a fair assumption.
However, as the
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-136-
signal swing V Dg is increased, the seventh order term
contributes to the total drain current; this term generates
additional frequency components (such as the'seventh har­
monic and seventh-order intermodulation terms like 4f^- 3f 2 ) ,
which will cause additional aliasing.
Fortunately, when
the aliasing becomes more complex than that predicted by
the fifth-order behavior, the failure of the deembedding
is readily detected.
Two equal signal levels as input will
no longer produce symmetrical intermodulation sidebands
(as they should)
if extra aliasing terms are present.
This
phenomenon is observed in the FET simulations for two sig­
nals as saturation is approached, and the model behavior
extends past the "well-behaved" fifth-order regime.
This
behavior however, is not a fundamental limitation on the
method.
The deembedding procedure could be extended, at
the cost of some complexity,
to account for sixth and
seventh order products, and so on; alternatively, as done
in the next chapter, a FET model could be fit to a fifthorder nonlinearity, or less, so the method could be used
as it presently exists.
For the complete FET model used
in Chapter 5, however, our simulations will be limited to
that regime below the point at which assymmetry effects
due to aliasing are seen to occur.
The major limitation of the method is that the device
model be low Q, so that the frequency translation (which
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-137is applied only to the nonlinear partition of the circuit
and not to the external linear circuit) does not affect
the magnitude of the frequency components that we seek.
This presents no problem at all if the nonlinearity is
purely resistive, or if any frequency dependent elements
in the model can be linearized and partitioned into the
linear circuit.
However, for reactive nonlinearities, the
frequency translation can produce minute changes in ampli­
tude of the signal, with devastating results.
the simplest reactive nonlinearity of all:
capacitor.
Consider
a shunt, linear
For this element, with a sinusoidally varying
terminal voltage of amplitude V, the resultant current is
i = jwCV, so that Ai = A uj.
A frequency shift of 2 MHz on
a 2 GHz signal will produce a relative amplitude change
in the fundamental current phasor of 10- ^.
Unfortunately,
this is comparable to the signal levels of the intermodula­
tion terms we are seeking to deembed, and the controlled
aliasing procedure is rendered worthless.
This phenomenon
predominates at extremely low level signals when the need
for resolution is greatest, and can again be detected by
asymmetry in the spectrum produced by two equal-level
signal inputs.
Fortunately, it may be eliminated by
choosing an extremely narrow signal spacing relative to
carrier frequency.
ratio of 10
—9
A signal spacing to carrier frequency
was used in testing with no adverse effects
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-138on accuracy; for the ensuing simulations, a frequency
spacing of 1 kHZ was used. This
entirely eliminated any
effects due to varying amplitude level during frequency
translation of the carriers.
Several comments about the
narrow spacing should be made here.
Firstly, such a
narrow spacing is never physically used during testing
only because of the difficulties associated with main­
taining two sources frequency-locked at this spacing, and
because of phase noise problems that arise so close to the
carrier.
If, in fact, it could be used, it would permit
much more accurate use of the spectrum analyzer to measure
intermodulation products as smaller resolution-bandwidths
and slower sweep speeds could be used.
Secondly, the
intermodulation and other distortion products have been
found experimentally to be independent of frequency separa­
tion of the two carriers
Volterra series
[14].
Finally, neither the
[18] nor analytical approaches
[12-17]
can account for frequency separation in their analyses.
Having stated the assumption and major limitation of
the modified harmonic balance technique, we turn our
attention to testing the performance of the technique
and verifying its analysis by comparison with the
Volterra series approach, before undertaking complete
experimental comparisons with the Madjar-Rosenbaum
FET model.
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-139-
4.
TESTING THE MODIFIED HARMONIC BALANCE METHOD
In the development of much of the software for the
modified harmonic balance method, many observations p r e ­
ceded the unearthing of pre-existing theory*
For instance,
both the band edge criterion and the foldback technique
came to light only through persistence in debugging fre­
quency transformation software that wouldn't work!
As
a result, the fait accompli presented here has in fact
been pieced together from subassemblies that have been
extensively tested, and in fact, individually serve as
illustrations of much of theory already presented.
The final testing of the program consists of three
phases:
(i)
test of a linear model,
to check deembedding,
derivatives, time delay, and time-to frequencyto time-conversions
(ii)
test of a fifth order nonlinearity, with un­
equal,
(iii)
real, and imaginary inputs
comparison with previous analytical techniques.
The only facet of the software not tested here was the
performance of the linear circuit partition (calculation
of the hybrid matrix relating voltage to current for the
linear circuit), which was extensively tested in previous
work as part of the standard harmonic balance technique [41] .
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-1404.1
LINEAR TEST
The first test is relatively straightforward and
simply checks the performance of the DFT and ensures that
the band edge criterion is successfully applied.
For
performance checks such as these, the parasitic and linear
circuits were effectively removed by judicious choice of
element values, in order that the applied voltages were
impressed directly upon the nonlinear partition.
nonlinear subroutine, with
and
In the
the current and vol­
tage at the partition gate node and C 2 and V 2 those at the
drain node, by setting
C1 = V1
and
C2 =
V2*
a one ohm resistor effectively serves as the nonlinear
element between the gate and source and the drain and
source.
The first simple check is to verify that the real
and imaginary parts of the applied voltages are reproduced
as the relevant fundamental output currents, and that all
other intermodulation and harmonic terms are zero.
A
second check is to verify that the delayed sine and cosine
terms preserve the delay.
A time delay of
t
= .02 n sec was
used, which corresponds to I/5 of a cycle delay at 10 GHz,
O
or 72
in phasor terms.
The current phasor was then found
to lag the applied voltage phasor by this amount, as
required.
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-1414.2
FIFTH-ORDER NONLINEARITY TEST
The most useful check of nonlinear performance is
to apply an input signal of the form
V = a cos w^t + b sin u^t
to a fifth-order nonlinearity:
I = V + V2 + V3 +
+ V3.
Such a nonlinearity generates all possible 31 frequency
components.
The use of two unequal signal levels a and b
forces asymmetry in the spectrum, and the use of cosine
and sine terms checks both the real and imaginary deem­
bedding.
Analytical substitution of V into the expression
for I is surprisingly complex.
The following are the DC
and three of the terms of interest generated:
DC:
cos (301^- 20)2)t:
“ ^8
sinUo^-oij) t:
- f [f a2b (a2 + b 2) + ab (a + f a 3 + f a b 2 )
+ f 2 (b + f a 2b + f b 3)
C O S {Uj) t
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-142A computer listing of the results for the case where
a = l and b = 1 is given in Appendix 8.9.
Table 4.1 gives
a comparison of the computer-generated terms and those
generated using the analytical expressions above.
Note
that the computer calculates residual complex components
which are at least three orders of magnitude smaller
( - 60 dB in power terms)
than the principal value, due to
the accumulation of numerical errors.
Such residual values
are negligible compared to the total component.
Agreement
is seen to be good.
It is interesting to note that in examples such as
these, where there is no linear circuit network to alter
applied voltages at the interface on successive iterations,
convergence was achieved with any value of the iteration
constant p.
by 10
—2
With p = 0 . 9 ,
the error function is reduced
each iteration (because the linear circuit contri­
bution is effectively absent and the interface voltage
remains constant)
so that just 9 iterations were needed
for convergence to be achieved.
The presence of parasitic
elements, however, often gave an unstable solution, which
diverged for any value of iteration constant.
As a final test, a reactive nonlinearity given by
I=x+ x
2
+x
3
+x
4
+ x
5
was used, with x = k ^ V ( t - x ) ,
and k a constant scaling
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-143-
Table 4.1
Comparison of analytical and computer generated
components for a fifth-order nonlinearity
COMPONENT
COMPUTER
ANALYTICAL
DC
3.25
3.25
3RD ORDER
-3.875 + j 3 .5 x 1 0 ” 4
-3.875
5TH ORDER
-5 x 1 0 -4- j .625
FUNDAMENTAL
1.67 x 10~3+ j 9.50
2ND HARMONIC
-2.5+j7.7 x 10 4
3RD HARMONIC
1.813-j1.23 x IQ” 3
-0.625j
9.500j
-2.500
1.8125
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-144factor.
The presence of the derivative adds frequency
dependence to the nonlinearity
(up to fifth o r d e r ) , and
the presence of a time delay ensures mixing of the real
and imaginary parts of the phasors.
Using V of the form
V = cos w1t + cos u)2t ,
the output current components at the fundamental as well
as the third and fifth order intermodulation products, were
found to be both symmetric, and lagging the voltage by a
constant phase angle.
The reactive dependence of the
nonlinearity was rendered invisible to the frequency
translation sets by choosing a frequency spacing of 1 kHz
(with 10 GHz carrier).
4.3
APPLICATION TO A SIMPLIFIED MESFET MODEL
Numerous authors have approached the problem of
intermodulation distortion in a MESFET amplifier in a
variety of ways.
While analytical approaches
[14,16,17,18]
have been used, they involve considerable manipulation to
extract the intermodulation response.
Minasian
[18] has
applied a Volterra series approach to a weakly nonlinear
model for the FET, and because his model is very nearly
a third order one, represents a prime candidate for appli­
cation to the modified harmonic balance technique.
Because the modified harmonic balance technique is
capable of describing grosser nonlinear behavior than
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
the Volterra series, it is also interesting, by way of
comparison, to carry the simulations to a higher degree
of saturation (and also, it should be noted, into a range
exceeding the validity of the model)
than possible with
the Volterra series.
The large-signal circuit model used in
[18] for the
2ym Plessey 360ym-FET is given in Figure 1.5.
The three
nonlinear elements used in the model are the transconduct­
ance term, gm , the gate-source capacitance CG g , and the
output conductance gQ .
The voltage dependence of these
terms is simple, and described by the closed-form ex­
pressions below:
gm(v i> = °-12 + (.0°24)Vi- (.°016)vi2
cG (Vi) =
.364 + ( . 0 8 2 ^
* o (V2> =
, 'Til'
(v2)
(8)
(4.1)
(pF)
(4.2)
<ts)
(4-3)
where V^ represents gate-source voltage and V 2 the
drain-source voltage.
The problem with the model presented in Figure 1.5 is
that the control voltage v
across the gate capacitor is
implicitly contained within a branch of the model.
As
the harmonic balance software requires terminal voltage
as an input, and calculates current into the gate and
drain nodes as an output, some simplification is necessary
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-146-
to reduce the model to one consisting of just two input
nodes.
The approach is identical to that used to eliminate
the gate charging resistor in the Madjar-Rosenbaum FET
model
[22].
Refer to Figure 4.1 below.
Figure 4.1
Simple series resistorcapacitor model for the
FET input.
If v x = R e t V ^ e ^ * ) ,
then v
g
= v..
1
. . ■■ -p1 + 3 “c g r i
Using the average value of
in Equation 4.2 as .36 pf,
R as 45 ohms, and w as 1.5 * 10^°,
v g = v l ,971 / "
13.7°
k
v lD
(vx delayed)
Thus the control voltage is simply the input voltage
o
.
delayed by 13.7 , and scaled in magnitude.
In this way,
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-147-
the current flowing in the R - C branch is given by
,
XG
jwCG
v l“ 1 + DwCqRj
= (jaCG ) v lD .
As Minasian
[18] does not give any value of transit time
delay t to be used with the transconductance, no delay
was assumed other than that arising from the charging
resistor and capacitor combination just considered.
The nonlinear nodal equations may thus be expressed
analytically, from Figure 1.5, as
These are easily programmed into the harmonic balance
software, as the nonlinearity is now of the desired
form i = g [ v , ^ ] .
The principal nonlinearity of the model is that due
to the transconductance current term gm v^D .
The current
generated by this term is to third-order power in the
input voltage v^.
As a result, third-order intermodula­
tion products will be generated in the output waveform.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-148The external linear circuit was set up as described
in
[18]. A 50ft source impedance was used (no
matching).
a)
or
The output load was chosen
input
to be either
120 + j80ft for optimum gain
b) 110 + j40ft for optimum power.
The load impedances were estimated from Smith Chart plots
in [18].
There, the optimum load impedance for maximum
power was deterimined empirically, as the range of validity
of the model
(and the Volterra series analysis)
extend into the compression region of the FET.
did not
As a con­
sequence, only the reduced gain due to using an optimum
power load is observable in the simulations.
Graphs showing output power versus input power are
shown for the two different load terminations in Figures
4.2a and 4.2b.
Three sets of data points are shown for
each of the two curves, representing measurement,
simula­
tion by Volterra series, and simulation by the MHB
technique.
The upper set of curves in each graph shows
the fundamental output power
(per carrier); the lower
set shows the third order intermodulation products.
In
view of uncertainties about the exact values of time
delay t , the true load impedances, and higher harmonic
terminations, agreement is surprisingly good.
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-149-
HHB
OUTPUT POWER (dBm)
X
VOLTERRA SERIES
-20
-50
-60
INCIDENT POWER (dBm)
Figure 4.2 (a) Measured and simulated output
power versus input power for
optimum gain output load.
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-150-
10
-
MHB
VOLTERRA SERIES
-
-10
-
-20
-
OUTPUT POWER (dBm)
0
-3 0 -
-4 0 -
-5 0 -
-
60
-
INCIDENT POWER (dBm)
Figure
.2 (b) Measured and simulated output
power versus input power for
optimum power output load.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-151It is interesting that saturation effects are illus­
trated remarkably well by the MHB method in Figure 4.2b.
In fact, as the input power continues to increase into
saturation, the cubic term (which is negative)
in the
expression gm Vj_ dominates and the output power decreases.
However, over most of the useful dynamic range of the FET,
a third-order nonlinear model was sufficient to predict
the principle nonlinear effects.
As the input driving voltage of the two signals was
increased, the presence of fifth-order intermodulation
products was noted.
At first, these products were thought
to arise from the higher order nonlinearity present in the
expression for gQ , Equation (4.3).
However, principally
because the exponent of v ^ in the denominator is so close
to 1, and the term is then multiplied by V 2 to obtain the
conductance contribution to current, elimination of this
component did not eliminate the observed fifth-order
sideband.
Next, by changing the cubic term in gmv lD
( - . 0 0 1 6 in Equation (4.1)) to zero, all third and fifth
order products were lost
remaining.
(i)
with only the fundamental term
This illustrates two important points:
in the Minasian model, the cubic term in the
transconductance current g v. is extremely
m x
sensitive in controlling the level of the third
order intermodulation distortion,
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-152and
(ii) the fifth-order intermodulation terms arise due
to reinteraction of the third-order intermodula­
tion products with the nonlinearity.
This is
a higher order effect, and accounts in part for
the effect of the external circuit on the level
of intermodulation products.
The currents at 2f2~f^ and 2f^-f2 cause voltages in the
linear partition, which, when reimpressed upon the non­
linear partition together with the applied external
voltages at f-^ and f 2 * create new, third-order sidebands
at 3f^-2f2 and 3f2~2f^.
In summary, the MHB technique has been shown to be
compatible with existing models and equal in performance
to previous analytical tools capable of handling multiple
frequency excitation.
However, the advantage of the MHB
method over the Volterra series approach is that any model,
expressible in the form i = g(v),may be used in the loop.
The complicated task of model analysis to determine the
Volterra kernels or nonlinear coefficients can be bypassed.
Additionally, a greater number of interaction terms may be
considered simultaneously (eleven in our case), and finally,
a higher order nonlinearity may be used once- the deembedding
software is in place.
All of these advantages will be seen
in the next chapter where an analytically intractable model
is used with a complex parasitic and embedding network, to
model intermodulation distortion in an FET amplifier.
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-1535.
MODELLING OF NONLINEAR AMPLIFIER BEHAVIOR
5.1 PRELIMINARY MATCHING OF THE MODEL TO THE NEC72089
As described
in Chapter
model was modified to give
the
FET characteristics
1, the
an efficient representation of
capable
computer memory.
The modified
table,
a short
which is
the
storage within
data table
pinchoff
transconductance gm ,
of
the
approach creates a look-up
electrical properties such as
ID S g ,
Mad j ar-Rosenbaum FET
containing the
FET
the saturated drain current
voltage
as well
Vp/
as the
and
the
endpoints of
the
four nonlinear capacitances which are interpolated for any
given (VG S ,VD g )
combination to
matrix valid at that operating
yield
point.
harmonic balance program, the look-up
created.
which
capacitance
Before running the
table must first be
This is done by calling the Madjar routines
require,
semiconductor
dissipation.
the
a
as
inputs,
properties
The
of
FET
geometrical
the
FET,
interpolation routines
look-up table
are
then
and
[1],
factors,
the
power
and reading
performed from
within
of
the
harmonic balance program.
Additional modifications
[22]
are
also
used.
In
made to
particular,
the model
the
by Green
addition
of
Schottky diodes between the gate and source, and drain and
source, illustrated in Figure
1.11, permits the modelling
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-154-
of
gate
breakdown
current in
effects.
this way,
By
allowing
forward clamping
for
DC
and self
gate
biasing
through a series gate resistor can be fully modelled.
diode characteristics are represented
segments,
with
voltages.
The
adjustable forward
disadvantage of
however, is that at large
of
the piecewise
The
b y piecewise linear
and
such
reverse
a
turn-on
representation,
signal levels, the nonlinearity
breakpoints
can
be represented
as
a
Taylor series to very high order powers.
The
transistor
chosen
NEC72089, principally
lower
drive-power
usage in industry.
working
at a
low
for modelling
because of its
frequency the
measurement parasitics could
harmonic
measurements can
was
the
ready availability,
requirements, high
Although it is a
here
gain,
and
common
packaged device, by
effect
of package
be minimized.
be carried
and
Additionally,
out with
existing
equipment whose bandwidth can accomodate several harmonics
of a
low frequency.
In creating
this device, the FET geometry
length is
pm.
1.0 pm (usable
Because of the very
no data was
layer height.
1 7 - 3
cm
table for
was fairly well known: gate
to X-band),
and
gate-width 400
large variation between devices,
available on doping density
However, in
order to
IDSS and Vp from the Madjar model,
1 x 10
the look-up
or the epitaxial
obtain the
correct
a doping density of
and epitaxial layer height of .16 pm was
used, with satisfactory results.
These
values lie in the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-155-
range used for such a transistor.
Because
of
the difficulty
in
obtaining
consistent
devices, considerable time
was taken in selection
parasitic
order
elements
representation of
was
expended in
in
this transistor,
not blowing
during experiment!
simple
and even
a
valid
more effort
device in
question
shows the linear-nonlinear
parasitics, and the allowable
circuit topology
linear program
obtain
up the
Figure 5.1
partition of the model, the
external
to
of the
in
was
the
linear partition.
first used
characteristics (through Rg and
to
match the
A
DC
in particular); the
small-signal AC characteristics were then matched with the
measured
S-parameters by
adjusting
CDSC' L S' LG' L D' and RG*
Physical
characteristics
assistance in
For
CG S , Cpg ,
are
of
estimating many of the
instance, the
0.8mm
bonding
2 GHz.
leads inside
Similarly, the
reflection coefficient
S 22 is
considerable
parasitic elements.
package are approximately equivalent to
inductance at
C GSC,
ID -VDS
required
Since
this
term
characteristic,
for
also
its
accurate
small-signal output
predominantly controlled
sets
the
judicious
modelling.
optimization programs such as COMPACT
to alter the parasitic elements
FET
0.35 nH of series
Secti°n
by the choice of output conductance ^sUBSTo
1.5).
the
slope
choice
of
the
is
Small-signal
[8] can also be used
until a match to measured
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-156-
EXTERNAL
CIRCUIT
NONLINEAR
MODEL
PARASITICS
DRAIN
OS
DG
DSC
GS
R e = 6R
L s = .1 nH
= 20
L q = .35nH
c;
VO
II
LD = .5 nH
CGS
= *3pF
CGSC = 'lpF
CDS
= *3P F
CD S C = *lpF
Figure 5.1
The complete FET model, showing the nonlinear/
linear partition, the external circuit, and
the parasitics used to model the NEC 72089.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-157-
S-parameters
has
been
achieved over
a
broad
band
of
frequencies.
5.2 AMPLIFIER SIMULATIONS AND MEASUREMENTS
Part
of the
linear
partition
network contains series and
in the
these
elements
balance
shunt elements that represent
the effect of impedance matching
Although
harmonic
at the device terminals.
are all
lumped
(for
ease
of
analysis), any distributed network ma y also be referred to
the device terminals
its effect
there.
at the frequencies of
represented by the equivalent
This
enables
the
simulation
interest, and
lumped elements
of
generator and load impedance, and enables
any
desired
their effect on
circuit performance to be investigated.
In the simulations to follow,
designed,
simulated,
operating points.
which
the
This is
nonlinear
amplifier has
and
a feedback amplifier was
measured
at
the first
behavior
been simulated.
of
a
a
variety
of
known instance
in
MESFET
Several
feedback
different circuit
configurations were investigated with the aim of comparing
the
MHB simulations with measurement, and of consequently
using the
method in the
design of high
performance, low
distortion amplifiers.
The amplifier built corresponds
equivalent
circuit shown
actual generator
and load
in
Figure
to the lumped element
5.2.
Although
the
characteristic impedances
are
both 50 ohms, Figure 5.2 shows a generator impedance of 75
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-158-
2 d& - 5o o ^
Figure 5.2
*
Rpa
Lumped element AC equivalent circuit,
showing the circuit external to the
FET that was used to model the amplifier.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-159ohms;
this
was
achieved
in
the
circuit
distributed single stub tuner. Analysis
by
using
a
of the input match
of Figure 5.2 on the Smith Chart reveals the effect of the
shunt 10 nH inductance and
impedance
is to
Similarly,
on
the effective 75 ohm generator
achieve a
the
good
output,
input match
additional
at 2
GHz.
capacitance
was
necessary in order to obtain the desired, measured gain.
Adding the 500 ohm feedback resistance lowers the gain
from
the
maximum
available
value.
However,
considerably simplifies
the task
particularly
frequencies where
at
lower
it
of impedance matching,
the
FET
gate
appears highly reactive.
Bias was brought in to the amplifier through RF chokes
consisting
lines.
The
of ac-grounded,
gate voltage
chip resistor, just
this
is to
quarter-wave, high
was applied
through a
prior to the RF choke;
quell any
tendency for
impedance
100 ohm
the effect of
oscillation, and
to
limit the DC gate current under conditions of heavy drive,
by self-biasing the FET towards pinchoff.
Several
frequency
measurements were
tone
was
applied
power-transfer characteristic.
power vs. output
capability
NEC72089,
maximum
between
14 dBm
at
2
Firstly, a
GHz
and 17
of
to
the
saturated
a
of input
and reveals the
device.
output
dBm, depending
single
obtain
This is a curve
power up to saturation,
power-handling
the
made.
For
power
on the
the
varies
operating
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-160-
characteristics of
the particular
device.
The
modified
harmonic balance technique has no limitations when used to
simulate single-frequency
of the
tests, regardless of
nonlinearity, because
components unaccounted
any higher-order
for in the
smaller than the fundamental
be neglected.
the
output
interest
intermodulation
products give cause for
made under
be much
and consequently may
two tones are applied,
is
sidebands,
frequency
aliasing will
output,
It is only when
of
the order
the
that
concern.
and
relatively
low-level
additional
aliasing
Additional measurements
single-tone excitation
were reflected
power,
drain current, and second-harmonic power.
The
second
type
application of two
intermodulation
of
measurement
involved
closely spaced tones at 2
performance
fundamental output
could
be
power per carrier was
the
GHz so that
found.
The
recorded, along
with the level of the third-order intermodulation product.
Because of the presence
input power
4.77 dB
needed in either of
less than
the power in
needed to reach the same
is a factor
all,
the two tones
a single
applied signal
measured
of measurments
and
This
can be analytically
with third order behavior,
Eight series
to compare
was about
degree of gain saturation.
of three times less, and
established for devices
Heiter [12].
of intermodulation sidebands, the
as in
were made
simulated behavior.
in
The
results will be presented in Figures 5.3 to 5.10.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-161-
5.2.1 Intermodulation Distortion
The first series of measurements
5.3(a)
and
5.3(b).
drain-source
voltage
voltage
The
amplifier
VD S = +3
V Gg= -0.25volts.
both measured
excitation.
biased
and
with
gate-source
Figure 5.3(a)
points for
are
single-frequency
The uppermost curves (i) show the fundamental
for incident powers
of sufficient level
Agreement
was
volts,
Shown in
and simulated
output power
+10 dBm,
are shown in Figures
is excellent.
(ii), with
ranging from -7
to saturate
The
reflected
the amplifier.
power is
the error between measurement
being 2 dB.
dBm to
curve
and simulations
Below this, in curve (iii), the simulated and
measured values of second harmonic output power are shown.
Small-signal
agreement
predict levels
large
5 dB too
input
power
approached, the
itself (across
pinchoff.
is
good,
but
high for the
levels.
FET began to
As
simulations
second-harmonic at
these
levels
draw gate current
the series DC-blocking
The effect
the
of this was to
were
and bias
capacitor) towards
symmetrize the bias
point between saturation and cutoff, reducing the level of
the
second-harmonic component.
piecewise
diode
characteristics
would
affect
consequently the
the
Errors
of
the
DC
gate
in the
modelled
gate-source
Schottky
current
degree of self bias
drawn
and
and second-harmonic
generation.
Furthermore, the behavior
of the distributed
circuit at
the second-harmonic was not
known accurately.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-162-
3IMULATED
OUTPUT POWER (dBm)
MEASURED
-5 0
\ h ~ -T~
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.3(a)
Single tone measurements on an FET
feedback amplifier. v g s =-°-25v'
V _ C=3V,
,=500J). From the top, the
m e S s u r e d ^ n d simulated groups of
curves show (i) fundamental, (ii).re­
flected and (iii)second harmonic out­
put powers, and (iv)drain current,
respectively.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-163-
As
will
be
presented
to
seen
shortly,
the
harmonics
the
terminating
substantially
impedance
affects
the
degree of observed nonlinear behavior.
The bottom-most curves (iv)
drain current
of the
these simulations
the
model
because
amplifier.
was that the
was too
high
a limitation
adjustment
of
of Figure 5.3(a) show the
(by
of
A
consistent trend
DC gate current
several m A ) .
the Madjar
IDSg through
FET
given by
This
arose
model is
doping-density
of
that
level
and
epitaxial-layer height estimates also affects the pinchoff
voltage
Vp
in
one-volt steps
(with
values of V p ), restricting somewhat
obtainable.
However,
fundamental output
accurate
the DC
give confidence
intermediate
the range of values
accuracy
powers were
variation of
power level,
the
no
with
which
always modelled,
drain
the
and the
current with
to the
method,
and
input
to the
modelling of this FET.
Two-tone measurements
shown
in Figure
between
5.3(b).
the simulated
saturation.
The
under the
Perfect
and measured
bottom
set
same conditions
tracking is
observed
output powers,
of
curves
third-order intermodulation distortion.
are
into
shows
the
The measurements,
made o n a spectrum analyzer, indicate the power per signal
(and
not the
power per
observed
total power).
signal is 11 dBm,
in the
single-tone
Thus
the saturated
roughly 5 dB less
measurements,
output
than that
as would
be
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-164-
SIMULATED
OUTPUT POWER (dBm)
MEASURED
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.3(b)
Two tone measurements on the same
FET amplifier, showing measured
and simulated fundamental output
(top) and third order intermodu­
lation distortion (bottom) powers.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-165-
expected
from third-order
analysis.
The
slope of
the
intermodulation characteristic is approximately 3:1 at the
small-signal level.
certainly
However, this third-order behavior is
not maintained
range of the device.
throughout
the useful
A t an input power level of 1 dBm for
instance, the slope is about 5.7:1.
observed this phenomenon in FETs
Numerous authors have
[14,17,42].
The modelling also incorporates
At an incident power level of 6
FET was measured
power level in
dynamic
self biasing effects.
dBm, the gate bias on the
to have fallen to -0.32
the simulations, the DC
volts.
At this
gate current into
the gate through the 100 ohm bias resistor was modelled to
b e 1170 uA.
The net effect of this current is to increase
the gate bias from -0.25 volts
effects are
determining
to -0.36 volts.
extremely important at
correct
operating
high power
levels
Such bias
levels in
and
circuit
interaction.
Finally,
third-order
it
can
be
seen
intercept point
Pj
intermodulation behavior shown is
that
for
the
concept
devices with
not reasonable.
of
a
the
A Pj
level around 26 dBm might be estimated from generous curve
fitting, which gives, coincidentally,
to 10.6 dB above the
predicted by Heiter
Pj which is close
single-tone ldB compressed point,
as
[12].
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-166-
The second
series of
measurements,
5.4(a) and 5.4(b), are the
shown
in Figures
same as those just considered,
but at a bias level of VGg= -0.5 volts.
The fundamental
output, reflected,
powers shown
and second-harmonic
for
single-tone excitation in Figure 5.4(a) agree closely with
measurement,
The
as
two-tone
does the
form of
results,
in
Figure
modelling of the fundamental
comparison with the
In
this
occurs due
5.4(b),
between
show
good
output component, but poorer
in
the level
both bias and tuning
by the
the
of
third-order
The occurence of such
to partial correlation in
components produced
coherence
dip
observed.
highly dependent on
drain current.
third-order intermodulation products.
instance, a
product can be
the DC
and
conditions, and
the intermodulation
nonlinearity,
gate
a dip is
drain
because
of the
voltages.
The
correlation can result in a cancellation effect observable
as dips
(17 ].
Such dips
conversion curve
masked
in the
[14].
may also
be seen in
In our case, this
simulation by
the AM/PM
correlation is
higher-order terms
causing
aliasing at a level comparable with the desired component.
Several useful facts emerge from the analysis however,
with regard to increasing of the
gate bias.
For the same
output power level, drain current
is reduced, the gain is
reduced, the
reflected power
second-harmonic and
are increased, the saturated output
the gain is more linear.
levels
power is similar, and
At small-signal power levels the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-167-
SIMULATEO
OUTPUT POWER (dBm)
MEASURED
29099994
-5 0
anm
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.4(a)
Single tone measurements on the FET
feedback amplifier. V_S=-0.5V,
V ps=3V, RpB=500S2. Curves are as for
Figure 5.3.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-168-
SIMULATED
OUTPUT POWER (dBm)
MEASURED
62999999999^
550
D9A
-10 6 - 2
2
6
INCIDENT POWER (dBm)
-
Figure 5.4(b)
Two tone measurements on the same FET
amplifier, showing measured and simu­
lated (i)fundamental output and (ii)
third-order intermodulation distortion
powers. The bottom curve (iii)shows
the measured fifth-order intermodula­
tion distortion product.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-169-
third-order imr is worsened; however,
because of the dip,
the third-order imr is improved near compression and up to
the onset of saturation.
There is
AM/AM
with
considerably less curvature in
(gain compression)
that in
lower
at
higher
this
curve of
Figure 5.4 (b) compared
Figure 5.3(b) ; the third-order
intermediate power
levels.
order intermodulation
case, and
"best 11
the two-tone
linear
it
However,
products occur
is therefore
amplifier.
imr is
The
difficult
also
several
as well
in
to define
optimization
a
criterion
clearly depends on the systems application e.g. modulation
format for a communications system.
The
curves
in
Figures
comparison of measured
5.5(a)
5.5(b)
and simulated results for
feedback amplifier operating
with a bias of
volts, and an increased drain-source
volts.
and
show
the FET
V QS= -0.25
voltage of VQS= +4
Figure 5.5(a) shows, from the top, the fundamental
output and reflected powers for a single-tone measurement,
and
the
DC
measurements
drain
current.
and simulations
Figure
of
5.5(b)
shows
the fundamental
output
power and third-order intermodulation products.
Agreement
between all the measurements and simulations is very good,
with the exception of the intermodulation product.
Several factors
affect the modelling accuracy for the
intermodulation product.
extremely
sensitive to
Because of its
model
low level, it is
parameters.
As noted
in
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-170-
SIMULATED
OUTPUT POWER (dBm)
MEASURED
hi i
...........
i ii 111 iiiiiip i
iiiiiiim
66
C./A
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.5(a) Single tone measurements on the FET
feedback amplifier V Gg=-.25V, v Dg= 4V,
RpB=500n. From the top, the measured
ana simulated groups of curves show
fundamental output power, reflected
power, and drain current, respectively.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-171-
SIMULATEO
OUTPUT POWER (dBm)
MEASUREO
5141
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.5(b) Two tone measurements on the same
FET amplifier, showing measured
and simulated (top) fundamental
output and (bottom) third-order
intermodulation distortion power.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-172-
Chapter 4 for the Minasian
model, slight variation in the
third-order transconductance term affects the magnitude of
the intermodulation
more difficult
be
effects
Finally,
of the nonlinearities
as
as
as
infinite
and
dips in
will
terminations
problem is
Additionally, most
aliasing
such
The
numerous contributing
expanded
"residual 11
dB.
here because of the
nonlinearities.
can
product by many
be
(which
masking
the
do
thereby
extremely
shortly,
low-level
not
product.
the
harmonic
necessarily
fit
circuit assumed for
fundamental) can alter the
intermodulation product
causing
intermodulation
seen
lumped-element equivalent
partition at the
series,
by over
5 dB.
the
the linear
level of the
Nonetheless, the
trends predicted by the simulation with respect to circuit
and power variation agree well with those measured.
The effect of
observed
The
by comparison
gain
and
slightly, by
when the
voltage has
match of the
FET.
few
we
as
output
current-voltage
power
beyond
are
little effect
the
characteristic.
5.3(b).
increased
is increased.
unchanged, indicating
The DC drain current
are
FET can be
5.3(a) and
drain bias
power is essentially
the drain
mA
with Figures
saturated
0.5 dB,
The reflected
that
increased drain bias on the
on the
input
increases only a
"knee"
of
Importantly,
the
at
FET
a
constant output power, the level of the third-order IMD is
reduced
by up
to 5
dB.
The
reduction is
particularly
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-173-
noticeable for medium
signal levels, with outputs
range of +5 to +10 dBm.
compression curve
this phenomenon
The curvature noticed in the gain
of Figure 5.3b
thus appears
gate bias voltage.
in the
is also
to be
apparent here;
associated with
the
Finally, the simulated DC gate current
was less, indicating the onset
of voltage clipping during
the negative half-cycle of the input waveform, allowing DC
current to flow out of the
gate when the gate-drain diode
enters reverse breakdown.
In
order
variation
reduced
to
on the
to 100
VQS= -0.25
investigate
amplifier,
ohms.
The
the
the
effect
circuit
feedback resistor
original
volts and VDg=
of
was
bias conditions
+3 volts were
of
used again.
The effect of reducing the feedback resistor was to reduce
the power
reflected b y the amplifier
below the incident power.
effect of
the 100
to more than
20 dB
This arises due to the shunting
ohm resistor at
the input;
a natural
consequence of this is the considerable reduction in gain.
This technique is often used in amplifier front-ends where
gain is cheap and input match is important.
The results can
Figures
excellent
5.6(a) and
be seen in the
5.6(b).
agreement,
the
Figure
measurements shown in
5.6(a) shows,
measured
and
with
simulated
fundamental output power and DC drain current for a single
frequency tone.
are
presented
Intermodulation distortion
in
Figure
5.6(b),
which
measurements
shows
the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-174-
SIMULATED
MEASURED
OUTPUT POWER (dBm)
86
..I'wugga
- r l' P
5851
-5 0
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.6(a) Single tone measurements on the FET
feedback amplifier, V Gg= -.25V, V d s = 3V,
RpB = 1000. The top curves show measured
and simulated fundamental output power;
the bottom curves show DC drain current.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-175-
fundamental and third-order output
powers per carrier for
two-tone excitation.
The
reduction in
power-handling
seen in Figure 5.6(b) where
The
1-dB
gain
point
at +6 dBm output
to a (4.77dB higher) one-tone
10.5 dBm,
as would be
represents
much reduced
obtained
power
dBm from
power, corresponding
5.6(a). This
performance
(14
to
than can
17
be
The
product has very close
to the
levels, enabling a good Pj
the measured
approximately 10.5
two-tone
dBm).
ideal 3:1 slope at low power
falls
the
indicated on Figure
intermodulation distortion
of 21
for
compression power of around
without feedback
estimate
best
the input loading is greater.
compression
application occurs
capability is
dB above
data.
This
then
the single-tone
1-dB
compressed point.
It
can
be seen
that
at
lower power
amplifier has very good third-order
single-tone
compression
third-order
can be observed
to 4:1.
reflected
in
to third-order
at the lower power
with Figure
slope rises
very
levels.
levels appear to be
5.3(b) reveals
its
Above
behavior is
the simulations, which show
the third-order distortion
in
dBm, a breakpoint
at which the intermodulation
additional aliasing
comparison
and
characteristic.
per carrier of 2
The closeness
this
behavior, both in its
characteristics
intermodulation
incident power levels
levels,
that
also
little
Although
very low,
at a
given
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-176-
SIMULATEO
MEASURED
OUTPUT POWER (dBm)
1299031
2999
57
-10 - 6 - 2
2
6
INCIDENT POWER (dBm)
Figure 5.6(b) Two tone measurements on the same
FET amplifier.
Curves are as for
Figure 5 . 5 (b).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-177-
output power, an
increase of between 10 and 15
level of the third-order product
reduction of the
dB in the
has actually resulted by
feedback resistor to 100
increase could be anticipated b y
ohms.
Such an
the lowering of the 1-dB
compression power level from 15 dBm to around 10 dBm.
fact that the simulations can
The
predict a similar reduction
in the third-order intermodulation performance augurs well
for their use
as a circuit design aid,
and in predicting
circuit trends.
The
curves
performance for
VD S =
+3
Comparison
in
Figures
the same
volts)
with the
with
Figures
5.7(a)
amplifier (VGg=
feedback
5.3(a)
improved power-handling capability.
compressed output
the
power in Figure
two-tone compressed
removal
of the
match.
power
feedback has
reflected power,
and
making the
is
5.7(b)
-0.25 volts,
resistor
and
removed.
5.3(b)
indicate
The single-tone 1-dB
5.7(a) is 15
11 dBm).
dBm (and
Note
considerably increased
amplifier more
However, the direct tradeoff
show
that
the
difficult to
is that the gain has
increased by 3 dB.
With such a high gain, the compression into saturation
is
particularly gradual.
Similarly, the
slope
of
the
small-signal third-order intermodulation characteristic is
closer to 3.5:1
in
spite of
than the commonly assumed
these "nonidealities",
handling capability
3:1.
However,
the increased
still translates directly
power
to reduced
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-178-
SIMULATED
MEASURED
8
9
OUTPUT POWER (dBm)
0
^9414752
9
-5 0
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.7(a) Single tone measurements on the FET
amplifier, V =-.25V, V__=3V,
R-^lOOOMfi. Curves are as for
Figure 5.5(a) .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-179-
SIMULATED
OUTPUT POWER (dBm)
MEASURED
20
-5 0
D9+:/43/16D
10 -6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.7(b) Two tone measurements on the same
FET amplifier.
Curves are as for
Figure 5.5(b).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-180-
third-order intermodulation
product.
Comparison
Figures 5.3(b) and 5.7(b) reveal that,
powers, the
intermodulation product
for the case of no
between
for the same output
is slightly
feedback resistor.
smaller
Unfortunately, the
FET becomes much harder to match and more unstable (due to
increased gain) under these conditions.
Part of
the reason for
the gradual
noticed above is related to the
rectification
of the
signal.
DC gate current caused by
In
both measurements
simulations at
this bias
resistance was
observed to increase
power,
with the
slowly increase
level, increasing
consequence of
current into the FET.
gain compression
the feedback
the gain
increasing
The observed
and output
the DC
the gate-bias voltage, which
also slowly
A slight error in
characteristics of
the gate-source diode resulted
simulated value
account in part
of DC
the forward turn-on
gate current.
for the pessimistic value
output power at the higher
gate
effect of this was to
reduces the gain.
high a
and
in too
This would
of fundamental
incident power levels shown in
Figures 5.7.
The
final
involved biasing
series
of
intermodulation
the amplifier above (Rpg
experiments
removed) for
minimum distortion product at some operating output power.
This was found to be at a
(VDS= +3
volts).
gate bias of V QS= -0.57 volts
The single-tone output
and reflected
power curves are given in Figure 5.8(a), with the DC drain
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-181-
SIMULATEO
OUTPUT POWER (dBm)
MEASURED
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.8(a)
Single tone measurements on the
FET amplifier, V g=-.57V, V_g=3V,
RpoSlOOOMn.
Curves are as ror
Figure 5.5(a).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-182-
current:.
The power
Note
superb
the
indicating low
linearity
output
is
simulations in
in excellent
the
at small
Figure 5.7
Compared
where the
curve,
signal levels,
performance.
and the measured
15.8 dBm.
agreement.
compression
good intermodulation
is 8.9 dB,
power
of
AN/AM conversion
and foreshadowing
linear gain
curves are
The
1-dB compressed
to
the
previous
gain was
13 dB,
a
tradeoff has been made in the operating point, sacrificing
gain
for
linearity.
achieved partly
The improved
linearity
has
through symmetrizing the gate
been
bias point
between pinchoff (-1 volt) and forward saturation (above 0
volts).
A manifestation of this is the low amount of self
bias observed
as saturation is
approached -
raising the
incident power from +5 dBm to +10 dBm caused the gate bias
to increase
from -0.57
volts to
-0.62 volts;
a similar
action when biased at -0.25 volts caused it to change from
-0.25 volts to -0.36 volts.
gate bias
total
change was
DC gate
positive
current
coupled with
current in
as the
In the simulations, the small
a direction
incident power
components
due
a fluctuation
to
was
reverse
of the
from negative
increased.
breakdown
to
The
DC
of
the
gate-drain diode and forward conduction of the gate-source
diode (on negative
voltage
and positive half-cycles of
respectively) balanced
forward conduction
out
the input
initially, with
process eventually dominating
the
at high
input powers.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-183-
Intermodulation measurements
5.8(b),
showing measured
third-order products,
output power.
dB.
and
with the
Figure
-0.25
volts,
the
to
output power is 12 dBm.
substantially
Whereas at a gate
bias level of
small-signal
gate bias
remains 8.9
reveals
third-order (as indicated
behavior
was
b y a 3:1 IMD
-0.57
small-signal levels.
reasonably
slope), reduction
volts (Figure
actually flattened the slope
at
linear gain
5.7(b)
different IMD behavior.
and
simulated second-harmonic
The small-signal
with
in Figure
simulated fundamental
The two-tone 1-dB compressed
Comparison
of
are presented
5.8(b))
has
of the intermodulation curve
The
behavior
at higher
power
levels is also "nonideal", rising from a dip of -28 dBm at
0 dBm incident to
a level of -3.5 dBm at
7 dBm incident,
an average slope of 3.5:1.
Comparisons
5.8(b) with
of
the
those in
third-order
Figure 5.7(b),
power levels, reveal that
product level
curve shows
from
a dip at
at this
Figure
at constant
output
lower here
for output
powers
The shape of the intermodulation
around this power
improved cancellation
nonlinearities
in
the third-order intermodulation
is somewhat
above 8 dBm per carrier.
product
between
power level.
level, resulting
the
gate and
At lower
drain
incident
power levels, however, the IMD is made worse by increasing
the gate bias.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-184-
SIMULATEO
OUTPUT POWER (dBm)
MEASURED
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.8(b) Two tone measurements on the same FET
amplifier. The top curve shows measured
and simulated fundamental output power;
the bottom curve shows third order inter­
modulation distortion.
The middle curve
shows simulated second harmonic output
power (per carrier).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-185-
The behavior
power
of the simulated
is shown
for
comparison
behavior of this component with
much more
from
slowly than
second
order
expected slope, no
second-harmonic output
in Figure
The
incident power also rises
20 dB/decade
the simple
terms.
5.8(b).
Apart
from
the
expected
lower
sudden variations are observed
than
in its
character.
In order to investigate the contribution of the higher
order
terms
to
third-harmonic
shorted
the
currents were
out by
the linear
This was achieved
higher
observed
IMD,
all
allowed
circuit
to be
generated in
and
effectively
in the
by not reimpressing upon
order voltages
second
simulations.
the model any
the linear
circuit,
caused by the second or
third harmonic currents generated
by
model.
the
nonlinear
drastically
presented
FET
reducing
to
the
the
This
linear
model at
is
equivalent
circuit
frequencies
to
impedance
away
from
the
fundamental.
Very little
product was
alone.
observed by
However,
second-harmonic
model.
change in
several
voltage
the level
of the
shorting out
effects were
was
As might be expected,
not
I
third-order
the third-harmonic
noted
when
the
reimpressed
upon
the
the effect of removing this
additional source of nonlinearity was to reduce the
of third-order distortion products.
level
Just as the effect of
reimpressing the third-order distortion
products upon the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-186-
third-order
model
fifth-order
in Chapter
4
to
introduce
terms, the higher order interaction of
second-harmonic signal
with the
additional third-order
distortion.
reduced
was
by
approximately
configurations
( i.e.
with
the
fundamental here
The level of
3dB
for
both
Rpg 3
500 ohms,
causes
IMD was
amplifier
and
with
feedback removed) over most of the input power range.
On the other hand, the level of the fundamental signal
was
affected
very
little
by
the
termination. At
-7 dBm
output power
increased from 1.59 dBm
the shorted
incident power,
harmonic termination,
second-harmonic
the
fundamental
to 1.66 dBm
and in
due to
saturation, no
meaningful difference was found in the output power.
is
of
considerable
neglect
of
fundamental
consequence,
harmonic
frequency
as
terminations
response
it
when
using
This
justifies
our
considering
large-signal
S-parameters (Chapter 2).
The
use of
open-circuit
terminations at the gate and
second- and
drain was also investigated,
b y directly seting the external
ports to
a large value.
the parasitic
is
third-order
circuit elements at those
Some harmonic currents
elements, however,
such terminations is reduced.
power
basically
so that
flow in
the effect
of
As before, the fundamental
unchanged,
distortion
third-harmonic
products
bu t
is
the
now
level
of
increased
the
by
several additional dB compared to the case of typical load
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-187-
terminations at both ports.
Knowledge of the
thus
important
harmonic behavior of the
in
linear
third-order product
amplifier
may be obtained
circuit is
design.
A
by presenting
low
a low
impedance shunt termination to
the second-harmonic at the
gate and
that higher
order effects
voltages are minimized, by
keeping their
drain.
due to harmonic
This ensures
level as low as possible at
same token,
however, the
complicated,
as
impedance of
the
task
of analysis is
an incomplete
knowledge of
the linear circuit
several dB in modelling
though
the device terminals.
By the
made more
the harmonic
can result in
errors of
intermodulation performance, even
fundamental
frequency
response
will
be
relatively accurate.
Fundamental
load impedance
critical parameter
high
power
in amplifier
levels.
load-pull
for
(without
termination
changes
relatively
changes
determine
and
such
easily using
the
as
the output
ohms, or
increasing it to 120
MHB
can
higher
be
harmonic
to the
Load
investigated
For
example,
drain to
ohms, reduced the
reduced the imr at
load
varied).
method.
load presented
at
intermodulation
was
these
reducing
the device, and
for
a
laborious
optimum
minimum
load
the
is also
performed
accounting
as
drain
design, particularly
[42]
to
power
distortion
impedance
Sechi
experiments
terminations
at the
20
gain of
constant output power
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-188-
by approximately 2 dB.
As a final
example of the applications
described here,
Table 5.1
consider now the
shows various
of the method
case of
device design.
device parameters
(ND , doping
density; a, epitaxial layer height; LG , gate length; and
W, gate
about
width).
their
created.
t,
and
As these parameters
nominal
incremental
look-up
capacitances, for
Simulations
feedback amplifier
table shows
power, P0 U T ;
the
new
25 %
table
was
the
MHB
This yielded new values of ID S S # V p ,
algorithm.
The
values, a
were varied ±
were
then
at a fixed
the
new
use
run
equivalent IM3
for
levels of
the same
basic
-4 dBm.
fundamental
output
power, P 2n d ?
intermodulation product,
( at
the
incident power of
the second-harmonic output
third-order
in
IM3,
P0 U T ) for
and
the
t*ie unchanged
feedback amplifier with the original device.
Such a
design
doping
table is relatively
(e.g.
manufacturers
profiles
to
crude in terms
such as
improve
of device
Fujitsu use
linearity,
graded
which
are
unaccounted for in this model), but, by indicating trends,
the amplifier designer
is assisted in the
task of device
selection.
For
example,
a
IDSS
and
increased
capability)
has
wider gate-width
improved
improved
output
device
(with
its
power-handling
intermodulation
performance.
Gate length basically controls device transit time and has
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
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Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-190-
little effect
frequency).
doped
on intermodulation performance (at
Similarly, the use of
epitaxial
layers
is
able
a fixed
higher or more heavily
to
improve
amplifier
harmonic balance
method is
linearity.
In summary,
able to
the modified
assist both
evaluating
amplifier
trends
the circuit
which
linearity
and device
enable
and
the
the
designer in
improvement
reduction
of
of
third-order
intermodulation produ c t s .
5.2.2 Gain Suppression in Limiting Amplfiers
Having
demonstrated
the
harmonic balance technique,
useful in
distortion
ability
the
modified
with a suitable model,
predicting the fundamental
performance
of
of
the
to be
and intermodulation
MESFET
amplifier,
we
consider now two examples of gain suppression.
A phenomenon
time
in
amplifiers
that has been
limiting
amplifiers
power
[43,44]
ratio of
stronger than the noise.
that,
a considerable
and
nonlinear
[45] is the possible improvement of 3 dB in the
output signal-to-noise
is
known for
for
large
ratio
of
a
A
a signal
consequence
signal-to-noise
weak
signal
to
which is
much
of these results
ratios, the
a
much
output
stronger
(simultaneous) signal can be as much as 6 dB less than the
same
ratio at
amplifier.
the
This is
weaker signal.
input of
known
the
as
limiter or
saturating
gain suppression
Such results can be
of
the
analytically derived
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-191-
using
various
nonlinearities
probability theory
g (*),
to represent
the noise
calculations are extremely tedious
selection of terms
signal,
to
using
The
and ultimately involve
the inband
output itself is in the
by
process.
from a series expansion
represent
of the output
products.
Since
the
form of hypergeometric functions,
the derivation is by no means trivial.
of nonlinearity
and
g(«) can be handled,
However,
any order
either analytically
or numerically.
The modified harmonic balance method
can also be used
to demonstrate this phenomenon for nonlinearities of up to
fifth-order.
The advantages
nonlinearity
is
together
dynamic
with the
of this method are
in the
that
instantaneous operating
device (enabling the use of a
frequency
sense
components
are
that the
it
varies
point of
the
device model), and that the
obtained
numerically.
The
limitations compared with the analytical treatment are the
restrictions
on the
order of
the
nonlinearity and
the
absence of signal noise.
Figures 5.9 and 5.10 show the fundamental output power
and third-order
product in each
of the two
carriers and
their sidebands.
The horizontal axis represents the power
incident
strongest signal.
in the
smaller signal is
it is 5 dB weaker.
In
3 dB weaker than this;
Figure 5.9,
the
in Figure 5.10,
In both cases the small-signal gain is
9 dB (for both signals).
At
an incident power of +10 dBm
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-192
SIMULATED
OUTPUT POWER (dBm)
MEASURED
4
3
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.9
Two-tone tests of the FET feedback amplifier
of Figure 5.3(a). Two unequal tones of level
P IN and Pjn -3
were applied to the ampli­
fier. The top set of measured and simulated
curves show the output power in each funda­
mental carrier; the bottom set show the level
of each third order intermodulation sideband.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-193-
SIMULATED
OUTPUT POWER (dBm)
MEASURED
66
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 5.10
Two-tone tests of the FET feedback ampli­
fier of Figure 5.3(a). Two unequal tones
of level P-j. and P IN-5 dB were applied
to the amplifier. Output curves are as
for Figure 5.9.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-194-
£or
the strongest
power is
5.10.
signal,
the
14.3 dBm in Figure
At this
5.9, and 14.5 dBm
point, the amplifier is
dB into compression and almost
the output power
power)
strongest signal
is just
in Figure
approximately 4.5
saturated.
In Figure 5.9,
of the weaker signal (at
7 dBm incident
9 dBm.
weaker signal of
output
Similarly, in
Figure 5.10,
5 dBm incident power
power of just 7 dBm.
the
produces an output
In both cases, the gain of the small
signal has been suppressed by 2.5 dB.
The
behavior
of
the
third-order
sidebands is
also interesting.
between
two
the
intermodulation
The separation
intermodulation
carriers
in levels
is
directly
proportional to the level separation between the two input
signals (3
also
dB and
show that
5 dB
the separation
harmonic signals is
separation,
The
between
twice (in dB) the
simulations
the two
second-
input signal level
and three times for the third-harmonic [13].
Agreement between
is good.
respectively).
the measured and
The amplifier used in
simulated results
the simulations was not a
true limiting amplifier, but the onset of gain compression
and
saturation
Unfortunately,
gave
a true
it
limiting
terms of infinite order, and
method would be
By
technique
"soft limiter",
could
be
characteristics.
amplifier has
nonlinear
the results obtained by this
in error due to
considering a
balance
similar
the additional aliasing.
the modified
useful
in
the
harmonic
design
of
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-195-
nonline ar
amplifiers
characteristics.
Furthermore,
analysis
the
and
straightforward,
A
tailored
for
predistorter is
application
design
and
is
one such
of the
of
similar
suitable
to
component.
technique
resistive
the
gain
to
mixers
the
is
unequal-level
signal cases just considered.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-196-
6.
CONCLUSIONS AND RECOMMENDATIONS
The purpose of this work was to improve nonlinear
circuit simulation methods in order to facilitate the
design of circuits involving the large-signal operation
of microwave MESFETs.
6.1
THE MODIFIED HARMONIC BALANCE METHOD
In particular,
the goal was to implement a technique
that would enable two-frequency analysis of any circuit,
given a nonlinear time-domain model for the device within
the circuit.
model
Using modifications to an existing FET
[1 ,22 ], a harmonic balance method was devised which
allows efficient implementation, and which overcomes the
problems associated with a small difference frequency rela­
tive to the carrier frequency.
By bandpass sampling of the
time domain waveform generated by the FET model, and by
small input frequency changes, the desired fundamental and
intermodulation components can be reconstructed from the
aliased spectrum.
By achieving a harmonic balance between
the frequency components present in the nonlinear model
and the linear circuit, Kirchoff's laws are satisfied.
This enables the effect of circuit changes and device
parameters to be determined for both singleexcitation.
(i)
and two-tone
The method is numerically efficient because
the linear circuit is analyzed by a two-port
matrix in the frequency domain, where differing time
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-197-
constants correspond only to different amplitude phasor
components, and additional branches do not increase the
size of the matrix.
(ii)
the time-domain waveform from the model is
sampled not at the Nyquist rate for two closely-spaced
signals, but at the bandpass rate.
(iii) the time-domain waveform is obtained as an
explicit function of the input nodal voltages and their
time derivatives.
The method is a complete analytical method because
(i)
any nonlinear time-domain model can be used.
(ii)
the nonlinearity can be a function of the
instantaneous
(unknown) operating poing i.e. it can
account for changing bias conditions.
(iii) harmonics and higher-order frequencies gener­
ated are reimposed as additional inputs to the model.
(iv)
a solution is obtained for the phasor value
of every frequency component present, including DC
components.
(v)
operating conditions are completely known
(bias
level, DC efficiency, etc.).
The restrictions on the method as implemented are
that the nonlinearity be no greater than fifth-order,
and that if the nonlinearity is frequency dependent
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-198-
(i.e. nonresistive), the frequency spacing of the two
input signals be much less than the carrier frequency.
6.2
INTERMODULATION DISTORTION IN MESPET AMPLIFIERS
A survey of the results of Chapter 5 indicates that
we have characterized and modelled FET behavior for both
single and two-tone excitations reasonably accurately.
While all other approaches
[14,16,17,18] have initially
characterized the FET on the basis of single-tone largesignal measurements in order to obtain insight into
intermodulation distortion properties, only DC and smallsignal (linear) measurements were performed here before
large-signal single-and two-tone comparisons were made.
Some improvement could undoubtedly be made to the model­
ling accuracy of the two-tone measurements here if fine
model adjustments had been made on the basis of singletone large-signal measurements, and second-harmonic
terminations determined more accurately.
The improvement
of model accuracy represents a major area for future
work,
to allow the power of the analytical tools that
have been developed here to be more fully exploited.
We have investigated the effects of input power level,
bias variation, circuit variation, and device parameter
changes on the level of the third-order intermodulation
product, and are now in a position to draw some conclu­
sions, and compare them with previous work.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-199Cons ider a perfectly linear device whose output
characteristics are given in Figure 6.1.
for class-A operation at point A
When biased
and operated into a
resistive load R^ , no distortion products occur until
saturation.
At this point, the peak voltage and current
swings are Vq and *1)35/ 2 ' respectively.
Further increase
in drive causes clipping of the waveform with the result­
ant onset of distortion products.
In a real FET, the drain-current lines are bunched
together at larger gate bias, and spread apart at smaller
gate biases.
This is the result of the nonlinear trans­
conductance gm (and is a "gate-side" effect).
Additionally,
the slope of the drain-current lines is not constant, but
has a small value gD , which is the output conductance of
the FET
(a drain-side effect).
Both of these nonlineari­
ties cause the input sinusoid to be transformed even at
small-signal levels, with consequent distortion of the
output signal.
Additionally, the load line need not be
straight, but may be elliptical (or even more highly
distorted)
due to the presence of load reactance and
harmonic signals.
The distortion level will obviously
be sensitive now to both tuning and loading, as these
will affect the peak RF swing and contour.
The extended small-signal model of Higgins, et.al.
[17] indicated that at lower power levels,
the MESFET
is drain-side dominated i.e. gD is dominant, and that
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-200-
&LOPE
V d s
Figure 6.1
The output characteristics of
a perfectly linear device.
The horizontal axis is drainsource voltage V Dg; the
vertical axis is arain
current I_.
Optimum bias
point A is shown, with the
operating load line.
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-201-
this causes gain expansion.
At medium power levels, the
device is gate-side dominated i.e. gm is dominant, and
this causes gain compression.
The authors also found
by curve fitting that the fifth-order term in the non­
linear expansion for gm gave a greater contribution to
third-order intermodulation distortion than did the
third-order term.
The nonlinear gate input capacitance
was found to have little effect on the intermodulation
products.
Many other authors have also examined, through
extended small signal models or measurement, the interre­
lation between intermodulation ratio, input power, circuit
impedance, and device operating point
[42,46-48],
Con­
clusions drawn by them are that the second harmonic impe­
dance at the drain has little effect on the level of
intermodulation product
[46,47], that the higher order
effects of harmonics and third-order intermodulation
products can be neglected in calculating the imr (for
ratios less than 20 dB)
[46], and that the least inter­
modulation distortion occurs when the AM/AM conversion is
minimized
[47].
Other authors
[48] have found that the
second harmonic impedance at the gate has significant
effect.
Some authors have noted that as the output load
*
is
detuned from optimum small-signal match at S 22
towards the optimum power load, the IMD is reduced [42,46]
due to the increased shunting effect of the load across
the nonlinearity of the output conductance
[48].
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-202-
It is the view of this author that such conclusions can
be rash due to the complex interaction of circuit and
device effects.
The above statements are made without
reference to either input power level or to bias point.
However,
for the resistive feedback amplifier studied,
some general conclusions can be shown.
It was found that
(a) an optimum bias point could be found.
Increasing
V DS improved the 1-dB compressed power and imr (inter­
modulation distortion ratio).
Symmetrical placement of
V QS between V p and forward turn on (as evidenced by
reduced DC gate current)
improved the distortion perform­
ance of the amplifier.
(b) for a given AM/PM characteristic and 1-dB com­
pressed power# a linear AM/AM conversion curve into com­
pression corresponded to improved imr.
(c) decreasing the feedback resistance lowered the
gain, the 1 dB compressed power, and the imr, at all
power levels.
(d) the effect of second harmonic terminations was
appreciable at all power levels.
The third harmonic
termination had little effect on the level of the dis­
tortion product.
(e) the imr was improved by changing the following
device characteristics:
increasing doping density,
epitaxial layer height, and gate width.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-203(£) the intermodulation distortion is a complex
function of operating point, circuit, and device para­
meters that does not obey simple third-order behavior.
In view of the ease with which the operating point,
embedding circuit, and device parameters may be inter­
changed, the modified harmonic balance approach to
modelling intermodulation distortion presented here rep­
resents a new, complete, and integrated approach to the
circuit simulation problem.
6.3
IMPROVING INTERMODULATION DISTORTION: A NEW APPROACH
There are several obvious means by which one may
attempt to reduce the level of intermodulation distortion
in a feedback amplifier.
Many of these are suggested by
the conclusions above, and most involve tradeoffs.
For
instance, the use of higher drain-source voltage or a
larger feedback resistor may involve allowable compromises,
and be suitable solutions in some applications.
The use of DC gate current as an indicator of gross
FET breakdown is one way in which low intermodulation
product amplifiers could be designed.
High DC gate
current, indicative of rectification of the signal
waveform, commences at the onset of saturation and clipping,
and is always accompanied by distortion products.
Minimization of the DC gate current by symmetrizing the
bias point produces odd order harmonics in the output
waveform,
rather than even order harmonics produced by
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-204asyinmetrical clipping.
At certain power levels, these
counteracting effects can cause the often observed dip in
the third-order intermodulation power
Figure 5.4b).
Gupta et.al.
(see, for example,
[49], noting a minimum in the
IMD at one gate bias level, used a scheme which coupled
some of the input power to a diode detector.
The detected
output was amplified and subtracted from the gate bias
voltage, so that as the input power was increased, the
gate-bias became more negative.
This resulted in a
decrease in amplifier gain as well as of the IMD.
Because
the IMD reduces more rapidly than the gain, a net improve­
ment in the distortion product was obtained.
A 10-dB
increase in imr over a very narrow range of input powers
was achieved.
However, the output power was maintained
constant due to the
reduction in gain, and at large signal
levels, the FET was
driven close to pinchoff, thereby
increasing the IMD at these power levels.
Such a scheme,
utilizing gate-bias control, allows some control of the
intermodulation distortion.
A variation of such a scheme
would be to control the gate-bias point in such a way
that
the DC gate current was minimized.
A completely novel scheme is presented in Figure 6.2.
The top part of the figure shows a basic matched FET
amplifier A^ driven simultaneously by both
and V 2 .
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-205-
2 l
Figure 6.2
Novel intermodulation disortion im­
provement scheme. The top figure
shows the configuration used in sim­
ulations; the FET and its matching
elements make up amplifer A^. The
bottom figure gives a practical im­
plementation: V 2 is added in series
by the action or a second amplifier
Aj and the circulator.
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-206-
Simulations of this configuration were run using the MHB
approach (note that both the signals V 1 and V 2 actually
consist of two tones e a ch). A practical implementation
using a single driver is shown in the bottom of the
figure.
There, the signal V 2 is generated by coupling
some of the input signal
into a secondary amplifier
A 2, and injecting the new signal into the output of the
original amplifier A^.
In many ways, this circuit appears
to be a form of feed-forward distortion reduction
[9], in
which a sample of the intermodulation distortion is fed,
out-of-phase, into the output to subtract out the distor­
tion component.
However, in this case, a linear in-phase
reproduction of the input signal (assumed pure) is instead
added to the output voltage produced by the FET.
two effects.
This has
The first is to increase the output power,
because the two voltages are added in-phase.
The second
is to force amplifier 1 to operate in a more linear mode,
thereby reducing the level of third-order intermodulation
distortion.
Comparisons with circuits used to achieve
injection locking of oscillators could also be made.
Simulations were performed using the modelled system
of Figure 6.2, and are shown in Figure 6.3.
Both V.^ and
V 2 were set equal in amplitude and phase in Figures 6.3a
and 6.3b, which are one-tone and two-tone power curves,
respectively.
The uppermost curve (dashed)
in each graph
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-207-
OUTPUT POWER (dBm)
SIMULATED
w
m
3,,, lUliiriiiOB
H
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 6.3(a)
Single tone simulations of the amplifier
system of Figure 6.2, with v2 = v i* T^e
solid lines show fundamental output and
drain current data with amplifier 2 dis­
connected; the dashed lines show the
same data with amplifier 2 connected.
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-208-
SIMULATEO
OUTPUT POWER (dBm)
50
-1 0 - 6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 6.3(b) Two tone simulations of the amplifier
system of Figure 6.2 (V2 =V.).
The
solid lines show fundamental output and
third-order intermodulation distortion
data with amplifier 2 disconnected; the
dashed lines show the same data with
amplifier 2 connected.
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-209-
is the fundeunental output power in the new system.
The
solid curve indicates, for comparison, the response of the
original system studied in the previous chapter (i.e. V 2 = 0).
As can be seen, the distortion reduction effect occurs at
high power levels, where the distortion products are reduced
by up to 10 dB.
Furthermore, because of the increased output
power, the imr at constant power is considerably increased.
At an output power of 5 dBm for example, the imr has im­
proved from 39 dB to 45 dB.
At higher power levels, where
the third-order product dips, the improvement is substan­
tially greater.
The implementation of this scheme, as shown in the
bottom of Figure 6.2, uses a circulator to add the voltage
produced by A 2 into the output of A^, after its matching.
The resultant combined voltage is circulated to the output
load.
This would require that A 2 have zero source impedance
and produce an internal voltage swing of V 2 equal to V^.
However, the output impedance of amplifier 2 is matched to
50ft, and the input impedance at the output of amplifier 1 is
also matched to 50ft.
This effectively splits the generator
voltage from A 2 added into A^ in half, when representing
V 2 in the zero-source impedance scheme of the model.
Thus,
in order that V 2 = V^, the power handling capability of the
FET in amplifier 2 must be 6 dB greater them the driver for
amplifier 1 i.e. of comparable drive
capability to
amplifier 1 itself.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-210A cheaper scheme would be to choose V 2 = JjV^,
for
then the FET in amplifier 2 need produce a total (internal)
swing of magnitude V^, the same as the driver for the
system.
This also enables V 2 to be relatively distortion-
free compared to the voltage produced by amplifier 1 , as
A 2 is then run in a backed-off mode.
The physical require­
ments could also be met in a variety of other ways; for
instance, amplifier 2 could be omitted and a simple 3-dB
power splitter used to derive V 2 .
gain then suffers,
However, the system
loading problems arise, and a different
set of simulations would be necessary.
The results of the simulations for V 2 = ** V1 are Pre“
sented in Figure 6.3c.
The solid lines indicate the
simulated fundamental output and intermodulation distortion
data previously presented in Figure 5.3 for the resistive
feedback amplifer
and V DS = + 3volts.
(RpB = 500(2) biased at V G g - 0 . 2 5 volts
The dashed lines indicate the same data
with the intermodulation distortion improvement scheme in
place.
It can be seen that the output power is increased,
the intermodulation distortion reduced, and the imr at
large output power levels is improved by at least 6 dB.
power-combining two equal FETs with hybrid
By
couplers, an
imr improvement of 6 dB is also obtained, but at double
the cost.
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-211
SIMULATED
oc -10
o
-20
b -30
0
-1 0
-6
-2
2
6
10
INCIDENT POWER (dBm)
Figure 6.3(c)
Two tone simulations as in
Figure 6.3(b), but with
V2 . % v 1 .
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-212-
As the phase of V 2 is varied through 90° to 180°, the
opposite effects occur:
lower output power, higher dis­
tortion products, and severely deteriorated imr result.
It
is anticipated that a simple variable line length, in the
form of a microstrip trombone at the input of amplifier 2
could be used to adjust for zero overall phase length and
account for phase lengths in the amplifier, coupler,
matching networks, and circulator.
In one sense, this scheme achieves its increased
power handling capabilities through power combining.
A
typical power-combined amplifier, employing a 3-dB hybird
at its output, combines the output powers of two equal
FETs.
Consequently, a 3 dB improvement in intercept point
is achieved, with an improvement in imr of 6 dB due solely
to the back-off possible in operating with lower output
power.
The scheme presented here also employs a type of
power combining, but the FETs need no longer be of equal
power handling capability.
For the additional cost of a
coupler and circulator, considerably greater improvement
in imr can be achieved due to the increased linearity
obtained from the FET.
Such a scheme could be more
efficient and more generally applicable than either current
predistorter or "backoff" approaches.
Through further use
of the modified harmonic balance method,
additional improve­
ments in the intermodulation distortion performance of
amplifiers should be possible.
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-2137.
ACKNOWLEDGEMENTS
Numerous people were of considerable assistance in
the development and production of this dissertation.
Stacie Kawano was particularly generous with her pre­
vious work on the subject and her collection of papers.
My colleagues in the Microwave Laboratory, Rimmon Sachs
and Patrick Roblin provided useful assistance with numer­
ical analyses involving the IBM personal computer, as well
as encouragement and patience in bearing with the constant
clatter of my terminal!
Janet Gittelman was also inval­
uable for her typing and attention to detail during the
compilation process.
At Central Microwave Company, the author is par­
ticularly indebted to Dr. Robert Goldwasser whose prac­
tical and theoretical insight never ceases to amaze, and
who made possible much of the work herein through the
support of his company.
Rick Kiehne and Bill Lazechko
are two highly capable individuals who also deserve
praise for their cooperation and efforts on my behalf
while I was employed at CMC.
To my friends in St. Louis who contributed to the
enjoyment of my stay here, I owe a very big note of
thanks.
Finally, to my parents, who never cease to
encourage and provide unending support, my gratitude
is immense.
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-214-
8.
APPENDICES
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-215-
APPENDIX 8.1
Relationship between the 1-dB compressed power and thirdorder intercept point for a third-order nonlinearity
With the notation of Chapter 1, the fundamental output
,tud€ A a for a single input signal of A cos a t
amplitude
is
given by
A a = a lA + T a 3A3
At the 1-dB compressed point,.
^ = . 89 = 1 + | ^ A 2
so that A
2
4 al
= (-.11) T —
3
3
a 3
and A 2 = (. 89) 2 x i x (-. H )
a
j
-± -
a3
The output power at the 1-dB compressed point is thus
(in dBm in a 50 ft system)
3
'a, l d B = 1 0
l o g ( | x ( . 8 9 ) 2 = < | x . n x i 0 » 2 . ) + 10 1 o g ^ j
= .65 + G
where G Q
o
Ia3 I
- 10 log ■!— = -!a^
(i)
^ 2 0 log a^ , and is the small signal gain in dB.
The intercept point is that point at which the (extra­
polated)
small-signal fundamental power, p a would equal that
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-216-
of the third-order intermodulation product, P 2 a _g*
Equation
(1.3) P a = ^
(a-jA)2
and Equation (1.4) yields P 2 a_g = 7
Using
(mW) ,
(f-a 3A 3 )
^-gy0,
(mW) ,
and at Pj = P * = P 2a-e,
„ 2,2 _ 9
a 26
al A ~ TS" 3
a2 - 4 al
_ 3 ~T^~
a 3
a l x 1000
50
*
and
_ 1 ,4
Pi_ 2
Thus
al
P T = 10 log p T = G + 10 log -r~-— T + H * 25
i
x
o
Ia 3 j
Comparing
*
(dBm)
*
(ii)
(i) and (ii) ,
p i = po,iaB + 10-6 .
(dBm)
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-217-
APPENDIX 8.2
Error Analysis of S-Parameter Test Setup
The finite
directivities of the directional couplers
used to sample the reference and
offset that must be accounted
required.
This was observed
channels leads toan
for if extreme precision is
experimentally with a linear
system (consisting of a waveguide
FET amplifier).
test
section in place of the
The loci were indeed circles with centers
offset from the origin, dependent on the reference channel
power level.
The
system
shown in
in Figure 2.3 may
the signal flow graph
measurement
signal,
shown
of
f^,
where
be modelled
of Figure 8.2.1,
V 2+ is
the
and V 2“ the test-channel signal.
as
for the
reference
Let C be the
coupling coefficient (-30 dB for the HPX750E couplers used
here), and L the leakage between
oppositely travelling
the detector arm and the
wave, with S the
reflection coefficient (assumed equal in
the
phase
shift
of the
transmitted
detector assembly
both arms). 9 is
wave
through
the
coupler.
By signal flow graph theory,
REF = V 2+ej<hc+LS(l-C)eje] + V 2"[LtCS(l-C)eje]
------------------------------
(i)
1 - S2 (l-C)2e2^e
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-218-
s(l-c)e
Ref
Test
Figure 8.2.1
s(l-c)e i«
Signal flow graph for the system of
Figure 2.3 showing errors arising
due to finite coupler directivities.
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-219-
and
TEST = V 2+e ^ [I/+CS(1—C) e^e] + V 2 IC+LS (1-C) e^]
(ii)
1 - S2 (l-C)2e2je
Thus
the measured
reflection
coefficient, TEST/REF,
is
given by
= V 2+k l e ^ + V2“k2
f MEAS
(iii)
V2"kl
with kl= I> +
+ V 2+k 2 e ^
CS(l-C) exp(j 6 ), and k2=C+ LS(l-C) exp(jQ).
Now, the desired reflection coefficient is given by:
Civ)
Using this in (iii) with z
a complex variable and K=kl/k2
a complex constant gives:
Sn (Z) + K
f (Z)
Cvl
KSU (Z) + 1
This is
Sii<z) is a
of
circle (as for a linear
the measured
circle.
this
a bilinear transformation.
£(z)
due to the cross-ratio
transformation, the
relative
locus of
device), the locus
reflection coefficient
Furthermore,
If the
size
is also
a
property of
(radii) of
the
transformed circles to each other is unchanged.
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-220-
APPENDIX 8.3
The Bandpass Sampling Theorem [50]
A signal which lies within a band extending from f 1
to f ^ + W could be translated to the range 0 to W by stan­
dard modulation techniques,
sampled at a rate 2W, and
restored to its original range by an inverse translation.
In order to avoid shifting the band, the bandpass
sampling theorem may be invoked:
For uniformly spaced samples, the minimum sampling
frequency is given by
£s =2M(1 + S>
(i)
where
f 2 = highest frequency in band
f
W
s
= minimum sampling frequency
= width of band
m = largest integer not exceeding fj/W
and
k = ( f 2/ w ) - m .
The value of k in (i) varies between zero and unity.
When the band is located between adjacent multiples of W,
we have k = 0 and f
range may be.
S
= 2W, no matter how high the frequency
As k increases from zero to unity the
sampling rate increases from 2W to 2W (! + =•).
The curve
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-221-
of minimum sampling rate versus the highest frequency
in a band of constant width thus becomes a series of
sawteeth of successively decreasing height as shown in
Figure 8.3.1.
>
vl
1 a#
s
2
2
w
aw
Hig h e s t
Figure 8.3.1
7W
aw
aw
FK eausN C r
-f*
Minimum sampling frequency
for band of width W.
The highest sampling rate is required when m = 1 and k
approaches unity.
This is the case of a signal band lying
between W - Af and 2 W - A f , with Af small.
The sampling rate
needed is 2 ( 2 W - A f ) which approaches the value 4W as Af ap­
proaches zero.
case of m = 2 ,
When Af actually equals zero, we change to the
k=0,
and f = 2W.
By adjusting W so that the
band edge is an integral multiple of W above the origin, the
minimum sampling frequency of 2W may be used.
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-222-
APPENDIX 8.4
Establishment of the Band-Edge Criterion
Let the sampling frequency of the time-domain waveform
be f , and N be the number of spectral lines desired within
s
the bandlimited region (6 in our case, to include both
fifth-order components).
Refer to Figure 8.4.1.
Let NORD be an index parameter equal to N/2.
Suppose the bandedge, which will align with the origin, is at
fB.E. = fl " <N0RD> A •
Then the bandedge criterion requires that
fB.E. = integer x £s
(m - NORD) A
if f^ I mA .
Thus set
(m - NORD) A
= integer.
f
s
Furthermore
f =
s
(i)
(ii)
SAMPLING FREQUENCY
= (2N+ 1) A for bandpass sampling
A NS x A .
i.e. set
(iii)
m - NORD
= integer,
NS
from (ii) and (iii).
i.e. set
m = N S x integer + N O R D .
(iv)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-223-
BANDEDGE
Figure 8.4.1
The desired bandpass window about
and
showing the relative positioning of
the bandedge needed to achieve the desired
downconversion.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-224A is adjusted to ensure that (i) and (iv) are simultaneously
satisfied.
For the minimum change to A, use (ii) to set
integer = closest integer to
Then,
fJS E|
—— — - .
s
find m from (iv) , and use (i) to adjust A = f^ym .
An alternative approach to understanding the band-edge
criterion is to consider the sampling instants of the
band-edge frequency.
fB £
Its carrier frequency is
= fi - (NORD) A = (m - NORD) A .
At the sampling instants,
t
s
=l/f x k
rs
k = 0, 1, . . .NS - 1
and the carrier phase is related to
exp j2lr
s
,(m - NORD) A • k,
ns~A
]
exp d 2tt [
= exp j 2 tt [integer x k ] , if the band-edge
criterion is satisfied,
= 1 .
Consequently, the sampling instants always occur at the
peaks of the carrier at this frequency; as a result a wave­
form of this frequency is interpreted as a constant (DC)
value.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-225-
"0'22
0022
0023
0024
0025
0026
0027
r-t
50 WRITER *100)
50 WRITE(6.100)
100 FORMAT(' ENTER THE LOWER OFTHE TWOFREQUENCIES IH MHz;-)
READ<9»*) FREQ1
WRITE(c*101)
101 FORMAT(' ENTER THE DIFFERENCEFREQUENCY IN MHz 5')
READ<9**> DFREQ
0029 102
0030 103
0031
0032
0033
0034
0035
003c C*
0037 C*
0038 C*
0039 C#
0040 Ct
0041
0042
0043
URITE(6?103)
FORMAT<' ENTER THE TOTAL NUMBER OF SIGNAL COMPONENTS TO'*
#' CONSIDER (MUST BE EVEN).*')
READ(9** > N
N0RB=N/2
NN=N+S
NS=2*NH
Calculate the radial freau'encies* butfirst 3djust the difference
freauencs to be an integral submultiple of the lower freuerics.
Their ratio* M* Bust also satisfy the band-edgecriterion.
ADJN=FREQ1/(DFRECI*NS)
M=NS*IDINT(ADJN) + NORD
DFREQ=FREG1/M
The software above is a portion of the main program
and is used to achieve the band-edge criterion.
The
integral value of the parameter ADJN (corresponding to
"integer" in the previous equations)
41.
is obtained in line
With the same notation as before, M is set in line
42 according to Equation (iv), and in line 43, the
difference frequency DFREQ is adjusted according to
Equation (i).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-226-
APPENDIX 8.5
Software for Time - to Frequency - Domain Conversion
SUBROUTINE FQRTX <FNT»A>B>IEK;
0092
.'1A07
0094
0093
0096
0097
0098
0099
0100
0101
d ts
p*
C*
Of
C*
C*
C*
C#
C*
C*
r»o»
PURPOSE! This routine converts from the time domain to the freauencs
domain usms a standard Goertzel algorithm DFT. Subroutine
SETFQN must be called once> to load the COMMON block FQNSET
This routine is derived from subroutine F0RIT.
BATE! 20 October.1983
AUTHOR! Rowan Gilmore
IMPLICIT REALX8 (A-Hf0-Z)
0103
C0MM0N/F0NSET/
C0EF>81> Cl>FC0S<6>11>13)> FSIN <6>11>13)t
0104
*FC0SD(6*ll»13)»FSIND<6fll»13)»RNW(12)»N»NSAMP»NPl
0105
DIMENSION ACS)»B(3)?FNT(13)
0106
0107 C*
60 C=1.0
0103
010?
0110
0111
0112
8=0,0
J=1
FMTZ=FNT(1) ; p u t contains the input time-samples of
70 U2=0.0
current and is a vector of length 13.
U1=0.Q
I=NSAMP
0113
0114
0115 C3
FORM FOURIER COEFFICIENTS RECURSIVELY
0116 C*
0117 C»
73 U0=FNT<m2.0*C*Ul-U2
0118
U2=U1
0119
U1=U0
0120
0121
0122
1=1-1
IF<I—1) 80780>75
30 A(J;=COEF4t(FNTZ+CiUl-U2) ; A (J) and B(J), J=l,...7 contain
£(3)= -CQEF#S#U1
the real and imaginary Fourier
IF(J-NPl) 90>100>100
coefficients as output.
0123
0124
0125
0126 C*
J=1 corresponds to the DC case. J=2 is the lowest freauency
0127 C*
bandpass component.
0128 C*
0129 C*
0130
90 a=Cl*C-31#S ? COEF,Sl,Cl are trigonometric constants
0131
S=C1*S+S1#C related to the fundamental angle ^^/N.
0132
(See Appendix 8.6) .•
J=J+1
C133
GO TO 70
0134
m ir
100 A(1>=A(1>*0.5
RETURN
0136
END
0137
V J.WW
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-
227-
APPEKDIX 8.6
Calculation of Coefficients Used in the
Frequency - to Time - Domain Conversion
IMPLICIT REALX8 (A-HrO-Z)
V1S3
0154
COMMON/FQNSET/ COEF>SI>C1»FC3S<6»11>13 >»FSIN <6»11»lo >»
XFC0SD<6»ll»13)fF3IND(6»ll»13)»RNM(12)»NMAXfNSAMP»NPl
0155
COMMON/PHSVLT/ OMEGAiV1REAL(11> >VIIMAG <11)>V2REAL(11)*
015a
XV2IMAG(11)»FREQ1
0157
C0MM0N/MYN2IN/ RJUNK1 (4) »TAU?RJUNK2(10)
0158
DIMENSION RNUTAU(12)»RN(12>
015?
0160 c*
Set maximum number of harmonics*
0161 C*
0162 C*
NMAX=N
N=6
0163
0164
NF’1=N+1
N0RD=N/2
0165
0166 C*
Calculate constants for sampled current calculations.
0167 C#
0168 C*
NSAMF=2*NMAX + 1
0169
RNSAMP=DFL0h T(NSAMP)
0170
TSAMP-2.D0 * DARCOS<-1.DO)/(RNSAMPXOMEGA) (OMEGA=A, the difference
0171
frequency).
0172 CX
T3AMP is the sampling time interval
0173 c*
RHU will give the different RF freauenca components
0174 c*
RNWTAU gives the gate delaa time at each component
0175 c*
0176 c*
0177 c*
M=l-N
0173
017? c*
N2=2*N
0180
DO 50 L=2»N2
0181
RNU(L)=FREQ1 + MXOMEGA
0182
M=M+1
0183
50 RNUTAU(L>=TAU*RNU(L)
0184
0135 cx
DO loop for each time sample. I =time interval considered
0136 c*
T is the current sampling instant
01S7 c*
0138 c*
018?
DO 100 I-lrNSAKP
(Set up loops to calculate the sine andcosine)
T=TSAMP#DFL0AT(I-1)(values at the sampling instants foreach
)
0190
CTEMP=DC0S(FREQ1XT)(phasor frequency and time, and each
)
0191
STEMP=DSIN(FREQ1XT)(frequency-shift set.
)
0192
M=l-N
0193
0194
INBEX=1
0195 ex
DO loop for each freauenca component that is needed,
0196 c*
0197 c*
fi- the freauenca component considered.
■no
Use lire c o s in e angle form ula to improve a ccu ra cy.
•S.U
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-228019? C:t'
0200
0201
0202
0203
0204
0205
0206
020?
0209
020?
DO 90 L=2»N2
TOELT= M*OMEGA *T
CD£L=DCOS(TDELT)
SDEL=DSIN<TDELT)
FCS=CTEMP*CDEL - STEMP*SDEL
FSN=STEMP*CDEL + CTEMP*SDEL
RNWT=RNW(L)*T
RNWTMT=RNWT - RNUTAU(L)
FCSB=DCOS(RNWTMT)
FSND=DSIN(RNWTMT)
0210 C*
0211 C*
Ne::t assign FC0S(K»J»I) so that K=stuft no» J=RF component no.?
0212 C*
and I=time instant. J=1 is the DC case» so is not included here.
0213 C*
55 K=INDEX
0214
60 J=L-K+1
0215
These lines improve efficiency due to
0216
IF(J.LE.l) GO TO 90
overlap of adjacent frequencies when
021?
IF(J-NPl)70»70f65
components are shifted by A in different
021S
65 INDEX=INDEX+1
translation sets. The desired outputs
021?
GO TO 55
sure aligned correctly into 6x11x13 arrays
0220 C*
FCOS and FSIN. FCOSD and FSIND are time0221
70 FC0S(K»JiI)=FCS
delayed coefficients.
0222
FSIN(KfJ?I)=FSN
(See Appendix 8.7).
0223
FCOSD(K rJ >I)=FCSD
0224
FSIND(K»Jfl)=FSND
K=K+1
0225
0226
IF(K-N)60f60»90
90 M=M+1
0227
0228
100 CONTINUE
0229 C*
0230 C*
Calculate the fundamental fpeouencies to pass across in COMMON
0231 c?
0232
DO 200 J=2»NP1
0233
M=J-N+2
0234
RNW(J)= FREQ1 + M*0MEGA
0235 CUc
0236 C*
Calculate the remaining fpeouencies of the harmonics
0237 C*
0238
RNU(8)=2.*RNW(4)
0239
RNW(9) = 2.*RNU<5)
0240
RNW(10)= 3.*RNW<4)
_0241
200 RNW(11)= 3.*RNW<5>
0265 C*
Calculate constants for DFT's.
J266 C*
0267 C*
(Needed for DFT;)
CCEF=2»/RNSAMP
0268
(See Appendix 8.5)
CGNST=DARC0S(-1.DO)*C0EF
026?
S1=DSIN(CONST)
0270
C1=DC0S(CONST)
0271
0272 C*
WRITE(6»1000)
V/4. w
0274 1000 FORMAT'.' *** /FQNSET/ LOADED***')
0275
RETURN
t
02?6
END
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-229-
APPENDIX 8.7
Software for Frequency - to Time - Domain Conversion
In the software below, time samples of the interface v o l ­
tages are calculated using the phasor frequency components,
and the values of the sine and cosine terms at each sampling
instant
At
(stored in FCOS, FSIN, etc.,
see Appendix 8 .6).
any one time instant, V1D is
the time-delayed gate
voltage, and DV1D its derivative.
DV2 is the derivative
of the drain voltage.
These time-sample voltages are calculated from the 11
phasor frequency components contained (according to their
real and imaginary parts at the gate and drain, respect­
ively) VTREAL, V1IMAG, V2REAL, and V2IMAG.
:
)0'-8 C*
■'JO 4? C*
0050 C*
0051 C*
0032
0053
Calculate voltade* delayed voltade* 3nd time deriv. samples,
The first DO loop (150) is at each time sample.
DO 150 1=1»NSAMP
01=01REAL(1>
0054
010=01
0055
0056
02=02REAL(1>
0010=0,
0057
0058
005?
0060
0061
0062
D02=0,
C*
C$
C*
C*
Calculate the conipcnents to this time sample frum every freauency
component.
DO 100 J=2>NN
0063
01=01 + 01REAL(J)*FC03(KfJ»I> - 01IMAG(J5*FSIN(K>J»I)
0064
0065
01D=01D + 01REAL(J)*FC0SD( J>I) - OlIMAGtJ)*FSIND(KrJ»I>
02=02 + 02REAL(J)JtFCOS(K»J»I) - 02IMAG(J)*FSIN(K»J>IJ
0066
0067
0068
D01D=D01D + RNW(J)*< -01REAL<J)#FSIND(KfJ»I)
*
- 01IMAG(J>*FCOSD(K»J>I))
100 D02=DV2 + RNW<J>*< -V2REAU J)*FSIN(KpJ»I> - V2I»AG( J)*FC0S(K» J* i>J
006? C*
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-230APPENDIX 8.8
The Modified Harmonic Balance
(MHB) Algorithm
The following three pages show the software that is
the heart of the harmonic balance program, i.e. the loop
in which the balance between the linear and nonlinear par­
titions is achieved.
The input vector C contains the initial phasor current
estimates at the gate and dra,in.
The output vector WORK
contains final error and convergence criteria.
Upon con­
vergence, the routine is exited, and the desired phasor
voltages and currents at the interface are contained in the
common blocks /PHSVLT/ and /PHSCUR/, respectively.
Initialization occurs in lines 1-50; the main itera­
tion loop is in lines 51-116; and the error messages for
failed convergence are in lines 116-140.
For each iteration of the main loop, the phasor inter­
face currents are loaded into CUR from the estimates in C
(lines 54-60).
and outputs
V(K,1 or 2).
Subroutine VNODE calls the linear circuit,
(in COMMON)
the phasor interface voltages
These are loaded into the nonlinear phasor
voltage vectors VlEEAL etc.
(lines 68-74), and the nonlinear
model uses these upon calling subroutine FRQNON.
That rou­
tine also performs domain conversions, the frequency transla­
tions, and aliasing deembedding.
Current phasors ClREAL etc.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-231are generated as output (via COMMON), enabling the error
function to be formed (lines 88- 100) and used in con­
vergence criteria (101-106).
Finally, new current esti­
mates are formed as a weighted average of the old estimates
and loaded into the vector C (lines 107-112), and the
process repeated.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-232-
|'-'Uh ; l .L
0001 cx
0002
SUBROUTINE Bm LN(C?WORK»J)
0003 CX., .............. .......... *...... ...»................
0004 CX
0005 CX
PUSPOSEJThis routine calculates the linear voltages from
0006 CX
current estimates (in COMMON LINET)* finds the resulting
0007 CX
non linear currents* and finds the error function and then iterates
0008 CX
usins a fixed point iteration method.
000? C#
This file contains all harm, balance procedures that remain
0010 CX
constant throughout all such procedures.
0011 CX
0012 C*
FILENAME: RJG.NBALN.TEST
0013 CX
0014 CX
BATE:13 Octoberrl?33
•
0015 CX MODIFIED TO INCLUDE HIGHER HARM0NICS( 2ND*3RD) 9JULY 1984
0016 CX
AUTHOR:Rowan J. Gilmore
0017 CX
0013 CX
SUBROUTINES CALLED!VNODE* FRQNON
C-019 CX
0020 CX
IMPORTANT: This routine is called from the main program and
0021 CX
reauires current estimates for the first NC harmonicsrand
0022 CX
voltages calculated from the linear analysis subroutine.
0023 CX
0024 CX.,,........... .................... ..................
0025
COMMON /LINET/V*CUR*N*NC /0MEGA/SC*WK
0026
COMMOH/PHSVLT/DFREQ»V1REAL*VIIMAG *V2REAL*V2IMAG *W
0027
C0MM0N/PHSCUR/C1REAL *ClIMAG *C2REAL tC2IMAG
0023
COMPLEXX16 V<11,4),CUR<11»4)*DCMPLX
002?
REALX8 C(44),F<44>*W*MFREQ*SC(11)iP*WK
0030
REALX8 C1REALU1 >*C1IMAG( 11) *C2REAL< 11) »C2IMAG<11)*
0031
* VlREAL(ll)*VlIMAG(ll)*V2REAL(11> >V2IMAG(11)»DREm L»DIMAG*wORK(3)
0032 CX
0033 CX
The primary variables to alter to achieveoptimization at the
0034 CX
interface are CUR(K»1) and CUR(K»2). These must be set from the
0035 CX
single input vector C to allow calling further subroutines*
0036
WRITE(6*50)
0037
50 FORMAT?///' Enter the iteration constant p ? and relative weight;')
0038
READ(9*X)?»HEIGHT
003?
IF(P.LT.O.DO) GO TO 490
0040 CX
0041 CX
Set the weighting coefficients for each harmonic component in the
0042 CX
total error sum.
0043
MN=N+5
0044
DO 60 I=1*NN
0045
60 SC(I)=1.0
0046
SC'1)=UEIGHT
0047
SC(4)=10*UEIGHT
004S
SC',5)=SC(4)
0049 CX
0050
RA0FRQ=«
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-233C'05:
0052
0053
0054
-.'035
0056
0057
0058
0059
0060
DO 400 KGUNT=1»150
75 DO 100 1=1>NN
K=4*I
C*
CX
CX
Rescale variables back to true currents
CUR(I»1)=BCMPLX(C(K-3)»C(K-2))
CUR <1>2>=DCMPLX(C(K-l).C(K))
C
,100 CONTINUE
0061 CX
0062 CX
Call the linear network with currentestimates in CUR(I..)j
0063 CX
which are obtained from thelatestiterates. C(K).
0064 CX
Return with voltages at linearinterfacein V(I».)
0065
CALL VNODE
0066 CX
C067 CX
0068
DO 200 K=1»NN
0069
V1REAL(K)=DREAL(V(K»1))
0070
V1IMA6(K)=DIMAG(V(K»1))
0071
V2REAL(K)=BREAL(V(K»2))
0072
V2IMAG(K)=DI(1AG(V(K»2>)
0073 C
0074
200 CONTINUE
0075 CX
0076 CX Call the nonlinear network with the new voltage estimates at interfac
L*
0077
CALL FRQNON
0078 CX
0079 CX
New nonlinear currents C1REAL etc. are calculated in FRQNON.
0080 CX
The old iterates for current are kept in the vector C(J).used above.
0081 CX
Higher harmonic currents are also generated.
0082 CX
Bandpass sampling and aliasing deembeddirig are performed in
0083 CX
FRQNON by freouency shifting.
0084 CX
In V1REAL etc. K=1 is DC
0085 CX
In V1REAL etc.. K=1 is DC? K=2>7 are about the fundamental;
0036 CX
K=S»9 are the second harmonics; K=10.11 are third.
0037 CX
0088 CX
Calculate the error function from the last current values.
COS?
ERR0RG=0.0
0090
£RR0RB=0,0
0091
290 DO 300 1=1.NN
0092
K=4XI
0093
F(K-3)=SC(I)X(C1REAL(I)-C(K-3 >)
0094
F(K-2>=SC(I)X(ClIMAG(I)-C(K-2))
0095
F(K-1?=SC<DX< C2REAL <I>-C(K-l>)
0096
F(K) =SC<I)X(C2IHAG(I)-C(K))
0097
ERRCRG=ERRORG+F(K-3)XX2+F(K-2)XX2
0098
ERR0RB=ERR0RB + F(K-1)XX2 + F(K)XX2
0099
ERROR=ERRGRG+ERRQRD
C-100 300 CONTINUE
0101
IF(KOUNT.LE.IO) GO TO 460
0102
295 IF(ERROR.GT.IEIO) GO TO 475
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-234-
d04
Ct For® the new updates of the current for the next iteration*
C-105
C* if the error is still too larde.
010a C*
010?
DO 380 1=1*NN
010S
X=4*I
010?
C(K-3)=P*C1REAL(I) +<l-P)*C(K-3)
0110
C(K-2)=P*C1IMAG(I) + (l-P)*C(K-2)
0111
C(K-1)=P*C2REAL(I) + (1-P)*CCK-1>
0112
C(K)=P*C2IMAG(I> + (1-P)«C(K)
0113
330 CONTINUE
0114
TOL=(1.E-10)*SC(1)*SC<1>
0115
IF(ERROR.LT.TQL) GO TO 500
0116
400 CONTINUE
0117
WRITE<6*450)
0113
450 FORMATdX*'ITERATION LIMIT EXCEEDED')
0119
GO TO 500
0120
460 WRITE <6*461)ERRORG *ERRORD
0121
461 F0RMAT(1PE?.2»5X*1PE?.2)
0122
IF(KO'JNT.EQ.IO) GO TO 470
0123
GO TO 295
0124 470 WRITE(6*472)
0125 472 FORMAT(IX*' Enter 1 to CONTINUE:')
0126
READ (9.4!)IGOON
0127
IF(IGOON.EQ.l) GOTO 295
012S
475 WORK(3)=1.0
012?
WRITE(6*480)KGUNT
0130
480 FORMAT(' K0UNT='*I5)
0131
RETURN
0132
490 UGRK(3)=-1.0
0133
RETURN
0134 C*
0135 C*
The error function is snail enouah now. The currents adree.
0136 C*
0137
0138
0139
0140
500 W0RK(2)=K0UNT
W0RK(1)=ERR0R
RETURN
END
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-235-
APPENDIX 8.9
Test of Software Using a Fifth - Order Nonlinearity
Section 4.2 evaluates a test drain current C 2 as a
nonlinear function of the applied drain voltage V 2 .
The
following page shows the computer output of the results
of the MHB technique applied to this nonlinearity, in
which the drain current at each of the desired frequency
components is the output of interest.
Harmonics labelled 3 and 4 give the desired funda­
mental outputs; those labelled 2 and 5 give the t h irdorder intermodulation components.
Similarly, labels 1 and
6 are the fifth-order terms; 7 and 8 the second harmonic
terms; and 9 and 10 the third harmonic terms.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-236-
xxxxxxxxxxxxxxxxxxxxxxxxsaxxxxxxxxxxxsssx*********?^******#.******
Total power dissipation- 1.070+04 mW,
DC gate current *-4.430-04 mA and DC drain current- 3.25D+05 mA ♦
1
HARMONIC:
»
Pincident*-9.99D+01 dBm.
Pref--8.91D+01dBm»
Pdelivered*-1.00D+02dBmr
and Pout--6.710+01 dBm*
RH0in*222222222 at 222222 decrees
GATE CURRENT* 1.560+02 + J-l.900-02 mA
PRAj W CU.RWEWT"-A; 2fflt02 + J 3.110-01 mA
V G S i n t e r n a l = - 4 . 8 8 D - 0 8 + J-8.89D-07 Volts
VOSinternal* 1.070-06 +
J 3.26D-06 Volts
2 HARMONIC:
Pincident*-9.99D+01 dBm.
Pref--7.43D+01dBm»
Pdelivered=-1.00D+02dBmr
and Pout*-3.12D+01 dBm.
RH0in=X22X22X*X at 22X822 degrees
GATE CURRENT* 8.590+02 + J-5.51D-02 mA
DRAIN CURRENT=-6♦26D-01 + J-3.870+03
>>
VGSinternal=-4.700-08 + J-5.76D-06 Volts
»
V0Sinternal=-2.290-03 + J 5.68D-06 Volts
3
HARMONIC: Pincident* 1.21D+02 dBm?
Pref* 1.21D+02dBmr
Pdelivered* 2.920+OldBmr and P out*-4.350+01 dBm.
RHOin*
' 1.000 at'
0.0 degrees
GATE CURRENT* 1.680+03 + J-4.96D-C2 mA
DRAIN.CURRENT* 9.30D+03 + J-6.38D-01 mA
A O O l ifrCK
VGSinternal* 1*000+00 + J-l.090-03 Volts
ArrLlfeU
ttDSinternal* 1.000+00 + J-5.77D-05 Volts
4
HARMONIC: Pincident* 1.150+02 dBm*
Pref* 1.15D+02dBm t
Pdelivered* 2.:55D+01dBm» and Pout*-4.35D+01 dBm.
RHQin*
1.000 at
0.0 degrees
GATE CURRENT* 1.43D+03 + J-1.33D-02 mA
DRAIN CURRENT* 1.670+00 + J 9.50D+05 n.A
n n , >2.”
VGSinternal* 5.000-01 + j - 7713D^06 Volts
VDSinternal* 5.320-03 + J 1 .000+00 Units
A P rU £ D
5 HARMONIC:
»
»
Pincident=-9.y90+01 dBm.
Pref*— 7.83D+01dBm»
Pdelivered=-1.00D+02dBm»
and Pout=-5*120+01 dBm.
RH0in*888282288 at 222222 degrees
GATE CURRENT* 5.47D+02 + J-1.23D-02 mA
DRAIN CURRENT*-3.87D+03 + J 3.49D-01 mA
VGSinternal=-4.28D-07
+ J-2.97D-06 Volts
VDSinternal* 6.960-06
+ J 2.11D-05 Volts
6 HARMONIC: P i n cident=-9.990+01 dBm*
Pref*-9.52D+01dBm»
Pdelivered=-1.00D+02dB*»
and Pout*-6.710+01 dBm.
RH0in=828888888 at 222222 degrees
GATE CURRENT* 7.81D+01 + J-l.790-03 mA
DRAIN C U R R E N T S .970-01 + J-6.25D+02 mA
»
VGSinternal*-2.880-08
+ J-5.66D-07 Volts
»
VDSinternal=-3«640-06
+ J 1.040-06 Volts
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-237-
7 HARMONICt
»
»
Pincident*-?«99D+01 dBa»
Prer*-1.23D+02dBa»
Pdelivered=-1.00D+02dBm>
and Pout=-5.51D+01 dBm.
RHOin********** at ****** degrees
GATE CURRENT* 3.29D+00 + J-1.72D-03 aA
J1RAIN CURRENT* 2f49Df03 + J-9.99D-01 «A
voSinternal* 1.73D-$7
+ J-2715D-07 Volts
VDSinternal*-l .45D-06
+ J-3.09D-05 Volts
8 HARMONIC? Pincident*-?.9?D+01 dBm?
»
»
9 HARMONIC:
»
»
10 HARMONIC:
»
»
Pref*-1.74D+02dKm,
Pdelivered=-1»OOD+V2dB*r
and Kout--5.51B+01 dBm.
RHOin********** at ****** degrees
GATE CURRENT* 1.55D-03 + J-8.37D-03 aA
DRAIN C U R R E N T = - 2 ♦50D+03 + J 7.69D-01 aA
VGSinternal*-1.73D-07
+
J 1.74D-07 Volts
VDSinternal* 1.65D-06 +
J 3.10D-05 Volts
Pincident*-?.99D+01 dBa»
Prer*-7.71D+01dBa»
Pdelivered=-1.00D+02dBa*
and Pout*-5.78D+01 UB».
RHOin********** at ****** degrees
GATE CURRENT* A.25D+02 + J-7.A1D-02 aA
DRAIN CURRENT* 1.81D+03 + J-1.23D+00 aA
^
+ J-l.18D-05 Volts
VDSinternal* 8.&3D-08
+
J-3.51D-05 Volts
Pincident*-9.99D+01 dBa>
Pref*-8.86D+01dBa>
Pdelivered=-1»0OD+02dBm?
and Pout*-5.73D+01 dBm.
RHOin********** at ****** degrees
GATE CURRENT* 1.66D+02 + J-2.29D-02 aA
DRAIN C URR E N T = - 5 .9GD-01 + J-1.81D+03 aA
VGSinternal=-2.01D-08 + J-3.12D-06 Volts
VDSinternal*-3.41D-05 + J-2.45D-07 Volts
x************************************************************
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-238-
9.
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VITA
Biographical items on the author of the dissertation,
Rowan J. Gilmore
1)
Born October 26, 1955
2)
Attended the University of Queensland from February,
1973 to December, 1976.
Received the degree of
Bachelor of Engineering with First Class Honors
in Electrical Engineering.
Awarded the University
of Queensland Medal, 1977.
3)
Electrical Engineer, The Overseas Telecommunications
Commission, Sydney, Australia, 1977.
Field Engineer, Schlumberger Technical Services, Inc.,
1978-1980.
Senior Engineer, Central Microwave Company, August,
1982 to present.
4)
Attended Washington University from January, 1981
to the present date.
5)
Membership in Professional Societies:
I.E.E.E., I.E.E.
December, 1984
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
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