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Development of an integrated system for device modeling for RF/microwave CAD applications

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Development of an Integrated System for Device
Modeling for RF/Microwave CAD Applications
by
Benjamin Davis
A Dissertation Submitted In Partial Fulfillment
of the Requirements for the Degree of
Doctor of Engineering
MORGAN STATE UNIVERSITY
May 2003
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UMI Number: 3090070
Copyright 2003 by
Davis, Benjamin
All rights reserved.
®
UMI
UMI Microform 3090070
Copyright 2003 by ProQuest Information and Learning Company.
All rights reserved. This microform edition is protected against
unauthorized copying under Title 17, United States Code.
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Development of an Integrated Device Modeling
System for RF/Microwave CAD Applications
by
Benjamin Davis
has been approved
March 2003
DISSERTATION COMMITTEE APPROVAL:
Chair
Carl White, Ph.D.
Jeyasingh Nithianandam jyxD.
Craig J. Scott, Ph.D
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ABSTRACT
DEVELOPMENT OF AN INTEGRATED DEVICE MODELING SYSTEM FOR
RF/MICROWAVE CAD APPLICATIONS
Benjamin Davis
In the field of RF/microwave communication technologies, computer-aided design is
employed at every level of the microwave system engineering process. Fabrication of
microwave communication systems is complex and costly. By simulating these systems
before they are fabricated, microwave engineers can save time and money by predicting the
performance of these systems ahead of time. Of primary importance to the institution of
computer-aided design is the development of semiconductor device models. These models
must be developed to behave in the computer-aided design environment as close to the
behavior of their real-world counterparts as possible. Semiconductor device models can be
developed for use in several computer-aided design environments, one of which is the circuit
simulator. Circuit simulators give engineers the ability to perform simulation of microwave
systems under specified external electrical stimuli. Development of computer-aided design
semiconductor device models for use in circuit simulators is one of the primary focuses of this
dissertation.
The development of elegant CAD semiconductor device models is a lengthy process
that requires the skills and expertise of three primary areas. These areas are device
measurement, data characterization, and model implementation. In order to achieve an
accurate CAD model, the measured data from the device being modeled needs to be as trueto-life as possible. Taking measurements of microwave devices is not a trivial task,
particularly those measurements needed to develop a robust, accurate CAD model. In
addition to accurate measurements, the characterization of the data acquired by said
measurement should be as robust as possible, especially as applied to the design
environment for which the model is to be used.
This dissertation presents the development and implementation of software designed
to produce accurate and robust device models for use in a popular computer-aided design
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environment. It is asserted that the development of software that integrates the major
functions of CAD device modeling will greatly enhance the RF/microwave design capabilities
of COMSARE. Ultimately, such software will prove to be of great benefit to microwave model
developers and designers alike as it affords engineers the ability to create customized device
models quickly and with confidence.
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This dissertation is dedicated to my mother,
Rosalind F. Davis,
and my friend,
E rrol L. Fraser, Jr.
V
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ACKNOWLEDGMENTS
I am proud to present this dissertation as one of the “original six” doctorate students
at Morgan State University School of Engineering.
I would like to extend thanks to Dr. Carl White, my academic advisor. I have attained
valuable educational and life experience on behalf of his guidance and support. I also thank
my doctorate committee members, Dr. Jeyasingh Nithianandam and Dr. Craig J. Scott, for
their assistance in my pursuit of this degree. In addition, I give thanks to Dr. Eugene M.
DeLoatch, Dean of the School of Engineering. The Dean has been particularly supportive of
the doctorate students throughout the years and continues to make Morgan State University
School of Engineering an institution of excellence. Additionally, I extend gratitude to Dr.
Marek Mierzwinski who provided me with invaluable skills and experience during my tenure
at Agilent Technologies.
I give sincere thanks to my doctorate family, Melvin Bayne, Fiona Naranayan,
Otsebele Nare, Michel Reece, Nathan Richardson, Lawrence Walker, and Willie Thompson.
The years spent together will always be remembered and I hope we remain a close-knit unit
for years to come.
I would also like to thank my Masters family, Christopher Barnes, LaToya Johnson,
Lynette Jones, Lawrence Lewis, Eric Miller, Anthony Strickland, and Dana Wake. Being the
one who went on with the doctorate degree, I sometimes felt that I had to represent for the
clan. That helped motivate me when I felt like giving up.
Lastly, I would like to give a special thank you to LaToya, Dana, Michel, Nathan, and
Melvin. Your words of encouragement especially helped me at a dark time in my life. I will
always be grateful for your friendship.
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TABLE OF CONTENTS
Acknowledgments..........................................................................................................................vi
Table Of Contents..........................................................................................................................vii
List Of Tables................................................................................................................................... x
List Of Figures................................................................................................................................ xi
Glossary........................................................................................................................................ xiii
Introduction.................................................................................................................................... 14
CAD Model Development..........................................................................................................15
Neural Network Application To Microwave CAD Device Models...........................................20
Novel Model Development Environment................................................................................. 21
Dissertation Outline.................................................................................................................... 23
Cad Semiconductor Device Models..........................................................................................25
Equivalent Circuit M odels..........................................................................................................25
Empirical Device Models............................................................................................................27
Table-Based Models.................................................................................................................. 31
Neural Network Based M odels................................................................................................. 35
CAD Simulations And Applications...........................................................................................39
Linear Sim ulations..................................................................................................................... 39
Nonlinear Simulations................................................................................................................41
Harmonic Balance...................................................................................................................... 43
Customized CAD Device Model Development........................................................................49
Integration Of Custom Device Models With A D S ................................................................... 49
Hybrid Element Device Models................................................................................................. 52
Reconfigurable Device M odels................................................................................................. 53
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Empirical Fitting Methods...........................................................................................................55
Artificial Neural Networks...........................................................................................................56
Development Of Integrated Model Development System .................................................... 62
Software Development Process................................................................................................ 63
Model Generation Framework.................................................................................................. 66
Integration With Data Acquisition..............................................................................................67
Implementation Of Empirical Processing Algorithms.............................................................. 70
Implementation Of Table-Based M ethods...............................................................................72
Integration With Neural Network Engine.................................................................................. 74
Customization Of Model Elements............................................................................................78
Analysis And Validation Of Model.............................................................................................79
ADS Export Process.................................................................................................................. 81
Summary Of Model Development Process..............................................................................82
Development Environment Modification.................................................................................. 85
Application Of Model Development Softw are.........................................................................87
Test Case: 300 pm pHEMT M odel...........................................................................................87
Model Analysis............................................................................................................................89
Comparison Of Nexus-Generated Models With Traditionally Generated Models...............94
Conclusion..................................................................................................................................... 96
Summary..................................................................................................................................... 96
Improvements And Future W ork............................................................................................... 97
REFERENCES................................................................................................................................ 99
VITAE............................................................................................................................................. 102
Appendix 1.....................................................................................................................................103
Appendix I I ................................................................................................................................... 106
Developing the Engine............................................................................................................. 107
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Modifying the Interface............................................................................................................. 109
Integrating with Nexus Pre-Processor................................................................................... 109
Integrating with Nexus Post-Processor.................................................................................111
Integrating with Nexus Exporter.............................................................................................. 112
Integrating with A D S ................................................................................................................ 114
Summary................................................................................................................................... 114
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LIST OF TABLES
Table 5-1 - Sample Nexus input data file ..................................................................................... 68
Table 5-2 - Data Acquisition Process Capabilities...................................................................... 69
Table 5-3 - Empirical Fitting Coefficients in Angelov Model....................................................... 70
Table 5-4 - Excerpt from sample lookup table file ....................................................................... 72
Table 7-1- Nexus files supporting neural network engine.........................................................106
Table 7-2 - Summary of neural network engine integration process.......................................115
x
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LIST OF FIGURES
Figure 1-1 - Intrinsic and extrinsic sections of a FET equivalent circuit (from Dambrine [14]) 17
Figure 1-2 - Typical CAD model development process...............................................................20
Figure 1-3 - Nexus, a new integrated CAD model development software...............................23
Figure 2-1 - Common representation of a FET model derived from physics (from
Rodrigues[29])..........................................................................................................................26
Figure 2-2 - General large-signal FET equivalent circuit.............................................................27
Figure 2-3 - Curtice FET model equivalent circuit (from Curtice [12])....................................... 28
Figure 2-4 - Angelov FET model equivalent circuit (from Angelov [9 ])..................................... 31
Figure 2-5 - General fixed topology for HP Root FET Model (from Root [23])......................... 33
Figure 2-6 - Equivalent circuit for neural network FET................................................................ 37
Figure 3-1 - Typical power compression characteristics (from [25 ])......................................... 42
Figure 3-2 - FET large signal model equivalent circuit used in Nexus (from Walker [3])........ 44
Figure 3-3 - Circuit partition scheme for harmonic balance (from [19])..................................... 45
Figure 4-1 - ADS user-defined model implementation process................................................. 51
Figure 4-2 - Topology of hybrid element FET model................................................................... 53
Figure 4-3 - Screen shot of ANNFET parameters........................................................................54
Figure 4-4 - General multilayer feed forward neural network architecture...............................57
Figure 4-5 - Knowledge-based neural network architecture (from Bayne [2 ])......................... 60
Figure 5-1 - Nexus, a novel model development environment.................................................. 62
Figure 5-2 - Class structures used in the design of the Nexus environment............................64
Figure 5-3- Nexus development environment architecture........................................................ 65
Figure 5-4 - Typical training regiment for COMSARE students in modeling research............66
Figure 5-5 - Algorithm for processing empirical d a ta .................................................................. 72
Figure 5-6 - Table-based data file processing flo w ..................................................................... 74
Figure 5-7 - Knowledge-based neural network engine process................................................. 76
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Figure 5-8 - Nexus interface for selection of model element types...........................................79
Figure 5-9 - Main user interface of Nexus.................................................................................... 83
Figure 6-1 - Selected topology for the ANNFET model of AP1514 device...............................88
Figure 6-2 - Nexus model development process steps............................................................... 88
Figure 6-3 - Comparison of simulated and measured S11 and S22 for the ANNFET model 89
Figure 6-4 - Comparison of simulated and measured S12 for the ANNFET model................. 90
Figure 6-5 - Comparison of simulated and measured DC IV characteristics for the ANNFET
model........................................................................................................................................ 90
Figure 6-6 - Differential Continuity Analysis for Ids..................................................................... 91
Figure 6-7- Differential Continuity Analysis for Igs...................................................................... 92
Figure 6-8 - Differential Continuity Analysis for C g s ................................................................... 92
Figure 6-9 - Differential Continuity Analysis for C g d ................................................................... 93
Figure 6-10 - Class F amplifier performance using the ANNFET model................................... 93
Figure 6-11 - Comparison of development times for Nexusand traditional approaches
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94
GLOSSARY
ADS
Advanced Design System, microwave CAD software by Agilent
Technologies, Inc.
ANNFET
Adaptable Neural Network Field-Effect Transistor
BPNN
Backpropagation Neural Network
CAD
Computer-Aided Design
COMSARE
Center of Microwave and Satellite RF Engineering, a research institution at
Morgan State University
FIBT
Fleterojunction Bipolar Transistor
HEMT
High Electron-Mobility Transistor
KBNN
Knowledge-Based Neural Network
MESFET
Metal-Semiconductor Field-Effect Transistor
MOSFET
Metal-Oxide Semiconductor Field-Effect
NeuroNex
Fictitious neural network engine used to demonstrate integration of additional
Transistor
processes into the Nexus environment.
Nexus
Software application developed for COMSARE to aid in CAD device model
development
pHEMT
Pseudomorphic High Electron-Mobility Transistor
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Chapter 1
INTRODUCTION
This dissertation outlines the development and implementation of a novel integrated
computer-aided design (CAD) device modeling software tool. In the microwave satellite
industry, computer-aided design is employed at every level of the microwave system
engineering process. Design cycles are shorter and more demanding. To keep up with the
fast pace of semiconductor device technology, microwave circuit and system designers
require accurate and robust models of the devices used in microwave systems. Of primary
importance to the use of computer-aided design is the development of semiconductor device
models. These models serve as representation of the components used to build microwave
systems and therefore must be developed to behave in the computer-aided design
environment as close to the behavior of their real-world counterparts as possible. The
development of elegant CAD semiconductor device models is a process that requires the
skills and expertise of three primary areas. One is the area of microwave device
measurement. In order to achieve an accurate CAD model, the measured data from the
device being modeled needs to be as true-to-life as possible. The software designed in this
dissertation implements the use of data acquisition techniques that optimize their accuracy as
applied to CAD environments. The characterization of the measurement data taken from a
device is also integral to the successful development of a CAD device model. This work will
include the use of several common data characterization methods as well as some novel
methods that integrate the use of neural networks. The third skill required to produce a device
model is the implementation and integration of the model into a CAD environment. The
software presented in this work is designed to be integrated with a popular microwave CAD
environment. By integrating the entire process of CAD model development and including
validation schemes, and by including customization and automation features within, the
software presented in this dissertation is intended to dramatically improve the modeling
capabilities of the Center of Microwave Satellite and RF Engineering (COMSARE), a
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research organization within Morgan State University. Ultimately, as the software is tested
and proven, it can be used widely within the microwave design community as a powerful and
useful modeling tool.
CAD
M o d e l D e v e lo p m e n t
The intent of a CAD semiconductor device model is to accurately reproduce and
predict electrical characteristics within a design environment by means of simulation routine.
There are two main schools when it comes to CAD semiconductor device models, physicalbased and circuit-based. A physical-based CAD model implements the actual physical
dimensions of the device being modeled into the simulation routine. In combination with the
physical description of the device, including material parameters such as electron mobility
and doping concentration, the charge carrier transport equations are solved. These carrier
transport equations are typically partial differential equations and require tedious computer
calculations to be solved. Alternatively, circuit-based models incorporate approximations of
the carrier transport equations and use circuit elements such as resistors, capacitors, and
inductors to emulate the physical behavior of the device. Circuit-based models are
conventionally described by empirical equations, which are dependent on the instantaneous
values of the controlling parameters [29]. The controlling parameters are usually the terminal
voltages of the elements that make up the model. The amount of time needed to perform
simulations using physical-based models is relatively large as compared to that needed for
simulations using circuit-based models. For that reason, circuit-based models are more
frequently used in microwave system design environments where extensive simulation time is
undesirable. Physical-based models are used more frequently in device fabrication
environments where simulation time is not a critical issue. This work applies to the design,
development and use of circuit-based models.
The development of device models is a complicated procedure requiring several
specialized tasks. Each of these tasks is vital to the successful development of a complete
CAD device model. To achieve a good CAD device model, accurate data must be acquired
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from the device by way of measurement. Depending on the desired robustness of the model
and the environment in which the model will be embedded, different measurements of the
device are needed to produce the model. Subsequent to acquisition, the data must then be
characterized by mathematical methods. Typically, multidimensional polynomials are derived
and fitted to the data. This process can be painstaking and time-consuming depending the
complexity of the data and the desired correlation between measured data and its empirical
approximation. Assuming the data acquisition and empirical characterization have met
required standards, the model must then be implemented into a CAD environment that
includes a circuit simulator. This step involves relating the mathematical expressions that
characterize the measured data with an equivalent circuit model. This equivalent circuit
model contains elements that can be processed by a circuit simulator to predict electrical
behavior. Ideally, the model implemented into the circuit simulator will predict the same
electrical behavior as the real device’s measured behavior. This is the goal of a CAD
semiconductor device model.
Semiconductor device measurement as applied to RF and microwave environments,
is a process that requires skill. There exist several measurements on the device being
modeled that need to be done in order to compile a basic model. Part of the challenge in data
acquisition is the determination of equivalent circuit elements. In practice, the equivalent
circuit model is partitioned into two parts, the intrinsic and the extrinsic. The intrinsic part of
the equivalent model consists of the bare-bones topology that would describe the device in
and of itself. The intrinsic part of the model is what corresponds to the device as the
fabricator designed it. It represents what the ideal model would entail. Then there is the
extrinsic part of the model. The extrinsic portion of the model represents the external artifacts
of the
device,
mainly considered
to
be
parasitic.
In practical
applications,
many
semiconductor devices contain necessary parasitic elements such as pad and bond
connections that must be incorporated into the CAD model, especially for use in RF and
microwave design. The extrinsic model would contain these parasitic elements and they
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consist of resistances, capacitances, and inductances. Figure 1-1 illustrates the separation of
the extrinsic and intrinsic parts of the FET equivalent circuit model.
intrinsic device
Cds
nrif
im = g m . e x p ( - j u i T ) . v
F ig u re 1-1 - In trin s ic and extrinsic sections o f a F E T equivalent c irc u it (from D a m b rin e [1 4 ])
The task in device measurement is to determine experimentally, the values of the
components that make up the intrinsic and extrinsic models. The equivalent circuit model for
a device can be further categorized into small-signal and large-signal varieties. In a smallsignal model, the element values of the equivalent circuit are considered to be linear and
static. For a large-signal model, the element values of the equivalent circuit are not always
static or linear. Additional criteria for small and large-signal model definition are the external
stimuli. For example, if the voltage is applied to the gate terminal of a FET is sufficiently small
such that it does not induce a change in value for any of the equivalent circuit’s elements,
then it can be classified as a small-signal model. Alternately, if an external stimulus applied to
any of the terminals of a FET causes any of the element values to significantly change, largesignal conditions apply. A small-signal model must be capable of accurately mimicking a
device under small-signal conditions. Likewise, a large-signal model should be able to mimic
a device under large-signal conditions. A robust large-signal model is one that can reproduce
large-signal device behavior under large-signal conditions as well as small-signal behavior
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under small-signal conditions. At the most basic level, DC measurements are acquired for the
purpose of model development. Most commonly, scattering parameter (S-parameters)
measurements are sufficient for characterizing a device under small-signal conditions. Largesignal measurements are more complicated and they require more elaborate equipment
setups. There exists much practical theory on device measurement processes, under small
and large-signal conditions. This work does not focus on the data measurement process but
it does rely on quality measurement data. It is assumed that the CAD models produced within
this work are dependent on the quality of the data used as a starting point. The software
developed
herein
uses
the
acquisition
methods
common
to
microwave
device
characterization. It also implements a new data processing routine as outlined by Walker [4],
These processes have been used within COMSARE successfully and proved to be suitable
for CAD device modeling purposes.
Upon data acquisition of the semiconductor device being modeled, the next phase in
model development is the mathematical description of the data. It logically follows that in
order to equate the data with empirical expressions, some curve fitting must take place. The
application of curve fitting to model development simply involves determining the coefficients
of a system of empirical equations that best allow those equations to mimic the measured
data. Curve fitting is commonly applied to the development of large-signal models since they
incorporate empirical expressions to describe the elements of the equivalent circuit. The
empirical equations used to fit to are derived experimentally. Several model developers have
derived empirical expressions for the large-signal equivalent circuit model of FETs. These
developers and their empirical formulations have become widely known and accepted
throughout the microwave design community. Developers such as Curtice, Maas and
Angelov have all published work detailing their now industry standard empirical models
[10][13], There have been several adaptations and alterations of these core models by many
individuals, but they have generally not been applicable to widespread use. In general, curve
fitting to empirical expressions is labor intensive and requires many iterations of small-signal
models to be accurate within a wide operating range. This fact adds to the aversion of design
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engineers to delve into production of CAD device models. An alternative to empirical
description, a CAD device model may incorporate the use of lookup tables. With the proper
interpolation and extrapolation methods used, a CAD model may be developed to use
measured data directly, alleviating the need for empirical fitting. The drawback to this method
is the requirement for extensive data collection. A large amount of and wide range of data
need be measured in order to produce an accurate table-based model. Table-based models
are limited in application by the range of use in which the data was acquired. Table-based
models are however, simpler to develop making their use prevalent among microwave
designers. The software developed in this work incorporates the use of traditional empirical
curve fitting as well as table-based data modeling. This was done to provide users of the
software additional flexibility in model development options.
The third phase in CAD model development is the integration of the model into a
computer circuit simulator. In its most basic form, a computer circuit simulator can be a
simple spreadsheet. For useful application of a CAD model, though, iterative processes must
be performed hundreds or thousands of times, thereby requiring a computer program. There
are well-known methods of analyzing circuits. Any engineer with the ability to implement
these methods in a computer environment can apply them to CAD modeling. In practice, this
is not done because it presents a very large software development effort and it is not
conducive to widespread common use by other engineers. Instead, it is desirable to use a
CAD environment as a base that is widely used and able to be integrated with custom CAD
models. There are only a handful of CAD environments that meet both of these criteria.
Agilent Technologies’ Advanced Design System was used in this work because it met the
criteria and it was readily available. Advanced Design System (ADS) is the most widely used
CAD software for RF and microwave applications and it includes a development environment
whereby an engineer can institute the use of user-defined models in design and simulation.
Implementing a CAD device model into ADS primarily involves describing the equivalent
circuit’s electrical behavior in terms of empirical equations by way of C programming. This
process is well defined but it leaves little room for advanced model description. However,
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since it is done with C programming, it allows integration with any external program written in
C, provided the interface rules are observed. More detail on this process is given in Chapter
4.
In this work, the development of CAD models will envelope all of the process steps
from the point of data acquisition to circuit simulator integration. The actual measurement
taking done in a laboratory is not within the range of the software application that was
developed. The specific data acquisition process used is, however, described in Chapter 5.
Figure 1-2 illustrates the algorithm by which CAD models are traditionally developed.
Device
M easurem ent and
Data Acquisition
Empirical
Expression
Derivation
Empirical Data
Fitting
CAD
Model
Im plem entation
F ig u re 1-2 - T ypical C AD m odel developm ent process
N e u r a l N e t w o r k A p p lic a tio n T o M ic r o w a v e
CAD
D e v ic e M o d e ls
Artificial neural networks, as used in this work, are mathematical processes designed
to learn patterned behavior by means of statistical modeling. Artificial neural networks
(hereafter referred to as neural networks) are designed after naturally occurring processes in
the human brain. In essence, a neural network is a series of interconnected neurons. A
neuron may be described as a data entity that contains a numeric value. Neurons are
arranged in vectors or layers, each of which performs a particular function within the neural
network as a whole. Each neuron in each layer is connected to at least one other neuron in
another layer by an entity described as a weight. The weight is also a numeric value and it is
used to determine the strength of the connection between the two layers it is joined to. Each
neuron is then described by numerical data or statistical summations of neuron and weight
values. By developing a suitable network of neurons and layers, numeric data can be
modeled by iterating the values of the weights until the summations produce neuron values
that are within a predetermined range of error from the data being modeled. Using neural
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networks to model data can be done with a variety of neuron and layer arrangements or
architectures.
Different
architectures
have
different
benefits
for
microwave
model
applications. A more detailed discussion of neural networks is given in Chapter 4.
The ability of neural networks to model highly nonlinear behavior makes it a vehicle
through which advanced semiconductor device modeling can be explored. In particular, the
modeling of nonlinear large-signal model elements such as current and charge is done with
the assistance of neural networks. Work has been done to investigate and exercise the
feasibility of the application of neural network technologies to microwave CAD device models
[1][3][8]. The integration of neural networks into the software developed in this work was done
to give model developers increased flexibility and accuracy.
N o v e l M o d e l D e v e l o p m e n t E n v ir o n m e n t
For this work, a novel approach to CAD device model development was implemented
and tested. What makes this work valuable to the microwave design community is the
integration of the various tools necessary to develop a complete CAD device model from start
to finish. This is unique in that currently there are no single-ended software applications that
allow modelers and designers alike to self-sufficiently produce CAD models. Many designers
do not wish to invest the amount of time necessary to develop a robust CAD model. Being
that designing is their main focus, they rely on a modeling specialist to produce models for
them. The work done for this dissertation gives designers a way by which models can quickly
be developed and implemented into CAD design environments. The model development
environment introduced in this dissertation also includes a means to the creation of more
flexible models than traditional approaches giving the user more freedom in design and
increasing the application base to newer device technologies. Additionally, by implementing
model validation processes within the software, the tool developed in this work ensures
robustness and user confidence in the models created with it.
The software’s primary features included with this work are model topology
generation, empirical data fitting, neural network data characterization, model validation, and
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automated model integration. The software produced in this work was designed to work with
traditional extraction routines that were used by COMSARE in past research. In addition,
compatibility with a data set defined by a specialized data extraction routine given in Walker
[3] was added. By using the software developed for this dissertation, a model developer has
the ability to produce a fully functional CAD device model for use in a circuit simulator by first
deriving a customized equivalent circuit. Then using the data from the extraction process,
equivalent circuit model element values are determined by the software using empirical fitting
techniques and neural networks. Upon completion of the determination of the equivalent
circuit’s elements, the model can then be validated using the software’s internal testing
routines. Following, the model is then exported and automatically integrated into a chosen
circuit simulator. This dissertation will outline the development of this software and provide an
assessment of whether or not this software can produce models of equal or better quality
than those produced by conventional methods. In addition, the practical benefits to using this
software the develop CAD models will be discussed in this dissertation.
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CAD Device Model
D e /e lo p e r
N exus
CAD Simulation
Softw are
X
Integrated CAD Model
Developm ent
Environm ent
Data Acquisition
Microwave System
Designer
F ig u re 1-3 - Nexus, a new integrated C AD m odel development software
D is s e r t a t io n O u t l in e
The presentation of the work done in this dissertation is arranged in the following
manner. Chapter 2 will outline some of the popular existing CAD semiconductor device
models and the methods by which they are developed. A discussion of the various types of
CAD models is also presented. Chapter 3 discusses the major applications of CAD models
especially as applied to the work done for this dissertation. A prelude to the software
designed in this work is given in chapter 4. This chapter will present the background work
done in preparation for the software design including implementation of user-defined models,
hybrid element models, reconfigurable device models, empirical fitting routines and neural
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network processing engines. Chapter 5 will present the design and development of the
software. It includes background on the model generation framework, data integration, neural
network processing, model element customization, model validation, and ADS integration.
The application of the software and the analysis of results is included chapter 6. The last
chapter gives a summary of the work and a discussion of future work.
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Chapter 2
CAD SEMICONDUCTOR DEVICE MODELS
CAD device models have been in existence as long as there have been computer
circuit simulator programs. These models are vital elements of the foundation upon which
computer simulations are relied. Without accurate models, computer-aided design of
microwave systems would not be a viable tool for the microwave system engineer. In this
chapter, a treatment of the background of CAD device models is given.
E q u iv a l e n t C ir c u it M o d e l s
The translation from a real-world physical device to a mathematical computer
representation is begun with an equivalent circuit model. Each device being modeled has
certain physical and electrical properties.
A class of devices, or a group of devices with
similar physical structure can be represented by an equivalent circuit model that electrically
reproduces the physical and electrical behavior of that class. As an example, the metalsemiconductor field-effect transistor (MESFET) has certain characteristics that are typical of
all MESFETs. By breaking down the physical structure of a device class, equivalent electrical
components can be derived that generalize the physical behavior of that device class. The
most basic electrical components with which all equivalent circuits are derived include the
resistor, capacitor, inductor, and source. Figure 2-1 illustrates the common physical
representation of a MESFET.
25
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
S
G
D
F ig u re 2-1 - Common representation o f a F E T m odel derived fro m physics (from R odrigues [2 9 ])
These components have well-defined behavior and can be implemented to
reproduce the physical phenomena that occur in the device being modeled. The goal of CAD
model development is to determine descriptive elements of the equivalent circuit model that
faithfully reproduce in a circuit simulator the measurements obtained from a device.
For this purpose, CAD models can be classified into to two categories: small-signal
models and large-signal models. Small-signal models are those that can accurately
reproduce device behavior under linear excitation conditions. As equivalent circuit models are
expected to reproduce device behavior as a result of electrical stimuli, a small-signal model
should reproduce device behavior given an excitation that can be considered small. The
components of a small-signal model are considered linear because the excitation to the
equivalent circuit is not significant enough to alter the value or quantity of its elements. This
quality of a small-signal model distinguishes it from a large-signal model.
There are a few well-known and widely used equivalent circuit models for each class
of semiconductor device. This work applies specifically to the high electron mobility transistor
(HEMT) and field-effect transistor (FET) device class. Figure 2-2 illustrates the typical largesignal equivalent circuit model for HEMT and FET devices.
26
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IbWo,)
G
a
L .i
s
F ig u re 2-2 - G eneral la rg e -sig n a l F E T equivalent c irc u it
Users of the software produced by this work are limited to producing large-signal
models. Small-signal models are easy to develop without the need of specialized software.
The target audiences of this work are those who seek robust nonlinear models.
E m p ir ic a l D e v ic e M o d e l s
As discussed in the previous chapter, CAD models can be either physical-based
models or circuit-based models. Circuit-based models are simplified implementation of their
physical-based counterparts. Physical-based models are more accurate than circuit-based
models on a macroscopic level due to their formulation. Physical models are derived from
physics equations and include detailed description of the device process parameters. The
coefficients used in these equations are typically physical parameters such as doping density,
geometry specifications, and material properties. Due to the complexity of the equations and
the lengthy iterative processes used to solve them, physical models do not lend themselves
to circuit simulators. They are generally inaccurate at the microscopic level because too
27
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many assumptions and simplifications have to be made to implement the model equations
into circuit simulators [23], Physical models are also very dependent on the range of device
operation in which they are being analyzed. The alternative to physical models is empirical
models. Empirical models compact the most contributing physical effects of the device into
relatively simple closed form expressions. These expressions are often derived such that
they are mathematically convenient for numeric optimization. Unlike physical models, the
coefficients of the empirical expression are not related to the physical attributes of the device.
They merely serve as fitting factors of the empirical expression so that when evaluated, they
exhibit the numerical equivalence of the observed quantity being modeled. For the purpose of
CAD environment implementation, empirical models need to have voltage dependent
expressions for the all of the terminals of the equivalent circuit.
There are a few highly respected authors of device models that are used by
microwave design engineers the world over. For many, the models created by these authors
are suitable for day-to-day tasks and design work. W. Curtice [13] and I. Angelov [9] have
developed two of the most popular empirical device models in use today.
Xgg(VoyfVin)
DRAIN
GATE Rg
o -v w -
— Cos
SOURCE
F ig u re 2-3 - C urtice F E T m odel equivalent c irc u it (from C urtice [1 2 ])
28
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The Curtice model was one of the best FET models to use in terms of being able to
model nonlinear effects. Voltage-dependent channel pinch-off variation was one of these
effects. Figure 2.3 shows the equivalent circuit for the Curtice model. According to the Curtice
formulation, the most nonlinear effects, and thus the ones modeled, are on account of the
controlled current sources. As noted in the equivalent circuit topology, the gate-source
capacitance (Cgs) is also nonlinear. Curtice assumed this nonlinearity was relatively weakly
nonlinear as compared to the sources and therefore did not include it in the nonlinear
formulation. The development of this model requires optimizing a small-signal model at a
particular bias point. The elements Rg, Rd, Rs are obtained by de-embedding via the Fukui
technique [16]. The Cgd, Cgs, Rds, and Cds are all obtained from the small-signal model.
The nonlinear elements, Ids, Igs, and Igd are obtained by fitting the measured data to the
equations 2.1, 2.3, and 2.4.
Ids = (aq + A,V, + A2V}2 + A2V 2\ tanh (y ■Vout(t))
(2 .1)
(2 .2 )
K s(0 ~Vb
(2.3)
0
vin{t) ^ v bi
(2.4)
RF
Vin{ t ) < V bi
0
In these equations, the coefficients Ao, A ^ A2, A3, and p2 are fitting factors. To obtain
a developed CAD model of the Curtice formulation, frequency dependent measurements,
namely S-parameters, are obtained. In addition, DC current-voltage measurements are
taken. From these data, model nonlinear element values are extracted. Additionally, DC IV
data are fitted against model equations. Then the model values are optimized against the
data to derive the best fit. At this point, the model is implemented into a circuit simulator for
29
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comparison with the measured data. This derivation process of the Curtice model
demonstrates the basic steps that would be taken in developing any empirical CAD device
model. It is the process by which empirical models will be derived in this work.
The Angelov model improved upon the Curtice model by incorporating nonlinear
effects that were found in newer device structures such as HEMTs and pHEMTs. In addition,
the Angelov model was better at predicting 2nd order nonlinearities which is essential for
designs in which harmonic frequencies play a major part in circuit performance. Angelov
instituted an empirical expression formulation that made parameter extraction easier and
differentiation more accurate. Like Curtice, Angelov assumed the drain-source current and
the gate capacitances to be the most nonlinear contributors to the device electrical
characteristics. For the drain current expression, Angelov used a power series to model the
DC IV characteristic. The nonlinear capacitance expressions also took the form of a power
series. The expressions are given in equations 2.5, 2.6, and 2.7.
I ds= Ipk (! + tanh(yO(l + AVds) tan (aV ds)
(2.5)
c ss = Cgso (! + ta n h (^ ))(! + tanh(y/2))
(2 .6 )
c gd = Cgdo (! + tan h (^3))(! - tan h (^4))
(2.7)
w = pi(vpk- v gs)+p2(vpk- v gsy +p3(vpk- v gsy
( 2 .8 )
where
(2.9)
¥ 2
Pogsd + P\gsdVds
+ ^Ig sd ^d s
+ ^3gsd^ds
(2 .10)
( 2 . 11 )
(^4
Pogdd
+
P \g d d ^ d s
+
P lg d d ^ d s
+
^g d d ^d s
30
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(2 . 1 2 )
In these equations, the coefficients are fitting factors that can be obtained
experimentally and/or by curve fitting. The Angelov model formulation better accounts for
charge conservation than the Curtice model. This attributes to its better performance in
nonlinear simulations. The method of obtaining the equivalent circuit parameters is the same
as that for other empirical models. The Angelov large-signal equivalent circuit model is shown
in Figure 2-4.
DRAIN
GATE
Rds
F ig u re 2-4 - A ngelov F E T m odel equivalent c irc u it (from A ngelov [ 9 ] j
Empirical modeling is an integral part of CAD model development. For the empirical
model formulation, the software produced in this work uses the Angelov model. The Angelov
model has proven to be very applicable to the FET modeling and design endeavors of
COMSARE.
T a b l e -B a s e d M o d e l s
31
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Empirical device models have the drawback of requiring a one size fits all solution to
a dynamic problem. In the case of the FET device, the drain current and charge does not
behave in the same fashion in every mode of operation. For this reason, it is difficult to derive
empirical expressions that mimic the behavior of the drain current in every region of
operation. An alternative method to empirical device modeling is the use of table-based
models. Table-based modeling is simpler than empirical modeling in that it relies directly on
the measured data to reproduce device behavior within a CAD environment. In a table-based
model, there is no constitutive relationship between the equivalent circuit elements and the
measured data. Alternatively, device behavior is characterized by a general system of
algebraic and/or differential equations that pertain to the device as a whole. In this case, a
two-port formulation is applied for a FET model. Table-based model formulations are semi­
independent on topology. For a two-port device, the same set of equations applies regardless
of the device structure. Unlike empirical-based CAD models, table-based models do not use
analytical equations; instead measured data, stored in a lookup table, are used directly by the
circuit simulator to characterize model behavior. Spline functions are used to interpolate
between the data points.
One of the most widely used examples of a table-based CAD device model is the one
developed by Root [24], This model is referred to as the HP Root FET model as it was
originally developed for proprietary use at Hewlett-Packard. The HP Root FET model is able
to characterize semiconductor devices, namely FETs, by taking adaptive measurements on
the device and using the resulting data to generalize about the current-voltage relationship at
the device’s ports. Like the development of empirical models, the development of the HP
Root FET model is initiated by taking measurements of the device. S-parameter and DC IV
measurements are obtained. From the S-parameters, intrinsic parasitic element values are
extracted. Given that the FET has three terminals, a system of equations that apply to three
terminal devices is determined. These equations describe the current and charge relationship
between each terminal and are governed by charge conservation laws. The DC current
relationships are garnered directly from the table of measurements. The HP Root model
32
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postulates that in order to model frequency dispersive effects in the drain-source
conductance, a separate current element must be added to the total port currents. Equation
2.13 gives the total expression for current and charge at the drain terminal.
I D = H ( c o ) I DDC(VGS,VDS) + j n Q D(VGS,VDS) + ( l - H ( c o ) ) I Dhish(VGS,VDS) (2.13)
In this equation, the
H(a>) term is a simple rational function that models,
continuously, the transition between low frequency and high frequency currents. Similar
equations are formulated for the gate and source currents. These state functions are the
basis on which the terminal quantities are calculated by the simulator.
State Functions Define
Constitutive Relations for
Three-Terminal, Lumped,
Nonlinear Elements
/
Ig (Vgs.Vds) \
Qg (Vgs.Vds)
Intrinsic FET
S I,00 (Vgs.Vds)
Qs (Vgs.Vds)
I,high (Vgs.Vds)
Source
l«= (Vgs.Vds) \
Qd (Vgs.Vds)
IJW (Vgs.Vds)
Zs
Zd
F ig u re 2-5 - G eneral fix e d topology f o r H P R oot F E T M o d e l (from R oot [2 3 ])
It is necessary to determine a mathematical relationship between the state functions
and the small-signal equivalent circuit elements. This is done by de-embedding the parasitic
elements and obtaining the gradient of the state functions with respect to the intrinsic
admittance parameters. Equations 2.14-16 are the terminal gradient functions used.
VQc(rGS>vDS) =
33
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where
V = ^
d
- ^
~
d
+ ^ 5—
d V G5
(2-17)
DS
By postulating that these equations can model the small-signal characteristics implies
that the admittance can be deduced from them if they were related to the state functions. For
the equations given in 2.14, 2.15, and 2.16, differential equations can be derived which when
solved can relate the measured data to the state functions. The following equations give the
relationship.
d Im Y u meas(VcS,VDs)/< o
a im Yu neas (VGS,VDS) ! co
dVDS
dV GS
d Im r 21
( VGS ,VDS)/co
d i m Y22meas ( VGS,VDS)lco
8 Vds
a Re r 21meas (VGS ,VDS)
Q
= 0
(2.19)
dVcs
d Re 7 22
svDS
(VGS, VDS)
= 0
(2.20)
dVGS
By using a numerical process to solve these equations, the measured data can be
verified and then intrinsic admittance parameters can be determined. A contour integration is
performed to determine intrinsic admittance parameters, which are needed by the circuit
simulator. For the gate capacitance and gate-drain feedback capacitance, the integration
yields the following:
^
,
I m Ynmeas(Vc s ,VDS,o>)
C g (Vgs,Vds) = ------ ^
co
34
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(2 .21 )
meas
i^GS >^DS ’ <i>)
co
(2 .2 2 )
Similar integrations are performed to yield the admittance parameters at the other
terminals. Experimentally, the above formulation for deriving the equivalent circuit parameters
has been shown to work well with much of the common two-port, three terminal device
operating region. The data processing stage in developing an HP Root FET table-based
model entails solving the aforementioned differential equations and contour-integrating their
solutions to derive the equivalent circuit parameters. This process is much faster than the
curve-fitting process of empirical model development making it very attractive to CAD model
developers. The limitations on the HP Root model are its size and restrictive application.
Being directly measurement-based, the HP Root model is made more accurate by the density
of measurements taken on the device. To achieve comparable accuracy to an empirical
model, a large amount of data must be acquired. This requirement translates to a lengthy
measurement process and increased data processing time. Further, the HP Root model is
most accurate in certain regions of operation. This prevents its use from being adopted by
designers of circuits that need models to be accurate in extended regions of operation.
The table-based models generated from the software in this work will follow the HP
Root methodology slightly but not exactly. The HP Root model is a proprietary model
formulation and intimate details about the model are needed to fully reproduce its behavior.
Further, the only element that is enabled by the software in this work is the drain-source
current. This is due to the limitations of data acquisition posed by the available facilities at the
time of this work.
N eural N etw o r k B a sed M o dels
A relatively new approach to CAD modeling of microwave devices involves the use of
artificial neural networks. Artificial neural networks provide the microwave device modeler the
ability to characterize highly nonlinear behavior without the need for empirical equations.
35
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Neural networks posses the ability to learn from data, generalize patterns, and characterize
nonlinear behavior [26].
COMSARE has been involved with work that utilizes neural network CAD models.
Some of this work includes solid-state amplifier design using CAD models based on neural
networks. It has been shown that artificial neural network device models can be used in
exotic designs such as those of class-F amplifiers [5]. The primary institution of neural
networks in CAD model development is the substitution of neural network algorithms for
empirical equations used in the description of equivalent circuit elements. This integration
requires two steps and involves a concerted effort. The first step is the development of
processing parameters for the neural network algorithm. This is achieved by optimizing a
statistical formulation to match measured data. This measured data is the same data that
would be acquired in developing an empirical or table-based CAD model. After the
optimization is complete, the resulting parameters theoretically can be processed by the
statistical formulation that is the neural network to reproduce the measured data. The second
step involved in integrating neural networks with CAD models is the implementation of said
neural network algorithm into the CAD model simulation environment. In the case of empirical
CAD models, electrical performance of the equivalent circuit elements is described by closedform equations, typically dependent on node voltages. The neural network algorithm can be
designed such that it is also dependent on node voltages. This enables the algorithm to be
processed by the circuit simulator in much the same way an empirical equation would be.
COMSARE has developed two iterations of CAD device model using the neural
network integration techniques described. In both models, voltage dependent neural network
algorithms describe the drain-source current. The equivalent circuit for these models is very
similar to that of the Angelov model. Figure 2-6 illustrates the equivalent circuit of the neural
network model.
36
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IbWoq)
G
S
F ig u re 2 -6 - E q u iva le n t c irc u it f o r n e u ra l netw ork F E T
The equivalent circuit model of a CAD device model utilizing neural networks may be
one of design, depending on the use of the neural network. In the instance shown here, only
the drain-source current is being described by a neural network algorithm. In practice,
additional elements can be described by neural networks. Alternatively, an approach similar
to that of the HP Root FET table-based model may be taken. The equivalent circuit may be
designed
to be an
N-port box characterized
only by inter-terminal current-voltage
dependencies. In such a scenario, the measurement and data extraction must be very
accurate and conservative. For the neural network models produced by COMSARE, the
equivalent circuit was chosen to maintain a well-known basis from which comparisons could
be drawn. This choice also allowed for observation of the effect the replacement of the
Angelov model drain-source current equation with neural network algorithm had on simulation
accuracy and speed. Like the table-based model, the neural network model development
process is largely directly based on measurements. This makes the neural network CAD
modeling approach somewhat easier than that of empirical modeling. A large benefit to using
37
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neural network CAD models is the accuracy achieved in nonlinear simulations. The
disadvantage to using neural network CAD models is the data processing time can be
relatively long. In order to generate the neural network parameters needed for processing,
optimization must be performed. Still though, this process is considerably shorter and
consistently more accurate than the curve-fitting process of empirical model development.
Without question, the use of neural networks in CAD models has proven to be of
benefit to the microwave design engineer and the CAD model developer. This work’s
software will heavily integrate neural network CAD models as part of its design. This section
has not detailed the particular neural network algorithm used in this work. More detail is given
to the discussion of general artificial neural network theory in Chapter 4. Specifics of the
neural network algorithm used in this work are given in Chapter 5.
38
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Chapter 3
CAD SIMULATIONS AND APPLICATIONS
The product produced by the efforts of this work is the CAD device model. The CAD
device model is used in simulations carried out by the circuit simulator. To the design
engineer, the model is invaluable in determining the performance of the microwave system
being designed. There is a myriad of performance benchmarks that are applicable to
microwave system design. This chapter presents a selection of these parameters as
applicable to the design of the software.
L in e a r S im u l a t io n s
The implementation of a CAD device model ultimately results in its use by a circuit
simulator. In essence, a CAD model is a mathematical description of physical relationships. A
circuit simulator manipulates the system of equations that represent the CAD model’s
description in conjunction with the model’s surrounding electrical environment until Kirchoff’s
current and voltage laws are satisfied. There are several mathematical means of doing this
usually involving matrix manipulation. Simulations can be classified into linear and nonlinear
types as was done in this work. Linear simulations are sometimes synonymous with smallsignal simulations. This is because in linear simulations, the circuit response of the system is
considered linear. In addition, the elements that comprise the CAD model are linear in nature.
In the case of the work done in this dissertation, CAD models can be used in both linear and
nonlinear simulations.
One of the most common means of determining semiconductor device properties is
by way of S-parameters. S-parameter simulations are a means of characterizing N-port
devices in the frequency domain without the need for intimate knowledge of the internal
details of the N-port device. S-parameters are defined as the ratio of incident voltage wave at
a particular port with respect to reflected voltage wave at a particular port. S-parameters
supply sufficient characterization of an N-port network that other network parameters may be
39
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determined from them. Semiconductor devices are most commonly two-port networks and
consequently, the S-parameters are defined as two-dimensional matrices. The general form
of the S-parameter is given in equation 3.1.
vJ ;
(3.1)
Vk += 0 f o r k * j
For a two-port network, i and j are in the range of 1 to 2 and the S-parameter matrix
is as follows.
(3.2)
Equally as common to the prevalence of S-parameters for the means of
semiconductor device characterization are the DC current-voltage or DC IV characteristics.
DC IV characteristics typically are measured in sets of curves parameterized by bias
voltages. The DC IV characteristics of a FET model are primarily defined by the drain-source
current expression.
Small signal models are sufficient to supply S-parameter information at a singular
bias point. They are not able to give DC IV curve information, however, given their linear
makeup. Large-signal models can give both DC IV curve and S-parameter information. By
linearizing the nonlinear elements of the large-signal model, an equivalent small-signal model
can be realized. The linearization of a nonlinear element involves differentiating the nonlinear
empirical expression at a point, namely the bias point of interest. By definition, the derivative
of current with respect to voltage is conductance and the derivative of charge with respect to
voltage
is capacitance.
Conductance and capacitance are the real
and
imaginary
components of admittance, which is needed to define a small-signal model.
S-parameters, being the most commonly measured device parameter, will be used in
assessing the models produced by the software designed in this work. Using the Sparameters, a comparison will be drawn between the measured data and simulated data.
40
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N o n l in e a r S im u l a t io n s
In addition to linear simulations, in order to fully characterize a semiconductor device,
nonlinear simulations of the CAD device model are required. Nonlinear characteristics of a
device are evident when it is driven into the large-signal domain. Nonlinear characteristics are
particularly important for devices being used in large power applications. Unlike small-signal
models, the data acquired for the express purpose of large-signal modeling is difficult to
come by. Large-signal S-parameters, for example, are not clearly defined and requires an
elaborate measurement setup [27], There are, however, means to assess nonlinear
characteristics from devices and model those characteristics.
There are several figures of merit that can be determined from nonlinear simulations.
Among those of importance to the microwave device model are the effects of compression,
intermodulation, and harmonic generation. Of great interest to the microwave system
designer are the power statistics of the semiconductor device being utilized. Power
compression is defined as the diminishing of output power gain with the increase in input
power. Under linear conditions, the output power of the semiconductor being driven in
amplification mode will linearly increase as the input power is increased. As the input power
is further increased, the nonlinear characteristics of the device cause the linear increase in
output power to diminish. A particular point of interest is the input power level that causes the
output power to deviate from the linear extrapolated value by a measure of 1 dB. This point is
commonly referred to as the 1 dB compression point. Figure 3.1 illustrates the concept of
output power compression.
41
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1 dB
Dynamic range
(DR)
R /tmds
F ig u re 3-1 - T ypical p o w e r compression characteristics (from [2 5 ])
The 1 dB compression point can be defined mathematically as:
PUB {dBm) = Gub {dB) + Pin{dBm)
(3.3)
Here, G 1dB(db) is the power gain at the 1 dB compression point. Also of interest is the
generation of harmonics. Nonlinearities in the semiconductor device induce harmonics of the
input
signal.
Harmonic
signals
introduced
into
microwave
systems,
particularly
communications systems, can cause erroneous behavior and are therefore detrimental to
system performance. A CAD device model that can accurately predict harmonic generation is
invaluable to the microwave designer.
As one would expect, the simulation of CAD models in the nonlinear regime must be
accomplished by large-signal models. Large-signal models must be able to characterize a
device given an excitation that is voltage-dependent. Small-signal models are not able to
accomplish this. The CAD models that are produced in this work are nonlinear large-signal
models capable of producing simulated nonlinear characteristics such as those mentioned in
this section. The simulation of nonlinear characteristics in this software is limited to the
voltage and current waveforms at specified harmonics. Other nonlinear assessments will be
carried out through the use of ADS.
42
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H a r m o n ic B a l a n c e
In the design of microwave circuits and systems, particularly for communications
applications, nonlinear electrical behavior of semiconductor devices must be accounted for in
the circuit simulator.
Highly nonlinear behavior, as exhibited by semiconductor devices, is
sometimes difficult to incorporate into CAD models.
Before the advent of sophisticated circuit simulators, RF and microwave circuits were
simulated with transient analysis techniques. Transient analysis served as a means of
determining the solutions of nonlinear differential equations; these equations were the timevariant characterizations of circuit elements. Although transient methods are well developed,
they pose problems to microwave engineers. To use transient analysis, the elements of the
circuit being simulated have to be characterized in the time domain. For microwave elements,
such as transmission lines, there is no suitable time-domain description. To simulate circuits
of nonlinear nature in CAD environments, specifically at microwave frequencies, frequency
domain methods are preferred. However, nonlinear elements are best described by time
dependent differential equations. The solution to this dilemma was instituted in a process
called
harmonic
balance.
The
harmonic
balance
technique
is very
in-depth
and
mathematically rigorous. A full discussion of harmonic balance techniques is beyond the
scope of this dissertation. This section will deal with harmonic balance is applied to the
simulation of electric circuits, specifically as applied to this work.
For the purpose of simulating CAD models, the harmonic balance technique is
applied directly to the equivalent circuit. For this work, the harmonic balance engine was not
developed for general circuits. It was designed specifically to work with the topology of the
FET equivalent circuit. Figure 3-2 illustrates the equivalent circuit used.
43
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GD
«D
G
GS
GS
F ig u re 3-2 - F E T la rg e sig n a l m odel equivalent c irc u it used in Nexus (from W alker [3 ] )
In developing the harmonic balance engine, the equivalent circuit was partitioned into
two subgroups: linear and nonlinear. Per the harmonic balance process, the linear partition
may be simulated in the frequency domain. Alternatively, the nonlinear partition is simulated
in the time domain. The essence of harmonic balance is the process of finding node voltages
that allow each of the differential equations that describe the circuit to be solved concurrently
in the frequency and time domains. For a circuit partitioning such as the one previously
described, the linear subcircuit and the nonlinear subcircuit are interconnected by ports. The
entire circuit contains N ports, one for each nonlinear element. Typically, there is an external
source on the input and output ports of the circuit. Consequently, a circuit divided into
subcircuits for the purpose of harmonic balance contains N+2 ports. Figure 3-3 illustrates how
a typical nonlinear circuit, comprised of linear and nonlinear elements, is partitioned for
harmonic balance simulation.
44
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'N+1
N+1
INPUT
PORT
LINEAR
SUBCIRCUIT
NONLINEAR
SUBCIRCUIT
'N+2
OUTPUT
PORT
F ig u re 3-3 - C irc u it p a rtitio n scheme f o r harm onic balance (from [ 19])
Zs(co) and ZL(co) represent source and load impedances and are part of the linear
subcircuit. IN and TN are linear and nonlinear currents, respectively, at each port. Observing
Kirchoffs current law, the summation of these currents should be zero at steady-state.
Through an iterative optimization process, the port voltages are found that satisfy this
condition. When this condition is satisfied, the solution is found. The harmonic balance
technique implies that the port voltages are periodic and therefore can be represented by a
Fourier series. Each coefficient in the series corresponds to a harmonic of the fundamental
frequency plus the DC component. Theoretically, an infinite number of terms exist in a
Fourier series. In reality, only a finite number of harmonics may be considered. This number
is chosen depending on the situation but it should be sufficient that most of the current and
voltage components are present in said number of harmonics.
In setting up the harmonic balance process, each subcircuit is dealt with separately.
The linear subcircuit is considered first. Given there is a source on the input and output ports,
a system of equations relating the port admittances, voltages, and currents can be defined.
45
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"
' *i.l
*i,2
■
h
h
*2.1
*2.2
.
*3.1
*3,2
I
^ .l
*/V,2
71
"
n
I N+l
J
N+2 _
Y N +U2
Y hN
Y
1 l.AT+1
Y
1 \,N + 2 1
*2
••
*3
Y
1 N ,N + 1
Y
1 N ,N + 2
1 N + 1,2
Y
Y
1 N + \,N + l
Y
1 N + l,N + 2
Y
1 N + 2,2
Y
1 N +2,N+\
Y
1 N+ 2,N + 2
•
Y
n ,n
vN
VN+1
_
YN+2 _
In equation 3.4, the left-hand side is the vector of port currents. The right-hand side is
the product of the port admittance matrix and the port voltage vector. For a system with K
harmonics, each element in the matrix is a submatrix with K+1 elements, one for each
frequency component plus DC. The elements with subscript of N+1 and N+2 are source
terms. Since they are known, they can be transformed into the port connections directly.
Doing so reduces the matrix equation given in equation 3.4 to the following.
I = I , + Y NxNV
(3.5)
With this transformation, the system of equations need only be balanced at the
nonlinear ports, thus reducing computation requirements.
For nonlinear elements, the currents will be due to charge or current sources. As
stated earlier, nonlinear elements are best described by time-dependent expressions. In
order to equate port voltages from the linear subcircuit to port voltages from the nonlinear
subcircuit, an inverse Fourier transform must be performed on them. Beginning with charge,
the time-domain expression for charge at a port is dependent on the vector of inverse Fourier
transformed port voltages. The charge can also be expressed in the frequency domain by
performing a Fourier transform on the time-domain voltage and equating it in the frequency
domain. For a charge quantity in the frequency domain with K number of harmonics
considered, a matrix can be formed as in equation 3.6.
46
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a
a
Q=
(3.6)
Q>
Q n ,k
In equation 3.6, the matrix element QN is a submatrix containing a value for each
harmonic. Considering the fact that the current arising from charge sources is given by the
time-derivative of that charge, the frequency domain equivalent would be:
(3.7)
i c = jn Q
(3.8)
The harmonic components are represented in equation 3.8 by, W, a diagonal matrix
containing N sets of K frequency components. Similarly, the nonlinear current due to real
components can be characterized by the time-dependent voltage expression in the timedomain and the Fourier transform of that in the frequency domain. This current can also be
represented by a matrix with N components, one for each port.
I G , 2
(3.9)
I
Equation 3.5 gave a summation of the current from the linear subcircuit and the
known external port voltages. Adding the nonlinear current components to that quantity gives
47
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a summation of the total current in the network. This summation, by Kirchoff’s law, should
equate to zero at steady-state. The summation of currents,
inclusive of harmonic
components, gives rise to the harmonic balance equation.
F(V) = I S + YNxNV + JQQ + I G = 0
(3.10)
This is the equation that is iteratively solved for with the voltage matrices being the
variables. By using iterative optimization processes such as Newton’s method, the voltages
are found as the harmonic balance equation is minimized. Additional method can be used for
the harmonic balance that will improve convergence and speed but for simplicity, the Newton
method was employed in this work.
48
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Chapter 4
CUSTOMIZED CAD DEVICE MODEL DEVELOPMENT
The models produced by the software in this dissertation were designed for a specific
application target. The target application is Agilent Technologies’ Advanced Design System
(ADS). ADS was selected as the target environment because it has a development
environment embedded which allows users to create custom device models which can be
fully integrated with its circuit simulator. Outlined in this chapter are the processes by which
customized CAD device models are developed. In addition, detail is given to the innovative
CAD model development approaches used for this work.
I n t e g r a t io n O f C u s t o m D e v ic e M o d e l s W
it h
ADS
A primary ability needed to perform this work is the integration of a custom-designed
CAD model into a circuit simulator. Agilent’s ADS provides an easy to use development
process by which an engineer, knowledgeable in C programming and circuit network theory,
can program a device model into its simulator. This feature of ADS enables the engineer to
develop custom device models and use them in the design of microwave systems.
The process by which a model is implemented into the ADS simulator is well defined
by Agilent. A prerequisite to implementing models within ADS is the complete formulization of
the model’s electrical characteristics as dependent on node voltages. This formulization
typically includes all branch currents and charges and their respective voltage-dependent
derivatives. It is understood that voltage-dependent derivatives of current equate to
conductance. Similarly, voltage-dependent derivatives of charge equate to capacitance.
Given this relationship, it is possible to derive either charge expressions or capacitance
expressions of one of the two are not known. ADS custom model implementation may be
conducted in one of two ways: linear and nonlinear. For the purposes of model
implementation, a linear model is one that can be completely defined by voltage-independent
admittance parameters or scattering parameters. Nonlinear models require definition of the
49
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model’s equivalent circuit admittance parameters as well as the empirical voltage-dependent
expressions previously described. All of the descriptions regarding the electrical makeup of
the model being implemented are instituted via C code. By programming the necessary
equations within Agilent’s pre-defined functions, the model is effectively linked into the ADS
simulation environment. In addition to programming the model’s characteristics in C, there
are some additional steps to be carried out in order to fully implement the model into ADS.
The model must have an associated graphical interface so that the user may interact with it
inside of the ADS’ design environment. The production of the graphical interface involves
creation of a schematic representation of the model and a dialog box through which users
can set the parameters of the model. After the completion of the C code programming and
graphical interface development, the model is then integrated into ADS by compiling the
source code and linking it with Agilent’s internal code libraries to produce a copy of the
simulation engine that includes the newly developed model. Using this process, more than
one model may be integrated at the same time, enabling the creation of model libraries.
The programming of the model equations is the most crucial step in developing a
CAD model for use in ADS. It is vital that the equations be proven to be well behaved and
appropriate for use in a circuit simulator. This primarily means that the equations need be
continuous and differentiable. For this work, the use of empirical equations and neural
network equations were tested and verified to be suitable for CAD model simulations in ADS.
Constructing a user-defined model in ADS started with the definition of the circuit
topology and the labeling of the equivalent circuit’s nodes. For ADS model integration
purposes, the external nodes were indexed first and the internal nodes second. External
nodes are defined as the nodes that interface with the other elements in a circuit schematic.
In this case, that meant the drain, source and gate terminals. ADS model implementation
procedures also required that the number of external nodes be specified. Next, the linear
elements of the model’s equivalent circuit were identified. From the linear elements, the linear
admittance matrix was defined. Next, the nonlinear elements were specified. For each
nonlinear element, a voltage-dependent expression was formulated along with its derivatives
50
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with respect to voltage. Using the derivative expressions, the nonlinear admittance matrix
was defined. At that point, the minimum requirements for ADS model integration were
satisfied. Optionally, a noise admittance matrix and transient response could have been
generated. The applications for the models produced in this work did not necessitate the use
of noise or transient code so it was not produced. The general process by which ADS models
are produced is summarized in Figure 4-1.
D e fin e circuit
to p o lo g y . Label
nodes.
Id e n tify lin ear
e le m e n ts .
Id e n tify
n o n lin ear
e le m e n ts .
D evelop lin ear
a d m itta n c e
m a trix .
D efin e v o lta g e dependent
expressions for
n on lin ear
e le m e n ts .
D efine
d eriv a tiv e s for
n o n lin ear
expressions.
D evelop
n on lin ear
a d m itta n c e
m a trix .
D efin e noise
a d m itta n c e
m a trix .
Com pile and link
C code.
D efin e tra n s ie n t
response.
F ig u re 4-1 - A D S user-defined m odel im plem entation process
51
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All of the models generated by the software consisted of the same topology. The
differences were in the equations used to model the device behavior. This meant the same
structure was used for each model with only swapping of the expressions taking place to
produce different models.
H y b r id E l e m e n t D e v ic e M o d e l s
All CAD models are in essence mathematical descriptions of real physical
phenomena. As such, it is possible to combine different mathematical methods to comprise a
single CAD model as a whole. Using this theory, a CAD model may be described by a
combination of different mathematical methods. The stipulation of this idea, as applied to
integration into a circuit simulator, is that the methods work seamlessly together and behave
similar to a homogeneous mathematical approach. Angelov instituted a means of combining
empirical and table-based formulations into one CAD model [9], Similarly, a novel approach
to device model development in which the circuit topology consists of both empirical elements
and neural network defined elements was demonstrated by COMSARE [7], This approach
primarily allows a microwave device modeler to focus characterization efforts on those
elements that are most nonlinear. For several applied instances, using a model with this
hybrid structure does not compromise its simulation capabilities or its accuracy. In several
cases, the hybrid model was more accurate than its homogeneously empirical counterpart.
This discovery lead to the decision to include the ability to construct models with elements of
different types. This capability increases flexibility in model development and in some cases
accuracy and robustness. Figure 4-2 illustrates the topology of the hybrid element FET
model.
52
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Cgd
Gate
Drain
Rd
ids
Cgs
—r - Cds
Source
F ig u re 4-2 - Topology o f h y b rid element F E T m odel
R e c o n f ig u r a b l e D e v ic e M o d e l s
To demonstrate the feasibility of having the user choose the makeup of the various
elements of a model, depending on need, a user-compiled model of a high-power HEMT was
developed for use in ADS. Being the chosen environment in which models produced by
Nexus would work, a study had to be conducted to determine whether or not such models
could be developed.
As outlined in the previous section, some models produced by the software tool may
be of hybrid design. In these situations, the user of the model may want to revert back to an
entirely empirical model for testing, validation, or comparison purposes. Using the traditional
methods of model implementation as defined by Agilent, this would require several separate
implementations of the model each with only a slight variation in the makeup of the equivalent
circuit topology. As part of the innovation of this work, an exploration was done to determine if
it was possible to design a model within the confines of the Agilent user-compiled model
53
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development framework that would be able to be reconfigured dynamically by the user
without having to re-implement the model into the simulator.
The initial design of the reconfigurable nonlinear FET model was done with a
combination of neural network elements and empirical small-signal elements. Accomplished
by the source code that implements the model into ADS, the reconfigurable model was able
to substitute empirical elements of the small signal FET model with neural network
components. The substitution took place behind the scenes and did not require the rebuilding
and recompilation of the source code. Active changing between the empirical and neural
network elements was done through the setting of parameter values in the ADS schematic
environment. Figure 4-3 shows the parameter list of the reconfigurable FET model, named
ANNFET (Adaptable Neural Network FET).
Num=2
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CGSD=
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CGDD=4e-14
. R C W = ........................................................................
RCD=356
RIW=
RID=3.2
RGDWRGDD=3
RD=2.257
D_BIAS=D_BIAS
RG=1.504
GJ BIAS=G_BIAS
R S =1.84
LS=
C R F =le-12
IINum
P3 =3
F ig u re 4-3 - Screen shot o f A N N F E T param eters
It can be seen in Figure 4-3 that all of the model parameters, with the exception of
the nonlinear currents, have spaces for a weight file and a discrete numeric value. By
selecting a weight file for an element, neural network processing occurs when the simulator is
determining the value for that element. Likewise, if a discrete number were set for the value
of a parameter, that element would take on that value. The design of the reconfigurable
54
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model was such that discrete values took precedence over the neural network. By
implementing the feature of dynamic reconfigurability, the user of the ANNFET model was
afforded the ability to pinpoint the accuracy of a particular element. This dramatically
increased the model developer’s performance optimization and troubleshooting capabilities.
The successful implementation of a nonlinear user-defined model of this type gave
rise to the idea of instituting a similar model framework for the software developing in this
work.
E m p ir ic a l F it t in g M e t h o d s
To associate the empirical expressions of CAD model elements such as the ones
described in the previous section with the measurement data, they must be fitted to exact
closed form equations. This is done by modifying the parameters of the equation until they
allow the equations to evaluate to the measurement data at specified independent variable
values. This process is termed curve fitting and is an important part of the empirical model
development process.
The curve fitting process involves minimizing error functions to some predetermined
tolerance. These error functions are typically in the form of summations of the difference
between desired values and equated values. The desired values, in this case, are measured
quantities. The equated values would be the evaluated empirical functions at given points in
the independent variable space. A common error function used is the least square error
function. Equation 4.1 gives the general form of the least squares error function for one
dimension.
(4.1)
Here / ( x ; ) would be an empirical function, which is a function of x. The discrete
point at which the function is evaluated is indexed by subscript i. The measured data that is
being fitted to is represented at the same point by g ( x ; ) . For the purposes of curve fitting
55
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data for CAD models, specifically those of FETs and HEMTs, the error function would be twodimensional, one for each bias voltage. Case being, the error function would then be
represented by equation 4.2.
m
£ = Z
j =1
n- 1
£ ( / ( * , ) - « ( * , ))!
(4-2)
;=o
There are several mathematical methods that can be employed to minimize error
functions thereby determining coefficients of the empirical equations that fit them to
measured data. A very popular method is called the Gauss-Newton method. Another
frequently used algorithm for root finding is the gradient descent method. This work used a
variation of the Levenberg-Marquardt (LM) method [5], The LM method employs a
combination of both the Gauss-Newton and gradient descent methods. This method works
very well for general applications and is commonly used to fit nonlinear least-squares
problems.
Specifically for this work, a two-dimensional approach to the LM technique was
employed to curve-fit to the Angelov equations for drain-source current, gate-source
capacitance, and gate-drain capacitance.
A r t if ic ia l N e u r a l N e t w o r k s
The use of neural networks in microwave device modeling is key to the robustness
and usefulness of the Nexus development environment. Neural networks have demonstrated
their usefulness to the application of microwave device modeling by COMSARE in past works
[1][2][6][7], Neural networks posses the ability to characterize highly nonlinear data
throughout a wide dynamic range without the need for empirical equations. Neural networks
have several architectures and algorithms. The work done in this dissertation involved the
use of multilayer feed-forward architectures. The architecture of a neural network is defined
as the arrangement of data processing elements called neurons. A neuron is the basic
element with which a neural network is constructed. The neuron is composed of an input
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vector, an output vector, and a processing function. Each neuron is part of a collection of
other neurons, defined as layers. The multilayer feed-forward architecture consists of at least
three layers: input, middle, and output. The middle layer is also classified as a hidden layer.
The layers are interconnected by numeric values called weights. These weights are arranged
in vectors. There is a weight vector between each layer, connecting every node in one layer
to every node in the other layer. Figure 4-4 shows the general architecture of a multilayer
feed-forward network.
Hidden Layer
Input Layer
: Output Layer
i
F ig u re 4-4 - G eneral m u ltila y e r fe e d fo r w a r d ne u ra l netw ork architecture
Each layer in the architecture may have a different number of neurons depending on
the data and the desire of the user. The number of input layer neurons will equal the number
of independent variables of the data set. The number of output lay neurons will equal the
number of dependent variables of the data set. In the hidden layer, the number of neurons is
arbitrary but decided depending on the application. Generally, an increased number of middle
layer neurons will increase the accuracy of the network. There are a finite number of middle
57
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layer neurons that can be added to a network that will have an appreciable effect on its
accuracy.
The architecture of a multilayer feed forward neural network is standard. What
differentiates different variations of a feed forward network is the processing mechanism used
to characterize the data being modeled. As discussed, each neuron in the architecture has an
input vector, output vector, and processing function. As applied to the concept of data
modeling, the input vector would correspond to the independent variable or variables of a
function. A function, y = f { x ) , would then have a range of x through which values of y
would be obtained. This range of x, in terms of the neural network, is discretized in some
manner and those values would be the input vector of the neural network. Likewise, the
discretized values of the input would have corresponding values of y, which comprise the
output vector of the neural network. For the neural network to be able to model nonlinear data
the propagation of values from the input layer to the output layer must be mathematically
transformed to match the values of the output data. This is accomplished by determination of
values of weights that interconnect the neurons. Recall that the neurons contain processing
functions that operate in their inputs. The result of input processing in each neuron is a
weighted summation of all the inputs to it. The particular processing function used in a neuron
is called an activation function and is the same for each neuron in the particular layer. Note
that the input layer neurons do not typically have an activation function. The input layer is
only characterized by the values of the input data. So, in summary, an artificial neural
network is used to characterize mathematically, relationships between two sets of data by
means of a combination of nonlinear weighted summations. The application of a neural
network involves determination of suitable activation functions and weight values that achieve
this goal. This is primarily achieved by minimizing an error function that has the weight values
as the optimization variable. The error function is a difference between the measured data
vector and the neural network output vector. As applied to this work, neural networks were
used to characterize nonlinear relationships between voltage, current, and charge data
acquired from measurements. These neural networks were used in the CAD device model to
58
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reproduce in a simulation environment the measured data, with the assertion that these
neural networks could be more accurate than standard empirical model formulations.
There are two distinct types of neural networks that were used in this work. One is
termed the backpropagation neural network. The second is the knowledge-based neural
network. Both types are multilayer feed forward neural networks. The backpropagation neural
network was used in previous COMSARE research endeavors. It was included in this work as
a means of supporting legacy applications. The primary application of neural network to CAD
device modeling in relation to this work is with the knowledge-based neural network.
The knowledge-based neural network offers advantages over the backpropagation
neural network that made it attractive to use. The process of iteratively finding weights is a
lengthy one. The mathematical structures involved include large matrices and subsequently
matrix manipulation. These facts made it very data intensive and time consuming to
determine suitable weights for a CAD device model using the backpropagation method. In
addition, the data that was being modeled by neural networks was such that the
backpropagation method was unable to optimize weights for the entire range. The
knowledge-based neural network is not hindered by these problems because it requires less
data to achieve the desired level of accuracy and it better generalizes nonlinear
characteristics over a wider range.
The architecture of a knowledge-based neural network is quite different from the
general multilayer feed forward architecture. It contains five hidden layers giving it a total of
seven layers. In addition to the input and output layers, it contains a knowledge layer, a
normalized knowledge layer, a boundary layer, a region layer, and a normalized region layer.
An illustration of the knowledge-based neural network is given in Figure 4-5.
59
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Vgs Vds
F ig u re 4-5 - Knowledge-based ne u ra l netw ork architecture (from Bayne [2 ])
What is unique about the knowledge based neural network is its incorporation of
known behavior characteristics in the neurons of the network. By specifying equations that
closely emulate the pattern of the data being modeled, the knowledge-based neural network
is able to optimize more accurately and more quickly than the backpropagation neural
network.
The hidden layers of the knowledge based neural network are what enable it to
generalize about nonlinear patterns better than the backpropagation neural network. The
knowledge layer is a set of neurons that have an empirical expression whose form resembles
that of the data being modeled. The expression is a function of the input layer values and the
weights between input and knowledge layers. The boundary layer is a set of neurons that use
specific boundary functions. The weights in the boundary layer are dependent on the number
of variable coefficients in the boundary equation. The region layer exists to define regions in
the boundary layer. These regions affect the weighting of a particular boundary neuron on the
output value from the network. The weights in the region layer are scaling parameters and
help the neural network to fit to the data being modeled. The normalized region layer and
60
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normalized knowledge layer serve as a means of scaling the outputs from the region and
knowledge layers to values that are within the desired range of output layer values. All of the
weights from the various layers in the network along with the coefficients in the knowledge
and boundary equations are the variables through which the knowledge based neural
network is optimized. By summing the errors between the network’s output and the model
data set, a correlation can be determined between it and the weights of the network. By
iteratively varying the weights such that the error is reduced, an optimal set can be
determined that allow the network to reproduce the data pattern given the same inputs. In
addition, the incorporation of knowledge in the neural network structure allows a knowledge
based neural network to predict data patterns given inputs that it has not previously learned.
This feature makes it very applicable to CAD device modeling since the purpose of simulation
is to predict circuit performance outside of observed behavior.
The neural network engine used in this work is a derivative of the engine produced
by Bayne [2] and uses a two input, one output configuration. The knowledge equations used
are specific to the modeling of FET and HEMT devices.
61
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Chapter 5
DEVELOPMENT OF INTEGRATED MODEL DEVELOPMENT
SYSTEM
The work done in this dissertation is the development of a novel CAD model
development environment that will enable developers of semiconductor CAD models to
quickly and easily produce advanced models for use in the ADS circuit simulator. The
methods and processes by which this software produces models include innovative and
traditional techniques. This chapter will outline the development of the software, named
Nexus, and detail the individual processes that make up the software tool.
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F ig u re 5-1 - Nexus, a novel m odel development environm ent
62
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Softw are D evelo pm ent P rocess
For this work, the targeted platform for the software application was 32-bit
Windows™. The application was developed using a combination of C, C++, and Visual C++
programming languages. The core application including interface mechanisms, mathematical
algorithms, and internal data processing was written in C++. The C++ language was chosen
because it better lends itself to modularization. It is intended that future COMSARE research
students will continually improve upon the software developed in this dissertation. Some of
the functions implemented into the program were developed using legacy code, which was
written in C. The graphical user interface was developed using Microsoft Visual C++ including
Microsoft Foundation Classes.
Nexus was designed in a modular fashion so that COMSARE may adapt the software
for
newer
improved
modeling
processes.
To
achieve
this
the
software
was
compartmentalized into six major subsections. The main application interface served as the
core of the software. In this section the code for the graphical interface and the basic user
interfaces was developed. The data management section housed the code for importing and
storing various data needed to generate the CAD models. In this iteration of Nexus, support
was programmed for the in-house designed data structure and the basic tab-delimited
structure of a large-signal FET model. Third, the data characterization functions serve as a
means of translating data into mathematical representations. This section includes functions
for neural network processing, discrete lookup table generation, and empirical curve-fitting
routines. Next, the model construction schemes support the generation of the electrical
equivalent circuit topologies of given device models.
Included in this implementation of
Nexus are the routines for generating ANNFET models. In validating and pre-analyzing the
models, some simulation engines can be attached to the Nexus framework. These engines
are implemented into the model verification branch of the code. For this work, a simple
harmonic balance engine and differential continuity algorithm were implemented. The last
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subsection of code is the model exportation code. These functions serve as integration
modules for particular target environments. The end goal of Nexus is the implementation of
user-defined models into circuit simulators. ADS was the target platform for this iteration of
Nexus with future expansion plans for other design environments.
In addition to compartmentalizing the source code of the Nexus application, the use
of C++ classes was instituted to promote modularization. A typical example of this is evident
in the model export class. The base class for any model to be exported has elements such as
number of nodes, number of external ports, and parameter lists. Additional export classes
can be derived from the base class that will inherit its properties. It follows that other classes
can be incorporated into the design for other elements of the environment. Exemplified in
Figure 5-2, is the layout of export, model, and neural network engine classes.
Basic Export Class
Angelov Model Class
Model Topology
Empirical Functions
Parameter Lists
• Angelov topology
- Angelov equation
- Angelov parameters
Matrix Knowledge-Based
Class
- Matrix architecture
- Matrix processing functions
Tates Knowledge-Based
Class
- Tales architecture
- Tates processing functions
J&i
)
i
▼
ANNFET Export Class
Diode Export Class
ANNHBT E xp ort Class
-A N N FE T topology
- Angelov Model Class
- Matrix KB Class
- NEXDIODE topology
- Angelov Model Class
- Matrix KB Class
- ANNHBT topology
- Matrix KB Class
- Tates KB Class
j
F ig u re 5-2 - Class structures used in the design o f the Nexus environm ent
64
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NEXUS M ain
A p p lic a tio n
G ra p h ic a l U se r
In te rfa c e
Data
M anagm ent
F u n c tio n s
Data
C h a ra c te riz a tio n
F u n c tio n s
N e xus D ata
F o rm a t
W a lk e r D a ta
F o rm a t
E m p iric a l
T a b le -B a s e d
A n g elo v
►I N e u ra l N e tw o rk
Spline
Lookup
KBNN
(M a tr ix )
M odel
C o n s tru c tio n
F u n c tio n
AN N F E T
M odel
V e rific a tio n and
A n a ly s is
D iffe r e n tia l
C o n tin u ity
H a rm o n ic
B a lance
M odel
E x p o rta tio n
F u n c tio n s
F ig u re 5-3- Nexus development environm ent a rchitecture
Figure 5-3 summarizes the modularization scheme of the Nexus development
environment. The Nexus development environment was constructed with expansion and
future development in mind. As such, Nexus provides COMSARE with a vehicle through
which students can attain research and development skills. Given that the code was
partitioned into specific subsections, parts of the application can be developed without the
necessitation of reconfiguring the core application. The Nexus development also reduces the
necessary training time required for students to begin modeling research within COMSARE.
Figure 5-4 illustrates the typical training modules that a COMSARE student must complete
65
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
before undertaking modeling research. Given a minimum of three years, a student is then
ready to begin modeling research. This is costly and inefficient for the goals of COMSARE.
Instituting Nexus allows students to begin modeling research early.
M atrix Algebra
C ircuit Analysis
Concepts
1 sem s e s te r
C Program m ing
Sm all and Large
Signal Model Concepts
ADS Model
Im p lem e n ta tio n
Concepts
2 sem sesters
2 sem sesters
2 sem sesters
F ig u re 5-4 - Typical tra in in g regim ent f o r COMSARE students in m odeling research
M o d e l G e n e r a t io n F r a m e w o r k
The process by which a model is developed and implemented from conception to
completion was designed with the realization that the end product would be used in Agilent
ADS. The familiarity with ADS custom CAD model implementation and the access to the
resources needed were the primary motivators for this decision. The software tool, Nexus,
was implemented by completing the following tasks: integration with well-defined data
extraction processes, integration with a neural network processing engine, development and
testing of novel CAD model implementations into ADS, development of a post-processing
engine, and finally, development of model exportation engine. Each of these tasks was
accomplished with the use of ADS, Matlab and C/C++ programming.
Nexus is a Windows program that includes a graphical user interface to gather input
from the user. Using the interface, a Nexus user is able to use measured data to produce a
fully operational CAD device model that could be used in Agilent ADS. The framework by
which models are generated using Nexus is outline in the following steps. Initially, all that is
required to generate a model is a data set that is sufficient to construct a nonlinear device
model. This data is acquired from an external file that is specified by the user. From these
data, various types of processing can occur. These types include table-based, empirical, and
neural network. Depending on the desire of the user, each element of the FET model can be
66
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specified with a different type. Nexus process the data and conforms the model elements to
the user-selected types. This is done by way of internal engines that are part of Nexus. For
table-based elements, the pertinent data is culled from the original import data file and
subsequently used to produce a special data file that will be used in the simulation
environment. Empirical elements are processed with a curve fitting routine that is specifically
designed for the modeling of measured data as applied to device modeling. The results of
empirical element processing are coefficients that are used in the ADS simulation
environment. For neural network elements, once again pertinent data is gathered from the
input data file and used to generate a special external file, which is then used by the neural
network processing engine. Once the neural network engine has finished processing the
data, a parameter file is generated containing weights and configuration settings. This file is
also used within the ADS simulation environment. When all of the model elements have been
processed, Nexus is then able to validate and test the model through equation analysis and
simulation. If the model developer is satisfied, at that point, he can export the model for use in
ADS. The exportation process involves generation of C code that describes the model
topology makeup to the ADS simulation engine. The code that is generated is then compiled
and linked with ADS libraries to produce a binary executable. Once the model is exported, it
is integrated into ADS and can be used in designs.
A breakdown of each step in the model generation framework is given in subsequent
sections of this chapter.
I n t e g r a t io n W it h D a t a A c q u is it io n
The initial step in designing a model using Nexus is the importation of the data from
which the model will be developed. This data can consist of, minimally, S-parameters of the
device being modeled. For this work, the data was specifically tailored for HEMT and FET
devices. The measured data include nonlinear current, capacitance, charge, device parasitic
elements, and small-signal equivalent circuit elements. The data entities within the data file
map directly to a particular FET model topology. As this work is focused on the development
67
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of HEMT and FET models, only the equivalent circuit for these structures is implemented into
Nexus.
The foundation of a good CAD device model is accurate measurement data. The
model can at best, reproduce what data was used to develop it. This research implements a
standard high frequency device model extraction routine and a novel charge-conservative
data acquisition technique designed specifically for nonlinear device modeling. The standard
data acquisition was derived from a process in Agilent IC-CAP. This process included
measurement of frequency variant S-parameters and DC IV curves. In addition, the parasitic
element values were de-embedded and estimated. For Nexus to be able to generate the
minimally functional model, the DC IV curves have to be specified. The file format that Nexus
was designed to import was tab-delimited text. In the file, the data entities were arranged in
columns with the first two columns being the voltage bias values. The other columns included
currents and capacitances. Alternatively, charges could be specified in the file instead of
capacitances. The file may be generated manually or compiled from other file formats. An
excerpt an example file from the general high frequency model extraction process is
displayed in Table 5-1. It is compatible with the Nexus data import function to have 0 values
for data elements for which there is no measurement taken. For these quantities, however,
the user must use static empirical descriptions.
Table 5-1 - Sample Nexus in p u t data file
# General HF FET
# vgs
vds
ids
igs
igd
cgs
cgd
-2.7
0
7.56E-09
-1.35E-08
-1.35E-08
1.10E-15
9.30E-16
-2.7
0.1
1.92E-07
-1.69E-08
-1 .69E-08
1.11E-15
9.40E-16
-2.7
0.2
3.70E-07
-1.93E-08
-1.93E-08
1.12E-15
9.50E-16
-2.7
0.3
5.77E-07
-1.78E-08
-1.78E-08
1.13E-15
9.60E-16
-2.7
0.4
7.94E-07
-1.69E-08
-1.69E-08
1.14E-15
9.70E-16
-2.7
0.5
1.05E-06
-1.26E-08
-1.26E-08
1.15E-15
9.80E-16
-2.7
0.6
1.32E-06
-1.67E-08
-1.67E-08
1.16E-15
9.90E-16
-2.7
0.7
1.00E-15
-4.13E-08
-3.00E-08
-4.13E-08
1.17E-15
0.8
1.59E-06
1.88E-06
-3.00E-08
-2.7
-2.7
1.18E-15
0.9
2.19E-06
-6.45E-08
-6.45E-08
1.19E-15
1.01E-15
1.02E-15
2.55E-06
1.21E-15
-2.7
1.2
3.31 E-06
-1.85E-07
-9.75E-08
-1.34E-07
-1.85E-07
1.03E-15
2.91 E-06
-9.75E-08
-1.34E-07
1.20E-15
-2.7
1
1.1
1.04E-15
1.05E-15
-2.7
1.22E-15
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-2.7
1.3
3.74E-06
-2.48E-07
-2.48E-07
1.23E-15
1.06E-15
An additional feature of the Nexus data integration process is the inclusion of the
novel in-house acquisition process. This in-house acquisition
process is a charge-
conservative process that promises to condition measured data specifically for CAD model
development. After measured data is acquired, the in-house process uses a Poisson solver
to determine accurate charge and current information from device measurements.
In
summary, the in-house acquisition process encompasses the measurement of DC IV
characteristics and S-parameters. In addition breakdown is determined. The measured data
is then conditioned for easier modeling. Parasitic elements are de-embedded and the
resultant data is then processed by a Poisson solver to determine charge-conservative
current and charge expressions. Finally, the processed data is export to a file to be
processed by Nexus’ import algorithm. Compatibility with the Walker acquisition process was
implemented because the detailed knowledge of its methodology was known.
With these two data acquisition processes, Nexus is able to produce very good
nonlinear models given the data is accurate. Table 5-2 summarizes the data modeling
capabilities of each process. These attributes were determined from the equivalent circuit
model given in Figure 3-2.
Table 5-2 - D ata A cq u isitio n Process C apabilities
Drain-Source current
Gate-Drain current
Gate-Source current
Drain channel current
Gate-Source capacitance
Gate-Drain capacitance
Drain-Source capacitance
Gate-Source charge
Gate-Drain charge
Drain-Source charge
Parasitic resistances
Parasitic inductances
Parasitic capacitances
Pad capacitances
General High Frequency FET
X
X
X
Walker FET
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
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The integration of the two included data acquisition processes essentially involved
proper manipulation of the required data. Both processes were used because of COMSARE’s
familiarity with them and their ability to facilitate the development of CAD device models.
I m p l e m e n t a t io n O f E m p ir ic a l P r o c e s s in g A l g o r it h m s
Nexus was designed to extract the Angelov model for its empirical based solution. As
such the complete formulation for the Angelov model was known and used as the basis for
data fitting. Nexus allowed for the curve fitting of drain-source gate-drain and gate-source
currents. Also, included in the empirical processing engine was the ability to curve fit Angelov
capacitance expressions. To curve fit these elements the Levenberg-Marquardt algorithm
was instituted into Nexus. The fitting factors included the coefficient parameters from the
various Angelov expressions. Table 5-3 lists the Angelov parameters available for curve
fitting. Important to the curve fitting process is the choosing of starting values for the fitting
parameters. Nexus included the ability for the user to select initial starting parameters making
the curve fitting process faster.
Table 5-3 - E m p iric a l F ittin g Coefficients in A ngelov M o d e l
Empirical Fitting Coefficients in Angelov Model
Drain-source current
IP K
V P K
X
a
P1
P 2
P3
Gate-source capacitance
Gate-drain capacitance
C g sO
P O gsg
P 1gsg
P 2 gsg
P 3gsg
P O gsd
P 1gsd
P 2gsd
P 3gsd
C gdo
POgdd
P 1 gdd
P 2gdd
P 3gdd
POgdg
P fg d g
P2gdg
P3gdg
The Levenberg Marquardt process used for curve fitting was a customized version
that was designed specifically for fitting two-dimensional functions. The two dimensions were
drain-source voltage and gate-source voltage. These values were specified in the imported
data files. The algorithm applied was as follows. To start, the measured data was obtained
and the corresponding empirical expression was specified. The measured data contained a
discrete number of points. Given this number of points, memory was allocated for a matrix
70
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that would contain the difference between the measured data and the evaluation of the
empirical expression at each point in the data set. This difference was used to calculate the
error function, which is given in Equation 5.1. Depending on the number of coefficients in the
empirical expression being fitted to, a Jacobian matrix was developed using the second order
partial derivatives of the error function with respect to each coefficient.
E
=
( y e m p ir ic a l ~
T d a ta )
1 )
P
For a family of curves, the error function would be multidimensional, having the same
number of elements as the number of curves. With the Jacobian defined, the LM optimization
routine was then employed. By calculating the error function and comparing it to a
predetermined minimum desired error, the Jacobian would then determine how to vary each
coefficient in the empirical equation to minimize the error function. By iterating through the
calculation and comparison procedure repeatedly until the error function was reduced to a
desired level, the optimum coefficient values were achieved.
Upon successful curve fitting of the empirical elements, the optimized coefficients
were saved in a file for later reference. These coefficient values were also used in the model
exportation process. Ultimately, coefficients for empirically based elements can be modified
in the ADS design environment. The coefficient values provided by Nexus served as optimal
values.
Figure 5-5 illustrates the basic process by which empirical elements are processed
by Nexus as applied to the case of Angelov drain-source current.
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Provide starting
v alues for
coefficients
>
E
LM fittin g of
d ata to Angelov
Ids expression
Saved o p tim u m
coefficient
values
C om pleted
curve fitting
3
F ig u re 5-5 - A lg o rith m f o r processing e m p iric a l data
Extraction of empirical based model elements was made easy and intuitive for the
model developer. Although the Angelov model is readily available for use in Agilent ADS, a
custom implementation of the model is not. Nexus allowed users to use different parts of the
Angelov model as per their choosing.
I m p l e m e n t a t io n O f T a b l e -B a s e d M e t h o d s
Table-based
models
rely
on
discrete
sample
data
to
reproduce
electrical
characteristics as opposed to empirical equations. During the course of a computer
simulation, model element values are determined by retrieving information from static tables.
Nexus institutes the use of data lookup tables by generating tab-delimited text files
for each data quantity. A portion of a sample lookup table file for the drain-source current is
shown in Table 5-4.
Table 5-4 - E xcerpt fro m sample lookup table f ile
# Nexus table model
# vgs
-2.7
vds
ids
0
7.56E-09
-2.7
0.1
1.92E-07
-2.7
-2.7
0.2
3.70E-07
5.77E-07
-2.7
0.3
0.4
7.94E-07
-2.7
0.5
1.05E-06
-2.7
0.6
1.32E-06
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# Nexus table model
-2.7
0.7
-2.7
0.8
1.59E-06
1.88E-06
-2.7
0.9
2.19E-06
-2.7
1
2.55E-06
-2.7
1.1
2.91 E-06
-2.7
1.2
3.31 E-06
-2.7
1.3
3.74E-06
In order to integrate a lookup table with a circuit simulator, steps must be taken to
account for data points that are not in the table. This is achieved by a process called
interpolation. Nexus instituted a two-dimensional cubic spline interpolation routine to account
for the dependency of nonlinear model element values on two bias voltages.
In the Nexus model development stage, table based elements automatically
generated the necessary lookup tables based on the imported data. This data was invariably
a function of two bias voltages. The files were used in the ADS environment as means of
determining element values during simulation. In the ADS simulation environment, to facilitate
speedy computation, the data from the lookup table files were retrieved and stored into
memory before the processing took place. Figure 5-6 illustrates the flow of how table-based
data was processed by Nexus for use in post-processing and ADS.
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T a b le M o d e l File
Id s (v g s , v d s )
Im p o rte d D ata
Id s (v g s ,
Ig s (v g s ,
Ig d (v g s ,
C g s (v g s ,
C g d (v g s ,
vds)
vds)
vds)
vds)
vds)
T a b le M o d e l
Ig s (v g s , v d s )
N ex u s D a ta
P rocessing
T a b le M o d e l File !
Ig d fv g s , v d s )
T a b le M o d e l File
C g s (v g s , v d s )
T a b le M o d e l File
A D S s im u la tio n
an d
N e x u s p o s t-p ro c e s s in g
F ig u re 5-6 - Table-based data f ile processing flo w
For the application of model development in this work, the table-based algorithm was
applied only to those elements that have directly been measured and included in the import
data file. This applies to current, charge, and capacitance.
I n t e g r a t io n W it h N e u r a l N e t w o r k E n g in e
The model development process used by Nexus is highly integrated with the use of
neural networks. Using neural networks to characterize the electrical behavior of model
elements has proven to be useful and effective in past COMSARE research [2][6][7],
Nexus incorporated the use of the knowledge-based neural network engine
developed by COMSARE and implemented by Dr. Melvin Bayne in his dissertation (Bayne
[2]). This engine is named, The Matrix. A few modifications were made in order to make it
compatible with Nexus. The original knowledge-based neural network engine was produced
in C code. Since Nexus was developed using C++, the engine had to be modified slightly to
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for better compatibility with C++. In addition, some of the data structures defined in the
original program had to be modified in order to work with Nexus’ framework.
The use of the Matrix knowledge-based neural network engine was incorporated in
two modes. During model construction, neural networks were optimized in a mode termed
training mode. During model execution, neural networks were processed in feed forward
mode. Both modes used the same algorithms for the knowledge-based process but the feed
forward mode did not require any optimization or iteration. A single pass through of the neural
network computation was involved in the feed forward mode. The feed forward mode also
required the same architecture construction and destruction processes as the training mode.
Although the Matrix neural network engine allowed for dynamic input and output data
configurations, its use in Nexus was specifically applied to the modeling of capacitance and
current of FET devices. Both capacitance and current data were functions of two voltages.
One entity at a time was trained using the neural network engine. Thus, the neural networks
used by Nexus were of two-input and one-output architectures. As noted in the section
describing the knowledge-based neural network process, the number of neurons in the
knowledge layer, normalized knowledge layer, region layer and normalized region layer each
had the same number of neurons. The number used was a variable parameter that could be
set by the Nexus user. The basic process of the Matrix neural network engine was as follows.
Configure the network architecture. This involved determining the number of neurons in each
layer. Initialize the knowledge equation’s coefficients. The knowledge and boundary layers
shared the same coefficient values. Initialize weights throughout the network with random
values. Gather the input data samples and calculate the error. Develop a Jacobian matrix
consisting of the derivatives of the error with respect to weight. Use the Levenberg-Marquardt
process to minimize the error function and find weights that best allow the neural network to
reproduce the training data. The Matrix neural network processing algorithm is illustrated in
Figure 5-7.
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Im p o rt D ata
/
M easured
D ata
D e term in e initial
e rro r
Initia lize
w eigh ts.
C o m p ute
Jacobian o f Error
w .r .t w eigh ts.
Process feed
fo rw ard and
recalculate
error.
Use Levenberg
M a rq u a rd t to
m in im ize e rro r
Is e rro r
to leran ce
acheived?
Yes
F ig u re 5 -7 - Knowledge-based ne u ra l netw ork engine process
The particular knowledge equation used for the Matrix neural network engine were
derived from the Angelov FET model equations. Specifically, the Angelov equation was used
for modeling the IV curves. A special equation was used to model IV curves at or near the
pinch off region. The derivative of the current with respect to the two input voltages was used
as the boundary equation. Modified versions of the Angelov capacitance equations were
used for the knowledge equations pertaining to capacitance. For the boundary equations
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associated with capacitance, the integral of capacitance equation was used. Equations 5.2
through 5 .5 list the current and capacitance expressions used in the Matrix engine.
c gs
I ds = I pk (1 + tan h (vF ) ) ( l + A Vds)(X?iVih.(aVds))
(5.2)
hs = I pk{\ + P ( y g s - Z ) 2{\ + k V d s )(e Tvds - 1 )
(5.3)
= C 0 0 + ta n h ((p 0 + Px( Vgs - * ) ) ) ( 1 + tanh(P2 + P3Vds)
(5.4)
c sd = C 0(1 + tanh((/> - P{Vds)){\ + tanh(P2 + P ,V g d ))(\ + tanh(P4 + PsVgs) (5.5)
For the Matrix neural network engine to be able to integrate with Nexus all that was
needed was a means to pass to it the data to be trained and a specification on how the
neural network architecture was to be constructed. Nexus was designed such that any data
that needed to be trained by the Matrix engine generated a separate file to be read and
processed by the engine. Additionally, network architecture parameters set by the user were
passed to a configuration file, which was also read by the Matrix engine.
The product of the neural network engine’s training mode is the weight file. This file is
a text file that contains the description of the network’s architecture and the associated
weights. During model execution, this file is read and used by the engine in feed forward
mode to determine the values of the output layer neurons. Optionally, a log file was
generated by Nexus to report details of the training process such as the training time, error
statistics, and data structure.
In feed forward mode, the neural network engine simply produces an output given a
specified input and set of weights. The feed forward mode was instituted as part of the model
simulation process. To accomplish this, several functions were programmed to generate,
process, and destroy the neural networks from within the CAD design environment of ADS.
During the execution of a simulation within ADS that incorporated the use of a Nexus­
generated model with at least one neural network element, a function is called to read the
relevant weight files and allocate the necessary computer memory needed. Additionally, a
function was used to calculate a neural network element’s response given a single input
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sample. Again, the weight file was read to retrieve the needed weights. Lastly, after the
completion of the simulation a function was called to release the memory allocated for the
neural network processing.
C u s t o m iz a t io n O f M o d e l E l e m e n t s
A novel feature of Nexus is the ability to construct circuit models of hybrid design.
Traditional CAD models are made up of homogeneous equivalent circuit descriptions but the
models developed with Nexus can consist of heterogeneous equivalent circuits. For instance,
the Angelov FET model is entirely empirical. The HP Root model is completely table-based.
Models produced with Nexus can contain elements that are empirical while others are tablebased. It depends on the desire of the model producer.
The benefit to allowing customizable and consequently reconfigurable equivalent
circuit models is it gives the model developer fast and flexible means of optimizing a model
for a particular application. For instance, to develop a completely empirical model involves
fitting to several currents and charges. It may be faster for the model designer to implement a
table-based characterization for all but one element. The element of interest can be optimized
for the best performance. This flexibility is also of interest for parametric analyses. By
isolating a particular element, the model producer can determine how it affects a particular
metric such as power-added efficiency. Using traditional methods to accomplish these types
of optimizations requires rebuilding and recompiling of the models after each design iteration,
which is time-consuming and introduces a source of error and inconsistency.
Selection of a model element type is done by the user with Nexus’ front-end
interface. Only the nonlinear elements of a model may be dynamically reconfigured. Parasitic
elements and linear elements are fixed at linear definitions. Nexus allocates automatically the
necessary data structures to support a particular element type once the user makes a
selection. Given a table-based element selection, Nexus generates a file containing the
measured data from that element. Given an empirical based element selection Nexus
determines the associated coefficients pertaining to the empirical equation for that element. A
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reference to the empirical function is also generated. These steps are in preparation for the
generation C code which is needed for the exportation process. Given the selection of a
neural network element, measured data for that element is culled from the import data and
placed in a file. Neural network processing options are gathered from the Nexus interface and
placed in the file along with the data. This file is structured for proper processing by the
neural network engine. Figure 5-8 displays a screen shot of the user selection of model
element types.
Nonlinear Elem ents-
e
id s
r
qds
r
ig s
Lookup Table
|Empirical
r
qgs
| Empirical
c
IGD
T QGD
Neural Network
Empirical
j
j
Empirical
Lookup Table
r if
jNeural Network
r
JEmpirical
it
▼
3
3
3
3
3
Process Data
F ig u re 5-8 - Nexus interface f o r selection o f m odel element types
A n a l y s is A n d V a l id a t io n O f M o d e l
The ability to validate the performance of a user-defined CAD model is a feature that
dramatically enhances the practicality of Nexus. As is with the case of Agilent ADS,
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implementation of a user-defined device model does not guarantee the successful simulation
of that model in all operating modes. This especially applies to nonlinear models and higher
order nonlinear simulations. Although Agilent provides a well-defined implementation system
for user-defined models, there is no means of verifying the behavior of the model, at the core
simulation level, once it is implemented. This limitation puts developers at a disadvantage
when it comes to debugging a model when it fails to simulate as desired. It would be very
beneficial to the model developer to have the ability to analyze the model’s behavior as it is
being simulated, thereby being able to diagnose and correct any implementation issues. Of
primary interest to the work in this dissertation as it applies to model simulation, is the
harmonic balance simulation technique. This simulation technique is the most used by
COMSARE in the analysis of nonlinear device models.
One of the fundamental assessments to make regarding a CAD device model is the
continuity of the equations used and their derivatives over the simulation
space.
Discontinuities contribute to simulation failures and are sometimes difficult to detect. Nastos
[21] gives a useful means of analyzing the continuity of first order derivatives. The equation
used in this work, obtained from Nastos, is given in Equation 5.6.
yt ~ x - i
X i
~
X l
-1
y ,--1 - y,--2
X i - l ~
> Z
(5.6)
X i - 2
Z is a percentage of the mean derivative value. This value is determined by the
individual data set being used and can be modified by the user of Nexus is an optional
parameter. The results of the analysis are provided in a log file. At the user’s option, the
model can be optimized further depending on the outcome of the analysis.
As a means of pre-validating the nonlinear performance of the model, a simplified
harmonic balance engine was implemented into Nexus. The harmonic balance engine served
as means of predicting any undesirable behavior of the model once it was implemented into
ADS. As ADS is a proprietary simulator whose source code is not accessible, it is problematic
to
determine
the
source
of simulation
failures
for
nonlinear device
models
after
implementation. Nexus was designed to check model stability by performing a scaled down
80
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version of the simulation process that would occur in the ADS environment. To process the
model with the harmonic balance engine, some simulation parameters were set by the user.
The harmonic balance engine was programmed to simulate one of three branches of the FET
model. Depending on the branch chosen, a particular current equation was specified to the
harmonic balance engine. Linear elements of the diode branch, namely the parasitic
resistances were also specified. Given the set simulation parameters, the harmonic balance
parameters such as the number of time samples, harmonic indexes, and sampling frequency
were determined. The harmonic balance then generated a vector of data samples based on
the sampling frequency and number of desired harmonics. Using the Newton method, the
harmonic balance engine iteratively searched for the port voltage solutions in the model
subcircuit. Upon simulation completion, an external file containing the solution was
generated. In addition, a log file was generated listing the performance metrics of the
harmonic balance simulation.
ADS E x p o r t
P ro c e s s
Nexus’ most attractive feature to microwave system designers and model developers
alike is the automated exportation and implementation of customized models into ADS.
The following is a description of the process by which Nexus exports its models.
Initially, a flag is set to notify the program when all of the nonlinear elements of the model
have been characterized. Each nonlinear element has descriptors associated with it,
namely type and expression. A list of these descriptors is compiled in the export
engine.
The basic frame of the model as pertaining to the ADS user-compiled model structure is
assembled in the associated C source code files.
The linear elements of the model are appended to the source code files.
In succession, the nonlinear model elements are appended to the source code files. Relevant
functions and library calls are also placed in the files in support of any neural network
or table-based elements.
81
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A makefile is constructed with the source code files for the model specified. This makefile is
needed to link with ADS' simulation engine and associated libraries.
Using the descriptors of each model element, an AEL files is generated for the purpose of
linking the ADS graphical interface with the compiled source code.
A script that compiles and links all relevant source code is run thereby producing the final
executable binary.
All of the files generated by Nexus are then transferred to an ADS project directory ready for
simulation.
S um m ary O f M o del D evelo pm ent P rocess
This section specifies in summary the entire process by which models are generated
by Nexus.
Start the program. Opening the program gives the user access to the main graphical interface
through which the model will be configured and processed. A screen shot is
displayed in Figure 5-9.
82
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F ig u re 5-9 - M a in user interface o f Nexus
The first step in producing the model is the importation of data. Using the menu, the user
selects a data file to import. Upon selection of a valid data file, the data is then ready
to be processed.
When the user has selected a proper data file, the option to process the data will be enabled.
Processing the data entails perusing the data file and extracting the various data
entities such as current, charge, and parasitic element values. These entities will be
entered into the program’s memory behind the scenes and used in subsequent steps
in the model development process.
After the data is processed successfully, the user then selects the makeup of the various
model elements. This consists of choosing whether or not the elements are empirical,
table-based, or neural network based. In this iteration of the software, only the
nonlinear elements can be dynamically configured. Linear elements will assume the
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Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
values extracted from the imported data. For each type, there are additional
processing steps that are carried out. For an empirical based element, the Angelov
formulation is used. This implies that a known set of parameters is used in the curvefitting process. Using the graphical interface, an empirical element is selected for
processing. This element is then curve-fitted to the corresponding data entity using
the appropriate Angelov expression. The process of curve fitting is somewhat timeconsuming and may take several minutes. In order to streamline the model
development process, the curve fitting process may take place in the background
while other components may be processed. Additional empirical elements of the
model are then processed in a similar manner. Upon completion of the curve fitting
process, a visual alert is given to the user in the graphical interface. The optimized
coefficient parameters are then saved for later use. For table-based elements, the
imported data corresponding to that element is processed to an external file to be
used later in the post-processing steps. There is no optimization or additional
processing done on a table-based element. Like the empirical element processing
step, a visual alert is given to the user upon completion. For neural network element
processing, the measured data that was imported for that element is converted to a
file compatible with the neural network training engine. In addition, an automation
configuration file is constructed for the neural network training engine. This file is
processed based on the particular element being trained and the neural network
options that the Nexus user has set. Like the empirical based curve fitting process,
the neural network training process will consume some time and therefore is
designed to run in the background. The training process will produce weight files that
are used in the ADS environment and the post-processing phase of Nexus.
Depending on the options set, log file of the training process may also be generated.
Upon completion of training, the user is notified via the graphical interface.
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After all of the nonlinear model elements have been processed, the model is complete and
ready for exportation into ADS. At that point however, it is desirable to test and
validate the model before exporting it into ADS.
In post-processing, allow user to input simulation parameters. Simulate voltage waveform on
a diode branch using harmonic balance. The post-processing engine may also check
to see if the equations used in the model have any discontinuities. Nexus may, at the
user’s option, produce plots of simulation results.
After post-processing, the user may desire modification and regeneration of model. In that
case, model design and post-processing continues until desired results are achieved.
Export model to ADS. Behind the scenes, Nexus gathers all of the necessary element
parameters required for construction of C code. A script compiles the code and
produced an executable binary. This file is then copied to the ADS project directory of
choice and used in ADS simulations. Optionally, Nexus may generate an export log
and integration instructions.
Nexus is a software solution that enables fast and reliable generation of user-defined
nonlinear FET models for use in ADS. The models that it creates can be applied to devices of
varying technologies due to its incorporation of neural network and table-based processing
engines. Traditional empirical FET models can also be produced following the Angelov
formulation via the curve fitting processor built in to Nexus. Pre-validation of the models
composed with Nexus is enabled through the implementation of function checking and
harmonic balance algorithms. Upon user satisfaction, the model is then exported for use in
ADS via automated C code generation and compilation. Subsequent modification of the
model can occur within Nexus enabling fast CAD model development.
D e v e l o p m e n t E n v ir o n m e n t M o d if ic a t io n
Nexus is primarily a model development environment for use within in COMSARE.
COMSARE intends to continue to upgrade and improve the software as the desire arises.
Nexus was developed with this fact in mind. With the environment constructed for this
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purpose, it is desired to add functionality for additional neural network processing engines,
empirical formulations, device model topologies, and post-processing analysis routines. All of
these elements can be added to the environment as a whole by following specific
procedures. These procedures will be defined by COMSARE in the Nexus development
manual (Davis [2]). The manual was originally written by the author with the intent that
additional developers would contribute to the manual. In Appendix II, a specific case is given
for adding a neural network engine to the Nexus application.
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Chapter 6
APPLICATION OF MODEL DEVELOPMENT SOFTWARE
The use of Nexus was evaluated by developing a model for a real device. A state-ofthe-art semiconductor device was obtained by way of Johns Hopkins Applied Physics
Laboratory. This chapter details the model development of the model for this device using the
Nexus process. Two models were produced, one of the ANNFET model and the other of the
Angelov empirical model. A comparison between the development of the two models is
drawn.
T e s t C a s e : 3 0 0 |im pHEMT M o d e l
As a means of testing Nexus in a real-world environment, a fully developed ANNFET
model of a pHEMT was obtained.
The device, obtained through Johns Hopkins Applied
Physics Laboratory, was named AP1514 and fabricated by Triquint foundry. An additional
model of the pHEMT was developed using traditional empirical techniques. The purpose for
generating two models was to compare development times, relative ease of development,
and simulation accuracy.
The development of the ANNFET model for the device was as follows. The first step
taken was the import of the measured data. This data consisted of measured Ids, Igs, Cgd,
Cgs, and Cds. The parasitic elements were extracted using a software extraction tool
provided by COMSARE. Once imported, the topology makeup of the ANNFET models was
selected. Figure 6-1 gives an illustration of the model topology selected for the chosen
device.
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F ig u re 6-1 - Selected topology f o r the A N N F E T m odel o f A P I 514 device
For this model, the Ids, Igs, Cgs, and Cgd elements were selected to be neural
network based. Igd was omitted from the model due to measurement restrictions. The other
elements of the model were lumped linear elements. After the selected elements were
designated as neural network components, they were each individually trained using the
neural network engine. The training process produced weight files that could then be used in
the post-processing stage. In the post-processing stage, the nonlinear elements were
analyzed in terms of their differential continuity. The internal analysis process in Nexus
performed a test on the continuity of the derivatives of each neural network element and
produced a tab-delimited file of the results. These results were later plotted for assessment.
Finally, after the post-processing stage, the model was exported to ADS by generating the C
code needed to incorporate the model into the ADS simulator executable. Additional
supporting files were also automatically produced. These files were copied to the ADS project
thereby making the model simulation ready. The steps followed to develop a model with
Nexus are summarized in Figure 6-2.
D ata
M anagem ent
D a ta
C h a ra c te riz a tion
M o d e l Topology
C o n stru ctio n
M o d e l V a lid a tio n
a n d A n aly sis
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M o d el
E x p o rta tio n a n d
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F ig u re 6-2 - Nexus m odel development process steps
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M o d e l A n a l y s is
The pHEMT model produced by Nexus was simulated in several modes using ADS
to observe its accuracy in reproducing measured results.
S-parameter simulations give the first measure of comparison for a CAD model. Very
good agreement between measured and simulated S-parameters is shown in Figure 6-3 and
Figure 6-4. In addition to S-parameters, the DC IV characteristics were simulated. Again, the
correspondence between measured and simulated performance was well matched. A plot of
the DC IV characteristics is displayed in Figure 6-5.
A P 15 1 4 30 0 GaAs FET - S l l and S 22
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89
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90
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Preceding the integration of the ANNFET model, the differential continuity analysis
was conducted to predetermine any possible problems with the simulation convergence. The
nonlinear elements were processed using Nexus and the resulting metrics were printed to a
file. These results are summarized in Figure 6-6 through Figure 6-9. It should be noted that
for all of the elements the continuity tests showed that there were no discontinuities within the
range tested.
D ifferential C ontinuity A nalysis fo r Ids
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F ig u re 6-6 - D iffe re n tia l C o n tin uity Analysis f o r Ids
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D iffe re n tia l C o n tin u ity A n a ly s is o f Ig s
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D iffe re n tia l C o n tin u ity A n a ly s is o f C g d
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As an additional assessment of validity, the ANNFET model produced for the
AP1514300 device was used by Reece[5] in a class F amplifier design. The simulated results
of the design matched very well with measured performance. The plot of these results is
shown in Figure 6-10.
M e a s u re d vs. M o d e l ti-H a ra m e te rs
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F ig u re 6-10 - Class F a m p lifie r perform ance using the A N N F E T model
93
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C o m p a r is o n O f N e x u s -G e n e r a t e d M o d e l s W
it h
T r a d it io n a l l y G e n e r a t e d
M odels
To assess the validity of models produced by Nexus, a comparison was performed
between the popular Angelov FET model and the ANNFET. Various simulations were
performed on the model produced by Nexus and the traditional empirical Angelov model.
Both models produced similar results and matched the measured data very well. The
advantage of the ANNFET model, though, was the speed at which it was developed. By
implementing the Angelov model, it took several days to curve-fit and implement into the ADS
simulator. With the ANNFET model, produced by Nexus, it took only a few hours to train and
seconds to implement. Figure 6-11 illustrates a comparison of the approximate development
times for the ANNFET model given the approach using Nexus and the traditional approach.
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F ig u re 6-11 - Com parison o f developm ent times f o r Nexus a n d tra d itio n a l approaches
94
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An additional advantage to the Nexus approach to development of CAD device
models is the reinvestment of time to modify or update the model. Traditionally, the expert at
model implementation needs to work in conjunction with the user of the model to program
any desired changes to the model. In a typical design cycle, this could iterate several times
resulting in inefficiency and increased chances for error. Nexus, given that it produces the
necessary code automatically, allows model users to make changes independent of the
implementation engineer. In addition, there is no introduction of human error on the part of
reprogramming the model code.
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Chapter 7
CONCLUSION
S ummary
This dissertation has presented the development and application of software
designed to aid in the development of computer-aided design semiconductor device models.
The software, named Nexus, is an integration of three components, each being a major part
to the model development process. The framework by which Nexus was designed was based
on previous work done by COMSARE in the area of device modeling. By incorporating a
charge-controlled data acquisition process, more accurate characterization of model
elements was achieved. Nexus allows the user to develop models having an equivalent
circuit made up of elements that were empirical, table-based, neural network based or a
hybrid combination of the three. The novelty of the software include its incorporation of a
newly-adopted data acquisition process, incorporation of a new neural network processing
engine, hybrid element model topologies, pre-implementation model validation and the
automatic integration of models into the ADS simulator. It was shown that by seamlessly
integrating the model development systems, the process by which a CAD model is developed
for a circuit simulator is more accessible to microwave designers. In addition, the inclusion of
model verification tools allows the model developer to have more confidence in the resulting
model with respect to its behavior in a circuit simulator.
The construction of the device modeling environment also lends itself to future
research endeavors for COMSARE. By developing the system in a modular fashion, more
efficient means of updating and improving the software was achieved. Nexus provides
significant reduction in model development time and adds to the COMSARE training
effectiveness by reducing the prerequisite coursework required to undertake modeling
research within COMSARE.
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Im p r o v e m e n t s A nd F u t u r e W o r k
This dissertation presented a first run design of software that will be heavily used
within COMSARE. It was designed with specific application in mind. In order to make it
applicable for a wide-range of device models, there are several improvements that shall be
made to the software.
The type of neural network used for this version of Nexus was a knowledge-based
neural network specifically applied to the Angelov equations for a HEMT device. It would
greatly expand the capabilities of Nexus if other neural network types were embedded into
the software. Knowledge-based neural networks are well suited for some data, such as FET
drain current while other types of neural networks may be better suited for other data. In
addition, by tying down the use of the knowledge-based neural network to the Angelov
equations, the model developer is limited in the type of data that can be processed by the
neural network engine. Inclusion of the ability of the Nexus user to custom-define the
knowledge equations for the knowledge-based neural network is also an added feature that
will increase the software’s usefulness.
The model topologies implemented into Nexus for this work only include that of
HEMT and FET devices. In order to make Nexus capable of developing models for BJTs,
HBTs, and MOSFETs, the circuit topologies for those device structures need to be
implemented. Also of benefit to the user, Nexus could allow the model developer to derive his
own model topology, independent of microwave design community standards, thereby
allowing greater flexibility in model development.
The harmonic balance engine used for this work was a very simplified application of
the harmonic balance technique. Further development of the harmonic balance engine would
add to the post-processing abilities of Nexus. Specifically, allowing for the simulation of the
entire equivalent circuit model as opposed to the diode branches would further illustrate the
models’ developed by Nexus nonlinear attributes.
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This iteration of Nexus was designed to be used on the PC platform. To increase the
client base of the software, a graphical user interface can be designed for use in the Unix
environment. The internal processes of the model development would largely remain the
same.
Lastly, the data with which Nexus had to work with was from a specific source. This
source was made readily available through COMSARE resources. To expand upon the data
handling capabilities, the Nexus environment can be upgraded to cater to a wider range of
measurement sources.
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B. Davis, Nexus Software Development Manual, COMSARE, Morgan State University,
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Gonzalez, G., Microwave Transistor Amplifiers: Analysis and Design, Prentice-Hall,
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[28]
Zhang, Q. and Gupta, K. Neural Networks for Microwave and RF Design Application,
Artech House, 2000.
[29]
Rodrigues, Paulo Jose Cunha. Computer Aided Analysis o f Nonlinear Microwave
Circuits. Norwood: Artech House, 1998.
[30]
Kreysig, E. Advanced Engineering Mathematics. Wiley and Sons, 1993.
[31]
Yang, Daoqi. C++ and Object-Oriented Numeric Computing for Scientists and
Engineers. New York: Springer-Verlag, 2001.
100
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[32]
Barton, John J. and Lee R. Nackman. Scientific and Engineering C++: An Introduction
with Advanced Techniques and Examples. Addison Wesley, 2001.
[33]
Stroustrup, Bjarne. The C++ Programming Language, 3rd Edition. Addison Wesley,
2001 .
[34]
[35]
Vandevoorde, David. C++ Solutions: Companion to The C++ Programming Language,
3rd Edition. Addison-Wesley, 1998.
Horton, Ivor. Beginning Visual C++ 5. Wrox Press, 1997.
[36] — , Beginning C++: The Complete Language. Wrox Press, 2001.
[37] Eckel, Bruce and Chuck Allison. Thinking In C++, Volume 2: Practical Programming,
2nd Edition. Prentice-Hall, 2002.
[38]
Blaszczak, Mike. Professional MFC with Visual C++ 6. Wrox Press, 2000.
[39]
Kruglinski, David. Inside Visual C++, Fourth Edition. Microsoft Press, 1997.
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VITAE
Benjamin Davis
Candidate for the Degree of
Doctor of Engineering
Dissertation:
DEVELOPMENT OF AN INTEGRATED DEVICE MODELING
SYSTEM FOR RF/MICROWAVE CAD APPLICATIONS
Major Field:
Electrical Engineering
Biographical:
Personal Data:
Born in Baltimore, Maryland on October 15, 1973.
Education:
Completed requirements for
Doctor of Engineering, Electrical Engineering
Morgan State University, Baltimore, MD
May 2003.
Master of Engineering, Electrical Engineering
Morgan State University, Baltimore, MD
May 1999.
Bachelor of Science, Electrical Engineering
Morgan State University, Baltimore, MD
May 1997.
Owings Mills High School
Owings Mills, MD
May 1991.
Professional Experience:
Hewlett-Packard, Inc.
EEsof Division
Software Engineer
Santa Rosa, CA
June - August 1999.
Hewlett-Packard, Inc.
EEsof Division
Software Engineer
Santa Rosa, CA
June-December 1998
Hewlett-Packard, Inc.
EEsof Division
Support Engineer
Baltimore, MD
June - August 1997
102
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APPENDIX I
This appendix documents the source code used to develop Nexus. It is catalogued in
six sections. The source code manifest is given below. The actual source code files
pertaining to the environment have been copy written jointly to the author and COMSARE. All
source code used in this dissertation has been archived and stored in COMSARE.
Category_______________File Name________________ Description
Application
ChildFrm.cpp
Application child frame implementation
file
ChildFrm.h
Application child frame declaration file
DlgMatrix.cpp
Application dialog for Matrix engine
options implementation file
DlgMatrix.h
Application dialog for Matrix engine
options declaration file
DlgSim.cpp
Application dialog for simulation options
implementation file
DlgSim.h
Application dialog for simulation options
declaration file
IIOptionsDIg.cpp
Application dialog for II element options
implementation file
IIOptionsDIg.h
Application dialog for II element options
declaration file
IdsOptionsDIg.cpp
Application dialog for IDS element
options implementation file
IdsOptionsDIg.h
Application dialog for IDS element
options declaration file
IfOptionsDIg.cpp
Application dialog for IF element options
implementation file
IfOptionsDIg.h
Application dialog for IF element options
declaration file
IgdOptionsDIg.cpp
Application dialog for IGD element
options implementation file
IgdOptionsDIg.h
Application dialog for IGD element
options declaration file
MainFrm.cpp
Application main frame implementation
file
MainFrm.h
Application main frame declaration file
Nexus.cpp
Main application implementation file
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Category
File Name
Description
Nexus.h
Main application declaration file
NexusDoc.cpp
Application document implementation file
NexusDoc.h
Application document declaration file
NexusFormView.cpp
Application interface implementation file
NexusFormView.h
Application interface declaration file
QdsOptionsDIg.cpp
Application dialog for QDS element
options implementation file
QdsOptionsDIg.h
Application dialog for QDS element
options declaration file
QgsOptionsDIg.cpp
Application dialog for QGS element
options implementation file
QgsOptionsDIg.h
Application dialog for QDS element
options declaration file
QgdOptionsDIg.cpp
Application dialog for QGD element
options implementation file
QgdOptionsDIg.h
Application dialog for QGD element
options declaration file
CmodelData.cpp
Data class implementation file
CModelData.h
Data class definition file
DataExceptions.cpp
Error handling messages for data classes
implementation file
Data Exceptions.h
Error handling message for data classes
declaration file
kbnn_engine.cpp
Processing functions for the Matrix neural
network engine implementation file
kbnn_engine.h
Processing functions for the Matrix neural
network engine declaration file
matrix_nexus.c
Nexus integration functions for the Matrix
neural network engine integration file
matrix_nexus.h
Nexus integration functions for the Matrix
neural network engine declaration file
ads_export.cpp
Classes for the ANNFET and NEXDIODE
export modules implementation file
ads_export.h
Classes for the ANNFET and NEXDIODE
export modules declaration file
continuity.cpp
Functions for the differential continuity
analysis implementation file
Data Managem ent
Data Characterization
Model Construction
Model Analysis
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Category
File Name
Description
continuity.h
Functions for the differential continuity
analysis declaration file
ddcmath.h
Math support functions for the FFT
engine
Fftmisc.c
Math support functions for the FFT
engine
fourier.c
Main processing functions for the FFT
engine
hb.cpp
Main function for the harmonic balance
engine implementation file
hb.h
Main functions for the harmonic balance
engine declaration file
hb_math.cpp
Support functions for the harmonic
balance engine implementation file
hb math.h
Support functions for the harmonic
balance engine declaration file
ads_export.cpp
ADS export classes for the ANNFET and
NEXDIODE models implementation file
ads_export.h
ADS export functions and classes for the
ANNFET and NEXDIODE models
declaration file
ads_export_T.cpp
ADS export functions for the ANNFET
and NEXDIODE models implementation
file
comsareads.c
Support functions for ADS user-defined
models implementation file
comsare_ads.h
Support functions for ADS user-defined
models implementation file
matrix_ads.c
ADS integration functions for the Matrix
neural network engine implementation file
matrix ads.h
ADS integration functions for the Matrix
neural network engine declaration file
Model Exportation
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APPENDIX II
This appendix is presented as an instructional guide to the integration and
implementation of additional neural network processing routines in Nexus. It is understood
that the developer of such an engine is familiar with C++ programming procedures and has a
working knowledge
ofMicrosoftFoundation
Classes (MFC). Additionally,
Nexuswas
developed in C++ butit is possible to include a routine designed in C. Itis assumed
the
developer knows how to integrate C code into C++ code.
To add a neural network engine to Nexus, existing files must be modified. Table 7-1
lists these files.
Table 7-1- Nexus file s su p p o rtin g n e u ra l netw ork engine
Category__________________________________File(s)_________________________________
Interface
NexusFormView.cpp
NexusFormView.h
Model Analysis
continuity.cpp
continuity.h
Model Exportation
ads_export_T.cpp
There will be additional files created by the engine developer that will be newly
created and compiled with the Nexus application code. There is no restriction on the number
of The developmental processes illustrated within this appendix will assist a developer in
implementing a neural network engine so that it can support Nexus and ADS models. The
fictitious neural network engine used in this example is called NeuroNex. The details of how
NeuroNex operates are not important to this example. The developer may design the neural
network engine according to his or her needs.
The process of integrating a new neural network engine into Nexus involves six major
steps. Integrating the neural network engine with Nexus includes the integration with ADS or
the desired end user design environment. For this example, integration with ADS is
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demonstrated but any simulator with the capability of instituting user-defined models through
C code can be used. Each step is explained in subsequent sections.
D e v e l o p in g
the
E n g in e
To develop a neural network engine for use in Nexus and ADS, the software should
be designed from the aspect of integration to begin with. NeuroNex is fictitiously a
knowledge-based neural network engine that can generate a neural network architecture
dynamically based on a configuration file that is initialized at the start up of the engine. For
easiest integration capability, NeuroNex should be programmed with two main files. The
implementation file and the declaration file are the two components and should be named
neuronex.cpp and neuronex.h, respectively. In the declaration file, prototypes for classes,
functions, and class members are specified. There should be no global variables since the
source will be included in several translation units, all of which will be compiled into a single
executable in the end.
To facilitate the use of the engine functions by both Nexus and ADS, there should be
separate functions for training and feed-forward processing. There can be any arguments to
these functions as desired by the developer but it these arguments must be available to the
ADS and Nexus environments. The feed forward function will be utilized in both the Nexus
and ADS environments. The training function will be utilized in the Nexus environment. For
the ADS environment, typically the inputs to the feed forward function will be node voltages.
In the Nexus environment, the input to the training function will be a configuration file. This
excerpt of code gives an example of the modularization of the NeuroNex engine code.
This excerpt gives an example of the declaration file of NeuroNex. Here only the
basic functions of setup, feed forward, and train are showed. Of course, any additional
supporting functions that are a part of the engine may be included in these files so long as
they observe the partition scheme of declaration/implementation set forth by the Nexus
environment.
// NeuroNex engine
// neuro n e x .h
// This file is the declaration code for the NeuroNex engine
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...include statements
// Function prototypes
int neuronexSetup () ;
int neuronexTrain(char* configFile);
int neuronexFeedForward(double *input, double *output,
weightFile) ;
char*
This excerpt gives an example of the implementation file of NeuroNex. Here, no
actual code is supplied for the functions. The excerpt simply illustrates the layout of the
implementation file for the NeuroNex engine.
// NeuroNex engine
// neuronex.cpp
// This file is the implementation code for the NeuroNex
engine
// include declaration file
#include "neuronex.h"
int neuroNexSetup()
{
// insert code for the initialization of the NeuroNex
engine
// return an integer indicating success of setup
return 1;
}
int neuronexTrain(char* configFile)
{
//
insert code for the training process of
NeuroNex
//
return an integer indicating success of training
// 0 indicates failure, other integer indicates success
return 1;
}
int neuronexFeedForward(double* input,
weightFile)
double* output,
char*
{
//
insert code for the training process of
NeuroNex
//
return an integer indicating success of training
// 0 indicates failure, other integer indicates success
return 1;
}
It is completely up to the developer of the engine as to how things are set up and
carried out. The main issue is the return value of the feed forward and training functions. By
convention, the Nexus environment assumes a return value of 0 to mean failure or error. A
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positive integer returned indicates a successful completion of the function. In order not to
confuse things, negative integers should not be used as a return value for either of these
functions. These functions will be called in subsequent sections of the Nexus environment so
it is crucial that they follow the given guidelines for the easiest integration possible.
M o d if y in g
the
In t e r f a c e
Including NeuroNex into Nexus’ environment means making it accessible to the users
of Nexus. To do so, several hooks must be placed into the graphical interface. Unlike the
development of the engine itself, this step cannot be done independent of the Nexus
environment code. Knowledge of Microsoft Visual Studio and Microsoft Foundation Classes
is needed to understand how to modify the code accordingly. Possible references for learning
these concepts are Horton [35], Blaszczak [38], and Kruglinski [39], There are countless
other references on learning how to use MS Visual Studio on the Internet, in bookstores and
directly from Microsoft but these references were used by the author of this dissertation.
The
primary file
that
links
all
of the
components
of
Nexus
together
is
NexusFormView.cpp. This is the file that contains all of the code that reacts to the user
actions performed from the graphical interface.
The first thing to modify in NexusFormView.cpp is the preprocessor inclusion of the
declaration file of the engine. For NeuroNex, neuronex.h is included. Any other supporting
header files that are needed by the engine should also be included here.
Next the linking of the engine’s training and feed forward functions have to be
established with the pre-processing and post-processing functions. In its existing state, the
pre-processing function is solely the training function and the post-processing function is the
differential continuity function.
I n t e g r a t in g
w it h
N e x u s P r e -P r o c e s s o r
The primary function of NeuroNex is to train data and produce weight files to be used
in ADS models. Given that NeuroNex was programmed to be called as a function during
training mode, and that the setup of the neural network architecture was specified by an
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external configuration file, all that is needed to invoke the engine is the creation of that
configuration file.
This exceprt is an example of how to link the NeuroNex engine to the pre-processing
button on the Nexus interface. It is from the class function OnButtonClickedPreProcess().
What it does is determine from preset variables the parameters that need to go in the
configuration file and writes them to that file. Then the engine is called with the configuration
file as its argument. The engine is called as a separate thread so that it may run in the
background. The configuration file demonstrated here is identical to that of the Matrix engine.
The particular scheme for the configuration file is dependent on the developer of the engine.
switch(processElement)
{
// Determine what to do
case I D S :
(curve fit, train)
{
// include code to perform steps for an
empirical process
}
else i f (nexusFETModel.m_Ids.m_Style ==
NEURALNET)
{
AfxMessageBox("IDS will be trained
with NeuroNex.");
// Start
m_Status += "Training IDS d a t a .....
UpdateData(FALSE);
// Generate configuration file
ofstream kbnnUI;
string kbnnConf;
k b nnUI.o p e n ("NeuroNexUI_IDS.t xt",
ios::trunc
| ioS::OUt);
kbnnConf = "TRAIN \n \
1 - Network will be trained to Ids curves (Angelov)\n \
No - Do NOT generate a Neural Network Learning Curve plot in
MATLAB\n \
1 - Use coefficient values in weight file\n \
1.70000e + 0 0 0 , -7 .09000e-001, 1.03800e+000, 6 .00000e-001, 1.20000e-001,
3.79400e+000, -8.50000e-002\n \
1.0e-12\n \
*\n \
2 INPUT layer neurodes\n \
2 KNOWLEDGE layer neurodes\n \
1 BOUNDARY layer neurodes\n \
1 OUTPUT layer neurodes\n \
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No ICCAP Conversion\n \
nexus_IDS.dat\n \
nexus_IDS.dat\n \
Ids Drain_Current";
kbnnUI << kbnnConf;
// Process
k b n n U I .c l o s e () ;
AfxBeginThread(ProcKBNN, pVoidParam,
THREAD_PRIORITY_LOWEST);
/ / i f (!neuronexTrain("NeuroNexUI_IDS.t xt"))
//
AfxMessageBox("Couldn't train
I D S .");
// Save results to file
m_Status += "DONE.\n";
UpdateData(FALSE);
}
This example illustrates how to link NeuroNex training process to the Nexus pre­
processing button. It only processes one element of the model topology, however. This code
must be repeated for every element of the model that can possibly be trained with the neural
network engine.
If there are any parameters that need to be passed to the engine and can be set by
the Nexus user, they may be implemented as global variables in the NexusFormView.cpp file.
I n t e g r a t in g
w it h
N e x u s P o s t -P r o c e s s o r
Optionally, NeuroNex can be used in the post-processing functions of Nexus to
predetermine the models’ simulation performance. Although it is optional, integration with
post-processing functions should be included with the addition of a newly added neural
network engine.
In Nexus, there exists a differential continuity function that processes every nonlinear
element of the ANNFET model. To link this process to NeuroNex, a function pointer must be
declared
In the hook that was created in the interface, the differential continuity function will be
called using this function pointer. The excerpt presented illustrates how this is done.
// inside OnButtonClickedPostProcess ()
... other code
// functioin pointer to NeuroNex's feed forward function
v o i d (*pKbnnF)(double *input, double *output, char* filename);
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pKbnnF = feed_forward;
m_Status += "\nProcessing IDS.
contRating = contCheck(pKbnnF,
nexusModelData.m_Ids, filename);
m_Status += "DONE.\n" ;
...other code
//end of OnButtonClickedPostProcess ()
Note that the function pointer is passed to the differential contiuity function. The
differential continuity function can and should be overloaded to accommodate different
functions. If the NeuroNex feed forward function differs in argument listing from existing
function declarations, then a new one should be created. Inside of the differential continuity
function, the function pointer is called directly in its calculations. The following is an excerpt
from the continuity.cpp file showing the use of the NeuroNex feed forward function.
#include "neuronex.h"
... other code
double contCheck(void(*pKbnnF)(double *input, double *output,
char* filename), CDataArray importData, char* weightFile)
{
pKbnnF = feed_forward;
// Using NeuroNex engine
... other code
// call to feed forward during calculation routine
p K b n n F (input, output, weightFile);
... other code
}
// end of con t C h e c k()
For the use of NeuroNex’s feed forward function in other post-processing routines,
the setup should be similar. Define a function pointer and use that pointer as an argument to
the routine’s function.
I n t e g r a t in g
w it h
N ex u s Ex p o r t e r
A major role of the inclusion of NeuroNex is its ADS user defined model functionality.
The export function for each model that will be used with NeuroNex needs to be modified to
incorporate its processing capabilities. Considering the existing ANNFET capability currently
implemented into Nexus, the NeuroNex engine will be illustrated as applied to that model.
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There are four main parts to the Nexus exportation function. One applies to the
device model code, one applies to the device model parameter code, one applies to the ADS
makefile, and one applies to the AEL files. For the inclusion of NeuroNex as the neural
network engine, one may follow the existing exportation function given in ads_export_T.cpp.
This function can be either overloaded or modified to include NeuroNex functionality. For
simplicity, the modification of the function will be demonstrated.
Beginning with the device model code, the first thing to include is the declaration file
for the NeuroNex engine. In the exportation function, every place where there is a need for
the engine, feed forward is called.
#include "neuronex.h"
...other code
if(modelArch.m_Ids.m_Style == NEURALNET)
ADS_model_source
<< "feed_forward(input, output, weighfile) ; "
<< endl
<< endl;
... other code
In the previous excerpt, first the declaration file for the NeuroNex engine was
included in the preprocessing directive. Then in every place where the neural network engine
is needed to calculate a model elements, a call to the feed forward function was placed. This
would primarily occur in the nonlinear, ac, ac_n, and transient functions.
The device model parameter code does not need to be modified explicitly for the
NeuroNex engine. In conformity to the existing scheme however, any element that needs to
be specified as neural network, a weight file will be associated with it and the parameter list
should reflect that. There is no specific file parameter for a particular neural network engine.
The ADS makefile also need to be modified to accommodate the NeuroNex engine
code. Adding the implementation file name to the makefile enables it to be compiled and
linked with the ADS binary. The following lines in the makefile are the only lines that needs to
be modified for this purpose.
# Always need files userindx.c and cui_indx.c\n \
CUI_C_SRCS = userindx.c cui_indx.c \
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comsare_ads.c neuronex.c p p ";
ADS_model_source << fileWrite;
Note where the neuronex.cpp file was inserted into the makefile. Any additional
supporting implementation files pertaining to the NeuroNex engine would also be placed on
this line.
Lastly, the AEL files do not need to be modified specifically for the inclusion of the
NeuroNex engine. Like the device model parameter list, the neural network elements will
have an associated weight file but these parameters are not engine specific. The same
method of including weight file parameters in the AEL code as illustrated in ads_export_T.cpp
can be used for NeuroNex.
I n t e g r a t in g
w it h
ADS
Coinciding with the integration of the neural network engine with Nexus, the engine
must also be integrated with ADS. By developing the engine from the start to have separate
training and feed forward functions, the smooth integration with ADS is ensured. Only the
feed forward and initialization functions are needed by the ADS simulation process. The
declaration and implementation files, in this case, neuronex.cpp and neuronex.h, are to be
compiled with the model code when the simulator executable is built.
S ummary
This appendix demonstrated how to integrate a fictitious neural network engine,
named NeuroNex, into the Nexus application environment. It simply pointed out the
necessary steps for implementing the engine without going into programming detail. It is
required of the developer that knowledge of C++ and Visual C++ fundamentals is obtained
before attempting to modify the application code of Nexus. More explicit detail on integrating
other functionality of the Nexus environment is provided in the COMSARE Nexus
Development Manual (Davis [2]). The process of integrating a neural network engine is
summarized in Table 7-2.
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Table 7-2 - Summary o f neural network engine integration process
Integration Step_____
Tasks_________________________________
Developing the Engine
Design the engine with separate feed forward,
training, and initialization functions.
Program the engine with separate declaration
and implementation files.
Modifying the Interface
Implement hooks into the pre-processing function
button.
Link any engine parameters to the option dialog
boxes.
Implement hooks into the post-processing
function button.
Integrating with Nexus Pre-Processor
Define a function pointer to the engine training
function
Integrating with Nexus Post-Processor
Define a function pointer to the engine feed
forward function
Include as an argument to any post-processing
function, the function pointer to the feed forward
function
Integrating with Nexus Exporter
Add call to initialization function in pre analysis
model code
Add calls to feed forward in nonlinear model code
for each nonlinear element
Add string parameter for each file in model
element list
Add file parameter for each element in AEL code
Integrating with ADS
Compile engine declaration and implementation
files with model code
115
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