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Varactor -based technologies for the tuning and control of microwave circuits and antennas

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UNIVERSITY OF CALIFORNIA
Santa Barbara
Varactor based Technologies for the Tuning and Control
of Microwave Circuits and Antennas
A dissertation submitted in partial satisfaction
o f the requirements for the degree o f
Doctor of Philosophy
in
Electrical and Computer Engineering
by
Amit S. Nagra
T hesis Com m ittee
Professor Robert A. York, Chairperson
Professor N adir Dagli
Professor Umesh K. Mishra
Dr. Michael L. VanBlaricum
March 1999
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UMI Number. 9953924
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T he dissertation o f A m it S. Nagra is approved
.Aw—
w
.
omm ittee Chairperson
M arch 1999
ii
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Copyright by
Amit S. Nagra
1999
iii
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ACKNOWLEDGEMENTS
I would like to start by thanking Professor York for his guidance and
encouragement. He has been very supportive of all my endeavors and at the same time
provided me with freedom to pursue my interests. I am grateful to Professor Dagli, Professor
Mishra and Dr. VanBIaricum for supervising this thesis and for being sources of
encouragement and advice.
The optical control project has benefited from the collaboration with Toyon
Research Corporation of Goleta^ CA. Prashant Ch&varkar o f UCSB played a vital role in this
project by providing the MBE grown material for the monolithic OVC. Prashant Chavarkar,
Primit Parikh and Jeff Yen from Professor Mishra’s research group at UCSB provided help
with the buried oxide isolation scheme. I am grateful to all these people for their
contributions.
The varactor loaded transmission line project has benefited the expertise of Professor
Rodwell and his research group at UCSB. The fabrication techniques used here were
originally developed by Professor Rodwell’s research group during their work on nonlinear
transmission lines. I am grateful to Professor Rodwell and his research group (both current
and past students) for their assistance with this project.
The students from the microwave electronics lab (where I spent a lot of my time)
helped make the work environment extremely stimulating and enjoyable. I would like to
thank Prashant, Rob, Nick, Jane, Paolo, Peter, James, Rama, Gia, Lee, Erich and Vicki for
their cooperation and help. I would also like to acknowledge several friends who have made
my stay in Santa Barbara most pleasurable- Bernard, Melike, Eric, Jon, Laura, Lance, Julie,
Jeff, Jim, Don, Lori, Gia, Jason, Peter and Adrian.
Finally I would like to acknowledge my parents, Jagbir and Veri Nagra, for their
love and support throughout this endeavor. Their faith in me has been most reassuring and I
hope I have done them proud. I am also grateful to my uncle and aunt, Shivi and Haijit Deol,
of Bakersfield, CA for providing me with a home away from home.
iv
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VITA
October 16,1972
Bom in Ferozepur, India
May 1994
Bachelor o f Engineering,
Electronics and Communication Engineering,
Regional Engineering College, Tiruchirapalli, India
September 1994
Teaching Assistant,
Department o f Electrical and Com puter Engineering,
University o f California, Santa Barbara
April 1996
Graduate Student Researcher,
Department o f Electrical and Com puter Engineering,
University o f California, Santa Barbara
June 1997
M aster of Science,
Electrical Engineering,
University o f California, Santa Barbara
March 1999
Doctor o f Philosophy,
Electrical Engineering,
University o f California, Santa Barbara
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PUBLICATIONS
Journal Publications
1. E. S. Shapiro, J. Xu, A. S. Nagra, F. Williams, Jr., U. K. Mishra, and R. A. York, “A
high-efficiency traveling-wave power amplifier topology using improved powercombining techniques,” IEEE Microwave and Guided Wave Letters, vol. 8, pp. 133-5,
March. 1998.
2. A. S. Nagra and R. A. York, “FDTD analysis o f wave propagation in nonlinear
absorbing and gain media,” IEEE Transactions on Antennas and Propagation, vol. 46,
pp. 334-40, March. 1998.
3. A. S. Nagra, J. Xu, E. Erker, and R. A. York, “Monolithic GaAs phase shifter with low
insertion loss and continuous 0-360 degree phase shift at 20 GHz,” IEEE Microwave and
Guided Wave Letters, January. 1999.
4. A. S. Nagra and R. A. York, “Distributed analog phase shifters with low insertion loss,”
IEEE Transactions on Microwave Theory and Techniques, accepted for publication,
October 1998.
5. A. S. Nagra, O. Jerphagnon, P. Charvarkar, M. VanBlaricum, and R. A. York, “Indirect
control of microwave circuits using low optical powers,” IEEE Transactions on
Microwave Theory and Techniques, accepted for publication, February 1999.
6. R. A. York, A. Borgioli, A. S. Nagra, M. VanBlaricum, “ Reactively controlled
travelling-wave antenna arrays,” IEEE Transactions on Antennas and Propagation,
submitted for publication, January. 1999.
Conference Publications
1. A. S. Nagra, P. Chavarkar, C. J. Swann, T. Larry, M. L. VanBlaricum, U. K. Mishra, and
R. A. York, “Monolithic optically variable capacitors for tunable microwave antennas,”
in Proceedings. IEEE/Cornell Conference on Advanced Concepts in High Speed
Semiconductor Devices and Circuits, Ithaca, NY, USA, 1997, pp. 69-78.
2. A. S. Nagra, M. L. VanBlaricum, and R. A. York, “Low-Power Indirect Optical
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Reactance Control using Monolithic GaAs OVC Technology,” in DARPA Photonic
Systems fo r Antenna Applications Conference, 1998.
3. T. L. Larry, A. S. Nagra, M. L. Van Blaricum, and R. A. York, “Photonic
reconfiguration of Antennas using Reactive Control,” in Antenna Applications
Symposium, Allerton Park, Monticello, Illinois, 1998.
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ABSTRACT
Varactor based Technologies for the Tuning and Control o f Microwave
Circuits and Antennas
by
Amit S. Nagra
A monolithic optically variable capacitor (OVQ technology has been developed for
the bias free optical control of microwave circuits and antennas. The components of the
monolithic OVC, which include a Schottky varactor diode, 10-cell photovoltaic array and
passive microwave structures, have been simultaneously fabricated and integrated on the
same wafer. The monolithic OVC has been incorporated as the tuning/control element in
band-reject filters, X-band analog phase shifters and folded slot antennas. Bias free control
of these circuits/antennas has been demonstrated at microwave frequencies using less than
500 (iW of optical power. This is the lowest reported optical power requirement for the bias
free control o f microwave circuits/antennas.
Encouraged by the performance of the optically controlled phase shifters, which
utilized the varactor loaded transmission line topology, it was decided to use varactor loaded
transmission lines to implement electronically controlled analog phase shifters. An optimum
design for analog phase shifters with the lowest possible insertion loss for a given varactor
and transmission line technology was developed. As a result of these efforts, an
electronically controlled 0-360° phase shifter with only 4.2 dB of loss at 20 GHz was
demonstrated. This is best reported performance for electronically controlled analog phase
shifters operating in the K-band.
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Contents
1. Thesis Outline
1
2. Introduction to optical control o f microwave circuits and
antennas using the optically variable capacitor (OVC)
3
2.1 Motivation for optical control ..........................................................................3
2.2 Comparison of optical control methods .......................................................... 6
2.3 Introduction to the Optically Variable Capacitor (O V C )................................. 13
2.4 Monolithic integrated O V C ...............................................................................15
3. Varactor diodes and photovoltaic arrays for the monolithic GaAs
OVC
19
3.1 Choice of material system .................................................................................19
3.2 Design o f planar GaAs varactor diodes............................................................ 20
3.3 Fabrication and testing of Schottky varactor diodes ........................................ 25
3.4 Design of GaAs photovoltaic detectors............................................................ 32
3.5 Isolation and layout considerations .................................................................. 41
3.6 Fabrication of planar GaAs PV cells and arrays............................................... 44
3.7 Characterization of single large area GaAs PV cells........................................47
3.8 Characterization of 10-cell GaAs PV arrays .................................................... 54
3.9 Effect of DC loads on the performance of 10-cell arrays.................................59
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4. Demonstration o f the monolithic OVC in microwave circuits and
antennas
64
4.1 Monolithic integration of the OVC components...............................................64
4.2 Microwave characterization o f the monolithic OVC ....................................... 69
4.3 Optically tunable band-reject filter....................................................................72
4.4 Optical control o f a X-band analog phase shifter............................................. 75
4.5 Optical impedance tuning of a folded slot antenna...........................................82
4.6 Transient response of the O V C .........................................................................83
5. Varactor loaded transmission lines as low loss analog phase
shifters
89
5.1 Basic principle and design equations ................................................................90
5.2 Optimization of the design for low loss ........................................................... 95
5.3 Circuit Fabrication.............................................................................................. 99
5.4 DC and RF characterization............................................................................ 102
5.5 Analysis and modeling of results .................................................................... 105
5.6 Phase shifter with multiple frequency operation capability ............................109
6. Summary and future work
114
6.1 Monolithic O V C effort.....................................................................................114
6.2 Varactor loaded transmission line effort ....................................................... 115
x
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Chapter 1
Thesis Outline
This thesis is concerned with the development of tuning and control technologies for
microwave circuits and antennas using varactor diodes. The work presented here focuses on
two schemes for varactor based control of microwave circuits/antennas- 1) indirect optical
control using the optically variable capacitor 2) electronic control using varactor loaded
transmission lines. The optically variable capacitor (OVC), which is used for the bias fine
optical control of microwave circuits and antennas, is beneficial for applications such as
remote control of microwave circuits/antennas and optically reconfigurable antenna arrays.
A monolithic OVC technology, suitable for the applications mentioned above, has been
developed and successfully demonstrated at microwave frequencies. The monolithic OVC
effort is described in chapter 2 through chapter 4 of this thesis. One of the circuits used to
demonstrate the effectiveness of the monolithic OVC technology was an analog phase shifter
based on the varactor loaded transmission line topology. The superior performance of this
phase shifter motivated the work in chapter 5 on optimizing the performance of varactor
loaded lines for electronic control of microwave circuits. A brief outline of the contents and
organization of each chapter is presented here to serve as a guide for reading this thesis.
The advantages of using optical signals for the control of microwave circuits and
antennas are presented in chapter 2. Microwave circuit and antenna applications that benefit
from the use of optical control are listed. A brief survey of the available optical control
schemes is presented and the relative merits/demerits of the various schemes are discussed.
The basic principle o f operation of the OVC is introduced and reasons for using the
monolithic OVC in optically controlled circuits/antennas are presented.
The motivation behind the fabrication o f the monolithic OVC on GaAs is presented
in chapter 3. This is followed by details regarding the design of high-Q planar Schottky
varactor diodes and high efficiency PV arrays on the same GaAs wafer. The challenges
involved in integrating the epitaxial layer structures of the two devices and developing a
1
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compatible fabrication sequence are discussed. Schottky diodes with a Q-factor o f 40 at 10
GHz, and PV arrays with output voltages of 10.5 V and. conversion efficiencies as high as
26.8% have been demonstrated on the same GaAs wafer, and the detailed results are
presented here.
In Chapter 4, the feasibility of the monolithic OVC technology for low power, biasfree control of microwave circuits and antennas is demonstrated. Measured and simulated
microwave performance o f the monolithic OVC is presented. Bias free control of band-reject
filters, X-band analog phase shifters and folded slot antennas, using less than 500 p.W of
optical power, is demonstrated. Also, the transient response of the OVC is characterized and
it is shown that the OVC response times can be made faster than 1 (is.
Chapter 5 demonstrates the potential of varactor loaded transmission lines for
microwave control applications such as phase shifters. Design equations for analog phase
shifters based on varactor loaded transmission lines are presented here. Losses in the phase
shifter circuit are analyzed in detail and an optimum design that has minimum insertion loss
is developed. As a result of these efforts, a K-band analog phase shifter with the lowest
reported insertion loss was demonstrated at UCSB. The optimized phase-shifter circuit
described here is capable of producing a continuously variable 0-360° phase shift at 20 GHz
with a maximum insertion loss of 4.2 dB and return loss lower than —12 dB over all phase
states. Chapter 5 concludes with a discussion on strategies to further improve the
performance of the analog phase shifter.
2
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Chapter 2
Introduction to Optical Control of Microwave
Circuits and Antennas using the Optically
Variable Capacitor (OVC)
The motivation for using optical signals for the control of microwave circuits and
antennas is presented in this chapter. Microwave circuit and antenna applications that benefit
from the use o f optical control are listed. A brief survey of currently used optical control
schemes is presented and the relative merits/demerits of the various schemes are discussed.
This is followed by an introduction to the Optically Variable Capacitor (OVC), which has
been employed by us for the optical control of microwave circuits and antennas. The basic
principle of operation o f the OVC, as well as the reasons for choosing the OVC for
implementing optical control, are presented here.
2.1 Motivation for optical control
Optical control of microwave circuits and antennas is attractive for several reasons.
One of the major advantages of optical control is that the control signal can be transmitted
over optical fibers, as opposed to electronic control, where metallic wires/cables are
required. Since optical fibers have low losses, they are suitable for the distribution of control
signals over long distances, as is the case in large phased arrays and in remotely controlled
antennas/circuits. Also, optical fibers are light (1/10 the weight of copper wire), compact,
and flexible making them desirable for airborne and space applications where volume and
weight savings are crucial. The wide bandwidth of optical fibers, along with the high-speed
modulation capabilities of laser diodes/LEDs, makes optical control attractive for
applications where high-speed control is required. Incidentally, due to the advantages
discussed above, optical links are also being deployed in antenna feed networks for the
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distribution of the microwave signals. Thus the same fiber link can be used for the
simultaneous distribution o f the microwave signal (high frequency signal to be radiated) and
the control signal (slower signal for controlling component performance).
The unidirectional nature of the optical to electrical conversion process provides
extremely high isolation between the control circuit and the microwave circuit/antenna being
controlled. This is especially important in high power applications where leakage through the
control circuit can cause interference between the various components. The immunity of
optical fibers to EMI (electromagnetic interference) makes optical control attractive for
military applications. Also, optical fibers are virtually transparent to microwave signals since
they are made of low permittivity dielectrics. This non-invasive nature of optical control
makes it desirable in antenna applications where metallic wires/cables are undesirable
because they perturb antenna radiation patterns.
Several microwave control applications benefit from using optical control. High
speed switching and gating o f microwave signals using photoconducdve switches was
amongst the first demonstrations [1] of optical control and considerable progress has been
made in this field since then [2-4]. In addition to fast transient response, these optically
controlled switches have the advantage of high power handling capability and picosecond
timing precision. Another area where optical control has made significant impact is in the
control of remotely located antennas or large phased arrays, where the control signal has to
be sent over long distances. Optical control of the various components commonly employed
in antenna T/R modules such as attenuators [S, 6], amplifiers [7-9], tunable filters [10],
switches [4, 11, 12], and phase shifters [S, 11, 13, 14] has been demonstrated. Significant
contributions have also been made in optical control of oscillator circuits. Optical tuning of
oscillation frequency [7, 15, 16], optical injection locking [7, 16] and optical control of
oscillator phase [17, 18] have been demonstrated. Optical injection locking and phase control
is attractive for large active antenna arrays used in power combining and beam steering
applications.
Another application where optical control has made major contributions is in
reconfigurable antennas. There are two types of optically reconfigurable antennasa) photoconducdve antennas and b) synaptic antennas. Photoconducdve antennas consist of
selectively illuminated regions on a high resistivity semiconductor substrate.
4
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▼I
A u
Photoconducdve
Antenna
Illumination
Opening in Mask
(a)
Optically Controlled
Synaptic Element
Optical
Fiber
Conducting
Branches
(b)
Figure 2.1: Schematic showing layout of a) Photoconducdve antenna b) Optically
reconfigurable synaptic antenna.
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A photoconductive bowtie antenna is depicted in fig. (2.1a). The illuminated regions, which
are quasi-metallic in nature due to the high density of optically generated carriers, act as the
radiating/receiving surfaces. By changing the mask pattern, photoconductive antennas of
different shapes and having different properties can be optically generated. The disadvantage
of this technique is that large optical powers (up to SO W) are typically required for
generating high carrier densities over the antenna surface. The other technique for
implementing reconfigurable antennas is to have a grid of radiating sections interconnected
by optically controlled synaptic elements (switches/reactive elements) as depicted in fig.
(2.1b). By turning the switches on/off or by adjusting the reactive loading, the current path or
the current amplitude/phase can be varied, thereby resulting in impedance tuning, beam/null
steering and multi-frequency operation. Synaptic antennas are less versatile than
photoconductive antennas since the underlying grid limits the possible antenna current
distributions/shapes. However the synaptic approach requires much lower optical power
since only a discrete number of elements are being controlled, as opposed to the illumination
of large surfaces in the photoconducting antenna case. Note that since metallic control wires
interfere with antenna radiation patterns, conventional electronic control of the synaptic
elements is not feasible and hence optical control is required. Moreover, the optical control
scheme used within the synaptic elements must not require DC bias (since bias supply to the
elements would require the use of metal bias wires).
2.2 Comparison of optical control methods
Several different methods are being used for the optical control of microwave
circuits and antennas. They can be broadly classified as direct and indirect control schemes.
Direct optical control involves the illumination of the device being controlled. Here the same
device performs both the optical and the microwave functions. Some direct optical control
schemes rely on the illumination of bulk semiconductor substrates while others involve the
illumination of semiconductor junction devices like PIN diodes, FETs and Bipolar
transistors. Indirect optical control involves the illumination of a dedicated optical detector
that converts the optical control signal into a suitable electrical form, and controls the
performance of a microwave device. Thus the optical and microwave functions are separated
6
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and performed by different devices. Depending on the photodetector bias conditions, indirect
control schemes may be classified as photovoltaic control and control using biased detectors.
Fig. (2.2) depicts the various optical control methods and how they are classified. The
relative merits/demerits of these schemes are discussed in detail below.
Optical Control of Microwave Components
Direct Control
Bulk
Semiconductor
Indirect Control
Junction
Devices
Photovoltaic
Detectors
Biased
Detectors
Figure 2.2: Classification table of the various optical control schemes
a) Direct control using bulk semiconductor
This is the simplest of all optical control schemes and is also known as
photoconductive control. It relies on the change in conductivity o f semiconductor layers due
to the photogeneration of carriers. For strong illumination intensities, the carrier density in
the illuminated regions can be very high [1] and these regions then behave like degenerate
plasmas with quasi-metallic properties. Fig. (2.3) illustrates a shunt CPW photoconductive
switch fabricated on a bulk semiconductor substrate like high resistivity silicon/semiinsulating GaAs. In the absence of light, the microwave signal gets transmitted through the
CPW structure with extremely small loss. However when the CPW gaps are illuminated, the
photogenerated plasma creates an effective short circuit between the center conductor and
ground causing most of the incident microwave signal to be reflected. Photoconductive
conductive switches with up to 45 dB On/Off ratio have been demonstrated [4] but the
optical power requirements are high (>100mW). hr some applications like photoconductive
7
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antennas, where relatively large areas need to be illuminated, the optical power requirements
can be as high as 50 W.
Good performance o f photoconductive devices relies on high carrier density, which
is determined by illumination intensity and bulk carrier lifetimes in the substrate. Substrates
with long carrier lifetimes, such as high resistivity silicon ( t >l(is), require considerably
lower optical power than substrates like GaAs (z ~I-5 ns) with short carrier lifetimes, but
this decrease in power requirement conies at the cost of slower switching speeds. Thus there
is a trade-off between optical power requirements and switching speed [4]. Note that
photoconductive devices do not require any external DC bias. DC bias may be optionally
used to sweep out the photogenerated carriers and increase the switching speed.
Illum ination
Figure 2.3: Shunt CPW photoconductive switch
b) Direct control of junction devices
The effects of optical illumination on the DC and microwave performance of
semiconductor junction devices have been extensively studied. Optical control o f both two
terminal devices like Gunn diodes, IMPATT diodes, PIN diodes [5, 16, 19, 20] and three
terminal devices such as MESFETs, HEMTs and HBTs has been demonstrated [7 ,8 , 21].
Since FETs (both MESFETs and HEMTs) are the building blocks of MMICs and are
widely used in microwave control circuits, most attention has been paid to the optical control
of FETs. There are two physical mechanisms [7] responsible for the change in FET
8
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parameters under illumination- the photovoltaic effect (dominant) and the photoconductive
effect (weak). To efficiently utilize the photovoltaic effect, the FET must be biased such that,
in the absence o f illumination, the channel underneath the gate is completely pinched off.
When illuminated, the light induced voltage (photovoltaic effect in the gate Schottky diode)
forward biases the gate and causing the drain current to increase. Under these bias
conditions, the drain current is a strong function of illumination and the FET behaves like an
optically controlled switch/amplifier. Note that in order for the photovoltaic effect to forward
bias the gate, a sufficiently large gate bias resistor must be used. The switching speed is
governed by the time required to charge/discharge the gate capacitance through this gate bias
resistor. The use of smaller resistors in the gate bias circuit can improve the switching speed
the but at the cost of increased optical power to maintain the same switch performance [22].
Optically controlled switches with transient times of 1-10 }is have been demonstrated using
commercial GaAs FETs. The switch transient times can be reduced to about 100 ns by
improved FET design (small gate-source and gate-drain capacitance), more efficient light
coupling, and by using the smallest gate bias resistor that allows adequate photovoltage to
develop.
The photoconductive effect in the FETs is due to the presence of optically generated
carriers in the channel/buffer/substrate that are swept across the gate and collected in the
drain. The photoconductive effect is much smaller in magnitude compared to the
photovoltaic effect (1-3 orders of magnitude smaller depending on bias conditions) but the
speed of response [23] is much higher (50-100 ps). Due to the small change in FET drain
current with illumination, this effect is useless for the optical control of FET switches and
amplifiers. However it has been utilized for optical injection locking and synchronization of
FET oscillators [7, 17].
One of the major drawbacks of direct optical control of FETs is the difficulty of
effectively coupling light into the channel. Inefficient coupling of light into the active region
is the reason why optical power requirements are moderately high (1-10 mW). FETs used in
high frequency applications have s m a l l source-drain spacing
(2 -5
p.m) and the alignment of
light to the source-drain opening is critical. Also, as shown in fig. (2.4a), the gate tends to
block some of the incident light. To avoid gate shadowing, the backside illumination scheme
9
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of fig. (2.4b) has been suggested [71 but the problem of small alignment tolerance still
remains.
Focussing
Optics
Source
mu
Gate
Insulating
Buffer/Substrate
Illumination
Drain
2-5 pm
(a)
Source
Drain
Channel. „ .
Insulating
Buffer/Substrate
Fiber
Illumination
(b)
Figure 2.4: Illumination schemes for direct optical control of FETs.
c) Indirect photovoltaic control
The basic principle of indirect photovoltaic control is illustrated in fig. (2.5). Here a
photovoltaic (PV) array is used to convert the optical control signal into an electrical bias
signal that varies the operating point of the microwave device/circuit. Since the PV array has
no microwave requirements, its structure can be optimized for efficient coupling and
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absorption o f light, thus reducing the optical power required. The indirect optical control of
devices such as FETs [12, 24] and varactor diodes [25] has been successfully demonstrated
using optical powers less than 1 mW. Apart from efficient utilization of optical power,
another major feature of indirect control using PV arrays is that no external bias is required
[12, 24]. This is a distinct advantage for antenna applications where metallic bias wires are
undesirable as they interfere with radiation patterns. The switching speed of the photovoltaic
approach is governed by the time required to charge/discharge the junction capacitance
associated with the PV array. Transient times as small as 10 ns have already been
demonstrated [24] and are sufficiently fast for most microwave applications.
Optical
Control
Input
Bias
Signal
Microwave
Device
Photovoltaic
Array
Figure 2.5: Indirect control using photovoltaic detectors
d) Indirect control using biased detectors
This scheme basically employs an optical link [9, 13] instead of a metal wire to
distribute the control signal. Electronic control information is used to modulate an optical
signal, which is then launched onto an optical fiber. At the receiving end (shown in fig.
(2.6)) a reverse biased photodetector (PIN diode/Schottky detector) is used to detect the
optical signal and extract the electronic control information. The electronic control signal
then goes through gain/level shifting blocks before being applied to the control input of a
microwave circuit/system.
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Note that this technique has subtle differences from the previously described
photovoltaic control technique. Firstly, the photodetector used here is reverse biased for
high-speed operation, as opposed to the photovoltaic scheme where the detector is unbiased.
Also, in the previous scheme, the output from the photovoltaic array is providing bias to the
device being controlled. In this scheme, the device being controlled needs an independent
bias supply and the photodetector output just contains control information. Like in the
photovoltaic control case, since an efficient photodetector is used for the optical to electronic
conversion process, the optical power requirements are low. The speed of this scheme is
basically just limited by the capability of the optical link. Fiber links with data rates of up to
40 Gbits/sec have been demonstrated and these are more than adequate for microwave
control applications.
Bias Supply
Bias Supply
Electrical
Control
Input
Optical
Control
Input
Gain / Level
Shifting
Microwave
Circuit
Reverse Biased
Photodetector
Figure 2.6: Indirect optical control using biased detectors
A brief summary of the underlying physical mechanisms, optical power
requirements, bias requirements and switching speeds o f the various optical control
techniques is presented in table (2.1). It can be seen that the two indirect control schemes
have the best performance in terms of low optical power requirements and switching speed.
This is due to the fact that the optical and microwave functions are performed in separate
devices that can be independently optimized. Of the two indirect control schemes, only
12
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photovoltaic control is suitable for both antenna and circuit applications since it requires no
external bias.
Control
Technique
Mechanism
Optical Power.
Requirements
External
Bias
Response Time
Direct illumination
of bulk
semiconductors
Photoconductive
High
0.1-LOOW
Optional
Limited by carrier
lifetimes in
substrate (ps-ps)
Direct illumination
of junction devices
Photovoltaic
&
Photoconductive
Moderate
L-IO mW
Required
Photovoltaic
(>100 ns)
Photoconductive
(50-100 ps)
Indirect control
using photovoltaic
detectors
Photovoltaic
Low
0.1-1 mW
Not required
Limited by PV
array junction
capacitance
(> 10 ns)
Indirect control
using biased
detectors
Photoconductive
Low
0.1-1 mW
Required
Limited by optical
modulation and
detection speeds
(> 10 ps)
Table 2.1: Summary of properties of the various optical control schemes.
2.3 Introduction to the Optically Variable Capacitor (OVC)
As summarized above, photovoltaic control is the most effective scheme for the
optical control of microwave antennas as well as circuits. Photovoltaic control of FETs for
switching applications has been demonstrated in both hybrid [12] and monolithic form [24].
For applications that require optical control of reactive loads, an Optically Variable
Capacitor (OVC) has been employed [25, 26]. The OVC relies on photovoltaic control of a
Schottky varactor diode and is described in more detail in the following paragraphs.
The Opticajly Variable Capacitor (OVC) essentially consists of a photovoltaic array
and a Schottky diode that are connected as shown in the circuit schematic in fig. (2.7a). The
PV array generates a light dependent output voltage that reverse biases the Schottky diode
13
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and hence determines its depletion capacitance. Thus this arrangement allows the Schottky
diode capacitance to be varied using an optical signal instead o f the conventional electronic
bias signal.
The OVC arrangement shown in fig. (2.7a) has several desirable features. The
Schottky diode employed here is always reverse biased, hence it draws very little DC power
from the bias supply. Since this bias is supplied by the PV array, the optical power
requirements for the OVC are small. The separation of the optical and microwave functions
allows the detector and varactor to be optimized independendy of each other. The varactor
diode is designed such that it is capable o f the desired capacitance swing with the lowest
possible RF insertion loss. The PV array is designed to generate the desired range o f output
voltages with the smallest amount of optical power. Ease of coupling light and efficient
utilization of the incident optical power are the main concerns for the PV array. The RF
blocking resistor shown in fig. (2.7a) is used to prevent the microwave signal from entering
the PV array. This ensures that the optical control components do not affect the microwave
performance of the varactor diode. Hence it is possible to design the OVC such that there are
no RF performance penalties for using optical control. The fixed DC load resistor shown in
fig. (2.7a) serves two purposes-a) it enables better of control PV array output voltage under
weak illumination conditions and b) it serves as discharge path for the PV array and helps
improve the transient response.
The OVC configuration shown in fig. (2.7b) is a slight modification of the simple
configuration discussed above. The main difference here is that the varactor diode is
implemented in the form of two identical back to back Schottky diodes. The PV array is
connected to the common terminal of the two diodes and it can be verified that the array
output voltage reverse biases both diodes by the same amount. The RF blocking resistors and
the fixed DC load resistor have the same functions as their counterparts in fig. (2.7a). The
main benefit of this arrangement is that no DC voltage appears across the microwave
terminals of the OVC. This is important for applications where several devices, each with
independent bias settings, need to be connected in parallel. Also, the connection of
capacitive loads across the microwave terminals does not affect the switching speed in this
configuration.
14
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RF Block
Resistor
so
Microwave
Circuit
>
S >.
«
(a)
RF Block:
Resistor
00
□
e
Varactor
Photovoltaic Array
\
Microwave
Circuit
DC Load
Varactor
ww
RFBIock
Resistor
(b)
Figure 2.7: Circuit schematics for the Optically Variable Capacitor
2.4 Monolithic integrated OVC
A hybrid version of the OVC depicted in fig. (2.7), assembled from commercially
available components, was used to demonstrate [27] optical tuning of a loop antenna at
1GHz. The large size (constrained by size of the PV array) and connection parasitics
associated with the hybrid OVC limited its use to relatively low frequencies. For optical
control of high frequency circuits/antennas, a monolithic version of the OVC has been
developed [25, 26]. It integrates a miniature PV array with a varactor diode and bias resistor
15
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on the same chip. In addition to high frequency operation capability, the monolithic OVC
also has superior switching speed compared to the hybrid version due to lower PV array
capacitance.
The design and fabrication of the monolithic OVC posed several interesting
challenges. The material system and the epitaxial layer structure had to be chosen such that
both high frequency varactor diodes as well as efficient PV arrays could be fabricated on the
same wafer. Conventional PV cells are vertical devices (require top and back contacts) with
thick active regions for high conversion efficiency. However, this makes them unsuitable for
monolithic integration, so planar PV cells had to be developed. Additionally, effective
isolation schemes to prevent leakage between the various cells within a PV array were
required. All these issues are addressed in greater detail in the next chapter.
References
[1]
A. M. Johnson and D. H. Auston, “Microwave switching by picosecond photoconductivity,” IEEE
Journal o f Quantum Electronics, vol. LI„ pp. 283-2871975.
[2]
C. H. Lee, “Optical control of semiconductor closing and opening switches,” IEEE Transactions on
Electron Devices, vol. 37, pp. 2426-38, Dec. 1990.
[3]
W. Platte, “Optoelectronic microwave switching,” IEE Proceedings J Optoelectronics, vol. 132, pp.
126-32. April. 1985.
[4]
S. E. Saddow and C. H. Lee, “Optical control o f microwave-integrated circuits using high-speed GaAs
and Si photoconductive switches,” IEEE Transactions on Microwave Theory and Techniques, vol. 43,
pp. 2414-20, Sept. 1995.
[5]
P. J. Stabile, A. Rosen, and P. R. Herczfeld, “Optically controlled lateral PIN diodes and microwave
control circuits,” RCA Review, vol. 47, pp. 443-56, Dec. 1986.
[6]
S. E. Saddow, B. J. Thedrez, and C. H. Lee, “An optoelectronic attenuator for the control of microwave
circuits,” IEEE Microwave and Guided Wave Letters, vol. 3, pp. 361-2, Oct. 1993.
[7]
A. A. A. De Salles, “Optical control of GaAs MESFETs,” IEEE Transactions on Microwave Theory
and Techniques, vol. MTT-31, pp. 812-20, Oct. 1983.
[8]
R. N. Simons, “Microwave performance o f an optically controlled AlGaAs/GaAs high electron
mobility transistor and GaAs MESFET,” IEEE Trans. Microw. Theory Tech., vol. MTT-35, pp. 1444551987.
16
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[9]
P. R. Herczfeld and A. Paolella, “Optical gain control o f a GaAs MMIC transmit-receivc module
compatible with optical spatial filters.”’ in IEEE Antennas and Propagation Society International
Symposium Digest, Syracuse. NY. USA, 1988,, pp. 40-3-
[10]
Y. Yamamoto, K. Kawasaki, and T. Itoh, “Optical control o f microwave active band-pass Biter using
MESFETs,” in 1991 IEEE MTT-S International Microwave Symposium Digest 9ICH2870-4, Boston,
MA, USA, 1991., pp. 655-8.
[11]
S. J. Rossek and C. E. Free, “Optically controlled microwave switching and phase shifting using GaAs
FETs,” IEEE Microwave and Guided Wave Letters, vol. 5, pp. 81-3, March. 1995.
[12]
C. K. Sun. R. Nguyen. C. T. Chang, and D. J. Albares, “Photovoltaic-FET for optoelectronic RF/ mu
wave switching,” IEEE Transactions on Microwave Theory and Techniques, vol. 44, pp. 1747-50, Oct.
1996.
[13]
K. B. Bhasin. P. C. Claspy, M. A. Richard, R. R. Romanofsky, M. Bendett, G. Gustafson, and W.
Walters, “Control o f a GaAs monolithic Ka-band phase shifter using a high-speed optical interconnect,”
IEEE Transactions on Microwave Theory and Techniques, vol. 38, pp. 686-8, May. 1990.
[14]
P. Cheung, D. P. Neikirk, and T. Itoh, “Optically controlled coplanar waveguide phase shifters,” IEEE
Transactions on Microwave Theory and Techniques, vol. 38, pp. 586-95, May. 1990.
[15]
H. Hayashi. M. Nakatsugawa, T. Nakagawa, and M. Muraguchi, “A novel optical control technique
using tunable inductance circuits,” IEICE Transactions on Electronics, vol. E81-C, pp. 299-304, Feb.
1998.
[ 16]
A. J. Seeds, J. F. Singleton, S. P. Brunt, and J. R. Forrest, “The optical control of IMPATT oscillators,”
Journal o f Lightwave Technology, vol. LT-5, pp. 403-11, March. 1987.
[17]
R. D. Esman, L. Goldberg, and J. F. Weller, “Optical phase control o f an optically injection-locked FET
microwave oscillator,” IEEE Transactions on Microwave Theory and Techniques, vol. 37, pp. 1512-18,
Oct. 1989.
[18]
A. S. Daryoush, “Optical synchronization of millimeter-wave oscillators for distributed architecture,”
IEEE Transactions on Microwave Theory and Techniques, vol. 38, pp. 467-76, May. 1990.
[19]
W. H. Haydl and R. Solomon, “The effect of illumination on Gunn oscillations in epitaxial GaAs,”
IEEE Transactions on Electron Devices, vol. Ed-15, pp. 941-2, Nov. 1968.
[20]
H. P. Vyas, R. J. Gutmann, and J. M. Borrego, “Leakage current enhancement in IMPATT oscillators
by photoexcitation,” Electronics Letters, vol. 13, pp. 189-90, March. 1977.
[21]
P. Freeman, Z. Xiangkun, I. Vurgaftman, J. Singh, and P. Bhattacharya, “Optical control of 14 GHz
MMIC oscillators based on InAlAs/InGaAs HBTs with monolithically integrated optical waveguides,”
IEEE Transactions on Electron Devices, vol. 43, pp. 373-9, March. 1996.
17
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[22]
A. Madjar, A. Paolella, and P. R. Herczfeld, “Modeling the optical switching o f MESFETs considering
the external and internal photovoltaic effects,” IEEE Transactions on Microwave Theory and
Techniques, voL 42, pp. 62-71994.
[23]
L. E. M. de Banos, Jr., A. Paolella, M. Y. Frankel, M. J. Romero, P. R. Herczfeld, and A. Madjar,
“Photoresponse o f microwave transistors to high-frequency modulated lightwave carrier signal,” IEEE
Transactions on Microwave Theory and Techniques, vol. 45, pp. 1368-741997.
[24]
J. L. Freeman, S. Ray. D. L. West, and A. G. Thompson, “Optoelectronic devices for unbiased
microwave switching,” in 1992 IEEE MTT-S International Microwave Symposium Digest Cat.
No.92CH3141-9, Albuquerque, NM. USA, 1992,, pp. 673-6.
[25]
A. S. Nagra. O. Jerphagnon, P. C. Chavarkar, M. L. VanBlaricum, and R. A. York, “Indirect control of
Microwave circuits using low optical power,” IEEE Transactions on Microwave Theory and
Techniquesl999.
[26]
A. S. Nagra, P. Chavarkar, C. J. Swann, T. Larry, M. L. VanBlaricum, U. K. Mishra. and R. A. York,
“Monolithic optically variable capacitors for tunable microwave antennas,” in Proceedings.
IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,
Ithaca, NY. USA, 1997.. pp. 69-78.
[27]
M. L. VanBlaricum, C. J. Swann, and T. L. Larry, “Remote optical control and tuning o f antenna
elements,” in URSI Digest, Newport Beach, CA, 1995,, pp. 18-23.
18
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Chapter 3
Varactor Diodes and Photovoltaic Arrays for
the Monolithic GaAs OVC
This chapter deals with the two main components of the monolithic GaAs OVCvaractor diodes and photovoltaic (PV) arrays fabricated on GaAs. The motivation behind the
fabrication of the monolithic OVC on GaAs is presented first- This is followed by details
regarding the design of high-Q planar Schottky varactor diodes and high efficiency PV arrays
on the same GaAs wafer. The challenges involved in integrating the epitaxial layer structures
of the two devices and developing a compatible fabrication sequence are discussed.
Conventional photovoltaic devices used in solar cell applications are vertical devices with
thick active regions and they require front as well as back contacts. This makes integration
using monolithic techniques very hard, so planar PV cells with limited active layer thickness
and both contacts accessible from the front side were developed. These planar PV cells were
integrated into monolithic PV arrays using airbridges for interconnections and a novel buried
oxide isolation scheme was used for eliminating the problem of substrate leakage. Schottky
diodes with a Q-factor of 40 at 10 GHz, and PV arrays with output voltages of 10.5 V and
conversion efficiencies as high as 26.8% have been demonstrated on the same GaAs wafer,
and the detailed results are presented here.
3.1 Choice o f material system
There are several material systems in which the monolithic OVC could be
implemented, such as silicon (Si), gallium arsenide (GaAs) and indium phosphide (EnP). The
need for a high resistivity substrate, on which the passive microwave components could be
fabricated, favored the use o f GaAs or InP since microwave losses on Si substrates are high.
Also, due to lower electron mobilities in silicon, varactor diodes fabricated on silicon have
lower cutoff frequencies than varactor diodes fabricated on GaAs or InP. Another factor
19
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against silicon was the fact that it is an indirect bandgap material and hence has a small
optical absorption coefficient in the vicinity of its band edge. Thus the active layer in Si
photodetectors has to be very thick for efficient absorption o f the incident optical power.
Both GaAs and InP are direct band gap materials with absorption coefficients that increase
very rapidly near the band edge, thus making them suitable for optical detection applications
where the active layer thickness is limited. Also, the larger bandgap o f GaAs (Eg=1.4 eV) and
InP (Eg=1.35 eV) result in photovoltaic detectors with larger open circuit voltages as
compared to Si (Eg=l.leV) photovoltaic detectors.
Thus, both GaAs and InP have considerable advantages over Si for the monolithic
OVC application. O f these two, GaAs was chosen for several reasons- a) low-field electron
mobilities in GaAs are higher than in InP, therefore GaAs varactor diodes have higher cutoff
frequencies, b) GaAs based device technology is cheaper and more mature than InP
technology, c) Since most commercially available MMICs are implemented using GaAs, the
fabrication of the monolithic OVC on GaAs opens up the possibility o f integrating the OVC
with these MMICs.
3.2 Design o f planar GaAs Varactor diodes
Schottky diodes fabricated on GaAs are employed as varactor diodes in a variety of
applications [I] at microwave and millimeter wave frequencies. Although both PN junction
diodes and Schottky diodes can be used as voltage variable capacitors, Schottky diodes are
preferred in high frequency/low loss applications because they are associated with lower
series resistance. Series resistance associated with varactor diodes is the main source of loss
at microwave frequencies and limits the useful frequency range of the device. One figure of
merit commonly used for varactor diodes is the small signal cutoff frequency (fc) that is
defined as
=
(31>
where Rs is the series resistance and C is the depletion capacitance associated with the
varactor diode. The quality factor (Q) of the device at any frequency /c a n be expressed in
terms of the small signal cutoff frequency as
20
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1
f
Q = ----------------------------------------------------------(3.2)
2 iz fR sC f
From equation (3.2) it can be easily seen the in order to obtain a high-Q varactor diodeTthe
small signal cutoff frequency must be designed to be much higher than the frequency of
interest.
Schottky
Contact
Ohmic
Contact
Ohmic
Contact
N ^G aA s
Semi-insulating GaAs Substrate
(a)
Figure 3.1: a) Cross section o f a planar Schottky diode on n-type GaAs b) Layout o f
a planar Schottky diode
21
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Most high frequency applications employ planar varactor diodes because they are
compact and can be easily integrated into circuits with minimal external parasitics. A planar
varactor diode consist o f a Schottky contact made on a N~ GaAs active region and recessed
ohmic contacts to a heavily doped N+ GaAs layer as shown in fig. (3.1a,b). Each diode is
fabricated on a separate mesa and the active region surrounding the mesa is etched down to
the semi-insulating substrate for isolation. The capacitance o f these diodes arises due to the
space charge underneath the Schottky contact and is given by
(3.3)
d
where e is the dielectric constant of GaAs, A is the area of the Schottky contact, w is the
width of the Schottky stripe, I is the length of the Schottky stripe, d is the depletion width
underneath the contact, q is the charge of an electron, Nd is the donor concentration in the N~
active region, Vbl is the built in voltage of the Schottky contact and V is the applied bias.
From equation (3.3) it can be seen that depletion capacitance is a function of the applied
reverse bias. As the reverse bias voltage applied to the Schottky diode is increased, the
depletion width d increases causing the depletion capacitance C to decrease. Once the
depletion edge has reached the N* layer, it gets pinned and does not increase any further with
increase in bias. In some cases if the N~ layer is too thick or the doping in the N~ is high, the
Schottky diode may breakdown before the depletion edge reaches the N* layer. Thus the
thickness and doping of the N- layer determine the maximum capacitance swing that can be
achieved. Note that for most applications, a capacitance ratio (CmaJCmm) of 3 is adequate and
this requires a N~ thickness of the order of 0.3pm to 0.45|im depending on the doping.
However the N~ layer is shared with the photovoltaic array (where it forms part of the
optically active region) and so it must be thick enough (~ lpm ) to efficiently absorb the
incident light. As a compromise, the N~ GaAs thickness used here is 0.7 pm. Since the
purpose of the N+ GaAs layer is to reduce the series resistance, it is desirable to use the
highest possible doping and the maximum thickness. The N+ doping in our diodes is limited
by the ability o f the MBE growth system at UCSB (~ 3 10I8/cm3). The N* layer thickness is
constrained to 0.7 pm by the fact that the total epitaxial layer thickness has to be less than 2
22
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pm of which 1.3 pm is taken up by the optically active layers required for the PV array.
More details regarding the choice of layer thickness and the issues involved in integrating the
epitaxial layers for the varactor with the PV array are discussed later.
With the thickness of the layers fixed by integration concerns, the only parameters
needed to specify the design o f the varactor diode are the active layer doping and the width
and length o f the Schottky contact. These parameters are chosen in a way to minimize the
series resistance. As discussed in [2], the series resistance of these planar devices has
contributions from the contact resistance (Rc) of the N-ohmic contacts, the resistance of the
buried N+ layer (Rn+), the current spreading resistance (JR ^ and the resistance of the NIayer (RN. \
RS = RC+ Rff+ + Rspr + Rf,_
(3.4a)
r
d(p*\
w ( p * } p~t
—+— — +
— + ——
21 2 l ^ t +)
121 ^f+ y
wl
(3.4b)
where rc is the contact resistance per unit width, p+ and t* are the resistivity and thickness of
the 1ST layer, and p- and t~ are the resistivity and thickness of the N~ layer respectively. The
width of the Schottky contact is w and the length is I as indicated in fig. (3.1b). Note that the
first three terms are independent of area and depend solely on the periphery of the diode.
Thus by lateral scaling i.e. reducing the width of the Schottky contact but keeping the area
constant by increasing the length, it is possible to reduce the series resistance while
maintaining a constant capacitance. Vertical scaling (increasing the active layer doping and
reducing N~ thickness) becomes important when lateral scaling reduces the periphery
dependant terms and the area dependant term RN. becomes dominant.
Fig. (3.2) shows the effect of Schottky contact width and active layer doping on the
small signal cutoff frequency of the varactor diodes. These curves have been calculated using
values appropriate to our device- rc=0.08 Q mm, p+= 3 10' 3 Q cm, t*—0.7 pm, f =0.7 pm and
p‘ estimated from active layer doping. A Schottky to ohmic spacing s of 4 pm is used for the
curves in rig. (3.2) and the Schottky contact width w is varied from 1 pm to 4 pm. From
these curves, it is apparent that the smallest possible Schottky contact width is desirable for
high cutoff frequencies. However, due to device processing limitations, the minimum
Schottky width employed in our varactor diodes is 2 pm. The mesa etching process
23
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introduces height variations on the surface of the GaAs wafer o f the order o f 2 jun (total
epitaxial layer thickness) which requires the use of thick photoresist. This constrains the
minimum feature size that can be accurately/reproducibly written using contact lithography
to - 2 (im.
800
700
I
-
I
500
1
400
e
3
u
-g
300
S
200
100
1
2
3
4
5
Donor Concentration (10 ‘Van3)
Figure 3.2: Varactor diode small signal cutoff frequency as a function o f Schottky
contact width and active layer doping
Another observation that can be made from fig. (3.2) is that the small signal cutoff
frequency increases as the doping of the N~ layer is reduced. This is because lighter doped
regions have smaller capacitance per unit area and so the periphery of a lightly doped diode
has to be larger than that o f a heavily doped diode for a given capacitance. Since in our
diodes the periphery dependant terms are dominant, increased periphery leads to lower series
resistance. Note that when the doping of the N- layer is made very small, the last term in
equation (3.4) begins to dominate and this causes the series resistance to start increasing
again. This can be seen in the flattening of the f c versus Nd curves for very low doping.
Accurate control of doping level is hard for doping densities below 1 10l7/cm3 and dedicated
24
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doping calibration runs are required. Hence, a conservative value of 2
l /cm 3 was used as
10 7
the doping density in the active N- region.
3.3 Fabrication and testing o f Schottky Varactor diodes
A GaAs Schottky diode fabrication process was developed that was compatible with
process used for fabricating the GaAs PV cells, since both components had to be integrated
on the same wafer. The first step in the fabrication process was the definition o f the diode
mesa by RIE etching of GaAs using a BCtySiCIVClz GaAs mixture. Next the p-type GaAs
layer (part of the PV cell epitaxial structure) was etched away exposing the top o f the active
N~ GaAs layer. Ohmic contacts were formed by using a self aligned process to first etch
down to the N* contact layer and then depositing AuGe/Ni/Au contacts. The contacts were
alloyed at 420°C for 1 minute and the measured contact resistance was about 0.08 £2 mm.
Finally the Schottky contact to the N~ GaAs active layer was formed by depositing Ti/Pl/Au
metal. Fig. (3.3) shows the process flow for the Schottky diode fabrication and details of the
process are included in appendix A.
The Schottky diodes were connected to larger pads using airbridges for ease
of DC and RF probing. The DC characterization of the Schottky diodes was carried out on a
HP 4145 Semiconductor Parameter Analyzer. The I-V curve of a 2 pun x 40 pm Schottky
diode under forward bias is presented in fig. (3.4a) and it can be seen that the Schottky diode
turns on at a voltage o f -0.1 V. For higher forward bias voltages, the current is limited by the
series resistance of the diode and probes. The series resistance of the Schottky diode was
determined to be 2.65 £2 (after subtracting the 2.2 £2 contribution of the probes/measurement
setup). Fig. (3.4b) depicts the Schottky diode forward current plotted on a logarithmic scale.
The ideality factor (n) can be estimated from the slope of the I-V curves on the log scale
(equation (3.5)) and was estimated to be 1.1 for our diodes.
16.7
n = ----------------dLog(I)/dV
(3.5)
The current versus voltage behavior under reverse bias is plotted in fig. (3.5)
and it can be seen that the reverse breakdown voltage is ~ -7.5 V. Since the N- layer is thick
in Schottky diode design used here, reverse breakdown occurs before the depletion edge gets
25
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
pinned by the N+ layer. Thus the maximum capacitance swing in our diodes is limited by the
reverse breakdown voltage and our calculations (equation (3.3)) indicate that a capacitance
swing (CmafCmud of 3.1 is attainable before the diodes breakdown.
P GaAs
N 'G a A s
N +G aA s
(a)
P GaAs
N'GaAs
N+ GaAs
(b)
N G aAs
N ^G aA s
Ohmic
Contact
Ohmic
Contact
N'G aA s
N - GaAs
Schottky
C ontact
1.4 pm
t
Ohmic
Contact
Ohmic
N'GaAs
wimmmggm
Figure 3.3: Fabrication process fo r the planar GaAs Schottky diodes
26
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100
1
40
u
0.6
0
1
Bias Voltage (V)
(a)
10
w
04
0.6
Bias Voltage (V)
1
1.2
(b)
Figure 3.4: Forward I-V curves o f a 2 fim x 40 pm planar Schottky diode on a linear
scale (a) and logarithmic scale (b).
27
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-10
t
B
s
3
o
-20
R cyctsilII rtak d o w n
-30
-40
-50
-10
•4
-6
•8
•2
0
Applied Bias (V)
Figure 3.5: Reverse breakdown for planar Schottky diode on GaAs.
160
140
— Measured at 1 MHz
*- Extracted from s-parameters
120
m
U
100
80
60
-4
-3
-2
-1
Bias Voltage (V)
Figure 3.6: Comparison o f capacitance versus voltage behavior measured at 1MHz
and at high frequencies.
28
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The capacitance versus voltage behavior o f the Schottky diodes was characterized
both at low frequencies (1 MHz) and in the frequency band o f interest (0.5-18 GHz). At 1
MHz, direct C-V measurements were made using a Keithley 590 CV meter. The measured
capacitance was corrected for parasitic pad capacitance and the results are plotted in fig.
(3.6). A capacitance variation from 143 fF (0 V) to 65 fF
(-6
V) was observed with bias,
which corresponds to a capacitance ratio of 2 .2 .
The high frequency behavior of the diodes was studied by recording the 1-port
s-parameters o f the diodes for several values of reverse applied bias. The microwave
s-parameters measurements were made on a Cascade Microtech probe station using ACP-40
CPW probes that were connected to a HP 8510 network analyzer. In order to de-embed the
Schottky diode from the pads, an on-wafer reference standard comprising o f probe pads
terminated with a short circuit was used to set the reference plane at the position of the
Schottky diode. The measured s-parameters were converted to equivalent admittance (T)
parameters and fitted to a simple series RC model using the method described in [3]. The real
and imaginary part o f the admittance for a resistor and capacitance connected in series is
given by equation (3.6a)
q) 2C zR
(oC
Y = ------ r—r—=-+ j ------- 5 - T - r l+(DzC 2Rz
l+Q) C R
f « f c,
Y = o f C zR + jcaC
(3.6a)
(3.6b)
For frequencies well below the diode small signal cutoff frequency, the admittance (Y) can be
expressed in the simpler form of equation (3.6b) which indicates that the imaginary part of Y
varies linearly with frequency while the real part varies as the square of the frequency. The
measured and modeled admittance are shown in figure (3.7a,b) and are in good agreement
with each other. Note that for frequencies higher than 15 GHz, the measured data starts to
diverge from the simple series RC model due to the de-embedding process used here. The
pads were treated as a 50 £2 line and only the phase delay due to the size pads was taken into
account. A more accurate de-embedding technique is outlined in [2] and uses a shortcircuited pad and an open-circuited pad to obtain an equivalent inductance and capacitance
for the pad. Using this technique it has been shown [2] that the simple series RC model is
accurate up to 40 GHz.
29
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0.02
Measured
Modeled
0.015
0.01
¥
0.005
0
5
10
15
Frequency (G ib )
(«)
0.002
Measured
Modeled
0.002
ce
0.001
-
0.001
0
10
5
15
Frequency (GHz)
(b)
Figure 3.7: a) Com parison of the imaginary part o f th e measured and modeled
adm ittance b) Com parison o f the real part o f the m easured and modeled admittance.
30
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The capacitance extracted from the high frequency s-parameters using the above
mentioned technique compares well with values measured at 1 MHz as indicated in fig. (3.6).
The series resistance of 2.87 Q extracted from the high frequency data is only 8.4 % higher
than the resistance value o f 2.65 £2 estimated from the DC I-V curves. Using measured
values for the capacitance and series resistance of the Schottky varactor diodes, the small
signal cutoff frequency is calculated to be 390 GHz. Thus planar varactor diodes with a small
signal cutoff frequency of 390 GHz and capacitance ratio of 2.2 have been demonstrated
here. Moreover, these diodes are compatible with the epitaxial structure and fabrication
process of the PV arrays required for the monolithic OVC.
31
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.4 Design o f GaAs Photovoltaic detectors
Besides the varactor diode, the other major component of the OVC is the
photovoltaic (PV) array, which converts the optical control signal into an electrical bias
signal. The basic principle o f operation o f the photovoltaic detector employed, here is similar
to that of solar cells used for the generation o f electrical power from solar radiation.
However, as opposed to solar cells, which must efficiently absorb energy over a wide
wavelength range (solar spectrum), the PV arrays employed in the OVC can be optimized to
efficiently absorb optical energy in a narrow range of wavelengths since the illumination
source is a laser diode/LED. This reduces the design complexity of the PV array. However,
the integration of several photovoltaic detectors into a monolithic array, which is to be
fabricated on the same wafer as high frequency varactor diodes, poses several constraints on
the design of the monolithic PV array. All these design considerations are discussed in this
section. As mentioned in section 3.1, the monolithic OVC is to be fabricated on GaAs; hence
only GaAs based PV devices are considered here.
P-Contact Fingers
Anti Reflection
Coating
AIGaAs
Passivation
£
' •a
3 a.
< “?
P GaAs
«2 -£2
BO
Q. O
N'GaAs
■X
O 06
N+ GaAs Substrate
Large A rea N-Ohmic Contact
Figure 3.8: Cross section o f a typical GaAs solar cell
32
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Fig. (3.8) depicts the epitaxial structure and geometry of GaAs PV detectors used for
solar cell applications [4-6]. The device shown here is a P-N homojunction diode although
Schottky barrier diodes and heterojunction diodes can also be used as solar cells. The
junction is relatively shallow (0.1-0.5pm) and the active region is made thick (3-5|xm) to
efficiently absorb the incident optical energy. The top contact to the p-region is made in the
form o f narrow metal fingers to minimize the blocking of light. A large area back contact
provides the ohmic contact to the n-region through the heavily doped substrate. An
antireflection coating to minimize reflection of incident light at the air/GaAs interface and a
passivation layer to reduce surface recombination velocity are applied at the top surface to
increase cell efficiency.
OC
m
•m
(a)
(b)
Figure 3.9: a) Typical I-V curve for a photovoltaic device under illumination
b) Simple equivalent circuit fo r an illuminated PV device.
33
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The bandgap of GaAs is 1.42 eV which corresponds to a threshold wavelength of
880 nm. When light with wavelength shorter than 880 nm is incident on the device, electronhole pairs are generated, which increases the minority carrier concentrations in the device.
The excess minority carriers (electrons in the p-region and holes in the n-region) that are able
to diffuse to the junction before they recombine are swept across the junction by the built in
Held. The carriers generated within the depletion region are also swept across the junction by
the built in field. This flux of optically generated carriers gives rise to a current that flows in
the same direction as the reverse saturation current o f the diode. The effect of illumination on
the electrical characteristics of a diode is shown in fig. (3.9a). It can be seen that the light
induced current opposes the forward current of the diode and translates the I-V curve
downward into the fourth quadrant. Since the I-V curve passes through the fourth quadrant, it
indicates that the device is capable of delivering power to an external load. The equivalent
circuit model for an illuminated diode is shown in fig. (3.9b) and consists of a current source,
which accounts for the photocurrent, connected in shunt with an ideal diode.
The current versus voltage behavior o f an illuminated diode can be described by the
following equation
C SUL
'
e nkT —I - I
pho,o
(3-6)
where the first term is the current o f a diode in the absence of illumination and lPhoto is the
optically generated current. Note that the polarity of the photocurrent has been correctly
chosen to oppose the forward current in the diode. Under short circuit conditions (V=0), the
diode current goes to zero and it can be seen from equation (3.7) that the entire photocurrent
is delivered to the short circuit.
v =0
=>
(3 .7)
Under open circuit conditions (1=0), a positive voltage appears across the terminals of the
diode. The physical basis for the open circuit voltage can be understood by balancing the
drift and diffusion components of the diode current. Since the net current flowing out of the
device terminals must be zero, the built in junction potential decreases (i.e. the diode
34
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
develops a forward bias) so that the diffusion current component can cancel the light induced
drift current.
1=0
f sV*.
=> lQ e nkT - 1
nkT
= l pho<*
=>
K c =
photo
In
+1
(3.7)
I h
The short circuit current and open circuit voltage points are indicated on the I-V curve
depicted in fig. (3.9a). Also shown is the point at which maximum power is delivered, to an
external load. The m axim um power is Pm—VmIm and occurs when the load impedance Rt
connected to the cell is given by
(3 -8 )
R t= y m
The power conversion efficiency t} is the ratio of the maximum electrical power delivered to
the load to the optical power incident on the device. Equation (3.9) expresses the power
conversionefficiency interms of the open circuitvoltage, short circuit current, incident
optical power Poptand the fillfactor FF. The fill factordepends
on the shape o f the I-V
curve and is defined in equation (3.10).
VI
Popt
F F----2£_££.
V I
Popt
V I
F F = —SSL.
Voc1Isc
(3 .9 )
(3 . 1 0 )
Thus in order to obtain the highest possible conversion efficiency, it is essential to maximize
the short circuit current (/IC), the open circuit voltage (Vx ) and the fill factor (FF)- The
following paragraphs outline how these terms can be increased by appropriate design of the
PV cell.
As indicated in equation (3.7), the open circuit voltage (V^) varies as the logarithm
of the ratio of the photocurrent to the reverse saturation current and hence the ratio IphotJh
should be made as large as possible. This requires that the incident light be absorbed
efficiently to generate the m axim um possible photocurrent. It is also desirable to have a low
reverse saturation current
which decreases exponentially with increasing bandgap. Thus
all other factors being the same, diodes made from materials with a larger bandgap generate
higher open circuit voltages. As discussed earlier, this is one of the advantages of using GaAs
PV cells instead of silicon cells. Another important consideration in obtaining high open
35
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
circuit voltages is that the ideality factor n o f the diodes be as close to unity as possible.
Although it appears from equation (3.7) that larger ideality factors (n>I) may enhance the
open circuit voltage, in reality the opposite is true. Effects such as recombination within the
depletion region, defect conduction, surface leakage along device periphery, which cause
deviation from ideal diode behavior also cause the reverse current la to increase by several
orders o f magnitude. Thus although the ideality becomes larger (n>/), the ratio of IphatJh
decreases by several orders of magnitude so that the net effect is a smaller open circuit
voltage.
The diode ideality factor ti and open circuit voltage Vx also affect the fill factor FF
of the I-V curves. PV cells with higher
have higher fill factors. For a given open circuit
voltage, the fill factor increases as the diode ideality factor approaches unity. For example in
GaAs PV cells operating at a
of 0.9 V, the fill factor increases from 0.79 for n=2 to 0.87
for n=L Two other factors that influence the fill factor are the series and shunt resistance of
the cell. In order to obtain high fill factors, the series resistance must be small and the shunt
resistance as large as possible.
There are several considerations that go into maximizing the photocurrent of PV
ceils. The thickness o f the cell, carrier lifetimes in the active regions, and surface
recombination velocity, all play a crucial role in determining how effectively the device
converts the incident light into electrical current. A commonly used, figure of merit is the
quantum efficiency, which is a measure of the number of carriers collected at the terminals to
the number of photons incident on the device, and is expressed as
Qr- _
I photo!*l _ I photo 1.24
^
C Mm)
where IPhoto is the photocurrent, Fopt is the optical power incident on the device, q is the
charge of an electron, h is Planck’s constant, v is the frequency of the incident light and
is the wavelength in microns. Thus for a given optical power, the photocurrent is
maximum when the quantum efficiency is maximum (QE—Y). One of the key design rules for
attaining high quantum efficiency is that the total depth o f the active region must be large
enough to absorb the incident light. Since the intensity of light falls off exponentially with
depth (e'ax), it is sufficient to make the cell 3-4 times the absorption length (//a ) to ensure
that greater than 95% of the light is absorbed in the device. The absorption length (defined as
36
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the reciprocal of the absorption coefficient a) is a function o f wavelength of the incident
light. For GaAs, which is a direct bandgap semiconductor, the absorption coefficient
increases rapidly just below threshold (from -0 @880 run to 1 104/cm @840 nm) and then
increases slowly with decreasing wavelength (5 104/cm @600 nm). In order to be good
energy conversion devices, GaAs solar cells are designed for efficient absorption o f light
over as wide a spectral range as possible. To ensure high quantum efficiency at the longer
wavelengths (Just below 880 nm) where the penetration depths are large, active layers with
thickness in the range 3-5pm are commonly used in GaAs solar cells.
Recombination at the front surface of the cell as well as in the bulk material causes a
reduction in the
m in o r ity
carriers available to be swept across the junction by the built-in
fields. Thus in order to maximize the photocurrent, the loss o f carriers to the competing
mechanisms o f surface and bulk recombination must be reduced as much as possible. Bulk
recombination can be reduced by ensuring that lifetime of the minority carriers in the active
regions is long resulting in large diffusion lengths. When the diffusion length of the minority
carriers is large compared to the light penetration depth, a high percentage of the
photogenerated carriers diffuse to the junction before they recombine and hence contribute to
photocurrent. Although carrier lifetimes and diffusion lengths are not uniquely determined by
the doping level (very sensitive to growth technique/growth conditions), they do increase
when the doping is lowered. Thus lightly doped active regions are desirable for low bulk
recombination losses. The effects of surface recombination, which occur due to the presence
of surface states that trap the minority carriers, can be minimized by surface passivation
layers. For GaAs the surface recombination velocity at the GaAs-air interface can be as high
as 106 cm/sec. Several passivation layers have been explored for solar cell applications [7]
but the most widely used is a thin layer of AlGaAs [6 , 8 ] with high A1 content (>80% Al).
The low density o f states at the AlGaAs-GaAs interface can reduce the surface
recombination velocity by two orders of magnitude to about 104 cm/sec. The AlGaAs layer is
made thin (0.03-0.1 pm) so that it absorbs an insignificant amount of the incident optical
power at the shorter wavelengths.
Thus, the key requirements for high quantum efficiency in GaAs solar cells can be
summed up as follows- a) active layers thick enough to absorb the longest wavelength o f
37
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interest, b) lightly doped active regions with long minority carrier lifetimes and long
diffusion lengths, and c) surface passivation with thin AlGaAs layers.
The PV arrays used in the monolithic OVC differ from conventional GaAs solar cells
in two aspects- 1) the PV cells are planar and 2) the active layer thickness is less than 2 pm
due to fabrication and integration concerns. The vertical configuration employed in solar
cells is not suitable for the OVC as it requires a heavily doped substrate (high microwave
loss). Also, vertical cells require a bottom contact that makes monolithic integration a
challenge. The planar PV cell configuration employed in the OVC is depicted in figure
(3.10). The cell is fabricated on a semi-insulating GaAs substrate. Contacts to both p-type
and n-type regions are accessible from the front surface of the wafer thus making connections
using monolithically fabricated airbridges easy. The airbridge process, which is employed to
interconnect components within the OVC, requires that the total height variation on the GaAs
wafer be no more than 2 pm. This limits the total epitaxial thickness of the OVC to 2pm .
Another constraint on the PV array design is that the epitaxial layers must be shared with the
varactor diode as both components are fabricated on the same wafer.
P-C ontact Fingers
AlGaAs
Passivation
Layer
Anti Reflection
Coating
N-Ohmic
Contact
P GaAs
N-Ohmic
Contact
NGaAs
Semi-insulating GaAs Substrate
Figure 3.10: Cross section o f a planar GaAs photovoltaic detector designed at UCSB
for use in the monolithic OVC
38
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Due to the limited thickness of the active layer, the PV arrays employed in the OVC
have low quantum efficiencies at longer wavelengths. However this is not a serious problem
since the PV arrays used in the OVC do not need to cover a wide spectral range. In fact, the
operating wavelength o f the PV array is a design parameter. The PV arrays employed in the
OVC are optimized for efficient operation in the 600-700 nm wavelength range. The main
reasons for choosing this range of wavelengths is the availability of cheap illumination
sources. The other reason is that the optical penetration depth in this range of wavelengths is
well matched to the active layer thickness available in the OVC.
Details o f a planar PV cell intended for use in the monolithic OVC are shown in
fig (3.10). The top two layers (FGaAs and N'GaAs) are the optically active layers while the
bottom N 1' layer is the contact layer. The N~ GaAs and N* GaAs layers are shared with the
varactor diode. The thickness h o f the optically active region is chosen to be 1.3 pm as this
corresponds to 3 absorption lengths (//a) at 700 nm, which is the longest wavelength of
interest. Thus more than 95 % of the incident light is absorbed in the active region for all
wavelengths less than 700 nm. The depth of the junction is chosen according to guidelines
given in [4] where it is shown that for GaAs PV cells with passivation, the quantum
efficiency is maximum when junction depth is around 0.6 pm. The doping in the P-type
GaAs layer is 5 10l7/cm3, which keeps the series resistance due to the P-type layer low while
still maintaining long electron diffusion lengths. The doping used in the N*GaAs layer is
made low (2
I /cm3) to ensure long hole lifetimes. Note that this low doping is also
10 7
beneficial for the Schottky varactor diodes where the small signal cutoff frequency increases
as the doping of the N~ GaAs layer is reduced. Since the total thickness of all the epitaxial
layers can be at most 2 pm (of which the top 1.3 pm constitutes the optically active region),
the bottom N+ layer is made 0.7 pm thick. This layer is doped heavily (3 10I8/cm3) in order
to lower the series resistance for the PV cells as well as the varactor diodes. A thin layer of
Al.g5 Ga.15As is included on top of the P-type GaAs layer to reduce the recombination velocity
at the front surface of the cell. An anti-reflection (AR) coating is also applied to the front
surface of the cell to minimize reflection of light from the front interface. A silicon nitride
film with refractive index 2.05 and thickness 100 nm is used as the AR coating here. Thus
the epitaxial layers of the varactor diode and the PV array have been successfully combined
in the design of fig. (3.10).
39
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^
Total
0.8
•o
E
“
Top (p-Iayer)x
0.6
|
O'
0.4
1
se
Depletion Region
0.6
0.65
0.7
0.75
W avelength (pm)
(a)
1
0.8
10
*
Top Surface Recombination Velocity (cm/is)
(b)
Figure 3.11: a) Simulated curve fo r quantum efficiency as a function o f wavelength
fo r a planar GaAs PV detector b) Sim ulated curve depicting effect o f surface
recombination velocity on the quantum efficiency at 670 nm.
40
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. (3.11a) shows a theoretical spectral response curve (quantum efficiency versus
wavelength) of the planar PV cell designed for the monolithic OVC. The spectral response
curve is generated using a program which is described in appendix B. The program calculates
the relative contributions o f the P-Iayer, the N-layer and the diffusion region to the total
photocurrent generated in the device and then estimates the quantum efficiency using
equation (3.11). The values for the minority carrier lifetimes and diffusion lengths used in the
program were taken from the literature for MBE grown material [8 ] with similar doping
levels. Although the exact values of these parameters depend on growth conditions and
processing steps, the values in appendix B provide a good starting point for verifying the
design. The spectral response curve shows that for wavelengths longer than 700 nm the
quantum efficiency is low due to the limited active layer thickness. However, in the
wavelength range of interest (600-700 nm) the quantum efficiency is higher than 95%. It can
also be seen that the major contribution to the photocurrent is from the top P-layer since most
light is absorbed close to the front interface of the cell. Thus, since a large number of carriers
are generated close to the front surface, it is essential to reduce surface recombination
velocity. Fig. (3.11b) shows the effect of front surface recombination velocity on the
simulated quantum efficiency at a wavelength of 670 nm. It can be seen that the quantum
efficiency drops from 97% to 81% when the recombination velocity increases from 104
cm/sec to 106cm/sec. This reiterates the need for the AlGaAs passivation layer at the front
interface.
3.5 Isolation and layout considerations
The photovoltaic detector used in the OVC must be capable of generating an output
voltage greater than 7 V in order to obtain the frill capacitance swing in the varactor diode.
Since individual GaAs PV cells (PN junction type) have output voltages in the range 0.7-1.1
V, it was decided to use a PV array with 10 GaAs (PN junction) PV cells in series. In order
for the PV array to work in the desired manner, it is essential that there be no leakage
between the individual PV cells that are connected in an array. Parasitic leakage has
deleterious effects on PV array performance as current can flow through the alternate leakage
path instead of flowing through the series of PN junctions. This can lead to lower output
41
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
voltages, smaller fill factors and lower energy conversion efficiency. Conventionally, devices
fabricated on GaAs are isolated using mesa isolation. This involves etching away the active
region surrounding each device to the semi-insulating substrate. However, mesa isolation by
itself is not adequate [9, 10J to prevent leakage in monolithic PV array applications. Under
illumination, a shunt leakage path exists between the devices due to photogenerated carriers
in the semi-insulating substrate as depicted in fig. (3.12a). In order to prevent substrate
leakage, an oxide layer is placed at the base of the individual device mesas as shown in fig
(3.12b). This buried oxide layer is created by the lateral oxidation of Al.9gGa.02 As and serves
to isolate the device from the photoconductive layer m the substrate. Since the oxide layer is
insulating and its properties do not degrade under illumination, it provides an effective
solution to the substrate leakage problem when used in conjunction with mesa isolation. A
similar approach [11] has been employed to reduce output conductance in GOI MESFETs
and HEMTs due to buffer/substrate leakage.
The layout of the PV array requires careful consideration because it affects the
energy conversion efficiency and the ease of coupling light into the array. As discussed in
chapter 2, the monolithic PV array has to be small so that it can be embedded in high
frequency structures. Also larger area arrays are associated with bigger junction capacitance,
which slows down the switching speed. At the same time decreasing the array size too much
also has drawbacks. Coupling light into the structure becomes harder due to smaller
alignment tolerances and in some cases focussing optics are required to reduce the spot size.
Taking these considerations into account, it was decided to use PV arrays with 250 pm
diameter. A large multi mode fiber with a core diameter o f 200 pm could be butt coupled to
the array, thus eliminating the need for focussing/collimating optics. This arrangement allows
for alignment errors up to 50 microns without significantly affecting the PV array
performance. Another concern for good layout is that the ratio of optically active area to the
total PV array area be large. Regions between device mesas and regions shadowed by contact
metal do not contribute to photocurrent even though they are illuminated and hence must be
minimized. The circular array with pie shaped detectors, shown in fig. (3.13), minimizes the
inactive regions between devices. The big contact pads and airbridges are placed towards the
periphery of the array so that the inner region of diameter 2 0 0 pm (matched to fiber core) is
not blocked by metal. For the structure shown in fig. (3.13), the optically active region
42
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
occupies 80% of the total area enclosed by the array. Note that the inactive regions can not be
made much smaller (limited by process capabilities), so when the PV array dimensions are
reduced, the inactive regions become larger fractions of the total area thus reducing the
optical efficiency.
O hm ic C o n ta c ts
N ext
device
A irbridge
P-GaAs
P-GaAs
N-GaAs
N-GaAs
N ext
device
S ubstrate L eak ag e
S em i-in su la tin g G a A s
(a)
O hm ic C o n ta c ts
N ext
device
Airbridge
P-GaAs
P-GaAs
N-GaAs
N-GaAs
device
Oxidized AlGaAs
O xidized A lG aA s
Semi-insulating GaAs
(b)
Figure 3.12: a) Leakage path through the substrate due to the presence o f
photogenerated carriers b) B uried oxide layer to eliminate substrate leakage.
43
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure 3.13: Layout o f monolithic GaAs P V array, designed and fabricated at
UCSB, show ing pie shaped detectors connected together by airbridges to form a
circular array.
3.6 Fabrication o f planar GaAs PV cells and arrays
The epitaxial structure of the GaAs wafers used for the fabrication of monolithic PV
arrays are shown in fig. (3.14a,b). The structures were grown by Prashant Chavarkar on MBE
system B at UCSB. The structure depicted in fig. (3.14a) incorporates a .05 pm thick
AI.9gGa.02As layer below the N* contact layer. As discussed in the previous section, this
Al.ggGa.02As layer is oxidized laterally to form an insulating layer at the base of the device
mesa. The structure shown in fig. (3.14b) is the control structure and it does not have the
buried Al.9gGa.02 As layer for lateral oxidation. The control structure serves as a reference to
study the effectiveness of the buried oxide isolation scheme. It also enables us to determine
whether the oxidation process has any deleterious effects on the electrical/optical
characteristics o f the PV cells. Another difference between the two structures is that the
control sample does not have the Al.g5Ga.15As window layer at the top surface. Thus the
44
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
effect of the Al.8sGa.15As passivation layer on the surface recombination velocity can be
studied. Apart from these differences, the two structures in fig. (3.14a,b) are identical.
P* GaAs (Na = 5 10t8) 500A
P-G aA s (Na = 5 IO17) 6000A
N -G aA s (Nd = 2 IO17) 7000A
N* GaAs (Nd = 3 1018) 7000A
Senu-insulating G aA s Substrate
(a)
P* GaAs (Na = 5 1018) 500A
P- GaAs (Na = 5 1017) 6000A
N- GaAs (N d = 2 1017) 7000A
N+ GaAs (Nd = 3 1018) 7000A
Semi-insulating GaAs Substrate
(b)
Figure 3.14: a) Epitaxial layer structure for the oxidized sample b) epitaxial layer
structure fo r the control sample.
45
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
~A I.85G a .t5A S
P GaAs
N~ GaAs
N -G aA s
" A 1.98G a D2A S
(a)
f - A l gjGa jjAs
P GaAs
N~ GaAs
N + GaAs
Li n~i
B uried Oxide
m
w
(b)
N-Ohmic
Contact
A 1.8SG a J 5 A s
P GaAs
N -G aA s
N+ GaAs
B uried Oxide
P-Ohmie
C ontact
N-Ohmic
Contact
P GaAs
N -G aA s
N+GaAs
Buried Oxide
iJJSTTK
Airbridge
Airbridge
N+ GaAs
Buried Oxide
(e)
Figure 3.15: Fabrication process for the planar GaAs PV arrays
46
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The fabrication of the monolithic GaAs PV arrays is similar to the fabrication
process used for conventional GaAs PN junction diodes except for two changes- the addition
of the lateral oxidation step and the stage at which the mesa isolation is carried out. A layer
of Al.9gGa.02 As is incorporated below the N*" contact layer during MBE growth of the
epitaxial layers and is oxidized in steam using a process described in [11]. The Oxidation
step needs to be carried out before any steps that involve metallization (contacts, airbridges
etc.) as it requires exposure to elevated temperatures (430°Q for a long time (40 minutes).
Also, since the oxidation proceeds laterally, the diode mesa has to be etched to expose the
Al.98Ga.02 As layer before it can be oxidized. Hence the mesa etch is the first step in the
monolithic PV array process shown in fig. (3.15). A t the end of the mesa etch step, thickness
variations o f the order of
2
pm are present on the wafer surface, which limits line width
attainable in the following lithography steps (reason why Schottky contact widths of 2 pm
are used). Following the mesa etch, the buried Al.9gGa.02 As layer is oxidized in steam at
430°C for 40 minutes. A self-aligned step is used to etch away the P-GaAs and N-GaAs
material and Au/Ge/Ni/Au contacts are deposited on the heavily doped N 1" GaAs contact
layer. The N-ohmic contacts are alloyed at 420°C for 1 minute. Next the P-ohmic contacts
are fabricated by etching away the Al.g5Ga.15As window layer and depositing Ti/Au metal on
the P* GaAs contact layer. Airbridges connecting the cells within each array are fabricated
using a two layer resist scheme described in detail in appendix A. Finally a layer of silicon
nitride of thickness
0 .1
pm is applied to the top surface of the cell as an anti-reflection
coating.
Two wafers with the epitaxial structure listed in figure (3.14a,b) were taken through
the fabrication process simultaneously. The wafer with the buried oxide layer is referred to as
the oxidized sample and the wafer without the buried oxide layer is called the control sample.
Note that for the control sample, the oxidation step is eliminated but all other fabrication
steps are the same as those for the oxidized sample.
3.7 Characterization of single large area GaAs PV cells
The processed wafers contained single large area PV cells in addition to 10-cell PV
arrays that were intended for use in the monolithic OVC. The electrical and optical
47
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
performance o f the single large area PV cells was characterized first and then the properties
o f the 10-cell PV arrays were measured. The array performance was compared to that of the
single PV cells to ensure that the monolithic integration process did not degrade their
performance. The electrical properties were characterized (in the absence o f illumination) by
measuring the I-V curves on a HP4145 Semiconductor Parameter Analyzer. Optical
characterization of the devices was performed by recording the I-V curves for different
intensities of illumination. The illumination source used here was a semiconductor laser
diode operating at a wavelength o f 670 nm and capable of producing up to 10 mW o f optical
power. The light from the laser diode was launched into a large multi mode fiber with core
diameter 200 pm. The output end o f the fiber was butt coupled to the device under test and
was positioned using a fiber probe mounted on a XYZ translator stage.
The I-V curve of a single large area PV cell fabricated on the oxidized wafer is
shown in fig. (3.16a,b) on a linear and logarithmic scale. From the linear I-V curve, we can
see that the forward turn on voltage for the PN-junction diode is about 1.2 V. For large
values of forward bias, the diode current is limited by the series resistance of the diode and
this is calculated to be 8.7 £2. Fig. (3.16b) shows the I-V data on a log scale. The horizontal
axis in this plot is the junction voltage and is calculated by subtracting the voltage drop due
to the series resistance from the applied bias. Using the slope of the log(I)-V curve in
equation (3.5), an ideality factor can be estimated for the devices. As depicted in fig. (3.16b),
the ideality factor is 2 for low values of applied forward bias and 1.7 for higher forward bias.
This because the actual diode current has an injected component (4i/) and a component due to
recombination generation (7^) as described in equation (3.12).
f qV \
f qv ^
+ I 7 e 2kT — 1
V
)
(3.12)
For low values of forward bias (<0.8 V), the recombination generation component dominates
and this explains the n=2 region. For higher forward bias, the injected current starts to
dominate, but the total current still has contributions from the recombination term and so the
ideality factor is between 1 and 2 (1.7 in this case). The range of voltages around 0.9 V is of
interest to us as the photogenerated voltage is of this order. By fitting the measured I-V data
in this voltage range to the ideal diode equation, an ideality factor o f 1.7 and a reverse
saturation current density of 5 10'u A/cm 2 were estimated for the PV cell on the oxidized
48
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
wafer. Similar values have been reported for PV cells on MBE grown GaAs. The
measurements and analyses reported above were repeated for a large area PV cell on the
control wafer. The results are shown in fig. (3.17a,b) and are essentially the same as that for
the oxidized sample. This tells us that the lateral oxidation step did not adversely affect the
electrical properties of the PV cell.
The I-V curves o f the single large area cells were also recorded for varying
intensities of optical illumination. Fig (3.18a) and fig (3.18b) show the I-V curves under
illumination for the oxidized sample and the control sample respectively. As mentioned
earlier, these curves were measured at a wavelength of 670 nm. From the I-V curves, the
short circuit current and the open circuit voltages were extracted and their dependence on the
optical power was studied. Fig (3.19a) depicts the short circuit current of the oxidized and
control sample as a function o f optical power. As expected, the short circuit current for both
samples varies linearly with incident optical power. From the slope of the he versus Pop curve
the external quantum efficiency was calculated to be 75% for the oxidized sample and 69.6%
for the control sample. The higher quantum efficiency for the oxidized sample is believed to
be due to reduced surface recombination at the top interface because of the Al.g3 Ga.t3As
layer. Note that the quantum efficiency numbers calculated above are external quantum
efficiencies and do not take into account the fact that some of the light is reflected at the front
surface and that the contacts block some of the light. After accounting for light lost due to
these effects, the internal quantum efficiency is calculated to be 85.8% for the oxidized
sample and 79.6% for the control sample. Fig. (3.19b) depicts the measured open circuit
voltages as a function of the optical power in decibels and shows that the open circuit voltage
does indeed vary as the logarithm of the incident optical power. Note that the open circuit
voltages are almost identical for both samples. The fill factor and the energy conversion
efficiency were also extracted from the I-V data for the large area PV cell on the oxidized
wafer and the control wafer. The fill factor was almost equal for both samples but the
oxidized sample had a higher energy conversion efficiency of 35.3% compared to the control
sample with an energy conversion efficiency of 33.3%. Note that the higher energy
conversion efficiency is due to the higher short circuit currents in the oxidized sample, which
in turn is attributed to the fact that the Al.g3Ga.15As layer reduces surface recombination. The
49
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
performance of the two samples is summarized in table (3.1). The numbers measure here are
comparable with those reported in the literature for planar PV cells [12].
40
1
I
uS
0
1
Voltage (V)
(a)
n=1.7
<
u3
r
0
9 .6
1
Junction Voltage (V)
(b)
Figure 3.16: Forward I-V curves for a large area PV ceD (oxidized sample) in the
absence o f illumination
50
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
40
A
1
e
£
•10
0
1
Voltage (V)
(a)
n=l-75
n=2 . -•
e
£L.
rI0
0
0.4
0.0
0.8
1
Junction Voltage (V)
(b)
Figure 3.17: Forward I-V curves fo r a large area PV cell (control sample) in the
absence o f illumination
51
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
P =1.05mW
1
B
£w
a
U
P =5.1mW
1
0
Voltage (V)
(a)
P =310|iW
•<
s
S
aL.
3
u
P =5JmW
0.6
0
1
Voltage (V)
<b)
Figure 3.18: I-V curves as a function of illumination for single large area PV cells
fabricated on a) oxidized wafer b) control wafer
52
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2
Control
Sample
£fa
3
u
1
u
t
0
0
1
3
2
4
5
Optical Power (mW)
(a)
>
o3o
1.1
Oxidized
Sample
Control Sample -
>
•3
£
0 .7
-10
0
-S
Optical Power (dBm)
5
(b)
Figure 3.19: Comparison of the single large area PV cells on the oxidized wafer and
the control wafer a) Short circuit current as a function of optical power b) open
circuit voltage as a function of optical power.
53
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Sample
Quantum efficiency
Fill Factor
Conversion efficiency
Control
69.6%
0.81
33.3%
Oxidized
75%
0.82
35.3%
Table 3.1: Summary of single large area PV cell performance under illumination
with 5 mW of optical power at 670 nm.
3.8 Characterization of 10-cell GaAs PV arrays
The dark I-V curve for a 10-cell PV array is shown in fig. (3.20a) on a linear scale. It
can be seen that forward conduction through the array turns on at -12 V which is to be
expected since the turn on voltage for a single cell is approximately 1.2 V. The series
resistance of the 10 cell array is 64 £2. The data shown in fig. (3.20a) is for the oxidized
sample but the control sample has similar characteristics (in the absence of illumination) as
can be verified from the log® versus voltage behavior shown in fig. (3.20b). From the slope
of the Iog(I)-V curves, an ideality factor and reverse saturation current for the individual
diodes within the array can be computed. This assumes that the applied bias is divided
equally among the
10
diodes and is a reasonable assumption since all the diodes are identical.
The computed ideality factor for the diodes is 1.9 and the reverse saturation current is 4 10*13
A. Note that these values are higher than the corresponding ideality factor and reverse
saturation current calculated for single large area PV cells. This can be explained by the fact
that the cells within the PV array have a higher perimeter to area ratio than the large area test
structures and hence the surface recombination current constitutes a larger fraction of the
total diode current for the diodes in the array. The data in fig. (3.20b) confirms that
electrically, the PV array behaves like 10 diodes connected in series and that in the absence
of illumination, the oxidized sample and the control sample have similar electrical
characteristics. The similarity in the dark I-V curves of the oxidized and control sample is to
be expected since substrate leakage becomes an issue only when the array is illuminated.
54
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
40
30
1
20
B
U
-10
0
2
4
8
6
10
12
14
Applied Bias (V)
(a)
Oxidized Sample
Control Sample
<
B
tu
3
0
2
6
8
4
Junction Voltage (V)
10
12
(b)
Figure 3.20: a) I-V curve for a 10-ceII P V array on the oxidized w afer b)
C om parison o f the I-V characteristics o f 10-cell P V arrays with and w ithout the
buried oxide.
55
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The I-V curves of the 10-ceU PV array for various values o f illumination intensity
are plotted in fig. (3.21a) for the oxidized sample and in fig. (3.21b) for the control sample.
The extracted short circuit current and open circuit voltage as a function of optical power are
depicted in fig (3.22a,b). Since the voltage across the array is zero under short circuit
conditions, the substrate leakage current is zero and hence both the samples have similar
short circuit currents. However, under open circuit conditions, the photogenerated voltage
causes some o f the photocurrent to flow through the substrate leakage path for the control
sample. The oxidized sample is effectively isolated from the substrate and hence the entire
photocurrent flows through the series of PN junctions. This explains the higher open circuit
voltages seen in the case of the oxidized sample. The effect of substrate leakage can be seen
clearly in fig. (3.23a) where the I-V curves for the oxidized sample and the control sample
are shown side by side. Besides reducing the open circuit voltages, substrate leakage also
adversely affects the fill factor and energy conversion efficiency. Table (3.2) compares the
performance o f 10-cell PV arrays with and without the buried oxide. The fill factor of the
oxidized sample is 0.84 and that for the control sample is 0.44. The energy conversion
efficiency for the oxidized sample is 26.8% while that for the control sample is only 13.3%.
From this data it can be seen that the buried oxide layer is effective in preventing substrate
leakage.
Note that even for the oxidized array, the energy conversion efficiency is lower than
that of a single large area PV cell (35.3%). The reason for this disparity is that some of the
incident optical power is absorbed in the inactive regions between the device mesas. As
indicated earlier, the ratio of the optically active area to the total array area is 0 .8 , which
explains why the efficiency is correspondingly lower.
Sample
Open circuit voltage
Fill Factor
Conversion efficiency
Control
9.95 V
0.44
13.3%
Oxidized
10.5 V
0.84
26.8%
Table 3.2: Summary of 10-cell PV array performance under illumination with 5 mW
of optical power at 670 nm.
56
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P *310 jiW
-40
-80
120
0
2
4
6
8
10
8
10
Voltage (V)
(a)
-40
P =1.3 mW?
-80
P = l7 m W
<
•
e
£
u
0
2
4
6
Voltage (V)
(b)
Figure 3.21: I-V curves as a function o f illumination for 10-cell P V arrays fabricated
on a) oxidized wafer b) control wafer
57
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
160
140
•<
3
120
100
s
a
■3
ce
St
tx
Oxidized
Sample
y ?C ontrol
80
Sample
60
40
20
0
0
1
4
3
2
5
Optical Power (mW)
(a)
>
t
>
3
2
u
I
Control
Sample
8.5
O
-10
-5
0
5
Optical Power (dBm)
(b)
Figure 3.22: Comparison of the 10-cell PV arrays on the oxidized wafer and the
control wafer a) Short circuit current as a function of optical power b) open circuit
voltage as a function of optical power.
58
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.9 Effect o f DC loads on the performance o f 10-cell PV arrays
As discussed in the previous chapter, a fixed DC load resistance is connected across
the PV array in the OVC. This resistance acts as a discharge path for the array and improves
the switching speed. The other advantage of using this resistor is that it helps to “linearize”
the output voltage versus optical power response. From fig. (3.22b) it can be observed that
the output voltage increases as the log of the optical power under the open circuit conditions.
This makes the voltage very sensitive at low illuminations and less sensitive for higher
illuminations. In fact, in going from no illumination to a very small optical power (SO p.W),
the array output voltage increases from 0 V to 8.1 V in the open circuit case. This situation is
undesirable since it requires extremely accurate control of the optical power. As shown in fig.
(3.23b), the fixed DC load resistance addresses this problem. The output voltage increases
linearly for low optical power and eventually becomes a logarithmic function at high optical
power. Note however that the reduced sensitivity comes at the cost of increased optical
power requirements. The smaller the value of load resistance, higher is the optical power
required to generate a given output voltage
The ability of a PV array to drive a load is linked to its fill factor. Since the control
sample has a much lower fill factor than the oxidized sample it can not effectively drive
small loads. This is indicated in fig. (3.23b) where it can be seen that for a given optical
power and load resistance, the control sample generates a lower voltage than the oxidized
sample. Also, the disparity in the output voltages between the control sample and the
oxidized sample becomes larger as the value of the load resistance is decreased. To realize
the importance of this effect, let us consider an application that requires the PV array to
generate up to
8
V across a 500 KQ load. In the case of the oxidized sample, 500 jiW of
optical power would be required where as the control sample would need an optical power Of
1.3 mW to drive the same load to
8
V. This emphasizes the importance of the buried oxide
layer in reducing the optical power consumption.
An equivalent circuit model for the illuminated 10-cell PV array under DC loading is
shown in fig. (3.24a). The model consists of 10 PN diodes in series, connected in parallel
with a current source that accounts for the photogenerated current. Note that this model
implicitly assumes that all the diodes are being illuminated uniformly and that the
59
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
P =5.1 mW
Control / S a m p le/
<
e
S
a
U
km
-120
Oxidized
Sample
•160
0
2
4
8
6
10
Voltage (V)
(a)
12
>
I
%
>
10
8
6
©
t
5
S
V
S
4
Oxidized Sample
- Control Sample
2
0
0
1
3
2
4
5
Optical Power (mW)
(b)
Figure 3.23: a) Comparison of I-V curves of 10-cell PV arrays fabricated on the
oxidized wafer and the control wafer, b) Array output voltage for various DC load
values.
60
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
+
Current
Source
External
D C Load
f - Ideal
• Diodes
t
CS
t
ee
>
I
Illuminated Array
(a)
10
8
6
4
2
0
+ Measured
— Modeled
—
0.01
0.1
1
10
Optical Power (mW)
Figure 3.24: a) Equivalent circuit model for 10-cell PV array driving an external DC
load b) Comparison o f sim ulated and measured array output voltage.
61
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
photocurrent generated in each is identical. This assumption is reasonably good for the
circular array configuration and provides a good starting point for analysis. The diodes are
assumed to have an ideality factor of 1.9 and reverse saturation current of 4 10' 13 A based on
the measured I-V data. The amplitude of the photocurrent is calculated from the optical
power since the quantum efficiency of the diodes is known. Using the parameters discussed
above for the elements o f the equivalent circuit model, the output voltage of the PV array
driving a DC load was simulated on the HP EEsof DC Test Bench. The simulation results
showed good agreement with the measured data as depicted in fig. (3.24b). Hence the
equivalent circuit model o f fig. (3.24a) can accurately predict the PV array output voltage as
a function of optical power as well as DC load resistance.
Thus, planar GaAs PV arrays have been successfully fabricated alongside planar
GaAs Schottky varactor diodes (on the same wafer) using monolithic fabrication and
integration techniques. A novel buried oxide isolation scheme was utilized in the monolithic
PV arrays to prevent substrate leakage under illumination. The PV arrays with the buried
oxide isolation are capable of generating up to
10
.S volts under illumination and have fill
factors and energy conversion efficiencies as high as 0.84 and 26.8 % respectively. The high
fill factor and conversion efficiency enables the PV array to drive DC loads with small
optical powers. This plays an important role in reducing the optical power requirements of
the OVC, as will be discussed in more detail in the following chapter.
References
[1]
M. J. W. Rodwell. M. Kamegawa, R. Yu, M. Case, E. Carman, and K. S. Giboney, “GaAs nonlinear
transmission lines for picosecond pulse generation and millimeter-wave sampling,” IEEE Transactions
on Microwave Theory and Techniques, vol. 39, pp. 1194-2041991.
[2]
S. T. Allen, “Schottky Diode Integrated Circuits for Sub-Millimeter-Wave Applications,” PhJ). Thesis:
University o f California at Santa Barbara, 1994.
[3]
S. T. Allen, U. Bhattacharya, and M. 1. W. Rodwell. “Multi-terahertz sidewall-etched varactor diodes
and their application in submillimetre-wave sampling circuits,” Electronics Letters, vol. 29, pp. 2227-8,
Dec. 1993.
[4]
H. J. Hovel, Solar cells.
Semiconductors and semimetals;vol. 11: Acadenic Press, New York,
1975.
62
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[5]
M. R. Melloch, S. P. Tobin, T. B. Stellwag, C. Bajgar, A. Keshavarzi, M. S. Lundstrom, and K- Emery,
“High-efficiency GaAs solar cells grown by molecular-beam epitaxy,” in /. Vac. ScL Technol. B,
Microelectron. Process. Phenom. USA, Raleigh, NC, USA, 1989, vol. 8, pp. 379-83.
[6]
J. M. Woodall and H. J. Hovel, “High-efficiency Ga/sub 1-x/Al/sub x/As-GaAs solar cells,” Applied
Physics Letters, vol. 21, pp. 379-81, Oct. 1972.
[7]
G. C. DeSalvo and A. M. Barnett, “Investigation o f alternative window materials for GaAs solar cells,”
IEEE Transactions on Electron Devices, vol. 40, pp. 705-11, April. 1993.
[8]
A. Saletes, J. P. Contour, M. Leroux, J. Massies, N. Defranould, and G. Pelous, “GaAlAs/GaAs solar
cells grown by molecular beam epitaxy: material properties and device parameters,” Solar Cells, vol.
17, pp. 373-81. M. April. 1986.
[9]
A. S. Nagra, P. Chavarkar, C. J. Swann, T. Larry, M. L. VanBIaricum. U. K. Mishra, and R- A- York,
“Monolithic optically variable capacitors for tunable microwave antennas,” in Proceedings.
IEEE/Comeli Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,
Ithaca, NY, USA, 1997,, pp. 69-78.
[ 10]
A. S. Nagra, M. L. VanBIaricum, and R. A. York, “Low -power indirect optical reactance control using
monolithic GaAs OVC technology.” in Photonic systems fo r Antenna Applications Symposium
Proceedings, Monterey, CA, 1998,, pp.
[11]
P. A. Parikh, P. M. Chavarkar, and U. K. Mishra, “GaAs MESFETs on a truly insulating buffer layer:
demonstration of the GaAs on insulator technology,” IEEE Electron Device Letters, vol. 18, pp. 111131997.
[12]
W. W. Ng, K. Nakano, Y. Z. Liu, and P. D. Dapkus, “A monolithic GalnAsP/InP photovoltaic power
converter,” IEEE Transactions on Electron Devices, vol. ED-29, pp. 1449-54, Sept. 1982-
63
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Chapter 4
Demonstration of the Monolithic OVC in
Microwave Circuits and Antennas
This chapter deals with the fabrication and testing of the monolithic OVC and its
demonstration in microwave circuits and antennas. Using monolithic techniques, GaAs PV
arrays, Schottky varactor diodes and resistors were simultaneously fabricated on the same
wafer and integrated to form the complete OVC. The monolithic OVC was subsequendy
incorporated into monolithic microwave circuits and antennas. Details of the fabrication and
integration techniques are reported here. Microwave performance o f the individual OVC and
the circuits/antennas that incorporate the OVC is also presented. Optical control of band
reject filters, x-band analog phase shifters and folded slot antennas has been demonstrated.
The circuits/antennas mentioned above did not require external DC bias and less than 500
(i.W of optical power was needed for the maximum tuning/control range. This is the lowest
reported optical power requirement for bias free optical control of microwave circuits. Also,
the transient response of the OVC was measured and it was demonstrated that the rise/fall
times o f the OVC could be made less than 1 fis (which is fast enough for several microwave
control applications). Thus, this chapter demonstrates the feasibility of the monolithic OVC
technology for low power, bias-free control of microwave circuits and antennas.
4.1 Monolithic integration of the OVC components
The monolithic OVC consisted of a GaAs PV array, a varactor diode and a
RF-blocking resistor connected as shown in fig. (4.1a). The GaAs PV array consisted of
10 planar PN-junction photovoltaic cells, connected in series to form a circular PV array. The
varactor diode employed in the OVC was a planar Schottky diode. The design, fabrication
and testing of the 10-cell GaAs PV array and the Schottky varactor diode have been
described in detail in chapter 3. The RF-blocking resistor was of 2.5 KQ value and was
64
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
fabricated on-wafer using NiCr as the resistive layer. The NiCr layer (50nm thick) had a
sheet resistance of 40 Q/square and so the resistor was designed to have a length to width
aspect ratio of 62.5. CPW contact pads were provided to enable microwave measurements on
the OVC and also to make it easy to incorporate the monolithic OVC into microwave
circuits/antennas. The connections between the individual components within the OVC, as
well as to the CPW pads, were made using monolithically fabricated airbridges. A schematic
of the layout of the monolithic OVC is shown in fig. (4.1b).
Note that in fig. (4.1a) the DC load resistor is shown external to the monolithic OVC.
The DC load resistor is the only component of the OVC that was not fabricated and
integrated using monolithic processing techniques. As discussed in chapter 3, this DC load
resistance is required to reduce the sensitivity of the PV array for low illumination intensities
and to increase the switching speed. Since this resistance must large (100 KQ-l MQ), it was
not implemented on wafer. A miniature chip resistor of value 100 ICQ-1 MQ was wire
bonded to the OVC circuit to provide the DC load. Connection parasitics due to the wire
bonds were not a concern since this load resistor only affects the DC performance and acts
like an open circuit at microwave frequencies.
A brief description of the fabrication process for the monolithic OVC is given here
and detailed processing instructions are included in appendix A. The process flow schematic
in fig. (4.2) depicts the simultaneous fabrication of the individual OVC components and their
eventual integration. The first step is the definition of the active mesa regions for the PV
cells and the Schottky diodes. The material surrounding the active mesas is removed by RIE
etching away the GaAs layers down to the semi-insulating substrate. The next step is the
lateral oxidation o f the Al.9gGa.02As layer at the bottom of the device mesas. The lateral
oxidation of the Al.9gGa.02As is carried out in the presence of steam in a furnace at 430° C. At
the end of this step the all the mesa regions have been effectively isolated. The next step is
the removal of the P-type GaAs material on the Schottky mesas to expose the Iighdy doped
N~ GaAs layer, which is the topmost layer for the Schottky diodes. Self-aligned N-ohmic
contacts are made by etching down to the heavily doped N*’ GaAs contact layer and
depositing AuGe/Ni/Au. The contacts are alloyed at 430° C for 1 minute. Note that the Nohmic contacts for the PV cells and the Schottky varactor diode are fabricated in the same
step. The varactor diodes are completed when Pt/Au is deposited as the Schottky contact
65
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
RF Block
R esistor
« £
w
2
Monolithic OVC
(a)
Varactor Ohmic
Contact
RF Block
' Resistor
Ground
u
JO
ou.
cu
£
cu
u
Signal
PV Array
Ground
Airbridges
Varactor Schottky
Contact
Cb)
Figure 4.1: (a) Components of the monolithic OVC (b) Layout of the monolithic
OVC.
66
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
PV cell mesa
Schottky diode mesa
P - GaAs
P - GaAs
N -G aA s
N - GaAs
N + G aA s
N-f-GaAs
— Oxidized AlGaAs—
(a) M esa etch and lateral oxidation
PV cell m esa
P - GaAs
Schottky diode mesa
N- GaAs
N - GaAs
Igsgs
Oxidized AlGaAs
(b) Expose top o f Schottky m esa
P- GaAs
N-ohmic
N-ohmic
Oxidized AlGaAs
(c) S elf aligned N -ohm ic contacts
Schottky
contact
N-ohmic
N-ohm ic
Oxidized AlGaAs
(d) Schottky contact
67
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
P-ohmic
Schottky
contact
P- GaAs
N-ohmic
N -G aA s
£ S £
|
N-f-GaAs
|
N -G aA s
N+ GaAs
(e) P-ohmic contacts
AR coating >
......
Schottky
contact
,,,,
P -G aA s
N-ohmic
NiCr Resistor
N -G aA s
N -G aA s
N+ GaAs
N + G aA s_______
(f) A R coating and NiCr resistors
AR coating
P-ohmic
Schottky
contact
P- GaAs
N-ohmic
N-ohmic
(g) CPW metal and resistor pads
A R coating
A ir Bridges
P -G aA s
N- GaAs
N -G aA s
N + G aA s
>"*<33pgg
;!?55w?2
(h) A ir bridge interconnections
Figure 4.2: Fabrication process flow for the monolithic OVC
68
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
layer on the lightly doped N- GaAs layer on the Schottky mesa. Note that this step does not
affect the PV cell mesa. The PV cells are completed by depositing a non-alloyed Ti/Au
contact on the heavily doped P+ GaAs layer on the PV cell mesas. Next a layer of silicon
nitride (SisN*) of thickness 85 nm is deposited over the entire wafer. This layer serves as the
anti-reflection coating for the optically active PV cell mesas. The Si3N* layer lying on the
semi-insulating substrate acts as the insulating barrier on which the NiCr resistor and CPW
metal can be deposited. This insulating layer prevents optically generated carriers in the
substrate from leaking into the resistor/CPW metal. The RF-blocking resistor is fabricated by
depositing a layer of NiCr of thickness 50 nm on top of the silicon nitride layer. The next
step is the evaporation of 1.5 pm thick Ti/Au to form the CPW pads and the resistor contacts.
Finally all the components are connected using a two-step air bridge process described in
detail in appendix A.
A picture of the monolithic OVC fabricated at UCSB is shown in fig. (4.3a). The
circular PV array, RF-blocking resistor, Schottky varactor diode, CPW pads and airbridges
used for connections are clearly visible.
4.2 Microwave characterization o f the monolithic OVC
The microwave performance of the monolithic OVC was tested on a Cascade RF
probe station with X-Y-Z translator stages on which ACP-40 CPW probes were mounted.
The CPW probes were connected to a HP 8510 network analyzer to make s-parameter
measurements. The measurement setup was calibrated using the Line Reflect Match (LRM)
calibration scheme developed by Cascade Microelectronics. The illumination for the OVC
was provided by a semiconductor laser diode operating at a wavelength of 670 nm. The
output from the laser was coupled into a multi-mode fiber with a core diameter of 2 0 0 pm.
The output end of the fiber was aligned vertically over the OVC using a fiber probe mounted
on a X-Y-Z translator stage. Fig. (4.3b) shows a picture of the measurement setup and the
CPW probes and the fiber probe can be clearly seen over the stage bearing the OVC wafer.
69
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(a)
i >\\
M\ (
(b)
Figure 4.3: (a) Picture of monolithic OVC fabricated at UCSB (b) photograph of the
measurement setup used for microwave characterization of the monolithic OVC.
70
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The s-parameters of the OVC were recorded as a function of optical illumination
over the frequency range o f interest At microwave frequencies, the RF-blocking resistor
effectively acts like an open circuit and so the PV array makes negligible contribution to the
RF performance of the OVC. Thus the OVC essentially behaves like a varactor diode at the
end of CPW pads. Hence the same technique that was used for characterization of the
Schottky varactor diode was used here to study the microwave characteristics o f the OVC. hi
order to de-embed the OVC from the CPW pads, an on-wafer reference standard comprising
of probe pads terminated with a short circuit was used to set the reference plane at the
position of the OVC. The measured one port s-parameter (SI1) was converted to an
equivalent admittance (T) and fitted to a simple series RC model using the method described
in [1,2]. The OVC capacitance extracted from the s-parameter data is shown as a function of
optical power in fig. (4.4). It can be seen that the OVC capacitance varies from 0.85 pF to
0.38 pF when the optical power is increased from 0 pw to 200 pW. Thus a capacitance swing
by a factor of 2.2 was achieved with just 200 pW of optical power. Note that the DC load
resistor for this measurement was
1
and was due to the impedance of the probing setup.
The variation of the OVC capacitance with optical power was modeled using the
measured characteristics of the individual OVC components. As discussed in the previous
chapter, the PV array output voltage has been recorded for different optical powers and DC
load resistances. The variation of the Schottky varactor capacitance with applied bias has
also been studied. By combining this data, a curve for the expected OVC capacitance
variation with optical power was generated. As shown in fig. (4.4), the modeled capacitance
versus optical power curve and the capacitance extracted from the s-parameter data show
reasonably good agreement. The extracted capacitance is about 0.04 pF higher than the
expected capacitance and this can be attributed to fringing capacitance not accounted for in
the model.
Monolithic microwave circuits such as band reject filters and x-band analog phase
shifters, which incorporated the OVC as the optically controlled reactive element, were
designed and fabricated. Folded slot antennas with shunt OVCs for impedance tuning were
also fabricated and tested. Bias free optical control o f these circuits/antennas was
demonstrated and the details are provided in the following sections.
71
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Modeled
Extracted from s-parametefs
•
0.7
A
i
0.6
|
1a.
0.5
a
U
0.4
0
0.05
0.1
Optical Power (mW)
Figure 4.4: OVC capacitance variation with optical power.
4.3 Optically tunable band-reject filter
One of the simplest circuits designed to demonstrate optical control using the
monolithic OVC was the optically tunable band reject filter. The circuit was fabricated on
GaAs using monolithic techniques and shared the same process steps as the OVC. A picture
of an optically tunable band reject filter circuit fabricated at UCSB is shown in fig. (4.5a).
The CPW lines for the input and output of the microwave signal, the CPW resonator, and the
OVC are clearly visible.
The equivalent circuit for the optically tunable band reject filter is given in fig. (4.5b)
and shows an OVC (zero bias capacitance 0.85 pF) placed at the end of a shunt stub of
impedance 80 £2 and length 2.5 mm. The basic principle of operation of this circuit is fairly
straightforward. The stub loaded with the OVC acts as the resonator whose electrical length
determines the resonance frequency. At resonance, the OVC-loaded shunt stub appears like a
short circuit, causing the microwave signal to be reflected. Hence frequencies in the vicinity
of the resonance frequency are not transmitted through the structure resulting in band reject
72
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characteristics. Due to the optically variable capacitance loading the shunt stub, the
resonance frequency and hence the rejection band can be tuned optically.
(a)
RF
input
Zo=80Q
40° @ 5GHz
r
Monolithic —
OVC
”7
RF
output
C0=0.85 pF
V
(b)
Figure 4.5: (a) Picture of optically tunable band reject filter fabricated at UCSB (b)
equivalent circuit for the optically tunable band reject filter.
73
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o
-5
-10
e
r
P^=4S0 (lW
-15
•20
0
2
4
6
8
10
8
10
Frequency (GHz)
(a)
0
-5
eo
-15
-20
0
2
6
4
Frequency (GHz)
(b)
Figure 4.6: (a) Measured response of the optically tunable band reject filter
(b) simulated response of the optically tunable band reject filter.
74
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The measured performance of the optically tunable band reject filter fabricated at
UCSB is shown in fig. (4.6a). Note that the rejection frequency can be tuned from 3.8 GHz
to 5.2 GHz, which corresponds to a 31% tuning range centered about 4.5 GHz. Note that no
external DC bias was used and only 450 pW of optical power was required to achieve the
maximum possible tuning. This is the lowest reported optical power [3-5] for bias-free
optical control of a tunable filter. Note that the DC load resistance for this measurement was
500 K£2, due to the parallel loading effect of the input and output probes (1 MQ per probe).
The performance of this circuit was also simulated on the HP EEsof linear test bench. The
transmission line sections were modeled using the CPW element available in EEsof while
actual measured s-parameter data was used for the OVC. The simulated results, shown in fig.
(4.6b), are consistent with the measured data and the resonance frequency is off by less than
5.7 %. Note that the magnitude of the measured rejection is greater than 15 dB over all
tuning states. Better rejection can be achieved by using multiple resonator sections, which is
a straightforward extension of the circuit described here.
4.4 Optical control o f a X-band analog phase shifter
Optical control of Schottky contacted CPW phase shifters has received considerable
attention in the literature [6 -8 ]. These phase shifters consist of a CPW line where the center
conductor acts like a distributed Schottky contact while the ground planes serve as the ohmic
contacts. The problem with these phase shifters is that the insertion loss is high and losses as
high as 20 dB for a 180° phase shifter have been reported [7]. Also, these phase shifter
circuits require a large reverse bias voltage to be applied across the Schottky diode. These
problems have been overcome in the optically controlled phase shifter designed at UCSB.
The phase shifter consists of a CPW line periodically loaded with shunt varactor diodes. The
varactor diodes are controlled by an integrated photovoltaic array, which provides the bias
for the circuit. The entire circuit including the CPW line, Schottky varactor diodes, PV array,
RF-blocking resistor and the airbridges for connections are fabricated using the same process
as the OVC. A picture of the optically controlled phase shifter circuit fabricated at UCSB is
shown in fig. (4.7a). Note that this circuit differs from the conventional OVC circuits in that
a single photovoltaic array simultaneously controls several varactor diodes. Since all the
75
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diodes in the phase shifter require the same reverse bias voltage, they can be controlled using
the same PV array.
RF input
(a)
Photovoltaic
Array
RF block
resistor
RF
input
Zo=76 a
37.3° @ 12 GHz
RF
output
Schottky
Varactor
(b)
Figure 4.7: (a) Picture of an optically controlled phase shifter fabricated at UCSB
(b) Equivalent circuit for the optically controlled phase shifter.
76
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An equivalent circuit for the varactor-loaded CPW line controlled by the PV array is
shown in fig. (4.7b). A high impedance transmission line (Za=Hl £2) is periodically loaded
with varactor diodes (zero bias capacitance of 0.28 pF). When a uniform transmission line is
periodically loaded, the structure exhibits Bragg frequencies at which the reflections add in
phase and transmission through the structure is suppressed. For frequencies well below the
lowest Bragg frequency, the periodic load elements can be absorbed into the line and the
entire structure can be treated as an artificial transmission line with modified impedance and
propagation characteristics. In the case of a CPW line loaded with varactor diodes, the
capacitance per unit length o f the artificial transmission line has contributions from the
unloaded line capacitance (Cr) and the varactor capacitance (Cvar)- The inductance per unit
length (Lt) of the artificial line is unchanged from that of the unloaded line. The characteristic
impedance and phase velocity o f the varactor diode loaded line are given by (4.1). Note that
all terms involving the varactor capacitance are divided by the spacing between the diodes
(Lsect) to obtain an equivalent varactor capacitance per unit length. It is evident from (4.1)
that by varying the bias across the varactor diodes, it is possible to change the varactor
capacitance and hence the phase velocity. However changing the capacitance per unit length
also changes the characteristic impedance of the artificial transmission line. By reducing the
variation in the total capacitance, the change in the characteristic impedance can be made
small, at the cost of reducing the maximum change in propagation constant (d/Tuzx). However
it is still possible to design the circuit for any desired maximum phase shift (AifT0*) by
ensuring that the line is o f suitable length (L,0uu) as given by (4.2).
(4.1a)
£ ,( C ,+ C „ ( V ) /L ,„ )
A/T“ = 2 k f V 4 ( VC, + c r / Lm - VC, + C Z / Lm )
(4.2a)
(4.2b)
77
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The phase shifter circuit fabricated at UCSB consisted of a CPW transmission line of
characteristic impedance 77 Q, periodically loaded with, varactor diodes with zero bias
capacitance of 280 fF. The periodic loading capacitors were implemented using two varactor
diodes connected in parallel from the CPW center conductor to either ground plane in order
to maintain the symmetry of the structure. The length o f the unit cell (spacing between
diodes) was chosen to be 980 pm resulting in a Bragg frequency of 18 GHz. 10 identical
cells were connected in series to form an x-band analog phase shifter.
The measured differential phase shift as a function o f frequency for different optical
powers is plotted in fig. (4.8a). The measured insertion loss and return loss versus frequency
curves for different illumination levels are shown in fig. (4.9a) and fig. (4.10a) respectively.
From these curves it can be verified that the phase shifter circuit fabricated at UCSB is
capable of 175° of phase shift at 12 GHz with less than 2.5 dB of insertion loss and return
loss lower than —12 dB. The optical power required to achieve the m ax im u m phase shift is
only 450 pW. Moreover, no DC bias is required for the operation of the phase shifter. This is
the best performance for a bias free optically controlled phase shifter [5, 7, 9] .The
microwave performance of the optically controlled phase shifter was also simulated on HP
EEsof using the equivalent circuit model shown in fig. (4.7b). The simulated results for the
differential phase shift versus frequency are shown in shown in fig. (4.8b) and show good
agreement with the measured data. The simulation predicts a maximum phase shift of 180° at
12 GHz, which is only 2.8% higher than the measured phase shift of 175°. The simulated
insertion loss versus frequency curves are depicted in fig. (4.9b) and m ax im u m predicted
insertion loss at 12 GHz is 2.3 dB which is only 0.15 dB lower than the measured insertion
loss of the phase shifter. The simulated return loss curves are also sim ila r to the measured
data as shown in fig. (8 . 1 0 b).
The performance of the optically controlled phase shifter rivals the performance of
some of the best electronic phase shifters. This result shows the potential of the varactor
diode loaded CPW line for microwave control applications and has motivated the work that
is reported in the following chapter. The next chapter deals with optimizing the design of the
varactor diode loaded CPW line for low loss phase shifting applications. The optimized
phase shifters developed there can be easily adapted for optical control by integrating the
miniature monolithic PV array developed at UCSB.
78
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250
I '
1 1 I
1 1 1 I
-— P ^W
200
I
P =70 pW
P =450 pW
150
VI
100
1
£
a
S
1
Q
50
0
-50
■ i.
6
8
10
12
14
Frequency (GHz)
(a)
250
I
1 1 1
I
I
1 1 1
I
P^=0 pW
200
sc
£
e
P =70 pW
-P =450 pW
150
2
Vi
100
S
«u*
i
a
50
0
so r 1.1 x -t ■ i i i i ■ i i
4
1 -J
8
Frequency (GHz)
6
10
12
14
(b)
Figure 4.8: Differential phase shift versus frequency as a function o f optical power(a)
measured data (b) simulated data
79
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I
§
1
0
4
2
6
8
10
12
14
10
12
14
Frequency (GHz)
0
-1
-2
Popt= 0pW
-3
P = 70 |aW
Op*
P =450 pW
-4
0
2
4
6
8
Frequency (GHz)
(b)
Figure 4.9: Measured (a) and simulated (b) insertion loss versus frequency data for
different optical powers.
80
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as
•o
-40
50
0
2
4
6
8
10
12
14
Frequency (GHz)
(a)
P = 0uW
P^=70 jlW
0
P =450 pW
10
S3
■O
h3
«s
-20
30
-40
-50
0
2
4
6
8
10
12
14
Frequency (GHz)
(b)
Figure 4.10: Measured (a) and simulated (b) return loss versus frequency curves
the optically controlled phase shifter.
81
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4.5 Optical impedance timing o f a folded slot antenna
To demonstrate the usefulness of the OVC for controlling microwave antennas, an
optically tunable slot antenna was designed, fabricated, and tested at UCSB. Like the
previously described circuits, the optically tunable folded slot antenna was fabricated on
GaAs and used the same fabrication process as the OVC. A picture o f a folded slot antenna
with an integrated OVC is shown in fig. (4.11a). The folded slot antenna was designed to be
A/2 long at 18 GHz. Due to capacitive loading o f the antenna by the OVC the resonance
frequency is shifted down to 14.5 GHz. When optical power is incident on the OVC, the
capacitance decreases thus causing the resonance frequency to increase. Fig. (4.11b) shows
that the folded slot resonance frequency can be tuned from 14.5 GHz to 16 GHz by using just
450 p.W of optical power. This is the lowest reported optical power requirement for bias free
control of a microwave antenna.
Folded Slot Antenna
Figure 4.11: Picture of an optically tunable folded slot antenna fabricated at UCSB
82
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aa
•a
-10
5s
-15
£
-20
-25
10
12
14
16
18
20
Frequency (GHz)
Figure 4.12: Measured return loss performance of an optically tunable folded slot
antenna
4.6 Transient response o f the OVC
Control components used in microwave circuits have response times that vary from
milliseconds, for ferrite based devices, to nanoseconds for electronically controlled
FETs/diodes. Photovoltaic control of FETs using hybrid PV arrays with rise and fall times of
2 {is and 20 ps respectively has been demonstrated. The response speed of the hybrid PV
FET reported in [10] was limited by the large capacitance of the hybrid PV array. Since the
monolithic OVC has a small PV array with lower junction capacitance, it is capable of faster
response.
The transient response of the OVC was characterized using the setup shown in fig.
(4.13a). A pulse generator with a 40 KHz square wave output was used to modulate the
current output from the laser driver circuit. The laser driver circuit produced current pulses
with rise and fall times o f the order of 200 ns. Note that the laser driver circuit was not
designed for rapid pulsed operation and hence tended to produce overshoot in the leading
83
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edge o f the pulse. The light output from the 670 nm semiconductor laser diode followed the
current waveform o f the laser driver. The modulated light was input to the OVC using a 200
pm core diameter multi mode fiber. The voltage developed by the PV array across the OVC
was used as the indicator o f the OVC response. The OVC voltage was measured using
Picoprobe SP11 active probes that were connected to a HP digitizing oscilloscope. The active
probes, with a low input capacitance of 0.1 pF, were used to measure the array output voltage
to avoid capacitive loading o f the device under test by the measurement setup.
The rise and fall time o f the OVC can be predicted using the simplified equivalent
circuit models shown in fig. (4.13b,c). The model for the rise time consists o f an ideal current
source charging two capacitors in parallel. The amplitude of the current source is given by
the photocurrent delivered by the PV array under short circuit conditions. Carra^V) accounts
for the depletion capacitance of the PV array while Cvarac,ur(V) accounts for the depletion
capacitance of the Schottky varactor diode. Mote that both the capacitors vary with the
voltage across the OVC - the PV array capacitance tends to increase with voltage as the PV
cells are getting forward biased while the Schottky varactor diode capacitance decreases
since it is getting reverse biased. An exact solution for the rise tune requires a numerical
integration but an approximate value can be obtained from equation (4.3)
(4.3)
where tr is the rise time, V is the final voltage across the OVC under illumination, Isc is the
short circuit current generated by the PV array under illumination and Ceg is some effective
capacitance to account for the two voltage variable capacitors. The simplified model for the
fall time of the OVC is shown in fig. (4.13c) and consists of two capacitors discharging
through a shunt load resistor. Note that the both the PV array capacitance as well as the
Schottky varactor capacitance are voltage dependent and hence it is not possible to come
with an analytical formula for the fall time. An approximate formula is given in (4.4)
(4.3)
where tf is the fall time, Rioad is the DC load resistance, and Ceff is some effective capacitance
to account for the two voltage variable capacitors. Note that the effective capacitance used
for the fall time calculation does not have to be the same as that used in the rise time
calculations.
84
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Pulse
Generator
Digitizing
Oscilloscope
Laser
D river
Semiconductor
Laser Diode
Active
Probes
Output
Voltage
Modulated
Light
DUT
(a)
O
o
(b)
(c)
Figure 4.13: (a) measurement setup used for characterizing the transient response o f
the monolithic OVC. Simplified equivalent circuit models for the rise time (a) and
fall tim e (b)
Although (4.3) and (4.4) can not be used to predict the exact rise and fall tunes, they
can be used predicting the scaling laws. It is easily seen that decreasing the total capacitance
of the OVC (includes both PV array and varactor capacitance) reduces both the rise and fall
times. On the other hand, increasing the short circuit current by using more optical power
only reduces the rise time. The DC load resistance helps reduce the fall time by providing a
discharge path for the capacitors. In the absence of this load resistance, the capacitors
85
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discharge through internal leakage current which is very small, thus resulting in long fall
times.
Some of these scaling laws have been tested by measurements and the results are
presented in fig. (4.14a,b). Note that the overshoot at the leading edge is caused by the
current overshoot in the laser driver circuit. Fig. (4.14a) depicts the effect o f the zero bias
capacitance on the response speed. Note that the rise time in both cases is very similar and is
around 280 ns. This is because the rise time of the OVC is limited mainly by the rise time of
the laser driver circuit, which is of the order o f 200 ns. The fall time for the circuit with zero
bias capacitance of 1.4 pF is 4.1 ps while the fall time for the circuit with zero bias
capacitance of 0.7 pF is 2.3 ps. Thus the fall time reduced by a factor of 1.8 when-the zero
bias capacitance was decreased by a factor of 2. Note that the peak optical power for these
measurements was 600 pW and the DC load resistance was 1 MQ.
The effect of the DC load resistance on the fall times is depicted in fig. (4.14b) and
shows that when the load resistance was reduced from IM£2 to 330 K£2, the fall time
decreased from 2.3 pF to 780 ns (almost a factor o f 3). The rise time was again limited
mainly by response speed of the laser driver circuit and was similar for both cases. Note that
when the DC load resistance was reduced to 330 K£2, the peak optical power had to be
increased to 900 pW to maintain the same peak output voltage. This is to be expected based
on the results from the last chapter where it was shown that smaller loads require higher
optical powers to achieve the same PV array output voltage.
Zero bias capacitance
DC load resistance
Rise Time
Fall Time
1.4 pF
I MQ.
290 ns
4.1 ps
0.7 pF
1
MQ.
270 ns
2.3 ps
290 ns
780 ns
0.7 pF
330 K£2
Table 4.1: Summary of the measured rise and fall times of the OVC
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12
10
8
6
4
2
0
4
0
12
8
16
Time (its)
12
10
8
6
4
P =900 |iW , load=330 kQ
•pt
2
P ,=600 (iW, load=l MQ
0
0
2
4
6
10
8
12
14
16
Time ((is)
(b)
Figure 4.14: (a) Effect o f total OVC zero bias capacitance on the switching speed
(b)
effect o f D C load resistance on the switching speed o f the OVC
87
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A summary of the rise and fall rimes is presented in table (4.1). The rise rime for the
arrays is of the order o f 280 ns and is measurement setup limited. The fall time is a strong
function o f the zero bias capacitance and the DC load resistance and can be made as small as
780 ns. These response times are adequate for most microwave control applications.
References
[1]
S. T. Allen, U. Bhattacharya, and M. J. W. Rodwell. “Multi-terahertz sidewall-etched varactor diodes
and their application in submillimetre-wave sampling circuits,” Electronics Letters, vol. 29. pp. 2227-8.
Dec. 1993.
[2]
S. T. Allen, “Schottky Diode Integrated Circuits for Sub-Millimeter-Wave Applications.” PfuD. Thesisz
University o f California at Santa Barbara, 1994.
[3]
Y. Yamamoto, K. Kawasaki, and T. Itoh, “Optical control o f microwave active band-pass filter using
MESFETs,” in 1991 IEEE M 'l'l'S International Microwave Symposium Digest 91CH2870-4, Boston,
MA. USA, 1991,. pp. 655-8.
[4]
H. Hayashi, M. Nakatsugawa, T. Nakagawa, and M. Muraguchi, “A novel optical control technique
using tunable inductance circuits,” IEICE Transactions on Electronics, vol. E81-C, pp. 299-304, Feb.
1998.
[5]
A. S. Nagra, O. Jerphagnon, P. C. Chavarkar, M. L. VanBlaricum, and R. A. York. “Indirect control o f
Microwave circuits using low optical power,” IEEE Transactions on Microwave Theory and
Techniquesl999.
[6]
P. Cheung, D. P. Neikirk, and T. Itoh. “Schottky-biased, optically controlled coplanar waveguide phaseshifter,” Electronics Letters, vol. 25, pp. 1301-2, Sept- 1989.
[7]
P. Cheung. D. P. Neikirk, and T. Itoh, “Optically controlled coplanar waveguide phase shifters,” IEEE
Transactions on Microwave Theory and Techniques, vol. 38, pp. 586-95, May. 1990.
[8]
Y. D. Lin. D. P. Neikirk, and T. Itoh, “Coplanar waveguide phase shifter controlled by a spatially
periodic optical illumination,” International Journal o f Infrared and Millimeter Waves, vol. 8, pp.
1027-36, Sept. 1987.
[9]
S. J. Rossek and C. E. Free, “Optically controlled microwave switching and phase shifting using GaAs
FETs,” IEEE Microwave and Guided Wave Letters, vol. 5, pp. 81-3, March. 1995.
[10]
C. K. Sun, R. Nguyen, C. T. Chang, and D. J. Albares, “Photovoltaic-FET for optoelectronic RFf mu
wave switching,” IEEE Transactions on Microwave Theory and Techniques, voL 44, pp. 1747-50. Oct.
1996.
88
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Chapter 5
Varactor Loaded Transmission Lines as Low
Loss Analog Phase shifters
As discussed in the previous chapter, the performance of the optically controlled
phase shifters rivaled that of some of the best electronic phase shifters, thus demonstrating
the potential o f varactor loaded transmission lines for microwave control applications.
Varactor loaded transmission lines have already been used for a variety of nonlinear
applications [1-4] such as pulse shaping, soliton generation, harmonic generation etc. Linear
applications such as phase shifters and true time delay circuits have been recently
demonstrated [5-6], but there has been no effort to study the losses in varactor loaded
transmission lines and to develop a design that is optimized for low loss. Also, the previous
demonstrations have been at relatively low frequencies (<5 GHz), due to limitations imposed
by the hybrid implementation adopted there [5, 6 ]. The work presented in this chapter had
two main objectives- 1) to optimize the design of varactor loaded CPW transmission lines for
low loss phase shifting applications and 2 ) to use monolithic fabrication techniques to
demonstrate low loss phase shifters operating at high frequencies (around 20 GHz). Although
the work presented here does not involve optical control, the optimized phase shifters can be
easily adapted for optical control by integrating miniature monolithic PV-arrays developed at
UCSB.
As a result of these efforts, a low loss analog phase shifter was designed and
fabricated at UCSB [7]. The optimized phase-shifter circuit described here is capable of
producing a continuously variable 0-360° phase shift at 20 GHz with a maximum insertion
loss of 4.2 dB and return loss lower than —12 dB over all phase states. This is the lowest
reported insertion loss for an analog phase shifter operating at 20 GHz. In addition to low
insertion loss this circuit has several desirable features. The phase shift can be controlled
with any desired resolution as opposed to digital phase shifters where the number of bits
89
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fixes the resolution. This results in more accurate beam control when used in phased arrays.
Since the phase velocity on the varactor loaded line is a function o f the bias voltage across
the varactor (all the varactors share the same bias since they are in parallel), only one control
line is needed. This is an advantage over switched line or switched network phase shifters
where the number of control lines is equal to the number of bits. The circuit dissipates very
low DC power since the varactors are reverse-biased in all phase states and draw extremely
low currents. The Schottky diodes employed in the phase shifter have fast response times
enabling rapid phase control and beam scanning. The circuit is suitable for low cost
monolithic production and is desirable from an integration standpoint since the fabrication
process is compatible with standard GaAs MMIC technology. Also the distributed nature of
the circuit makes it less sensitive to small variations in the varactor diode properties making
the design robust.
The layout of this chapter is as follows- first the basic principle of operation of the
distributed phase shifter circuits and the relevant design equations are presented. The effects
of the various design parameters on the total circuit loss are then discussed along with
strategies to minimize the insertion loss. A brief description of the monolithic fabrication
process is presented, followed by RF measurements on the fabricated circuits. Next, the
experimental data is compared with expected performance based on the design equations,
and the simple synthetic transmission line model is refined to obtain better agreement with
measured performance. Finally, the low loss design is modified to obtain phase shifters with
multiple frequency operation capability.
5.1 Basic Principle and Design Equations
The distributed phase shifter circuit, depicted in fig. (5.1a), is comprised of a high
impedance (Zj) transmission line periodically loaded with voltage variable capacitors (Cvar)
with spacing /«„. The unit cell for this periodic structure consists of a section of transmission
line of length lsect and a shunt variable capacitor to ground. The transmission line section can
be approximated as a lumped inductance (Z?) and capacitance (C,) as shown in the equivalent
circuit in fig. (5.1b). This periodic structure has a Bragg frequency [1, 2] given by equation
(5.1).
90
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K
'sect
Zf , V;
V:
var
var
var
(a)
Lt
•
Ct Cvar(V)
Lt
ct Cvar(V)
Lt
Ct Cvar(V)
_L-HIIIHI_L_U-----HHIHIJL
_U*
n m n m iix ^ '
f?
(b)
*vphase^^
‘'to t
(C)
Figure (5.1): (a) Schematic o f a distributed phase shifter circuit, (b) Equivalent
circuit for the varactor diode loaded line, (c) Synthetic transmission line with voltage
dependent characteristic impedance (Zt (V)) and phase velocity
fBragg ~
-
/_ , _-------- T
^var)
r= L sL Z .
v,
Cf = - ^ 2 Z ,v,
(5.2)
L, and C, are the inductance and capacitance per unit cell and Zfand v,- are the impedance and
phase velocity on the high impedance line respectively. For frequencies well below the Bragg
91
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frequency, the periodically loaded line may be treated as a synthetic transmission line whose
capacitance per unit length has been increased due to the periodic loading. The inductance
per unit length for this synthetic line is unchanged from that o f the original unloaded line.
Since the loading capacitors are voltage dependent, the properties o f this synthetic
transmission line such as its characteristic impedance and phase velocity are voltage
dependent (5.3H5.5). Thus, the phase shift produced by a given length o f line can be
changed by varying the bias voltage. This is the essential principle behind the operation of
the phase shifter circuit.
Z . =
^
L
vp * » .=
I
£>=—
V-i
r-
/
( 5 .3 )
<5 -4 )
C. = ^ ~
Z- V-i
(s s >
Note that the inductance (Ld and capacitance (Q) that account for the effect of the high
impedance line are normalized per unit length in equations (5.3M5.5). By assuming a
synthetic transmission line, the discrete variable capacitance is essentially being distributed
over the length of the unit cell. Hence, all terms involving Cvar are divided by the spacing
between capacitors (/„a). As will be shown later, this approach breaks down in the vicinity
of the Bragg frequency and a more exact analysis must recognize the discrete nature o f the
loading.
The equations used to design phase shifter circuits using varactor loaded
transmission lines are presented below. These equations are based on the synthetic
transmission line approach, which is valid for frequencies well below the Bragg frequency.
Two important parameters introduced here are the loading factor “x” and the capacitance
ratio * y \ The loading factor Ct), defined in equation (5.6), is the ratio of maximum varactor
capacitance to the transmission line (Q) capacitance. Note that in (5.6) both the varactor
capacitance and the transmission line capacitance are normalized per unit length. The
significance of the loading factor is that it describes the relative contributions of the
transmission line section and the varactor diode to the overall capacitance o f the synthetic
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transmission line. For x<I, the transmission line capacitance term is dominant where as for
j o l , the synthetic line capacitance is predominantly determined by the varactor capacitance.
The parameter y is a measure of the maximum possible capacitance swing in the varactor. As
indicated in (5.7). it is defined as the ratio of the minimum varactor capacitance to the
maximum varactor capacitance.
s~*max / r
r = _var
««
(5.6)
y =C Z !C Z
(5-7)
c,
The first key design relationship is obtained by imposing the constraint that the
characteristic impedance ( Z f ) of the synthetic transmission line be 50 £2 when the varactor is
in its maximum capacitance state. By setting the impedance of the synthetic line to 50 Q in
(5.3), substituting for the transmission line inductance and capacitance using (5.5), and
expressing the varactor capacitance in terms of the loading factor using (5.6), a relation
between the unloaded line impedance (Zj) and the loading factor can be obtained. Equation
(5.8) essentially states that the impedance Z , of the original unloaded line must be higher than
50 Q in order for the varactor loaded line to have an impedance o f 50 Q. In fact, higher the
loading factor, higher must be the impedance Z of the unloaded line.
Z. = 50V l + x
(5.8)
From (5.1) it is readily seen that the Bragg frequency depends on the bias and is
minimum when the varactor capacitance is m axim um . At the Bragg frequency, insertion loss
becomes large because reflections from the periodic loading capacitors add up in phase.
Since it is desirable that the insertion losses of the phase shifter circuit be as small as
possible, it must be ensured that the minimum Bragg frequency is much higher than the
maximum frequency of interest. Equation (5.9a), which is obtained by combining (5.1), (5.2)
and (5.6), expresses the minimum Bragg frequency in terms of the spacing (/Iecf) between the
periodic loading capacitors and the loading factor. This relationship can be inverted to obtain
expression (5.9b) for the spacing lsect in terms of the loading factor and the m inim um Bragg
frequency. Equation (5.9b) predicts that for obtaining higher Bragg frequencies, the spacing
between the loading capacitors must be decreased, which makes intuitive sense. The main
93
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utility of (5.9) is that once a minimum Bragg frequency has been chosen, it allows the
spacing lsec, to be determined from the loading factor.
r™"
1
__________
sea
v.____
—_£
= -------w fmm 'li/ , „
Qal
(5.9b)
Another important parameter to be specified is the value of the variable capacitors used for
periodically loading the line. The variable loading capacitor is specified in terms of it
maximum value, which can be calculated from the definition of the loading factor in (5.6).
<5-10a>
i
Since lsect and Z£ have already been expressed in terms of known quantities and the loading
factor
( jc) ,
the maximum varactor capacitance is a function of x alone. In fact, after
substituting the expressions for lsect and Z£in (5.10a), the maximum varactor capacitance can
be expressed in a form (5.10b) that explicitly shows the x dependence.
C™ = ---- —------ —
~
5 0 /™ ,(l+ x )
(5.10b)
Equation (5.10b) indicates that for loading factors much less than 1, the maximum varactor
capacitance varies almost linearly with loading factor. However, when the loading factor
becomes comparable to or greater than 1 , the maximum varactor capacitance becomes a
weak function of the loading factor. This implies that large loading factors are achieved not
by increasing the value of the externally added variable capacitor, but by decreasing the
transmission line capacitance term, which involves using higher impedance transmission line
sections. Mote that equation (5.6) predicts the same behavior i.e. larger loading factors
require higher impedance lines.
The last step in the design is determining the number of sections or unit cells
required to achieve the desired phase shift at the frequency of interests. At any given
frequency f the maximum differential phase shift obtainable from a single section is given by
<50 = 2 7 T / - ^ ( y i + x - >/l+ x y )
94
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(5.11)
Equation (5.11) indicates that increasing loading factor (x) and/or the capacitance ratio (y)
results in more differential phase shift This makes intuitive sense because both these
conditions lead to higher variation in phase velocity. The number o f sections (nsea) required
for a 360° phase shifter at ftequency/is given by
2
7T
(5 ,2 )
The quantities Z„ lsea, Cvart and n„a completely specify the distributed phase shifter
circuit design. Thus the entire design has been specified in terms o f the loading factor (x)
which is useful for the optimization of the insertion loss, as will be shown in the next section.
Note that these design equations are very general and are applicable to phase shifter circuits
using any transmission-line geometry (microstrip/CPW/slot line) and device technology
(ferroelectric capacitors/MEMS capacitors/semiconductor varactor diodes).
5.2 Optimization o f the design for low loss
This section deals with optimizing the design obtained in the previous section to
minimize the total insertion loss of the phase shifter circuit. The effect o f the loading factor
on the total insertion loss is studied to determine the conditions under which the loss is
minimum. The total insertion loss of the phase shifter has two components- varactor loss and
transmission line loss. The varactor loss term depends on the mechanism (series
resistance/shunt leakage) responsible for the loss in the variable capacitor and is hence
technology dependant, as is the transmission line loss which depends on the line type and
geometry. Thus, in order to further the analysis it becomes necessary to assume a specific
type of variable loading capacitor and transmission line geometry.
The circuit topology studied here is the same as that used to demonstrate optically
controlled phase shifters in the previous chapter. The phase shifter consists of a CPW line
fabricated on GaAs, periodically loaded with GaAs Schottky varactor diodes. The CPW
configuration is chosen because o f the ease with which shunt components can be connected.
The connection of shunt loads in microstrip transmission lines requires the use o f via holes
which are hard to fabricate and at the same time introduce parasitic inductance. Schottky
diodes are used as the variable capacitors instead of PN junction diodes, since they are
95
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associated with lower losses. The loss in a Schottky varactor diode, which arises due to the
series resistance (rx) associated with the diode, is given by equation (5.13). Note that L^r is
the varactor loss per section (unit cell). It increases as the square o f the frequency and is
inversely proportional to the small signal cutoff frequency (fs) (a commonly used figure of
merit for varactor diode performance (5.14)).
Kar = \ { 2 k f C j f r t ZL = n £ - C varZL
(5-13)
(5.14)
The attenuation afZf) due to conductor losses for an unloaded line of impedance Zt is given
by equation (13.16) in [8 ]. The attenuation constant depends on the dielectric constant of the
substrate fe), the thickness (r) and conductivity (a) of the CPW metal, the CPW ground to
ground separation (d), the width of the center conductor (w), and the aspect ratio (k=w/d),
which depends on the impedance (Z,). To account for the effect of the capacitive loading, the
attenuation a(Zi) of the unloaded line is scaled by the ratio (Z/Z*) of impedances before and
after loading. Using this modified attenuation constant, the loss per section due to conductor
losses (Lcpw) in the loaded CPW is given by (5.15).
(5.15)
The total insertion loss L,a, for the varactor loaded line is determined by multiplying the total
loss per section, which is the sum of the varactor and CPW loss per section, with the total
number of sections. The total circuit loss is given in (5.16) and this equation forms the basis
for the loss optimization studies carried out here.
Note that loss analysis presented in equations (5.13M5.16) is specific to the case of
semiconductor varactor diodes loading a CPW line, but the design equations (5.1)-(5.12) are
very general.
Equations (5.8)-(5.12) were used to design a K-band phase shifter capable of
producing a maximum phase shift of 360° at 20 GHz. The minimum Bragg frequency was
chosen to be 30 GHz, which is 50% higher than the maximum frequency of interest. For
96
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purpose of the loss analysis, parameters appropriate for circuits fabricated on GaAs were
assumed: substrate dielectric constant (8 j) o f 13, CPW conductor thickness (r) of 1.8 pm,
Schottky varactor diode cutoff frequency (£) o f 700 GHz and capacitance ratio y = 0.45.
Designs were generated for different values o f the loading factor (jc) and each design was
analyzed for losses using (5.13M5.16). The results of the loss analysis are plotted in fig.
(5.2a,b) which show how the loss per section and the total circuit loss vary with loading
factor. Note that the losses shown here are calculated at the m ax im u m frequency of interest,
which is 20 GHz in this case.
Fig. (5.2a) shows how the varactor loss per section and CPW loss per section vary
with loading factor. The varactor loss per section, which depends on the m axim um varactor
capacitance value, increases slowly with increase in loading factor. This is because the
maximum varactor capacitance itself is as weak function of loading factor for x> l as
discussed in (5.10b). On the other hand, the CPW loss per section increases rapidly with
loading factor. This can be explained by the fact that the CPW loss is a strong function of the
impedance of the interconnecting line. When the loading factor is increased, the line
impedance required also increases as per (5.6). Higher impedance lines tend to have higher
resistive losses because the center conductor width is narrower. Since there is a one to one
correspondence between the loading factor and the impedance Z of the unloaded line, Z, is
used an alternative x-axis for the plots in fig. (5.2a,b).
In order to calculate the total circuit loss, the loss per section has to be multiplied by
the number of sections used in the circuit. The number of sections required to achieve 360°
of phase shift at 20 GHz is calculated using (5.12) and its dependence on the loading factor is
shown in fig. (5.2a). Note that as the loading factor is increased, the phase shift per section
increases and hence the number of sections required decreases. Fig (5.2b) shows that the total
diode loss decreases slowly with increasing loading factor. The total CPW loss curve on the
other hand is U-shaped with minimum loss for a loading factor of 1.2. For loading below the
optimum, the number of required sections is large where as for loading factors greater than
the optimum the CPW loss per section is high. The product of the CPW loss per section and
the number of sections required is minimum at the optimum loading factor. The total circuit
loss, which is the sum of the total diode loss and the total CPW loss, also shows a minimum
at a loading factor of 1 .2 .
97
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Unloaded Line Impedance (Oiuns)
50
61
71
79
87
94
100
106
112
100
so
|
60
V3
Diode loss ■
*5
£
i
z
40
0.05
0
0
3
2
1
4
Loading Factor (x)
(a)
7
50
61
Unloaded Line Impedance (Ohms)
71
79
87
94
100
106
112
3S
4
6
5
/Total Circuit Loss
S
C 4
3
/Total Diode Loss
2
Total CPW Loss
1
0
1
3
2
Loading Factor (x)
0
>)
Figure (5.2): (a) Number of sections required for 360° of phase shift at 20 GHz. Also
depicted are the diode and CPW losses per section as function of the loading factor,
(b) Total circuit loss at 20 GHz for a 360° phase shifter as a function of loading
factor (x).
98
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The result obtained above is important because it provides the design for a phase
shifter with the lowest possible insertion loss for a given choice of substrate material and
device technology. This is the first ever loss optimization procedure reported for varactor
loaded transmission lines for linear applications. It is important to emphasize that optimum
value of loading factor calculated here is specific to varactor loaded CPW lines on GaAs
(since the parameters used here were appropriate to this particular technology). However it is
relatively straightforward to repeat the calculations for other parameters/transmission line
types.
5.3 Circuit Fabrication
Varactor loaded CPW lines were fabricated on GaAs using standard monolithic
processing techniques identical to those described in [9]. The epitaxial layers for the Schottky
varactor diodes were grown by MBE on a semi-insulating GaAs substrate. The MBE grown
wafer was provided by Quantum Epitaxial Designs, Bethlehem, PA. The epitaxial layer
structure is shown in fig. (5.3a) and consisted of a heavily doped (N*) GaAs layer of
A and doping 8 1 0 I7/cm3 and a lightly doped GaAs layer (NO of doping
5 1 0 I6/cm3 and thickness 5000 A. The heavily doped layer served as the contact layer while
thickness 9000
the lightly doped layer was the active layer on which the Schottky contacts were fabricated.
The process flow diagram is depicted in fig. (5.3) and a brief description is provided
below. Detailed fabrication steps are included in appendix D. The first step in the fabrication
process was the deposition of ohmic contacts using a self-aligned process. The N GaAs
material was removed by wet etching and then AuGe/Ni/Au was deposited on the N* GaAs
layer. The N-ohmic contacts were alloyed in a rapid thermal annealer at 400° C for 1 minute.
Next, the GaAs material surrounding the active regions of the diodes was made insulating
using proton (H+-) implant damage. Two implants of energies 120 KeV and 170 KeV were
used to ensure adequate isolation over the entire epitaxial layer thickness. Schottky contacts
for the varactor diodes were fabricated by depositing Ti/Pt/Au directly on the N GaAs active
layer. A 1.8 pm thick layer of Au was deposited using electron beam evaporation, and was
subsequently patterned using lift-off, to form the interconnect metal and the CPW
transmission lines. Finally, the N GaAs material in the vicinity of the Schottky contact was
99
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etched using CI2 REE in order to reduce the fringing capacitance. The Schottky metal itself
was utilized as the mask; in this etch step and further details can be found in [ 1 0 ].
NN+-
0.5 u.m
0.9 |i.m
Semi-insulating GaAs
(a)
Ohmic contact
Ohmic contact
W
(b)
Isolation:;■;,%
Implant
r> H+- Isolation" *
Im plant
H+ Isolation Im plant
(c)
Schottky Contacts
____
B
™
—
\M /
(d)
CPW Ground
CPW Signal
CPW G round
at
- - » "_
-
(e)
Figure (5.3): Process flow diagram for the fabrication of the phase shifter circuits.
100
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Figure (5.4a) shows the layout o f a phase shifter circuit and details o f the circuit
fabricated at UCSB can be seen in the SEM image in fig. (5.4b). Note that two varactor
diodes are connected from the CPW center conductor to either ground plane in order to
preserve the symmetry o f the structure. Each varactor has half the designed zero bias
capacitance and in parallel they give the correct loading capacitance value. The Schottky
diodes fabricated here had a Schottky contact width of 2 jxm and Schottky contact to ohmic
contact spacing of 3 pm. Conservative width and spacing were used for ease of fabrication
and to ensure high device yield, since each circuit incorporated several (30-50) Schottky
varactor diodes.
CPW Center
C onductor
3
3
Q.
O
tu
a
c
tt.
06
06
CPW
Ground
Shunt VaractO]
D iodes
X
(a)
( . i n u ltd
Si Ii ip11 k \
S i ■>n a I
( ) h III u
<) Ii 111 K'
(b)
Figure (5.4): (a) Layout of the phase shilier circuit (b) SEM images of the fabricated
circuit showing the connection details and layout of the Schottky varactor diodes.
101
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5.4 DC and RF Characterization
In addition to phase shifter circuits, test structures to study the DC performance of
the Schottky diodes were included on the processed wafer. DC I-V characterization of the
Schottky diodes was done on a HP 4145 Semiconductor Parameter analyzer. The Schottky
diodes had an ideality factor o f 1.05, series resistance (rs) of 3.4 £2 and reverse breakdown
voltage of —15 V. The zero bias capacitance (Cvor(0)) measured at 1 MHz was 65 fF and the
maximum capacitance ratio (y) was 0.45 at a reverse bias o f —10 V. RF characterization of
the Schottky varactor diodes was performed on a HP 85I0B network analyzer that was
calibrated using on wafer standards. 1-port S ll measurements were made on test varactor
diodes mounted at the end o f CPW lines. The measured S ll data for the varactor diodes was
fitted to a series RC model using the procedure described in [10] and good agreement was
obtained with the measured DC values listed above. Based on the extracted parameters, the
small signal cutoff frequency (fs) for the Schottky varactor diodes was estimated to be ~ 700
GHz using equation (5.14).
Measured
J15
e
r
i
4.5
0
1
2
3
4
Loading Factor (x)
Figure (5.5): Comparison o f theoretically calculated and m easured insertion loss
(specified at 20 GHz) versus loading factor (x).
102
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Phase shifter circuits with loading factors o f 0.4, 1.2 and 3.2 were simultaneously
fabricated on the same GaAs wafer to test out the theory that there is an optimum loading
factor for a given substrate and device technology. For the parameters used here (es= 13, f s —
700 GHz, y =0.45 and fBragg=30 GHz), the design equations used in the previous section had
predicted an optimum loading factor (x) of 1.2. Fig. (5.5) shows that the measured values of
insertion loss compare quite well with the theoretically predicted values. Also, the optimally
loaded phase shifter (x=L2) has the lowest loss of the circuits tested. This data validates the
design equations and provides strong evidence that there is an optimum loading condition for
m in im u m
loss.
The detailed performance characteristics of only the optimally loaded (x=1.2) phase
shifter circuit are presented here. Fig. (5.7) shows the differential phase shift as a function of
frequency for several reverse bias values. It can be seen from this graph that at 20 GHz, the
differential phase shift is continuously variable from 0-360° by adjusting the reverse bias on
the Schottky varactor diodes. For frequencies up to 15 GHz, the distributed phase shifter
circuit behaves like a variable velocity transmission line and the phase shift varies linearly
with frequency. As the frequency approaches the Bragg frequency (30 GHz) the phase shift
becomes nonlinear and a better model that is capable o f predicting this behavior is presented
in the next section. The maximum insertion loss at 20 GHz occurs at zero bias and is only 4.2
dB (for the optimally loaded circuit) as can be verified from fig. (5.8). It is important to note
that this is the lowest reported insertion loss for an analog phase shifter in the K-band. Also,
as shown in fig. (5.9), the return loss of the phase shifter is less than —12 dB over all bias
states. This indicates that the impedance of the loaded line does not vary strongly with bias
and is close to 50 Q under all bias conditions. The reason for the small variation of the line
impedance is the fact that the voltage dependent varactor capacitance does not dominate over
the CPW line capacitance for the optimally loaded line.
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500
I
2
=.
300
13
200
I
100
Bias=0 V
0
5
10
15
20
25
Frequency (GHz)
Figure (5.6): Differential phase shift versus frequency curves for different applied
bias values. M easurements were made on an optimally loaded circuit (x = 1.2).
o
-l
-2
-3
-4
-5
■6
-7
•8
0
5
10
15
20
25
Frequency (GHz)
Figure (5.7): M easured insertion loss curves for different applied bias values for an
optimally loaded 360° phase shifter.
104
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-10
SB
5.
-15
-20
E
3
£
-25
-30
-35
•40
0
5
10
15
20
25
Frequency (GHz)
Figure (5.8): Measured return loss versus frequency curves for the two extrem e bias
values. Curves for intermediate bias values have been suppressed for clarity o f
presentation.
5.5 Analysis and M odeling o f results
As has been mentioned earlier, the synthetic transmission line model is only valid for
frequencies well below the Bragg frequency. A more accurate model that takes into account
the discrete nature of the loading capacitors is presented below. This model is based on the
lumped element equivalent circuit depicted in fig. (5.9). The high impedance line is
represented by the equivalent lumped elements L„ Ct and the effect of loading is accounted
for by the capacitor Cvar. In order to model the varactor losses, the series resistance (rs) is
converted to an equivalent conductance Gvar in parallel with the capacitor using equation
(5 .1 7 ).
Gvar= Q n f C ™ ? r s
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(5.17)
'n + 1
*n+l
var
V
V V
Figure 9: Unit cell for the periodic structure showing th e node voltages and currents
The node voltages (Vn, Vn+[) and node currents (/„, /„+/) for the nth unit cellcan be expressed
in terms o f theunitcell elements (L„ C„ Cvar) and the complexpropagation
constant
(y=a+jp) as follows
Vn + l —e~r
V
e
Yn
(5.18a)
I n + I = ce~YLn
I
(5.18b)
V„-V^=[j2nfL,]l„
(5.19a)
K - U =[G..r +jlnf{C, + C .„ )]K m
(5.19b)
On solving for the real and imaginary parts of the complex propagation constant from (5.18)(5.19), the following two equations are obtained.
, L t(Ct +Cvar)
Cosh(or)Cos(/J) = l - ( 2 it f ) ‘
Sinh(a)Sin(0) = (!li t
(5.20)
(5.21)
For small attenuation or per unit cell, the above equations can be written in the simpler form
shown below
Cos(/8) = l - ( 2 Jt f)
2 Lt(Ct
a = (2itf)L' Gva^
2V l-C os(y3)2
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(5.22)
(5-23)
Note that the propagation constant determined above is for a single section only and the
phase shift and attenuation must be scaled by the number of sections present in the actual
circuit. Also, the attenuation calculated in (5.23) is due to varactor losses alone and the CPW
loss per cell from (5.15) must be added to the loss term in (5.23) to obtain the total circuit
loss per section.
The optimally loaded phase shifter circuit was modeled with the synthetic
transmission line model used in the design equations, as well as the lumped element model
discussed above. Measured parameters for the substrate, transmission lines, and the varactor
diodes were used as input for the two theoretical models. Fig (5.10) and fig (5.11) show
comparisons of the measured phase shift and insertion loss with the theoretically predicted
results. At low frequencies, both the theoretical models predict identical behavior and match
the measured data well. For frequencies above 15 GHz, the synthetic transmission line model
fails to predict the rapid increase in loss and phase shift with frequency while the lumped
element model continues to show good agreement with experimental data.
The measured loss data provides no insight into the origin of the losses, hi order to
obtain a better understanding of the loss performance, the lumped element model, whose
accuracy was validated by the measured data, was used as a diagnostic tool to study the
relative contributions of the CPW loss term and the diode loss term to the total circuit loss.
Fig. (5.12) shows the theoretically calculated loss curves (using the lumped element model)
for the optimally loaded phase shifter as a function of frequency. From these curves it is
apparent that at 20 GHz the diode losses are the dominant mechanism and therefore future
attempts to further reduce circuit losses must be aimed at reducing diode series resistance.
This can be achieved by using more aggressive layout design rules- by reducing the Schottky
contact width to
1
jam and doubling the diode perimeter, it should be possible to decrease the
series resistance by almost half for the same capacitor value. Thus by using 1 pm Schottky
diodes in the periodically loaded CPW line phase shifter, the losses at 20 GHz can be
reduced to about 2.7 dB which would be a new record.
107
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500
^ M easu red j
j Lumped dement model
Transmission line model
I
I
e
300
3
e
|
200
100
0
5
10
15
20
25
Frequency (G ib)
Figure (5.10): Comparison o f measured and modeled curves for maximum
differential phase shift versus frequency (for an optimally loaded distributed phase
shifter circuit).
8
7
■++ Measured :
Lumped element model
„ Transmission line model
6
5
4
3
2
1
0
0
5
15
10
20
25
Frequency (GHz)
Figure (5.11): Comparison o f m easured and m odeled zero bias insertion loss as a
function o f frequency (for an optim ally loaded differential phase shifter circuit).
108
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7
6
Total Circuit Loss,
5
4
3
Diode Loss
2
I
CPW Skin Loss ~
0
0
5
10
15
20
25
Frequency (GHz)
Figure (5.12): Relative contributions o f the diode loss and C PW skin loss to the zero
bias insertion loss.
5.6 Phase shifter with multiple frequency operation capability
Another interesting feature of the distributed phase shifter circuit is that the design
can be easily scaled to different frequencies. The scaling here is just simply the addition or
removal of sections, Le. length scaling. Figure (5.13) shows the predicted loss for 360° phase
shifters designed for operation at different frequencies. It is apparent from fig (5.13) that by
picking the appropriate number of sections, it is possible to design this circuit with less than
5 dB insertion loss at any frequency in the 7-22 GHz range.
A phase shifter with multiple frequency operation capability was designed to take
advantage of this property. For this modified design, the Bragg frequency (30 GHz) was
made higher than the highest frequency of interest (22 GHz in this case). The number of
sections was chosen to ensure that the circuit was capable of generating 360° of differential
phase shift at the lowest frequency of interest (16 GHz). The varactor diodes loading the high
109
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impedance line were chosen such that loading factor was optimal (r= 1 .2 ), same as the
previously discussed designs. The main difference o f the design discussed in the previous
sections from the design presented here was that the Bragg frequency and the number o f
sections were earlier chosen using the same frequency. Thus, the original design is optimized
for low loss at a single frequency while the modified design is capable o f multiple frequency
operation.
16
14
I%
_Extrapolated from Measured Data
Predicted by lumped element Model
u
00
J
0
15
10
20
25
Frequency (GHz)
Figure (5.13): Curve predicting losses for the distributed phase shifter if the design
was scaled to obtain 360° phase shift at different frequencies.
Figure (5.14) shows the measured differential phase shift as a function of frequency for
several reverse bias values. Note that the insertion phase at a reverse bias o f -10 V is used as
the reference value for all measured phase shift data since this state corresponds to the lowest
loss. It can be seen that by decreasing the reverse bias from —10 V to 0 V a phase shift of
360° can be obtained at 16 GHz. At 22 GHz, the entire bias swing is not necessary. In fact, as
depicted in figure (5.14), by going from —10 V to -0.5 V bias, it is possible to generate 0360° of phase shift at 22 GHz. Similarly, at any intermediate frequency, 0-360° phase shift
can be attained by varying the bias from —10 V to a suitable value (between -0.5 V and 0 V).
110
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100
I
-100
f «
J5
05
I
-300
*jj
.400
-500
i
a
B ias=0 V
-600
-700
16
17
18
19
20
21
22
F r e q u e n c y (G H z )
Figure 5.14: M easured differential phase shift on circuit designed for multiple
frequency operation
-2
-3
ea
•5
-6
-7
-8
16
17
18
19
20
21
22
Frequency (GHz)
Figure 5.15: M easured insertion loss o f circuit designed for m ultiple frequency
operation
111
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0
-10
Bias=0V
03
•o
E
3
z
-20
*30
SC
-40
•50
16
17
18
19
20
21
22
Frequency (GHz)
Figure 5.16: M easured return loss o f circuit designed fo r multiple frequency
operation
Figure (5.15) shows the insertion loss of the circuit for different bias values and it can
seen that at 16 GHz the loss varies between 3.25 dB (-10 V) and 4.25 dB (0 V). At 22 GHz
the loss varies between 3 dB (-10 V) and 5 dB (-0.5 V). Note that at 22 GHz the 0 V bias
state is not required. Also, the circuit is well matched to 50 £2 and figure (5.16) shows that
the return loss is less than —15 dB over the entire frequency range of interest. Thus the
modified design has resulted in a phase shifter capable of operating any frequency in the lb22 GHz range. Note that this multiple frequency operation capability is important for shared
aperture systems and for frequency agile antenna arrays.
References
[1]
M. J. W. Rodwell, M. Kamegawa, R. Yu, M. Case, E. Carman, and K. S. Giboney. “GaAs nonlinear
transmission lines for picosecond pulse generation and millimeter-wave sampling,” IEEE Transactions
on Microwave Theory and Techniques, vol. 39, pp. 1194-204, July. 1991.
[2]
M. J. W. Rodwell, S. T. Allen, R. Y. Yu, M. G. Case, U. Bhattacharya, M. Reddy, E. Carman, M.
Kamegawa, Y. Konishi. J. Pusl, R. Pullela, and J. Esch, “Active and nonlinear wave propagation
112
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devices in ultrafast electronics and optoelectronics," Proceedings o f the IEEE, vol. 82. pp. 1035-59,
July. 1994.
[3]
R. Y. Yu, M. Reddy, J. Pusl, S. T. Allen, M. Case, and M. J. W. Rodwell, “Millimeter-wave on-wafer
waveform and network measurements using active probes," IEEE Transactions on Microwave Theory
and Techniques, vol. 43, pp. 721-91995.
[4]
U. Bhattacharya, S. T. Allen, and M. J. W. Rodwell, “DC-725 GHz sampling circuits and
subpicosecond nonlinear transmission lines using elevated coplanar waveguide.” IEEE Microwave and
Guided Wave Letters, vol. 5. pp. 50-2, Feb. 1995.
[5]
W. M. Zhang, R. P. Hsia, C. Liang, G. Song, C. W. Domier, and N. C. Luhmann, Jr., “Novel low-Ioss
delay line for broadband phased antenna array applications," IEEE Microwave and Guided Wave
Letters, vol. 6, pp. 395-7, Nov. 1996.
[6]
R. P. Hsia, W. M. Zhang, C. W. Domier. and N. C Luhmann, Jr., “A hybrid nonlinear delay line-based
broad-band phased antenna array system,” IEEE Microwave and Guided Wave Letters, vol. 8, pp. 18241998.
[7]
A. S. Nagra and R. A. York, “Monolithic GaAs phase shifter with low insertion loss and continuous 0360 degree phase shift at 20 GHz,” IEEE Microwave and Guided Wave Lettersl998.
[8]
R. K. Hoffmann, Handbook o f Microwave Integrated Circuits. Boston: Artech House, 1987.
[9]
M. G. Case, “Nonlinear Transmission Lines for Picosecond Pulse. Impulse and Millimeter-Wave
Harmonic Generation,” Ph.D. Thesis: University of California at Santa Barbara, 1993.
[10]
S. T. Allen. U. Bhattacharya, and M. J. W. Rodwell, “Multi-terahertz sidewall-etched varactor diodes
and their application in submillimetre-wave sampling circuits,” Electronics Letters, vol. 29, pp. 2227-8,
Dec. 1993.
113
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Chapter 6
Summary and Future Work
6.1 M onolithic OVC effort
The motivation for using optical signals for the control o f microwave circuits and
antennas has been presented. The relative merits/demerits of the available optical control
schemes have been studied. The basic principle of operation of the OVC has been introduced
and the reasons for using the monolithic OVC in optically controlled circuits/antennas have
been discussed in detail. The challenges involved in fabricating high-Q planar Schottky
varactor diodes and high efficiency PV arrays on the same GaAs wafer have been
successfully overcome. Schottky diodes with a Q-factor of 40 at 10 GHz, and PV arrays with
output voltages of 10.5 V and conversion efficiencies as high as 26.8% have been integrated
on the same GaAs wafer to form monolithic OVCs. The monolithic OVC has been
incorporated as the tuning element in microwave circuits and antennas to demonstrate the
potential of this technology for the bias free control of microwave components. Bias free
control of band-reject filters, X-band analog phase shifters and folded slot antennas, using
less than 500 fxW of optical power, has been demonstrated. Comparison between measured
and simulated microwave performance o f the optically controlled circuits show good
agreement. Also, the transient response o f the OVC has been characterized and it has been
shown that the OVC response times are fast enough for most microwave control applications.
Although the feasibility of the monolithic OVC approach has been demonstrated,
better methods of coupling light into the OVC need to be developed. The currently used
scheme of butt-coupling a multi-mode fiber to the PV-array is acceptable in a laboratory
environment but is not suitable for practical circuits. The butt-coupling scheme has the
disadvantage that the fiber comes in orthogonal to the wafer and is thus not suitable in
114
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environments with space limitations where truly planar configurations are required. The new
coupling scheme needs to be mechanically robust and easy to implement. There are two
possible approaches that need to be studied in more detail- a) the use o f polymer waveguides
for the distribution o f light and b) fibers placed laterally over the device with angle polished
mirrors on the end. Both these schemes have the advantage o f being planar and space
efficient. The polymer waveguide technique is attractive because o f the possibility o f defining
the light distribution structure using monolithic fabrication techniques. Also, polymer
waveguides have low optical losses and coupling light into them is relatively straightforward
because of good mode matching to single mode fibers.
6.2 Varactor loaded transmission line effort
The advantages o f using varactor loaded transmission lines for linear applications
such as phase shifters have been discussed. Design equations for phase shifter circuits using
varactor loaded transmission lines have been derived. The specific case of Schottky varactor
diode loaded CPW lines on GaAs has been analyzed in detail. It has been shown that there
exists an optimum loading condition that results in phase shifters with the lowest insertion
loss for a given transmission line and varactor technology. Measured losses on 360° phase
shifters fabricated on GaAs showed good agreement with the theoretical predictions and
demonstrated a minimum loss for a loading factor of 1.2. The optimally loaded phase shifter
demonstrated continuous phase shift from 0-360° at 20 GHz with a maximum insertion loss
of 4.2 dB. This is the lowest reported insertion loss for an analog phase shifter at 20 GHz. A
model capable of analyzing the distributed phase shifter circuits up to the Bragg frequency
has been developed. Using this model it has been determined that at 20 GHz, the majority of
the circuit losses are due to the varactor diodes.
Thus future efforts at reducing the total insertion loss o f the phase shifters must
concentrate on reducing the diode losses. For the case of Schottky varactor diodes, losses can
be reduced by adopting more aggressive design and fabrication procedures. By shrinking the
Schottky stripe width from 2 fxm (currently used) to 1 |im and doubling the periphery, the
series resistance (which scales inversely with periphery) can be reduced thereby resulting in
diodes with lower losses. Another possibility is to use ferroelectric capacitors instead of
115
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varactor diodes as the variable capacitors. Ferroelectric capacitors can have capacitance ratios
as high as 3:1 and they promise lower loss performance than their semiconductor
counterparts. Apart from better loss performance, ferroelectric capacitors are also desirable
because they have higher power h andling capability and promise to be a cheaper alternative
to existing semiconductor based varactor diodes. Thus the use o f ferroelectric capacitors as
replacements for the Schottky varactor diodes in the varactor loaded transmission line circuits
needs to be carefully explored.
116
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Appendix A
Detailed Fabrication Process Steps for the
Monolithic OVC
1. Wafer dean
•
Acetone (ACE) rinse for 3 min
•
Isopropyl alcohol (ISO) rinse for 3 min
•
De-ionized water (DI) rinse for 3 min
•
Dehydration bake for 15 min in 120° C oven
2. Mesa Lithography (lightfield mask, positive photoresist process)
•
Spin on HMDS at 6000 rpm for 40 sec
•
S pinonA Z 4110at6000rpm for40sec(lnm thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 7.5 sec @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K:DI (1:4 by volume) for 1 min
•
DI rinse for 1 min, blow dry with N2
3. Mesa Etch in RIE#5 (dry etch)
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
BHF:DI (1:10 by volume) dip for 15 sec
•
Load in RIE#5 and etch under following conditions
•
Pressure 5 mT
•
Gas mixture: BC13 (25 seem), CI2 (2.5 seem), SiCU(5 seem)
•
Constant power mode: 60 W
•
Etch rate approximately 2200-2500 A/min
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•
Remove photoresist in ACE, ISO rinse
•
DI rinse, blow dry with. N2
•
Descum in O2 plasma if required
4. Lateral Oxidation of AI.9 gGa.0 2 As at base of mesa
•
BHF:DI (1:10 by volume) dip for 15 sec
•
Lateral oxidation in furnace under following conditions
•
•
Furnace temp 430° C
•
W ater temperature 80° C
•
Nitrogen flow rate 5-6 seem
•
Oxidation rate (0.6-0.7 pm/min)
Inspect extent o f oxidation under Infrared (IR) mask aligner
5. Lithography for P-type GaAs etch from Schottky mesa and N-ohmic contact regions
Clightfield mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K:DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
6. P-type GaAs etch from Schottky mesa and N-ohmic contact regions (wet etch)
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in NHtOH:DI (1:10) for 30 sec
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•
Remove GaAs cap layer in citric acid (1 M): H2O2 (10:1) — etch time 30 sec,
hotplate temperature 25° C, stirrer 250 rpm
• Etch AlGaAs passivation layer in BHF (full strength) for 30 sec
• Etch P-type GaAs in citric acid (1 M): H2O 2 (10:1) — etch rate 2200 A/min, hotplate
temperature 25° C, stirrer 250 rpm
• DI rinse for 1 min, blow dry with N2
• Measure depth on Dektak
7. N-ohmic contact lithography (lightfield mask, image reversal photoresist process)
• Solvent clean in ACE, ISO and DI rinse
• Dehydration bake in 120° C oven for 15 min
• Spin on HMDS at 5000 rpm for 40 sec
• Spin on AZ 4210 at 5000 rpm for 40 sec (2 Jim thick)
8
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K: DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
. N-ohmic contact etch (wet etch)
•
0 2
plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in NHtOH:DI (1:10) for 30 sec
•
Etch down to N 1" GaAs contact layer in citric acid (1 M):H 20 2 (10:1) — etch rate
2200
A/min, hotplate temp 25° C, stirrer 250 rpm
•
DI rinse for 1 min, blow dry with N2
•
Measure depth on Dektak
9. N-ohmic m etallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
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•
Dip in NH*OH:DI ( 1 : 1 0 ) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to 1 10-6 Torr
• G e ( 1 1 0 A at 2-3 A/sec)
• Au (100 A at 2-3 A/sec)
•
Ge (60 A at 2-3 A/sec)
•
Au (240 A at 2-3 A/sec)
•
Ni (100 A at 1-2 A/sec)
•
Au (3000 A at 1 0 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N2
•
Alloy in RTA using following conditions
•
•
Forming gas in chamber
•
Ramp up to temperature at 30° C/sec
•
Sustain at 410° C for 60 sec
•
Ramp down at 30° C/sec
•
Remove only after temperature falls below 100° C
Evaluate contact resistance on probe station
10. P-ohmic contact lithography (lightfield mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K: DI (1:4 by volume) for 2 min
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•
DI rinse for I min, blow dry with N2
11. P-ohmic contact metallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
• Dip in NHjOHrDI (1:10) for 30 sec
• Load immediately in E-beam evaporator
•
•
Evaporate the following metals after pumping down to 1 10*6 Torr
•
Ti ( 2 0 0 A at 2-3 A/sec)
•
Au (3000 A at
10
A/sec)
Liftoff the undesired metal by removing photoresist in ACE
• ISO and DI rinse
• Blow dry using N2
12. Schottky lithography {darkfield mask, positive
photoresist liftoff process)
• Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm)
• Soft bake in 90° C oven for 30 min
• Image exposure for 10.5 sec @ 7.5 mW/cm2 intensity
• Toluene soak for 10 min
• Blow off toluene using N2
• Develop in AZ 400K:DI (1:4 by volume) for 1.5 min
• DI rinse for 1 min, blow dry with N2
13. Schottky metallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
• Dip in NH*OH:DI (1:10) for 30 sec
• Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to
•
Ti ( 2 0 0 A at 2-3 A/sec)
•
Pt (500 A at 1 - 2 A/sec)
8
10' 7 Torr
121
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•
Au (2500 A at 10 A/sec)
• Liftoff the undesired metal by removing photoresist in ACE
• ISO and DI rinse
• Blow dry using N2
14. PECVD silicon nitride for AR coating
• Solvent clean wafer using ACE, ISO
• DI rinse, blow dry with N2
•
Deposit 800 A o f silicon nitride at 250° C over entire wafer
15. Resistor lithography (lightfield mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 p i thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH 3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K: DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
16. Resistor metallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 60 sec
•
Dip in HCI:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metal after pumping down to 1 10"6 Torr
•
NiCr alloy (400 A at 1 - 2 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
122
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•
Blow dry using N>
17. CPW lithography (tightfield mask, image reversal photoresist process)
• Solvent clean in ACE, ISO and. DI rinse
• Dehydration bake in 120° C oven for 15 min
• Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 Jim thick)
• Soft bake in 90° C oven for 30 min
•
Image exposure 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K: DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
18. CPW m etallization
•
O2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in HC1:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Use lowered boom to hold sample (thickness is 2.5 times larger)
•
Evaporate the following metals after pumping down to 1 10-6 Torr
•
Ti (70 A at 2-3 A/sec)
•
Au (6000 A at
10
A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N2
19. A irbridge post lithography
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
PMGISF11 application
123
with permission of the copyright owner. Further reproduction prohibited without permission.
• Spin on SF11 at 5000 rpm for 40 sec
•
Soft bake on 200° C hotplate for 2 min
• Cool down for 30 sec
•
Spin on SF11 at 5000 rpm for 40 sec
•
Soft bake on 200° C hotplate for 3 min
• Edge bead removal
•
•
Spin on AZ 4330 at 4000 rpm for 40 sec
•
Soft bake on 95° C hotplate for 1 min
•
Image exposure fo r4330— 1.5 min @ 7.5 mW/cm2
•
Develop in AZ 400K:DI (1:4) for I min
•
Deep UV flood exposure of PM G ISFII (dosage 3500 mJ/cm2)
•
Develop in SAL 101 developer (full strength) for 1 min
•
Repeat deep UV expose and SAL develop step 2 times
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 5 min
•
Remove AZ 4330 in ACE, ISO rinse
•
DI rinse, blow dry with N2
AZ 4210 mask for image exposure
•
Spin on AZ 4210 at 5000 rpm for 40 sec
•
Soft bake on 90° C for 30 min
•
Image exposure 10.5 sec @ 7.5 mW/cm2
•
Develop in AZ 400K:DI (1:4) for 1.5 min
•
DI rinse, blow dry with N2
•
Deep UV Image exposure of PMGI (dosage 3500 mJ/cm2)
•
Develop in SAL 101 (full strength) for 1 min
•
DI rinse for 1 min, blow dry with N2
•
Remove 4210 mask photoresist in ACE, ISO, DI
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 40 sec
•
Re-flow PMGI SFI 1 on 200 ° C hotplate for 19 min
•
Si3N4 etch in CF* plasma for 1.5 min (300 mT, 100 W, LF)
124
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20. A irbridge span lithography (lightfie ld mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm thick)
•
Soft bake at 90° C for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm 2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 a t400 mT
•
Flood exposure for 1.1 min ( for 7.5 mW/cm 2 intensity)
•
Develop in AZ400K:DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, DI rinse, blow dry with N2
21. A ir bridge metallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in HC1:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Use lowered boom to hold sample (thickness is 2.5 times larger)
•
Evaporate the following metals after pumping down to 1 10-6 Torr
•
Ti (70 A at 2-3 A/sec)
•
Au (6000 A at 1 0 A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N2
125
with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix B
Program to Calculate Internal Quantum
Efficiency of a PN Photovoltaic cell
Listed below is a Matlab program that calculates the internal quantum efficiency o f a
PN photovoltaic cell. The program assumes that the cell geometry is vertical with top and
back contacts. The devices used here are lateral PV cells with contacts only on the front side
o f the device. However the heavily doped layer N* GaAs layer underneath the active region
effectively acts like a back contact, thus allowing the same program to be used here. The
equations for calculating the internal quantum efficiency are described in [1]. The material
constants have been taken from [2] for MBE grown material with doping similar to that in the
PV cell fabricated here.
References
[1] H. J. Hovel, S o la r cells, Semiconductors and semimetals; vol. 11: Academic Press, N ew York,
1975.
[2] A. Saletes, J. P. Contour, M. Leroux, J. M assies, N . Defranould, and G. Peious, “GaAIAs/GaAs
solar cells grown by molecular beam epitaxy: material properties and device param eters,” Solar
C ells, vol. 17, pp. 373-81, M . April. 1986.
Matlab Program
% Input PV cell parameters
sn = 5e4;
% top recombination velocity (cm/sec)
sp = 0 ;
% back recombination velocity (cm/sec)
In = 10* le-4;
% electron diffusion length (cm)
lp = 2*le-4;
% hole diffusion length (cm)
126
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
dn=
100
;
% electron diffusion coefficient (cmz/sec)
dp = 1.5;
% hole diffusion coefficient (cmz/sec)
xj =0.5*16-4;
% junction depth (cm)
w = 0.09*le-4;
% depletion region thickness (cm)
h = 1.2*le-4;
% total thickness of active layers (cm)
hp = h-xj-w;
% Load optical absorption coefficient data for GaAs
load gaasoptdata.txt
energy = gaasoptdata(:,l);
lamda = 1.243125./energy;
alpha = gaasoptdata(:,2 );
% Calculate contribution of top p-region
jtop = aIpha*In./((alpha*ln).A2-l).*(((sn*ln/dn+alpha*ln)exp(apha*xj).*(sn*ln/dn*cosh(xj/ln) + sinh(xj7ln)))/(sn*ln/dn*sinh(xj/ln) + cosh(xj/In))alpha.*ln.*exp(-alpha*xj));
% Calculate contribution of bottom n-region
jbot = alpha*lp./((alpha*lp).A2-l).*exp(-aIpha*(xj+w)).*(alpha*Ip-(sp*lp/dp*(cosh(hp/Ip)exp(-alpha*hp))+sinh(hp/lp)+alpha*Ip.*exp(-alpha*hp))/(sp*lp/dp*sinh(hp/lp)+cosh(hp/lp)));
% Calculate contribution of depletion region
jd r = exp(-alpha*xj).*(l-exp(-alpha*w));
% Total number of carriers collected
jtot2 = jtop+jbot+jdr;
% Plot internal quantum efficiency versus wavelength
plot(lamda,jtop,'r-Mamda,jbot,!)-',lamda,jdr,'y-',lamda,jtot2,'g-')
legendCtop'.’base','depletion','total')
127
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix C
Program to Determine Loss as a Function of
Loading Factor
Mathematica program
Clear[x, er, v, eff, numsect, z l, cvarO, tau, Isect, lentot, totlossdiode, FJ
CIear[fact, zO, rho, mu, Im, er, f, w, d, h, t, eff, rf,]
Clear[k, K, kprime, Kp, alphas, alphacpw, totlosscpw, totlossckt]
(* desired char impedance of the artificial line *)
zO = 50;
fmax = 20 109;
dphi =
360 7T
180 ’
(* max frequency of interest *)
(* max phase shift desired at fmax *)
er = 13;
(* relative dielectric constant o f the substrate *)
fcdiode = 700 109 ;
(* diode cut off freq *)
n = 1.5;
O ratio of bragg freq to fmax*)
ymax = 1 ;
ymin = 1/2.5;
(* ratio of cmin to cmax *)
wmax = 2 n fmax;
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er+1
eff = —- — ;
(* effective dielectric constant o f the substrate*)
3 108
v = --------;
V eff
(* effective velocity for a cpw line *)
zl = zO V 1 -f-xymax;
(* char impedance of intermediate line *)
tau = -------------—
: (* time of flight on the intermediate line *)
n 7rfinax V l + x y m a x
xtau
zl
(* zero bias cap (cmax) to be inserted every section*)
cvarO =
rs = ---------;
2 7r fcdiode cvaiO
(* diode series resistance *)
dphi
numsect =
27rfmaxtau(V 1 + xymax - V i + xym in)
(* number of sections required for desired phs shift *)
Isect = tau v;
(* length of each sect in meters*)
lentot = Isect numsect 103;
(* total length of ckt in mm *)
diodelosssect = — 8.685 wmax2 cvarO2 rs zO;
2
totlossdiode = ^ 8.685 wmax2 cvarO2 rs zO numsect;
(* total diode loss in dB*)
fact = 1.7;
fact 1.72
rho = ------ -— ;
106
mu = - r - ',
109
(* resistivity of metal used in cpw compared to copper *)
, .
(* ohm.cm *)
(* H/cm *)
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zlO = z l V e ff;
l
8 zIO
2
J
(* ratio of center conductor width to ground separation *)
Isect* 1 0 3
2
(* ground separation (mm) choosen as fraction o f section length *)
d=
w = k d;
(*center conductor width (mm) *)
400
h = — j- ;
t=
1.7
^
(* substrate height (mm)*)
(* cpw metal thickness (mm) *)
rf10
tand = // — -----------;
V 7Tfmax mu
ratio = t/ ( 1 0 * tand);
(* skin depth m cm *)
(* ratio of thickness to skin depth in same units *)
mod = 0.5 * (Exp[ratio] —Cos[ratio] + Sin[ratio]) / (Cosh[ratio] —Cos[ratio]);
(* freq scaling factor for cpw metal loss *)
rf =
VTrfmaxmurho;
(* ohms*)
K = EllipticK[k];
kprime = -y 1 —k2 ;
Kp = EllipticK[kprime];
(8.68 i f V e ff) [ 2^ Lo«t^nS5a -]) + 2 j r + 2 Log[-4-^ (;^
alphas = ----------------------------------------------*
4* 377 d K Kp (1 —k2)
(* cpw metal losses in dB/mm*)
]j
—
130
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alphacpw = zL/zO * alphas * mod;
(* corrected cpw losses in db/mm*)
cpwlossect = alphacpw* Isect* 10 A3;
totlosscpw = lentot* alphacpw;
(* total cpw loss*)
totlossckt = totlossdiode +- totlosscpw;
(* total circuit loss *)
a l = Plot[totlossckt, {x, 0.2, 4}]
b2 = P lot[zl, {x,0.5,4}]
c3 = Plot[ lentot, {x, 0.5, 4}]
131
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Appendix D
Detailed Fabrication Process Steps for the
Varactor Loaded Transmission Lines
1. Wafer clean
•
Acetone (ACE) rinse for 3 min
•
Isopropyl alcohol (ISO) rinse for 3 min
•
De-ionized water (DI) rinse for 3 min
•
Dehydration bake for 15 min in 120° C oven
2. N-ohmic contact lithography (lightfield mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure for 17 sec @ 7.5 mW/cm2 intensity
•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400 mT
•
Flood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in AZ 400K: DI (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
3. N-ohmic contact etch (wet etch)
•
Oz plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in NH jOHiDI (1:10) for 30 sec
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•
Etch down, to fT GaAs contact layer in citric acid (1 M):H2Q> (10:1) — etch rate
2200
A/min, hotplate temp 25° C, stirrer 250 rpm
•
DI rinse for 1 min, blow dry with N*
•
Measure depth on Dektak
4. N-ohmic metallization
•
Oz plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in NH*OH:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to 1 10"6 Torr
• Ge ( 1 1 0 A at 2-3 A/sec)
• Au ( 1 0 0 A at 2-3 A/sec)
•
Ge (60 A at 2-3 A/sec)
• Au (240 A at 2-3 A/sec)
• Ni ( 1 0 0 A at
•
1 -2
Au (3000 A at
A/sec)
10
A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N2
•
Alloy in RTA using following conditions
•
•
Forming gas in chamber
•
Ramp up to temperature at 30° C/sec
•
Sustain at 410° C for 60 sec
•
Ramp down at 30° C/sec
•
Remove only after temperature falls below 100° C
Evaluate contact resistance on probe station
5. Im plant m ask
•
Deposit 1000 A of SiC>2 by PECVD
•
Solvent clean in ACE, ISO and DI rinse
133
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•
Dehydration bake in 120° C oven for IS min
•
Polyamide application
•
•
•
•
Spin on QZ 3289:QZ 3290 (1:9) adhesion promoter at 5000 rpm for 40 sec
•
Let evaporate for 2 min, blow with N2
•
Spin on Probomide 284 at 5000 rpm for 40 sec
Polyamide hard bake in programmable oven
•
Hold at 90° C for 30 min
•
Ramp at 5° C per min to 170° C
•
Hold at 170° C for 40 min
•
Ramp at 2° C per min to 240° C
•
Hold at 240° C for 20 min
•
Ramp down at 2° C per min to 170° C
•
Hold at 170° C for 5 min
•
Remove from oven and cool down for 15 min
•
0 2 plasma etch (300 mT, 100 W, low frequency) for 1 min (0.4 pm etched)
AZ 4330 lift-off lithography for Ti/Au implant mask
•
Solvent clean ACE, ISO, DI rinse
•
Dehydration bake at 120° C for 15 min
•
Spin on AZ 4330 at 5000 rpm for 40 sec
•
Soft bake in 90° C oven for 30 min
•
Image exposure 18 sec @ 7.5 mW/cm2
•
Reversal bake in ammonia oven at 90° C for 45 min in NH 3
•
Flood exposure 1.1 min @ 7.5 mW/cm2
•
Develop in AZ 400K:DI (1:4) for 3 min
•
DI rin se, blow dry with N2
Ti/Au metallization for implant mask
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Load immediately in E-beam evaporator
•
Lower boom for increased evaporation rate/thickness (x 2.5)
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•
•
Evaporate the following metals after pumping down to 1 10*6 Torr
•
Ti (70 A at 2-3 A/sec)
•
Au (6500 A at 10 A/sec)
•
Liftoff the undesired metal by removing photoresist in AGE
•
ISO and DI rinse
•
Blow dry using N2
Polyamide post bake in programmable oven
•
Hold at 170° C for 15 min
•
Ramp at 2° C per min to 240° C
•
Hold at 240° C for 30 min
•
Ramp down at 2° C per min to 170° C
•
Remove from oven and cool down for 15 min
•
0 2 plasma etch of polyamide (300 mT, 100 W, low frequency) for 8 min
•
Inspect wafer to ensure polyamide removed in implant areas
•
Mount on 3” Si wafer using Kapton tape
6. Ion implant isolation
•
Send for implant to
TCO, 3050 Oakmead village drive, Santa Clara, CA 95051
•
Typical doses/energies
• IT 190 KeV 2 101S/cm2 (7° off axis)
• H" 120 KeV 41014/cm2 (7° off axis)
•
•
Limit beam current < 100 pA for m inim um heating
Remove implant mask
•
Strip off polyamide in Microposit 1165 remover at 90° C
• Ensure that all the Ti/Au has lifted off
• O2 plasma descum of polyamide (300 mT, 300 W, Low frequency) for 10
• Etch away S i0 2 in BHF (full strength) for 2 min
•
DI rinse wafer for 2 min, blow dry with N2
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7. Schottky lithography (darkfield mask, positive photoresist lifto ff process)
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4110 at 6000 rpm for 40 sec (2 pm)
• Soft bake in 90° C oven for 30 min
•
Image exposure for 7.5 sec @ 7.5 mW/cm2 intensity
• Toluene soak for 4 min
• Blow off toluene using N2
• Develop in AZ 400K:DI (1:4 by volume) for 1 min
• DI rinse for 1 min, blow dry with N2
8
. Schottky m etallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in NHiOHrDI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Evaporate the following metals after pumping down to 8 10' 7 Torr
•
Ti ( 2 0 0 A. at 2-3 A/sec)
•
Pt (500 A at
•
Au (2500 A at
1 -2
A/sec)
10
A/sec)
•
Liftoff the undesired metal by removing photoresist in ACE
•
ISO and DI rinse
•
Blow dry using N2
9. CPW lithography (lightfie ld mask, image reversal photoresist process)
•
Solvent clean in ACE, ISO and DI rinse
•
Dehydration bake in 120° C oven for 15 min
•
Spin on HMDS at 5000 rpm for 40 sec
•
Spin on AZ 4210 at 5000 rpm for 40 sec (2 pm thick)
•
Soft bake in 90° C oven for 30 min
•
Image exposure 17 sec @ 7.5 mW/cm2 intensity
136
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•
Reversal bake in ammonia oven at 90° C for 45 min in NH3 at 400m T
•
Hood exposure for 1.1 min @ 7.5 mW/cm2 intensity
•
Develop in A Z400K :D I (1:4 by volume) for 2 min
•
DI rinse for 1 min, blow dry with N2
10. CPW metallization
•
0 2 plasma descum (300 mT, 100 W, low frequency) for 30 sec
•
Dip in HCI:DI (1:10) for 30 sec
•
Load immediately in E-beam evaporator
•
Use Lowered boom to hold sample (thickness is 2.5 times larger)
•
Evaporate the following metals after pumping down to 1 10-6 Torr
•
•
Ti (70 A at 2-3 A/sec)
•
Au (6000 A at 10 A/sec)
Liftoff the undesire
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