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CMOS-Based Microwave and Millimeter Wave Phased Antenna Arrays and Applications

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CMOS-Based Microwave and Millimeter Wave
Phased Antenna Arrays and Applications
By
HUAN LIAO
B.S. (University of Science and Technology of China) 2006
DISSERTATION
Submitted in partial satisfaction of the requirements for the degree of
DOCTOR OF PHILOSOPHY
In
Electrical and Computer Engineering
in the
OFFICE OF GRADUATE STUDIES
of the
UNIVERSITY OF CALIFORNIA
DAVIS
Approved:
_________________________________
Neville C. Luhmann, Jr., Chair
_________________________________
Jonathan P. Heritage
_________________________________
Anh-Vu Pham
Committee in Charge
2013
i
UMI Number: 3565529
All rights reserved
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a note will indicate the deletion.
UMI 3565529
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To my family
ii
Acknowledgement
First of all, I would like to express my deepest gratitude to my advisor, Professor Neville
C. Luhmann Jr., for the continuous support and guidance of my Ph.D study and research, for his
great patience, encouragement, caring and unsurpassed knowledge. Without his guidance and
persistent help, this dissertation would not have been possible. He is always there to help me
through the difficulties, no matter academic or personal. He makes the group feel like home in
this foreign country. It is an honor to be his student. I could not have imagined having a better
advisor, mentor and friend.
I would like to thank the rest of my committee members, Professor Jonathan Heritage and
Professor Anh-Vu Pham, for contributing their valuable time and insightful advice in this
dissertation.
In addition, I would like to thank Dr. Calvin Domier for his great patience, valuable
advice and tremendous support during my research from the big picture to the details; Ms.
Lynette Lambardo for her kindness, great support and help of every aspect; Mr. Mike Johnson
and Ms. Diana Gamzina for their mechanical support.
My sincere thanks also go to Prof. Sheng-Fuh Chang and Prof. Chia-Chan Chang for the
opportunity to study in their wireless communication lab at National Chung-Cheng University in
Taiwan for a month. I highly appreciate the guidance and help from all the group members
during and after my stay, especially Dr. Ting-Yueh Chin for his enormous support and valuable
discussions. I would also like to thank Dr. Chi Yiu Law, Dr. Jia-Chi Chieh, Dr. Cheng Chen, Dr.
Hai Ta and other members from Professor Anh-Vu Pham’s group for their great assistance in
design and lab support. In addition, I would like to thank Professor Rajeevan Amirtharajah and
iii
his student Dr. Travis Kleeburg for helping me tape out the CMOS amplifier. The chip would not
have been successfully designed, fabricated, and measured without their help.
I am thankful to Prof. Rick Branner for sharing the anechoic chamber, his 132 class and
the great lab guidance; and his student Dr. Kelvin Yuk for the valuable discussions and help on
my research. Working with him in the lab when we were both TAs for 132 has been fun and
enlightening.
Moreover, I would like to thank all the members of Microwave/Millimeter Wave
Technology Research Group. Special thanks to the senior members, Dr. Zuowei Shen, Dr. Lu
Yang, Dr. Yaping Liang, Dr. Dandan Zheng, Dr. Cheng Liang for their kind help and guidance
from the day I joined the group. Thank my fellow members, Xiangyu Kong, Tianran Liang for
the valuable discussions, kind assistance and encouragement, for the sleepless nights we were
working together, for the part of life that we have walked through together. Thank junior
members for all the help. Special thanks to Zhi Yao for her assistance in the Rotman lens antenna
array design.
Finally, I would like to thank my parents, Huasheng Liao and Longxiu Zheng, for their
everlasting love, support, understanding, encouragement and their faith in me. A special thanks
to Dr. Dong Chen who is always there to accompany, encourage, and support me.
It would not have been possible to write this doctoral dissertation without the warm help
and support of the kind people around me. I could not be more grateful.
iv
CMOS-Based Microwave and Millimeter Wave
Phased Antenna Arrays and Applications
Abstract
Recently, there has been a rapid development of phased antenna array (PAA) systems
based on low cost MMICs (monolithic microwave integrated circuits). Wideband technology has
attracted considerable attention because of its high data-rate transmission capability. An
investigation into novel wide band CMOS-based microwave and millimeter wave technologies
has been performed in order to develop high performance phased array antenna based transmitter
systems for applications including Microwave Imaging Reflectometry (MIR) systems for high
temperature plasma diagnostics.
This dissertation presents the design and characterization of the individual building
blocks for a Ka-Band (26.5 - 40 GHz) PAA system, which includes a wideband feedback
amplifier using the 0.18μm CMOS process, and a true time delay wideband Rotman lens
integrated with a wideband antipodal Vivaldi antenna array on PCB.
A frequency controlled feedback with parasitic cancellation technique has been employed
in the amplifier design to overcome the inherent 0.18 µm CMOS process limitations, thereby
boosting the high-frequency response. In addition, a gain response superposition concept has
been adopted to obtain a flat gain response with a compact size. This amplifier achieves a peak
gain of 23.3 dB at 35.6 GHz, and maintains >16 dB gain over the entire Ka-Band. The output
saturation power is 10.1 dBm.
v
An 11-in, 9-out microstrip Rotman Lens with 30° steering angle (6° step) has been
designed and implemented. A novel analytical modeling in Matlab enables fast prototyping. EM
simulation has been carried out in CST afterwards. To ensure wideband operation, an antipodal
Vivaldi antenna array with unbalanced microstrip line feed has been designed and integrated
with the Rotman Lens. In the end, the wideband steering has been successfully demonstrated
during the measurement.
The analytical and experimental results of the above designs provide guidance toward the
development of a new PAA system for future use in MIR systems with significantly enhanced
performance.
vi
Contents
Acknowledgement ............................................................................................................ iii
Abstract .............................................................................................................................. v
List of Figures ................................................................................................................... xi
List of Tables ................................................................................................................... xx
Chapter 1 Introduction ................................................................................................... 1
1.1
Motivation ........................................................................................................... 1
1.2
Introduction of Phased Array Antennas .............................................................. 5
1.3
The Need for Ultra-Wideband ............................................................................ 7
1.4
True Time Delay Technologies .......................................................................... 8
1.5
Beamforming Networks for Multiple Beam Antennas ..................................... 15
1.6
Introduction to CMOS technology.................................................................... 21
1.7
System Overview .............................................................................................. 24
1.8
Dissertation Organization ................................................................................. 25
Chapter 2 Introduction of Plasma Microwave Imaging Reflectometry System ..... 27
2.1
Introduction of Fusion....................................................................................... 27
2.2
Introduction of Microwave Imaging Reflectometry (MIR) .............................. 28
2.3
MIR on DIII-D .................................................................................................. 36
Chapter 3 Ka-Band Wideband CMOS Amplifier...................................................... 41
3.1
Introduction ....................................................................................................... 41
vii
3.1.1
High-Frequency MOSFET Modeling ........................................................... 44
3.1.2
Fundamental MOSFET Limitations ............................................................. 45
3.1.3
Frequency Controlled Feedback with Parasitic Cancellation Technique ..... 47
3.1.4
Wideband Techniques ................................................................................... 48
3.2
Feedback Amplifier Design Procedures ........................................................... 49
3.2.1
System Specifications ................................................................................... 49
3.2.2
Architecture, Sizing and Biasing .................................................................. 51
3.2.3
Frequency Controlled Feedback with Parasitic Cancellation Analysis ........ 55
3.2.4
Gain Response Superposition ....................................................................... 62
3.2.5
Schematic and Simulation with Ideal Components ...................................... 63
3.2.6
Simulation with Non-ideal Passive Components .......................................... 67
3.2.7
Simulation with Layout Components ........................................................... 74
3.2.8
Layout and Post Layout Simulation.............................................................. 79
3.3
Amplifier Measurement .................................................................................... 92
3.3.1
Fabrication .................................................................................................... 92
3.3.2
Small Signal S-parameter Measurement ....................................................... 93
3.3.3
Large Signal Measurement ........................................................................... 99
3.3.4
NMOS Measurement .................................................................................. 106
3.4
Conclusion ...................................................................................................... 109
Chapter 4 Ka-Band Phased Array Antenna Design Utilizing Rotman Lens ........ 111
viii
4.1
Introduction ..................................................................................................... 111
4.1.1
Phased Array Antenna Fundamentals ......................................................... 111
4.1.2
Rotman Lens Fundamentals ........................................................................ 114
4.1.3
Antipodal Vivaldi Antenna Background .................................................... 115
4.2
Design of Ka-band Rotman Lens .................................................................... 117
4.2.1
Rotman Lens Principle and Design Equations............................................ 117
4.2.2
S-Parameter Modeling ................................................................................ 121
4.2.3
Calculate and Plot Rotman Lens Using Matlab .......................................... 123
4.2.4
EM Simulation ............................................................................................ 130
4.3
Design of Ka-Band Antipodal Vivaldi Antenna Array................................... 142
4.4
Preparation for Fabrication, Assembly, and Measurement ............................. 152
4.4.1
Connectors and CPW to MS Transition...................................................... 152
4.4.2
Terminations ............................................................................................... 155
4.4.3
Absorbing Material, Thick Substrate Block, and Metal Block ................... 161
4.4.4
Final Layout ................................................................................................ 161
4.5
Measurements ................................................................................................. 163
4.5.1
Assembly..................................................................................................... 163
4.5.2
Antenna Radiation Pattern Measurement ................................................... 166
4.5.3
S-parameter Measurement .......................................................................... 171
4.6
Summary ......................................................................................................... 183
ix
Chapter 5 Conclusion and Future Work .................................................................. 184
5.1
Conclusion ...................................................................................................... 184
5.2
Future Work .................................................................................................... 186
5.2.1
CMOS Switch ............................................................................................. 186
5.2.2
CMOS Amplifier ........................................................................................ 189
5.2.3
Rotman Lens with Vivaldi antenna array ................................................... 190
5.2.4
Alternative True Time Delay Techniques................................................... 190
Appendix A Matlab Codes for Rotman Lens Design .............................................. 192
A.1. Rotman Lens Design Equations and S_parameters modeling .......................... 192
A.2. Matlab Codes for Calculating the Bended Delay Line Length ......................... 196
x
List of Figures
Figure 1.1: Specific attenuation due to atmospheric gases [12]. ........................................ 4
Figure 1.2: Schematic of linear phased array antenna. ....................................................... 5
Figure 1.3: Schematic of a 4-bit switched delay line phase shifter .................................. 10
Figure 1.4: Schematic of PET-controlled phase shifter on microstrip [30]. ..................... 11
Figure 1.5 Liquid crystal true time delay line [38]. .......................................................... 12
Figure 1.6: Schematic of Nonlinear Delay Line. .............................................................. 13
Figure 1.7: Lumped equivalent circuit of one section of a nonlinear delay line. ............. 14
Figure 1.8: Rotman lens. ................................................................................................... 18
Figure 1.9: The schematic of a 4×4 Butler matrix. ........................................................... 20
Figure 1.10: Cross section of two transistors in a CMOS gate, in an N-well CMOS
process [56]. ................................................................................................................................. 21
Figure 1.11: CMOS technology scaling roadmap[60]. Copyright © 2009 - 2012 Toshiba
Electronics Europe GmbH. ........................................................................................................... 23
Figure 1.12: Schematic of the Ka-band PAA transmitter. ................................................ 25
Figure 2.1: The easiest fusion reaction. ............................................................................ 27
Figure 2.2: The analogy of a plasma and a tapered rectangular waveguide. .................... 29
Figure 2.3: The dispersion relations of O-mode and X-mode. ......................................... 31
Figure 2.4: Principle of plasma reflectometry. ................................................................. 31
Figure 2.5: Comparison of 1-D (left) and 2-D (right) reflectometry ................................ 34
Figure 2.6: Imaging technology which restore the phase front of the cutoff layer for 2-D
fluctuations .................................................................................................................................... 35
xi
Figure 2.7: Schematic of the MIR diagnostic. .................................................................. 35
Figure 2.8: Cutoff layers in DIII-D plasma [75]. .............................................................. 36
Figure 2.9: Schematic of a combined ECEI/MIR system. ................................................ 37
Figure 2.10: Schematic illustration of the principles MIR with beam steering transmitter.
....................................................................................................................................................... 38
Figure 3.1: Block diagram of a simple radio telegraph transmitter. ............................... 42
Figure 3.2: Block diagram of a simple transceiver. .......................................................... 42
Figure 3.3: Analog design octagon [61]. .......................................................................... 43
Figure 3.4: A MOSFET schematic cross-section with the parasitic components.
Copyright © 2000, IEEE. [95] ...................................................................................................... 45
Figure 3.5: Wideband feedback amplifier design flowchart ............................................. 49
Figure 3.6: Single transistor DC and bias point simulation in ADS. ............................... 53
Figure 3.7: IV curves and load line................................................................................... 54
Figure 3.8. Gm versus VDS................................................................................................ 54
Figure 3.9: Simplified small signal model of a single MOSFET. .................................... 55
Figure 3.10: Schematic of the single stage feedback amplifier. ....................................... 56
Figure 3.11: Cadence DC simulation. ............................................................................... 57
Figure 3.12: Partial DC Operating Points Results for finger numbers of 32 and 45. ....... 59
Figure 3.13: Comparison of the gain of a single stage amplifier with and without Parasitic
Cancellation feedback. .................................................................................................................. 60
Figure 3.14: Comparison of the MAG of stages 3&4 with and without Ld. ..................... 61
Figure 3.15: Maximum available gain responses of stages 1&2, and stages 3&4, and the
superposition of the gain responses. ............................................................................................. 63
xii
Figure 3.16: Schematic of the Ka-Band CMOS feedback amplifier. ............................... 65
Figure 3.17: Optimized initial schematic simulated insertion loss with ideal components.
....................................................................................................................................................... 65
Figure 3.18: Optimized initial schematic simulated return loss with ideal components. . 66
Figure 3.19: Optimized initial schematic simulated stability Mu factor. ......................... 66
Figure 3.20: The equivalent model of a spiral inductor [103]. ......................................... 67
Figure 3.21: Lgd1 model simulation................................................................................... 69
Figure 3.22.: Calculated Lgd1 model inductance. .............................................................. 70
Figure 3.23: Calculated Lgd1 model parasitic series resistance. ........................................ 70
Figure 3.24: Calculated Q of Lgd1 model. ......................................................................... 71
Figure 3.25: Equivalent lumped-element model of a capacitor [104]. ............................. 72
Figure 3.26: The schematic with the foundry models....................................................... 72
Figure 3.27: The simulated insertion loss with foundry models....................................... 73
Figure 3.28: The simulated return loss with foundry models. .......................................... 73
Figure 3.29: The simulated stability Mu factor with foundry models. ............................. 74
Figure 3.30: Lgd1 layout..................................................................................................... 75
Figure 3.31: Calculated inductance from Momentum EM simulation result. .................. 76
Figure 3.32: Calculated parasitic resistance from Momentum EM simulation result. ..... 77
Figure 3.33: The simulated insertion loss with layout components.................................. 78
Figure 3.34: The simulated return loss with layout components. ..................................... 78
Figure 3.35: The simulated stability Mu factor with layout models. ................................ 79
Figure 3.36: The layout of the first stage. ......................................................................... 80
Figure 3.37: Zoom in on the layout of the first stage around the NMOS area. ................ 81
xiii
Figure 3.38: Stage 1 layout component. ........................................................................... 82
Figure 3.39: The stage 1 layout simulated insertion loss in comparison with that with
layout component inductors. ......................................................................................................... 83
Figure 3.40: Stage 1&2 Initial layout. .............................................................................. 84
Figure 3.41: Stage 1&2 modified layout........................................................................... 85
Figure 3.42: Wrong layout (left) and correct layout (right) of Lgd and Ld. ....................... 86
Figure 3.43: Final chip layout of the Ka-band CMOS feedback amplifier. ..................... 86
Figure 3.44: M1 pattern. ................................................................................................... 87
Figure 3.45: Gain of the final layout EM simulation result in comparison with all the
previous results. ............................................................................................................................ 88
Figure 3.46: S11 of the final layout EM simulation result in comparison with all the
previous results. ............................................................................................................................ 88
Figure 3.47: S22 of the final layout EM simulation result in comparison with all the
previous results. ............................................................................................................................ 89
Figure 3.48: Stability factor Mu of the final layout EM simulation result in comparison
with all the previous results. ......................................................................................................... 89
Figure 3.49: Annotation of the DC solution. .................................................................... 90
Figure 3.50: Schematic for LVS in Cadence Spectre. ...................................................... 91
Figure 3.51: Addition resistors to the layout for LVS. ..................................................... 91
Figure 3.52: Die photo of the Ka-Band CMOS feedback amplifier. ................................ 92
Figure 3.53: Die photo of the test structures chip ............................................................. 93
Figure 3.54: S-parameter measurement setup block diagram. .......................................... 94
Figure 3.55: Small signal measurement setup. ................................................................. 95
xiv
Figure 3.56: The customized GGB DC problem. ............................................................. 95
Figure 3.57: Probing Setup. .............................................................................................. 96
Figure 3.58: Chip with probes. ......................................................................................... 96
Figure 3.59: GGB Picoprobe calibration substrate #CS-5. ............................................... 97
Figure 3.60: Measured and simulated small signal gain of the amplifier. ........................ 98
Figure 3.61: Measured and simulated return loss of the amplifier. .................................. 98
Figure 3.62: Measured stability factor Mu. ...................................................................... 99
Figure 3.63: Linearity measurement with power meter. ................................................. 100
Figure 3.64: The measured insertion loss of the Nardar 4768-20 attenuator.................. 102
Figure 3.65: Pout versus Pin using different measurement methods. ............................... 103
Figure 3.66: Simulated and measured gain compression and Pout versus Pin.................. 104
Figure 3.67: Measured and simulated PAE at band center. ............................................ 105
Figure 3.68: Measured gain compression, Pout versus Pin and PAE at 26.5 GHz ........... 105
Figure 3.69: Measured gain compression, Pout versus Pin and PAE at 40 GHz. ............. 106
Figure 3.70: Measured maximum available gain of NMOS with 32 fingers.................. 107
Figure 3.71: Measured maximum available gain of NMOS with 45 fingers.................. 108
Figure 3.72: Measured IV curves of NMOS with 32 fingers. ........................................ 108
Figure 3.73: Measured IV curves of NMOS with 45 fingers. ........................................ 109
Figure 4.1: Geometry and design parameters of a Rotman lens. .................................... 117
Figure 4.2: LineCalc in ADS for microstrip line calculation on Rogers 3003. .............. 125
Figure 4.3: Normalized Rotman lens contours generated in Matlab. ............................. 128
Figure 4.4: The Rotman lens contours generated in Matlab. .......................................... 128
Figure 4.5: The insertion loss between the 6th beam port and 5th array port................. 129
xv
Figure 4.6: The return loss of the 6th beam port and 5th array port. .............................. 129
Figure 4.7: The Rotman lens in CST MWS.................................................................... 132
Figure 4.8: Wave port size. ............................................................................................. 133
Figure 4.9: E-field of the port 1 mode at 33.25 GHz. ..................................................... 134
Figure 4.10: E-field of the port 12 mode at 33.25 GHz. ................................................. 134
Figure 4.11: The E-field of the Rotman lens at 26 GHz with port 1 as input. ................ 135
Figure 4.12: The E-field of the Rotman lens at 33.25 GHz with port 1 as input. ........... 136
Figure 4.13: The E-field of the Rotman lens at 40 GHz with port 1 as input. ................ 136
Figure 4.14: The E-field of the Rotman lens at 33.25 GHz with port 6 as input. ........... 137
Figure 4.15: Post processing in ADS. ............................................................................. 138
Figure 4.16: The phase of the array ports relative to different input beam ports from CST
simulation.................................................................................................................................... 139
Figure 4.17: Estimated steering angle from CST simulation.......................................... 140
Figure 4.18: The insertion loss for certain ports from CST simulation. ......................... 141
Figure 4.19: The return loss for certain ports from CST simulation. ............................. 142
Figure 4.20: The schematic of a the Antipodal Vivaldi antenna with dimensions defined.
..................................................................................................................................................... 144
Figure 4.21: The modeling of the Vivaldi antenna in CST MWS, viewing in different
angle. ........................................................................................................................................... 145
Figure 4.22: Simulated return loss of a single Vivaldi antenna. ..................................... 147
Figure 4.23: Simulated half power beam width of a single Vivaldi antenna. ................. 147
Figure 4.24: Simulated gain of a single Vivaldi antenna. ............................................... 148
xvi
Figure 4.25: The radiation pattern of the single Vivaldi antenna at frequency 26.5 GHz.
..................................................................................................................................................... 148
Figure 4.26: The radiation pattern of the single Vivaldi antenna at frequency 33.25 GHz.
..................................................................................................................................................... 149
Figure 4.27: The radiation pattern of the single Vivaldi antenna at frequency 40 GHz. 149
Figure 4.28: The Vivaldi antenna array. ......................................................................... 150
Figure 4.29: The radiation pattern of the Vivaldi antenna array at frequency 26.5 GHz.
..................................................................................................................................................... 151
Figure 4.30: The radiation pattern of the Vivaldi antenna array at frequency 33.25 GHz.
..................................................................................................................................................... 151
Figure 4.31: The radiation pattern of the Vivaldi antenna array at frequency 40 GHz .. 152
Figure 4.32: The GCPW to MS transition for beam ports (left) and array ports (right). 154
Figure 4.33: The E-field and insertion loss of GCPW to MS transition for beam ports 154
Figure 4.34: The E-field and insertion loss of GCPW to MS transition for array ports . 155
Figure 4.35: The typical high frequency resistor equivalent circuit ............................... 156
Figure 4.36: Impedance curve of a Vashay Sternice 02016 chip resistor. ...................... 157
Figure 4.37: The 50 Ohm termination in CST MWS. .................................................... 158
Figure 4.38: EM/Circuit co-simulation in CST MWS. ................................................... 158
Figure 4.39: The simulated return loss of the 50 Ohm termination in CST MWS. ........ 159
Figure 4.40: The 50 Ohm termination in ADS Momentum............................................ 159
Figure 4.41: The simulated return loss of the 50 Ohm termination in ADS................... 160
Figure 4.42: Three configurations of 50 Ohm termination. ............................................ 160
Figure 4.43: Final Layout for Rotman lens and test structures. ...................................... 162
xvii
Figure 4.44: Reflow oven. .............................................................................................. 164
Figure 4.45: The Rotman lens with antenna array after connectors and resistors assembly.
..................................................................................................................................................... 165
Figure 4.46: The fixture to hold the board and attach to the motor. ............................... 166
Figure 4.47: Antenna radiation pattern measurement setup block diagram, using network
analyzer. ...................................................................................................................................... 168
Figure 4.48: Antenna radiation pattern measurement actual setup. ................................ 168
Figure 4.49: The measured E-plane far field radiation patterns at 27 GHz. ................... 169
Figure 4.50: The measured E-plane far field radiation pattern at 30 GHz. .................... 169
Figure 4.51: The measured E-plane far field radiation pattern at 37 GHz. .................... 170
Figure 4.52: 2-port S-parameter measurement setup. ..................................................... 171
Figure 4.53: Post processing in ADS for beam port 6. ................................................... 172
Figure 4.54: The measured return loss of beam port 6, nine times. ................................ 174
Figure 4.55: The measured return loss of the array ports. .............................................. 174
Figure 4.56: The measured insertion loss between the 9 array ports and the beam port 6.
..................................................................................................................................................... 175
Figure 4.57: The steering angle calculated from the measured S-parameter with the input
of beam port 6. ............................................................................................................................ 175
Figure 4.58: The comparison of the measured return loss with or without absorbing
material, and the simulated result. .............................................................................................. 176
Figure 4.59: The comparison of the measured return loss with or without absorbing
material, and the simulated result. .............................................................................................. 176
Figure 4.60: The measured return loss of beam port 11, nine times. .............................. 177
xviii
Figure 4.61: The measured insertion loss between the 9 array ports and the beam port 11.
..................................................................................................................................................... 178
Figure 4.62: The calculated steering angles from the beam ports 6 to 11. ..................... 178
Figure 4.63: The test structures. ...................................................................................... 179
Figure 4.64: The measured insertion loss of the Southwest connector back to back
structure....................................................................................................................................... 180
Figure 4.65: The measured return loss of the Southwest connector back to back structure.
..................................................................................................................................................... 180
Figure 4.66: The measured insertion loss of the SGMC connector back to back structure.
..................................................................................................................................................... 181
Figure 4.67: The measured return loss of the SGMC connector back to back structure. 182
Figure 4.68: The measured return loss of the three termination configurations and the
simulated result for 1 50 Ohm resister termination. ................................................................... 182
Figure 5.1: Schematic of the PAA transmitter. ............................................................... 187
Figure 5.2: Schematic of a SPDT switch using traveling-wave concept [128]. ............. 187
Figure 5.3: The equivalent circuit model of the off arm and on arm. ............................. 188
Figure 5.4: The simulated insertion loss and isolation of the travelling wave SPDT. .... 189
xix
List of Tables
Table 3.1: Wideband Amplifier Specifications. ............................................................... 50
Table 3.2: Summary of measured performance. ............................................................. 110
Table 4.1: Comparison of three Rogers laminates. ......................................................... 126
Table 4.2: Component list. .............................................................................................. 163
xx
Chapter 1
1.1
Introduction
Motivation
Since the development of early fixed beam antennas, there has been a desire to scan the
beam to allow wide area coverage to be combined with high gain narrow beams [1]. This has led
to the development of phased array antennas (PAAs) where the state of the technology has
undergone considerable advancement over the last four decades along with the development of
radar and communication technologies [2]. Steerable antennas, whether mechanically,
electronically, or any hybrid combination thereof, have in the past always been widely used for
military applications, including missile seeking and guiding systems, target acquisition, combat
identification, and millimeter wave imaging cameras which allow one to see through dust and
fog. Nowadays, however, phased arrays are becoming more and more attractive and
commercially interesting for a broader audience such as for wireless and satellite
communications, medical instruments, surveillance systems, and collision-avoidance automotive
radar sensors, blind-spot indicator and parking aids, aircraft guiding and landing systems, and
road-pricing systems for charging road tolls [3-8]. For example, along with the rapid growth of
mobile phone users, their demand for service has nearly saturated existing cellular phone systems
and the channel capacity has become a serious problem. By adding PAAs to base stations, they
can provide multiple beams to subdivide the cells, thereby allowing improvements without
building new sites [9].
The transmitter/receiver module (TRM) is the heart of most radar, imaging, and
communication systems. As system complexity has increased dramatically over the past few
decades, novel approaches to develop compact, high operating frequency, wide bandwidth, low
1
sidelobe, appropriate beamwidth and cost effective PAAs are needed. This dissertation research
is mainly aimed at the development of the individual components inside the PAA transmitter
system.
Modern communication systems all demand faster access, more information, and
broadband operation. The wide bandwidths and smaller physical system size motivate a move to
higher frequencies for wireless communications [10]. High frequencies also bring higher spatial
resolution for imaging and radar systems. Planning for millimeter wave spectrum use is based on
the propagation characteristics and channel performance of radio signals and the noise inherent
in this frequency range. While signals in the lower frequency band can propagate for many miles
and penetrate more easily through buildings, millimeter wave signals can travel only a few miles
or less and suffer from high transmission loss in the air and solid materials. However, these
characteristics of millimeter wave propagation are not necessarily disadvantageous. Millimeter
waves can permit more densely packed communications links, thus providing very efficient
spectrum utilization, and they can increase security of communication transmissions [11]. The
particular frequency of choice for a given application is often partially determined by the
atmospheric absorption spectrum. Figure 1.1 shows the specific attenuation from 1 to 350 GHz at
sea-level for dry air and water vapor with a density of 7.5 g/m3 [12]. From the figure, it is seen
that the O2 molecule resonates at 60 GHz and creates an atmospheric absorption peak, making
this frequency suitable for short-range wireless communications (e.g. Gb/s wireless USB or
streaming video) designed to avoid interference with neighboring devices [13]. In contrast, the
atmospheric attenuation “windows” at Ka/Q-band (26.5-50 GHz) and W-band (70-110 GHz)
provide suitable frequencies for imaging or communications applications.
2
Ka-band has been selected for the system design in this dissertation. There are numerous
applications at Ka-band, in particular, satellite broadband communications, short-range car radar
systems and wireless broadband networks (WLAN and WPAN). Therefore, there is a high
demand to implement low cost wideband building blocks at this frequency band. Moreover, we
are aiming a higher frequency system design in the future, for example, V and W band, so this
Ka-band design is also intended to serve as a proof of principle demonstration.
The UC Davis Microwave/Millimeter Wave Technology and Plasma Diagnostics
research group has an active microwave diagnostics development program with instruments
installed on magnetic fusion devices around the world. Microwave Imaging Reflectometry
(MIR) systems have been developed over the past several years for plasma fusion diagnostic
studies. High gain, high efficiency, cost effective, multi-channel imaging arrays are required for
active imaging applications such as MIR [14, 15]. The objective for the transmitting system for
MIR is to launch a beam similar to a Gaussian beam with minimized side lobes so that most of
the power can be concentrated in the main beam. In order to match different cutoff layers inside
the plasma after going through the optical system, the focal properties of this beam should be
able to be changed electronically. The MIR system being developed for the DIII-D, which is a
tokamak device developed in the 1980s by General Atomics in San Diego, has served to
motivate this proposed dissertation research.
3
Figure 1.1: Specific attenuation due to atmospheric gases [12].
4
1.2
Introduction of Phased Array Antennas
The phased array antenna (PAA) concept is widely used in transceiver systems. A phased
array is a group of antennas in which the relative phases of the respective signals feeding the
antennas are varied in such a way that the effective radiation pattern of the array is reinforced in
a desired direction and suppressed in undesired directions [16]. This is accomplished by
controlling the phase or time delay and gain of the signal in each path independently to provide
constructive interference at particular angles while others experience destructive interference so
as to steer the beams in the desired direction [17]. Figure 1.2 shows a simple 1×N linear antenna
array.
Figure 1.2: Schematic of linear phased array antenna.
5
It consists of a feeding network, phase shifters or true time delay devices, power control
circuitry in the case of beam shaping, and antenna elements. The scan angle θ 0 depends on the
operating frequency f , spacing d , and the phase difference ∆Φ between signals of the
individual elements. The far-field pattern of a PAA is controlled by the relative phase and the
amplitude distribution of the microwave signals emitted by regularly spaced radiating elements
[18]. It is also a function of each element’s physical structure, its excitation, and the array lattice
[19].
The advantages of PAAs are high gain, directivity and accuracy, low side lobes,
multifunction operation by emitting several beams simultaneously, and fault tolerance since the
loss of a single component reduces the capability and beam sharpness, while the system remains
operational. For electronically controlled beam-forming, no mechanical motion is required, and it
permits the beam to move from one target to the next in a few microseconds [6, 17]. Phased
arrays are primarily used to create a line of-sight (LOS) between the transmitter and desired
receivers. Since antenna characteristics are reciprocal, the phased array antenna can also be used
as a receiving system, as well as a transmitter [6]. Phased array transmitters limit their emission
to targeted spatial angles, and hence create less interference at other directions. Phased array
receivers, in principle, reject interference signals from unwanted directions. In phased array
receivers, the SNR is improved due to the use of multiple independent receiving elements with
uncorrelated noise. In phased array transmitters, power is combined in space, and as such, the
usually stringent output power requirement per power amplifier (PA) is relaxed [20].
There are two general types of phased arrays: passive and active. Passive arrays use a
central transmitter and receiver, but have phase shift capability at each radiating element or sub
array. In active arrays, the high-power generation for transmit and low-noise amplification on
6
receive are distributed, as is the phase control at each radiating element. Active arrays provide
added system capability and reliability; but they did not receive extensive attention until the last
15 years because they were too complex and expensive [19]. With the advent of MMIC
technology, which will be discussed in section 1.5, automated assembly of microwave
components, and high-speed digital processors, active arrays are becoming the preferred
approach for both radar and communication systems in airborne, ground, and space application.
Depending upon the particular application, the design of a PAA must meet a variety of
requirements, including the type of antenna, driving power and power-handling capability,
reciprocal or nonreciprocal operation, operating frequency and bandwidth, sidelobe level,
beamwidth, multi-beam capability and switching time, beam shaping capability, polarization,
and physical size and weight.
1.3
The Need for Ultra-Wideband
In April 2002, the Federal Communications Comission (FCC) released the first report
and order regarding the application of ultra-wideband (UWB) communication devices [21]. The
antennas are an essential part of such systems as they are of any wireless system. All antennas’
properties depend strongly on the frequency. Therefore, the transmitted waveform is filtered by
the antenna structure. The ultra-wide bandwidth allows for resolving the fine structure of the
transient transmitting and receiving performance of the antenna. For the free-space propagation
channel, the channel impulse response depends only on the antennas’ filtering characteristic [22].
The nature of the short-duration pulses used in UWB technology offers several
advantages over narrowband communications systems. The key benefits that UWB brings to
wireless communications are: ability to share the frequency spectrum with current narrowband
7
and wideband radio services; large channel capacity/data rate since it linearly increases with
bandwidth according to Hartley-Shannon's capacity formula: Equation (1.1) ;
=
C B log 2 (1 + SNR)
(1.1)
ability to work with low SNRs offers high performance in noisy environments, because Equation
(1.1) also indicates that the channel capacity is only logarithmically dependent on signal-to-noise
ratio (SNR), which means UWB systems could still provide large channel capacity even with
low SNR as a result of their large bandwidth; low transmit power provides high degree of
security with low probability of detection and intercept; the frequency diversity caused by high
processing gain makes UWB signals relatively resistant to intentional and unintentional jamming,
which makes it reliable in hostile environments; the very short duration of UWB pulses makes
them less sensitive to the multipath effect, which delivers higher signal strengths in adverse
conditions [23].
A low loss antenna system is crucial in order to provide the required sensitivity. To
overcome the huge loss encountered during the signal transmission, additional components are
needed. For a transmitter array, it requires power amplifiers and upconverters combined into the
system. For a receiver array, low noise amplifiers, and downconverters or sampling circuits, are
usually required. The operational frequency bandwidth of the PAA is ultimately limited by the
bandwidth of these elements as well as the antenna array itself. In this dissertation, a wideband
feedback amplifier, a wideband Rotman lens phase shifter, and a wideband antipodal antenna
array have been designed.
1.4
True Time Delay Technologies
8
The key essential component of an electronically scanned phased array is the phase
shifter/true time delay (TTD) device. Wide-band radar systems acquiring frequency - dependent
target response and multi-path characteristics demand phase shifters with minimum frequency
dispersion [24]. When an array is scanned with fixed phase shift, provided by phase shifters,
there is also a bandwidth limitation as the position of the main beam will change with frequency,
which is called beam squint [6]. It is obvious, from Equation (1.2), that changing the operating
frequency f results in a change of the scan angle θ 0 for fixed phase shift Φ , element number n
and element spacing d . In contrast, when TTD is employed in the phased array, the beam
scanning angle is independent of frequency to first order as shown in Equation (1.3).
Φ = −2π f
τ=
dΦ
dω
ω =ωc
=
nd
sin θ 0
c
Φ0
nd
= − sin θ 0
2π f c
c
(1.2)
(1.3)
The frequency bandwidth of a conventional phased PAA is ultimately limited by the
bandwidth of the array elements. Specifically, a severe limitation is often caused by the use of
phase shifters due to the beam squint effect. The use of TTD technology potentially eliminates
the bandwidth restriction, providing a theoretically frequency independent time delay on each
channel of the array, so as to realize the squint free steering.
A TTD feeding network is important for broadband PAAs. Microwave and millimeter
wave TTD can be generated by a variety of electronic and optical techniques, employing
different materials and technologies to achieve the desired effects [25]. Several TTD
technologies have been developed in our group including a piezoelectric transducer (PET)
controlled phase shifter (by former Ph.D students Chia-chan Chang [26-28] and Lu Yang [2931]), Microelectromechanical systems (MEMS) varactor delay lines (by former Ph.D student
9
Yaping Liang [32, 33]) and both hybrid and monolithic nonlinear delay lines (NDLs) (by former
Ph.D student Cheng Liang [34]).
One of the earliest and easiest of the TTD technologies was the use of switched delay
lines. These phase shifters in general consist of several phase shifters in a cascaded arrangement,
where each delay bit is implemented separately with different delay values. The switches are
configured in different lines which can be selectively controlled for the propagation of RF signals.
The phase delay is obtained by switching in the required number of bits [35, 36]. The phase
difference of each section is generated by the delay line length difference between the reference
arm and delay arm. A simple schematic of a 4-bit switched delay line phase shifter with 22.5̊ step
is illustrated in Figure 1.3.
Reference Arm
Bit 1
Reference Arm
Reference Arm
Bit 3
Bit 2
Reference Arm
Bit 4
Delay Arm
Delay Arm
Delay Arm
Delay Arm
22.5º
45º
90º
180º
Figure 1.3: Schematic of a 4-bit switched delay line phase shifter
The switches could be PIN diodes, field effect transistors (FETs), or MEMS switches.
The benefits of MEMS switches relative to conventional semiconductor-based alternatives are
derived from their lower signal loss, higher isolation, higher linearity, and lower power
consumption [37].
The switched delay lines are easy to implement and could work over a broad frequency
range. However, this time delay method has several disadvantages; for example, it is digital
instead of analog in nature, so it cannot provide continuous phase shifting; the insertion loss of
the entire line increases rapidly with increase in bit number; the size is not compact, although the
10
delay lines could be meandered to reduce the size, the performance would be deteriorated; In a
word, there is always a compromise between the cost, size, insertion loss, and the precision.
In a PET controlled phase shifter, a PET-controlled dielectric layer is used to perturb the
electromagnetic fields of the transmission line; either microstrip line, coplanar-waveguide (CPW)
or coplanar-stripline (CPS) could be used. Note that the CPS can generate 50% more phase shift
than the microstrip line. This is due to the fact that the electromagnetic field on a CPS is less
confined than those on microstrip lines, thereby making them more sensitive to perturbers placed
above them. The schematic of a PET-controlled phase shifter on microstrip is shown in Figure
1.4 [30].
DC bias line
PET
Supporter
Up & Down
Perturber
Test Fixture
Substrate
Microstrip line
Figure 1.4: Schematic of PET-controlled phase shifter on microstrip [30].
The perturber attached to a PET plate is deflected in the up/down direction under an
external DC bias voltage, so that the air gap between the microstrip and the perturber is changed,
thereby perturbing the electromagnetic field of the microstrip line. The variation in effective
dielectric constant results in a time delay type phase shift. The progressive phase shift can be
calculated using Equation (1.4),
∆Φ = ∆L
2π
λ0
(
e eff' ( f ) − e eff ( f )
11
)
(1.4)
'
where ∆L is the progressive length of the perturber above the microstrip; e eff
( f ) and e eff ( f )
are the effective relative dielectric constants of the perturbed and unperturbed microstrip lines
[31].
By varying the shape of the perturber, beam steering and beam shaping could be realized.
For example, a trianglular shaped perturber generates a linear phase distribution thereby steering
the beam, while the quadratic function shaped perturber will defocus the beam and widen the
beam width, because the nonuniform phase distribution fills in the nulls of the radiation pattern.
The PET controlled phase shifter possesses the advantage of low cost, simplicity and
continuously phase shift; however, the mechanical movement of the PET limits the phase shift
speed, and the size is bulk.
Another similar TTD technology involving dielectric control is liquid crystal delay line
technology, as shown in Figure 1.5 [38].
Figure 1.5 Liquid crystal true time delay line [38].
When the control voltage is changed, the orientation of the liquid crystal molecules is
changed so that the effective permittivity of the liquid crystal layer changes, resulting in a
12
concomitant change in the propagation velocity of the transmission lines, thereby leading to a
different time delay. By employing the membrane impregnated with liquid crystal to the liquid
crystal layer of the delay line, the phase-shift response becomes fast independently of the liquid
crystal thickness. Moreover, the alignment layer, which is normally attached on the liquid crystal
layer substrate, becomes unnecessary [39].
The liquid crystal phase shifter is easy to implement and less expensive. However, the
major drawback is that this delay method has inherently long response time. .
The nonlinear delay line, also referred to as a variable capacitance delay line or
distributed delay line, is a relatively high impedance transmission line periodically loaded with
voltage variable capacitors or varactors in the form of either reverse biased solid-state Schottky
diodes or MEMS varactors [33], as shown in Figure 1.6.
Figure 1.6: Schematic of Nonlinear Delay Line.
The lumped equivalent circuit model of the NDL is an LC ladder network, as shown in
Figure 1.7, where Lt and Ct are the inductance and capacitance per unit length of the unloaded
transmission line, and s is the section length.
13
Figure 1.7: Lumped equivalent circuit of one section of a nonlinear delay line.
The Bragg frequency of an LC ladder network, as expressed as in Equation (1.5), is the
frequency at which the individual reflections from each of the periodically spaced air-bridges
add up in phase to maximize the reflection, or simply stated as the frequency at which the
reflections interfere constructively, which means the spacing between the capacitors is 1/2 of a
wavelength at that frequency on the transmission line and the propagation factor β s = π . The
characteristic impedance of the line goes to zero, indicating no power transfer at the Bragg
frequency [36].
ωBragg =
2
sLt ( sCt + Cvar actor (Vbias ))
(1.5)
At frequencies far below the Bragg frequency, the periodically loaded transmission lines
behave like synthetic transmission lines, whose characteristic impedance is given by
Z=
sLt
sCt + Cvar actor (Vbias )
(1.6)
and the phase velocity is
vp =
s
sLt ( sCt + Cvar actor (Vbias ))
14
(1.7)
The time delay per section is
2
t=
sLt ( sCt + Cvar actor (Vbias )) =
ωBragg
(1.8)
In NDLs, the varactor diode capacitance is a function of DC bias voltage. By changing
the DC bias, and hence controlling the phase velocity, the nonlinear delay line will generate a
frequency independent delay, so called true time delay, in the frequency regions far below the
Bragg frequency.
The NDLs using MEMS varactors have several advantages, such as compact size,
relatively low insertion loss, low power consumption, high power handling capability, and
excellent intermodulation performance [36]. However, the tuning range of the varactor limits the
time delay range, and the physical size of the varactor limits the loading spacing and Bragg
frequency and thus the operating frequency.
In a word, phase-shifter critical design parameters are RF insertion loss, amplitude
variation with phase shift, switching times, power handling capability, and the power required to
shift phase. Also important are the size and weight of the phase shifter and its control circuits.
Unfortunately, no one type of phase shifter has desirable properties for all of these parameters
[40].
1.5
Beamforming Networks for Multiple Beam Antennas
Another important technique for beam steering other than using phase shifters is to use
beamforming networks feeding into multiple beam antennas. A multiple beam antenna is one
with the capability to form many beams in different directions from the same aperture. RF
beamforming techniques encompass two major areas: namely quasi-optic types, involving a
15
hybrid arrangement of either a reflector or lens objective with a feed array, and circuit types used
to feed arrays [1].
Reflectors and lenses provide two optical mechanisms to magnify small apertures. They
also provide limited scanning of the narrow beams that are produced by the magnified aperture.
In both cases, scanning is achieved by switching the feed element location. However, there are a
number of basic differences between the two structures. While the reflector system is less
complex, it may occupy more volume for the same features and suffers from blockage losses.
The reflector has a single perfect focal point where secondary radiation has a planar phase front.
Other elements in the feed array produce non-planar wave fronts or planar fronts with significant
phase variations. The lenses, on the other hand, are more complex, have three multiple-element
radiating structures, which are the receiving array on one side of the lens, and the radiating array
on the other side of the lens. Microwave bootlace lenses [41-48] form an important class of
multiple beamforming networks; they are circuit analogue of the dielectric lenses, but offer a
number of control parameters that are not available in a solid dielectric lens, including more
degrees of freedom that help in realizing multiple focal points. The degrees of freedom include
the feed element locations and the transmission line lengths between the receiving and radiating
sides of the lens. These allow for choosing a simple planar array surface on the radiating side and
for optimizing the parameters to produce multiple perfect focal points with little phase errors for
points that fall in between the perfect foci [49].
Ruze proposed a metal-plate lens for wide angle scanning in 1950 [41]. His lens design
has two perfect off-axis symmetrical focal points and an on-axis focal point for which the
second-, but not higher-order phase deviation is zero. Rotman and Turner suggested a
modification in the Ruze lens to reduce the higher-order coma aberrations in the straight-front-
16
face lens in 1963 [42]. This lens is named a Rotman lens, which is the most popular among
various microwave lens approaches, and is one of the topics in this dissertation. This new design
provides a lens with three perfect focal points of which one is on the central axis and the other
two are symmetrically located on either side. In the Rotman lens, the bootlace design is adopted
with the electrical path-length across the lens surfaces being not necessarily parallel to the lens
axis. On the other hand, in the Ruze lens, the electrical path-length across the lens surface is
parallel to the lens axis. The path-length difference of beam deflection is set such that the beam
direction remains invariant with frequency [50]. The lens uses a parallel plate configuration with
a TEM propagation mode. The Rotman lens has been further modified and improved by several
people; for example, Smith [43] et al. (1983) developed a theoretical model which predicts the
primary amplitude distribution across the array ports of the lens, this then allows predictions of
insertion loss and sidelobe levels of the fed array; Katagi et al. (1984) suggested an improved
method to design bootlace lens, where the suggested approach reduces the phase error for large
array length [44]; Gagnon (1989) derived a procedure for proper refocusing of a dielectric-filled
Rotman lens with the beam port locations determined according to Snell's law [45]; Hansen
(1991) showed the effects of each parameter and presented a new calculation of lens gain [46];
Singhal et al. (2003) proposed a approach in which the height of the feed and array contour is
equalized, by locating the feed points at specific angles [47]; Lambrecht et al. (2010) developed
an analytical design model for Rotman-lenses, with an accurate treatment of the return loss of the
ports and their phase centers. The detailed design equations allow a very fast prototyping prior to
numerical simulations for the final adjustment [48].
A typical Rotman lens is shown in Figure 1.8.
17
Figure 1.8: Rotman lens.
By selecting different input ports, the steering angle varies. The Rotman lenses are, in
principle, wideband systems since their design is based upon electrical path length. This means
that the directions of the emerging beams from the antenna array will remain fixed as the
frequency changes, but the beamwidth and cross-over points of the multiple beams will change
with frequency [51]. Consequently, it corresponds to true time delay steering of the array. The
operating frequency band may cover one octave.
The main advantage of the Rotman lens is the low number of switching elements needed,
compared to the Butler matrix and switched line concepts. It is also capable of handling high
voltages. Consequently it is attractive for RF-systems needing wide angle scanning and wide
bandwidth [48]. The main disadvantage is the relatively low number of achievable beams and
difficulty of achieving low sidelobes and low losses [52].
18
Circuit type beamformers use transmission lines, connecting power splitters and couplers,
to form multiple beam networks. The phase shifts required to produce beam scanning are
provided by lengths of transmission line. Aperture amplitude distributions are controlled by the
power splitter ratios. Two main classifications exist, namely the Blass and Butler matrix. The
Blass matrix is far more flexible than the Butler matrix, but is usually lossier due to the presence
of line terminations. Despite this flexibility, the Blass matrix has had limited application
compared to the Butler matrix because of its inherent loss [1]. As a result, the conventional
network used to form the beam-switching function is the Butler matrix [53].
The Butler matrix can be treated as a microwave realization of the fast Fourier transform.
It consists of a network of hybrid couplers and fixed phase shifters with N input ports, connected
to the antenna elements, and an equal number of beam outputs. The number of ports is restricted
to powers of two [11]. The schematic of a 4×4 Butler matrix is shown in Figure 1.9. A signal
input at any port produces a linear phase progression from port to port. The phase slope depends
on which input port is used and the output wave steering angle changes accordingly, which is
similar to the Rotman lens. By externally combining two or more of the output ports of
the Butler matrix, the antenna pattern can be moved, broadened, or the sidelobe level can be
improved in certain directions [50].
19
Case
IV
Case
I
Case
II
Case
III
radiation
pattern
Ant 2
Ant 1
5
6
Ant 3
8
7
3dB
Coupler
3dB
Coupler
-45°
-45°
4×4
Bulter
Matrix
3dB
Coupler
1
Ant 4
2
3dB
Coupler
3
Case Case
I
II
4
Case Case
III
IV
Figure 1.9: The schematic of a 4×4 Butler matrix.
The main disadvantage of the Butler matrix is that the beam direction is inherently
frequency dependent, since the phase shifters are essentially narrow band, leading to a narrow
operational bandwidth [11]. Therefore, this is not a TTD technique. Another disadvantage is that
it requires a large number of directional couplers, power dividers, and crossovers. For a linear
array of N elements, the number of couplers is ( N 2 ) log 2 N and the number of phase shifters is
( N 2 ) log ( 2 N − 1) .
Therefore, the overall design would become extremely complicated for a
large number of ports. Moreover, the sidelobes are relatively high because there is no amplitude
tapering and beam shaping is difficult to control.
20
1.6
Introduction to CMOS technology
The CMOS (Complementary Metal Oxide Semiconductor) circuit design (the idea and
basic concepts) was invented in 1963 by Frank Wanlass while at Fairchild Semiconductor; see
US Patent 3,356,858, [54]. The idea that a circuit could be made with discrete complementary
MOS devices, an NMOS (n-channel MOSFET) transistor and a PMOS (p-channel) transistor
was quite novel at the time given the immaturity of MOS technology and the rising popularity of
the bipolar junction transistor (BJT) as a replacement for the vacuum tube [55]. However, it
initiated a revolution in the semiconductor industry.
The cross section of two transistors in a CMOS gate, in an N-well CMOS process is
shown in Figure 1.10 [56].
Figure 1.10: Cross section of two transistors in a CMOS gate, in an N-well CMOS process [56].
While initially CMOS was used exclusively for digital design, the constant push for
lower costs and increase in the functionality of integrated circuits (ICs) has resulted in it being
used for analog-only, analog/digital, and mixed-signal (chips that combine analog circuits with
digital signal processing) designs [55]. Starting from about 1995, CMOS technology has proven
21
its RF, microwave, and millimeter wave capabilities by demonstrations of fully integrated key
circuit blocks from 1 GHz to 100 GHz [57].
Recently, there has been intensive development of high data-rate wireless communication
systems based on low cost monolithic microwave integrated circuits (MMICs). III – V
semiconductors such as GaAs and InP, which have superior performance compared to CMOS,
have been traditionally preferred for MMICs due to their higher electron mobility, higher
breakdown voltage, and the availability of high-Q passives [58]. However, currently more than
95% of integrated circuits are fabricated in CMOS. For the present, and foreseeable future,
CMOS will remain the dominant technology used to fabricate integrated circuits. There are
several reasons for this dominance. CMOS ICs can be laid out in a small area, thereby enabling
more functionality with the same area, and offering the promise of higher level of integration.
The possibility of system on-a-chip realization, where digital, mixed-signal base-band and RF
transceiver blocks would be integrated on a single chip, is attractive. Besides the ability to
integrate RF circuits with other analog and logic circuits with the intention of reducing the cost
by eliminating the sometimes expensive packaging [59]. CMOS ICs can handle very high
operating speeds while dissipating relatively low power. Perhaps the most important aspect of
CMOS's dominance is its manufacturability. CMOS circuits can be fabricated with few defects.
Equally important, the cost to fabricate in CMOS has been kept low by shrinking devices
(scaling) with each new generation of technology. This also, for digital circuits, is significant
because in many cases the same layout can be used from one fabrication size (process
technology node) to the next via simple scaling [55]. Figure 1.11 [60] shows the progress of
CMOS devices’ channel length scaling. The intrinsic speed of MOS transistors has increased
by more than three orders of magnitude in the past 50 years, becoming comparable with that of
22
bipolar devices even though the latter have also been scaled (but not as fast) [61]. CMOS scaling
also enabled the technology to reach for higher gigahertz frequencies, and the higher speeds offer
other opportunities to compensate at the circuit level for intrinsic technology drawbacks [57]. In
addition, CMOS can be reconfigured easily. The same chip can be used over many different
platforms [62].
Figure 1.11: CMOS technology scaling roadmap[60]. Copyright © 2009 - 2012 Toshiba Electronics Europe GmbH.
Recent progress in CMOS technology enables one to integrate a high frequency phased
array system with mix-signal and digital signal processing on a single chip with low cost and
higher reliability. Furthermore, digital tuning and calibration in integrated systems can be used to
improve the performance of critical analog/RF parts [63]. Integrated phased-array systems at
high frequencies promise a future of low-cost radar and gigabit-per-second wireless
communication [64]. Considerable work has been reported on CMOS transceivers and building
blocks, such as power amplifier (PA), low noise amplifier (LNA), mixer, voltage-controlled
oscillator (VCO), and phase lock loop (PLL).
23
Millimeter-wave CMOS ICs present formidable challenges, demanding that designers
pay extra attention to the modeling, design techniques, and layout. The challenges include the
following [65]: limited speed of the transistors and the limited supply voltage encourage the use
of inductors or transmission lines as loads, unfortunately, the large footprint of inductors and Tlines leads to large dimensions for the building blocks and hence long high-frequency
interconnects; the low quality factor of the inductors and varactors due to substrate loss makes
the design more difficult; On-chip antennas fabricated in standard CMOS technology appear to
suffer from a low efficiency; CMOS power amplifiers (PAs) also exhibit a low efficiency, and
thus the overall system efficiency may yield an impractical solution; As the operating frequency
becomes higher, the parasitics play a more and more important role, not only they differ from
different geometries, but also the measurement of MOS devices, especially those with a small
width, becomes difficult at these frequencies due to errors introduced by inaccurate deembedding from calibration structures and coupling between probes; The coupling effect needs
to be simulated accurately at high frequency.
In this dissertation, a Ka-band CMOS wideband amplifier has been designed using
special techniques to overcome the intrinsic limitations of the CMOS process.
1.7
System Overview
The Ph.D. research project in this dissertation has investigated the use of novel CMOS-
based microwave and millimeter wave technologies in developing high performance phased
array antenna based transceiver systems. The goal of this project is to design the individual
components of a 5-channel Ka-band CMOS-based phased array transmitter. A simplified
schematic of the phased array transmitter is shown below in Figure 1.12.
24
Figure 1.12: Schematic of the Ka-band PAA transmitter.
The printed beam forming network, which has been implemented by the Rotman lens
technique, followed by an array of wideband antennas have been realized on regular printed
circuit board (PCB). A wideband amplifier which would be adopted in each channel has been
realized in a CMOS process. A CMOS channel selector single pole double throw (SPDT) switch,
which will switch between the signal source and 50 Ohm termination, will be designed by
another subsequent student. Eventually, the SPDT and Amplifier will be fabricated on the same
die, and the circuits on CMOS and PCB will be integrated together using the flip chip technique.
1.8
Dissertation Organization
This dissertation presents the individual component design, fabrication, and
characterization of a Ka-band CMOS and PCB integrated TTD phased array transmitter system.
It is a proof-of-principle design of a future wideband transmitter system which will be applied on
the Microwave Imaging Reflectometry (MIR) system on DIII-D with operating frequency from
50 to 75 GHz. The dissertation consists of seven chapters.
25
Chapter II presents the introduction to plasma fusion research, plasma diagnostics, the
MIR system, and DIII-D.
Chapter III describes the design procedures, techniques, fabrication, and measurement
data of a Ka-band wideband feedback amplifier using the 0.18 µm CMOS process. The parasitic
cancellation and stagger-tuning techniques are discussed.
Chapter IV discusses a Ka-band PCB phased array antenna with Rotman lens and Vivaldi
antenna array. The detailed design procedures, simulation results, fabrication, and measurement
data are included.
Chapter V summarizes the research accomplishments in this dissertation, and presents
conclusions and recommendations for further research.
26
Chapter 2
2.1
Introduction of Plasma Microwave Imaging Reflectometry System
Introduction of Fusion
Fusion is the process that powers the sun and the stars. It is the reaction in which two or
more light atomic nuclei collide at very high speed to form a heavier atomic nucleus, releasing a
tremendous amounts of energy in the process [66]. The easiest fusion reaction is shown in Figure
2.1, where two hydrogen nuclei deuterium (D) and tritium (T) are combined to make helium and
a neutron, and release energy. The D-T fusion reaction produces the highest energy gain at the
lowest temperatures [66]. One pound of deuterium and 1.5 pounds tritium could produce as
much energy as that 9000 tons of coal produces, but without 30000 tons of carbon dioxide the
coal would produce, indicating that fusion is very efficient yet environmentally friendly. While
fusion is a nuclear process, the products of the fusion reaction are not radioactive, and with
proper design a fusion power plant would be passively safe, and would produce no long-lived
radioactive waste [66].
Figure 2.1: The easiest fusion reaction.
27
To make fusion happen, the atoms of hydrogen must be heated to very high temperatures
up to 100 million of degrees, so they are ionized to form a plasma and have sufficient energy to
fuse, and then be confined long enough for fusion to occur. In the stars of our universe,
gravitational forces have created such necessary conditions for fusion. However, the practical
approaches on earth to achieve fusion are magnetic confinement and inertial confinement.
Magnetic confinement uses a strong magnetic field to hold the ionized atoms together while they
are heated by microwaves or other energy sources; inertial confinement uses intense energy
beam, such as a laser, to compress and heat the frozen hydrogen. A Tokamak is such a device
that uses magnetic field and electron current to confine and control the hot plasma.
Turbulence happens everywhere, we can tell it from the ripple in the water, the smoke
rising from a cigarette and the tip vortex from an airplane wing, etc. Turbulence also happens in
plasma causing particles and energy to escape the confining magnetic fields. The understanding
of turbulent transport phenomena observed in tokamaks is one of the most fundamental issues in
magnetic fusion research. Better understanding of the turbulence leads to better design of the
tokamak with better confinement. However, plasma turbulence is very challenging from a
theoretical point of view due to the nonlinearity and high dimensionality of the governing
equations [67]. In addition, experimental measurements of the fluctuations in the core region of
the tokamak are very difficult due to the extremely high temperature, which eliminates the
possibility of internal diagnosis by material probes [67, 68]. Therefore various plasma diagnostic
techniques have been developed.
2.2
Introduction of Microwave Imaging Reflectometry (MIR)
Microwave relectometry is one of the plasma diagnostic techniques which is a radar
technique used to infer electron density and electron density fluctuations by the reflection of the
28
probing microwave beam from the density-dependent cutoff layer where the wave frequency is
equal to the plasma oscillation frequency and the wave vector k is zero [69]. Since its first use
for the investigation of low frequency microturbulence in tokamak plasmas, microwave
reflectometry has become widely used for density profile and fluctuation measurements, due to
its relatively simple implementation and its high sensitivity to small perturbations of electron
density [70].
The plasma reflectometry can be simply modeled by a tapered rectangular waveguide as
shown in Figure 2.2, where the cutoff frequency of the waveguide is dependent on the aperture
dimensions, and is changing along the prorating direction.
Figure 2.2: The analogy of a plasma and a tapered rectangular waveguide.
The electromagnetic waves with wave vector perpendicular to the magnetic field B0 can
be classified as ordinary wave (O-mode) and extraordinary wave (X-mode). The oscillating
electric field E1 is parallel to the magnetic field B0 in O-mode, whereas the electric field E1 is
perpendicular to the magnetic field in X-mode [71].
The dispersion relations for O-mode and X-mode are shown in Equation (2.1) and (2.2),
respectively.
2
ω=
ω p2 + c 2 k 2
29
(2.1)
ω 2 − ω p2
=
ω ω 2
+ c2k 2
ω − ωh2
2
2
p
(2.2)
ne (r )e 2
where ω p =
is the plasma frequency [71], in which ne (r ) is the equilibrium plasma
e 0 me
electron density which is a function of the radial location r ; =
ωh
frequency, in which ωc =
ω p2 + ωc2 is the upper hybrid
eB
is the electron cyclotron frequency.
me
The plasma cutoff frequencies for O-mode and X-mode can be obtained by setting the
propagation constant k to zero in Equation (2.1) and (2.2), and are given by Equation (2.3) to
(2.5)
n0 (r ) ⋅ e 2
(O-mode)
e 0 ⋅ me
ωO ω=
=
p (r )
(2.3)
(
) (Right-hand cutoff in X-mode)
(2.4)
(
) (Left-hand cutoff in X-mode)
(2.5)
ωR =
1
ωc + ωc 2 + 4ω p 2
2
ωL =
1
−ωc + ωc 2 + 4ω p 2
2
The dispersion relations of O-mode and X-mode are shown in Figure 2.3, with the above
critical frequencies marked.
30
Figure 2.3: The dispersion relations of O-mode and X-mode.
Plasmas are dispersive media whose refractive index is a function of plasma density and
sometimes magnetic field, as shown in Figure 2.4.
Figure 2.4: Principle of plasma reflectometry.
31
In reflectometry, an electromagnetic wave is probed into a plasma by a transmitting
antenna. While propagating through plasma, the wave is reflected from a cutoff surface where
the EM wave frequency is equal to the plasma cutoff frequency [71]. The reflected wave is
received by a receiving antenna at the plasma edge with a phase difference which contains the
additional phase shifts introduced by plasma due to varying index of refraction as the beam
travels through the dispersive medium as well as from fluctuations on the cutoff surface. It is
possible to measure the time taken by the wave to travel to and back from the cutoff layer and
thus Φ =ωt . On the other hand, the phase difference is given by Φ =2k0 ∫
rc
0
e dr , where k0 is
the free-space wave number of the probing wave, e is the plasma permittivity, and rc is the
position of the cutoff surface. Therefore, the measurement of Φ determines the radial location
of rc . Since ne (r ) is the equilibrium plasma electron density which is a function of the radial
location r as well, the density can be determined. By measuring the phase difference between
the reference signal and the reflected signal, the density fluctuation can be obtained. By
sweeping the frequency of the probing wave and recording the phase history from the beginning
of the plasma discharge, the electron density profile can be determined [72].
In the presence of density fluctuations, the reflected electromagnetic wave spectrum is
broadened with a strong weighting by those fluctuations in the vicinity of the cutoff layer [14]. In
the simplest case of small amplitude fluctuations and a 1-D plane stratified plasma permittivity,
=
e e 0 (r ) + e (r ) , with e (r ) << 1 , the fluctuating component of the measured phase is given by
the 1-dimensional geometric optics approximation [15], as defined in Equation (2.6).
φ = k0
∫
rc
0
ε (r )
dr
ε 0 (r )
32
(2.6)
and the power spectrum of the reflected phase fluctuations is related to that of the density
fluctuations [15].
) π Mk02 Ln Γ n (kr ) kr
Γφ ( k r =
(2.7)
In the above, Ln = n /(dn / dr ) r = rc is the density scale length, M ≡ (n∂E / ∂n) r = rc , and it was
assumed that kr < k0 /(k0 Le )1/ 3 where Le = (d e 0 / dr ) r−=1 rc .
It is important to point out that the fluctuating phase of the reflected wave is dominated
by the change in permittivity close to the cutoff layer, due to the factor 1
e 0 (r ) in the integral,
which becomes very large near the cutoff (as the group velocity approaches zero). The
measurement of fluctuating phase therefore represents a localized measurement of fluctuations
near the cutoff layer, rather than a combined measurement of modulations along the entire ray
trajectory. Indeed, this is one of the most valuable features of reflectometry as a fluctuation
diagnostic [14].
Despite widespread and long-standing use of the plasma reflectometry, however, the
interpretation of reflectometry data from fluctuations remains an outstanding issue. It is
straightforward for 1-D turbulence, as shown in the left of the Figure 2.5, where the plasma
permittivity is stratified. The reflection layer will move back and forth in the radial direction,
resulting in only phase changes in the reflected wave; the power spectrum of density fluctuation
can be thus obtained from the power spectrum of signal phase and it is a function of r in radial
direction only. On the other hand, in the presence of 2-D turbulent fluctuations as shown in the
right of the Figure 2.5, the interpretation of reflectometry becomes considerably more complex.
But this is precisely the case of interest for tokamak plasma, which exhibit both radial and
poloidal fluctuations. The spectral components of the reflected field propagate in different
33
directions, which results in complicated interference pattern containing both amplitude and phase
information rather than the simply phase fluctuations on the detector plane, from which it is
difficult to extract any information about the plasma fluctuation [15, 70].
Figure 2.5: Comparison of 1-D (left) and 2-D (right) reflectometry
Conventional reflectometers only perform well at diagnosing turbulence or density
perturbations when fluctuations are very small, have long correlation lengths, and are localized
in the near field of the receiving antenna. Imaging techniques (so called Microwave Imaging
Reflectometry or MIR) are applied to overcome these limitations, improving the integrity of
reflectometric measurements, and enabling entirely new diagnostic techniques.. It is a technique
in which large aperture optics at plasma edge are used to collect as much of the scattered
wavefront as possible and optically focus an image of the cutoff on an array of detectors, thus
restoring the integrity of the phase measurement [70]. The concept is illustrated in Figure 2.6.
In MIR, a broad area of the plasma cutoff layer is illuminated by a millimeter-wave
source as illustrated in Figure 2.7. The imaging optics transform the output of the illuminating
source into an extended beam whose curved wavefront is designed to roughly match the
34
poloidal/toroidal shape of the plasma cutoff surface. This beam is projected onto the cutoff layer
with a constant phase front. The reflected beam passes back through the same imaging optics as
the illuminating beam, and is imaged onto the detector array. A beam splitter separates the
transmitted beam path from the detection path and final detector optics [70].
Figure 2.6: Imaging technology which restore the phase front of the cutoff layer for 2-D fluctuations
Figure 2.7: Schematic of the MIR diagnostic.
35
2.3
MIR on DIII-D
DIII-D is a medium sized non-circular cross-section tokamak device developed in the
1980s by General Atomics in San Diego. It has major radius of 1.7 m, minor radius of 0.67 m.
The typical plasma chamber elongation is 1.3. The plasma current is up to 3 MA and the toroidal
magnetic field is up to 2.1 T on axis.
While it has been recognized as being one of the best-diagnosed magnetic fusion
experiments, additional new diagnostics and/or upgrades are being implemented [73, 74].
Research and development of the first generation MIR system on DIII-D is currently underway.
The cutoff layers of two typical DIII-D plasmas in low-confinement mode (or L-mode) and highconfinement mode (or H-mode) are shown in Figure 2.8 [75].
Figure 2.8: Cutoff layers in DIII-D plasma [75].
The pink area is the frequency range chosen for the MIR system on DIII-D to measure
density fluctuations, corresponding to 56 to 74 GHz. The probing wave will reflect from the right
36
hand X-mode cutoff in order to get the maximum plasma coverage at the highest frequencies,
yielding a shorter wavelength and enhanced plasma resolution. Therefore, the MIR system will
be broadband and tunable with frequency coverage spanning 56 to 74 GHz for diagnosis of both
the pedestal and core of DIII-D plasmas.
It will share the same 270 degree midplane port with 60 cm window height as the existing
electron cyclotron emission imaging (ECEI) system as shown in Figure 2.9. The goal is to realize
both temperature and density fluctuation measurements of the same plasma volume eventually.
Figure 2.9: Schematic of a combined ECEI/MIR system.
MIR uses quasi-optical techniques to image the plasma cutoff layer at the receiver array,
thus restoring the integrity of the phase measurement [76-78]. This technique produces a 2-D
cross-section of the tokamak plasma with a linear 1-D receiver array. The capabilities of 2-D
MIR provide multiple advantages over existing fluctuation diagnostics. First, its localized
measurements provide the unambiguous spatial location of the measured fluctuations, unlike data
from line-integrated diagnostics. Second, the capability to sample a 2-D cross-section of the
37
plasma enables the yielding of radial and poloidal correlation lengths. Moreover, the
programmable and fast tuning the frequencies of the probing beam allows the variation of the
radial coverage of MIR according to the experimental needs. Both static frequency range and
frequency scan can be achieved. This ability to frequency-scan is an invaluable tool for
surveying the plasma cross-section, tracking modes as they evolve spatially in the plasma over
the course of the discharge.
The UC Davis Microwave/Millimeter Wave Technology and Plasma Diagnostics
research group has invested heavily in the development of the phased array antennas (PAAs),
which allow for electronic control of the radiation pattern [79, 80]. By properly assigning the
amplitude and phase to each channel, beam steering or beam shaping can be achieved. Beam
steering moves the sampling volume along the cutoff surface to increase the diagnostic area as
demonstrated in Figure 2.10; while beam shaping moves the array’s phase center, changing its
aiming and focusing properties to match the cutoff layer curvature.
Figure 2.10: Schematic illustration of the principles MIR with beam steering transmitter.
38
By illuminating beams with different frequencies, the density profile on different cutoff
surface layers can be obtained. A true time delay (TDD) wideband PAA remains functional
while sweeping the frequency and can eliminate the need to control the configurable devices,
which can effectively reduce the cost and complexity. This feature is extremely useful when the
channel number is large. In this dissertation, wideband beam steering will be emphasized.
We believe that the next great step forward in mm-wave plasma diagnostics is the
adoption and advancement of complementary metal-oxide semiconductor (CMOS) technology.
CMOS process with its low power, small size, low cost, high integration and unparalleled signal
processing capabilities enables ubiquitous accessibility and embedded functionality for MIR and
ECEI with powerful system calibration and configuration capabilities. With this in mind, a
research mode has been proposed, that is mutually beneficial to plasma diagnostics and the
broader field of mm-wave technology, making use of the latest advancements in CMOS
technology and taking advantage of the system wide improvements that they enable.
This dissertation presents an approach to achieve wideband PAA system, with a mix of
the advanced CMOS development and the regular PCB realization. This novel concept consists
of an integrated Rotman lens, antenna array, and wideband feedback amplifier network [81].
CMOS millimeter-wave preamplifiers will be placed before each mixer for increased sensitivity.
Without previous CMOS design experience, it would be a big risk to design the CMOS circuit at
V-band (50 -75 GHz) directly. Moreover, the V-band circuit usually requires at least 0.13 µ m or
more advanced CMOS technology with less minimum gate length according to the state of art
papers; The cost is much higher than the 0.18 µ m CMOS process, which could be used in Kaband (26.5 - 40 GHz) design. This system will be demonstrated first in Ka-band as a proof-of-
39
principle design, then V-band for the actual use with MIR, and later in W-band (75-110 GHz) for
the use in ECEI.
40
Chapter 3
3.1
Ka-Band Wideband CMOS Amplifier
Introduction
Recently, there has been intensive development of high data-rate wireless communication
systems based on low cost microwave integrated circuits (MMICs). Considerable attention has
been paid to wideband technology because of its high data-rate transmission capability, and
ability to work under low SNR [82].
Meanwhile, the wider bandwidth and higher speed
motivates integrated circuits to move toward higher millimeter wave frequencies. In this
dissertation, Ka band has been selected as the operating frequency for the entire transmitter
system, because of the numerous applications at Ka-band, including satellite broadband
communications, short-range car radar systems and wireless broadband networks. Therefore,
there is a high demand to implement low cost wideband building blocks at this frequency band.
Moreover, this Ka-band design is intended to serve as a proof of principle demonstration for the
techniques that would be applied in the future design at V band and W band for not only plasma
diagnostics but also commercial applications.
A typical block diagram of a simple RF transmitter is shown in Figure 3.1, while Figure
3.2 shows a typical block diagram of a simple transceiver. From both figures, one can tell that
RF power amplifier (PA) is a key component in both transmitter and transceiver and is
considered as the design bottleneck in the transmitting chain. That is why the power amplifier
often receives more attention than other circuit blocks in a transmitter.
Recent publications have demonstrated that power amplifiers using 0.18 µm or more
advanced CMOS technology could achieve reasonable performance at frequencies above 20
GHz [83-92].
41
Figure 3.1: Block diagram of a simple radio telegraph transmitter.
Figure 3.2: Block diagram of a simple transceiver.
There are several important aspects to the performance of an amplifier, including gain,
speed, power dissipation, supply voltage, linearity, noise or maximum voltage swings.
42
Furthermore, the input and output matching determine how the circuit interacts with preceding
and subsequent stages. In practice, most of these parameters trade with each other, making the
design a multi-dimensional optimization problem, as illustrated in the “analog design octagon” in
Figure 3.3 [61]. Such trade-offs present many challenges in the design of high-performance
amplifiers [61].
Figure 3.3: Analog design octagon [61].
The following list constitutes a set of key parameters that were emphasized for this
specific dissertation project.
•
Gain and gain flatness
•
Operating frequency and bandwidth (the entire Ka band)
•
Output power
•
Power dissipation
•
Input and output reflection coefficients (VSWR)
•
Linearity (1dB compression point)
•
Noise figure
A balance should be achieved between the bandwidth, gain and output power.
43
3.1.1 High-Frequency MOSFET Modeling
To have an efficient design environment, design tools with accurate devices models are
essential to correctly predict the circuit performance. The Berkeley Short-channel IGFET Models
(BSIMS) [93], which were originally developed for digital and low-frequency analog circuit
design, are the industry standard compact models for modern CMOS devices. They include
many equations and parameters to model the complications in a real NMOS or PMOS device. A
practical model card has 40-100 parameters, which require advanced software and extraction
expertise to extract.
Since BSIM3v3 was selected to start the industry standardization of
MOSFET compact models in 1995, it has been widely used for digital and analog circuit design
[94], and was considered accurate and reliable at low frequencies.
However, as the operating frequency increases into the gigahertz range, the importance of
the extrinsic components rivals that of the intrinsic counterparts. Therefore, an RF model with
the consideration of the HF behavior of both intrinsic and extrinsic components in MOSFETs is
extremely important for achieving accurate and predictive results in the simulation of a designed
circuit [59]. Figure 3.4 [95] shows a MOSFET schematic cross-section with the parasitic
components which could make a significant impact on the device performance at higher
frequency. Under this circumstance, EM simulation is required to predict the high frequency
response of the model.
44
Figure 3.4: A MOSFET schematic cross-section with the parasitic components. Copyright © 2000, IEEE. [95]
3.1.2 Fundamental MOSFET Limitations
There are two important figures of merit for MOSFET transistors working at radio
frequencies. One is the unity current gain cut-off frequency (or transit frequency) ft , at which
the current gain is extrapolated to fall to unity. The other one is the unity power gain frequency
f max , where the maximum power gain is extrapolated to fall to unity.
The most common expression for ft assumes that the drain is terminated in an
incremental short circuit while the gate is driven by an ideal current source. As a consequence of
the shorted termination, ft does not include information about the drain-bulk capacitance, C jdb .
The current-source drive implies that the series gate resistance rg similarly has no influence on
ft . In reality, both C jdb and rg can have a strong effect on high-frequency performance.
Furthermore, the gate-to-drain capacitance Cgd only contributes to the input impedance; its
45
feedforward contribution to the output current is ignored [96]. With these assumptions, the unity
current gain cut-off frequency can be expressed as
ft =
gm
2π ( Cgs + Cgd )
(3.1)
This expression actually has no fundamental importance especially for high frequency
applications. The more relevant one is f max , which takes the extrinsic parasitics into account. To
compute f max is very difficult; however, several simplifying assumptions could make an
approximate derivation. The maximum power gain is achieved when the device is complex
conjugate matched at both the input and the output. Equation (3.2) gives the approximation of
the unity power gain.
f max ≈
ft
1
2 2π rg Cgd
(3.2)
The output capacitance has no effect on f max , because it can be tuned out with a pure inductance
and therefore does not limit the amount of power that may be delivered to a load [96].
As a rule of thumb in RFIC circuit design, the f max value is usually at least 4 or 5 times
as high as the amplifier operating frequency, in order to achieve high gain. According to the
literature, most researchers have designed K-band RF front-end circuits by means of 0.18 µm
CMOS technology, accordingly, Ka-band using 0.13 µm and 60 GHz using 90 nm CMOS
technology. Although, 0.13 µm CMOS technology demonstrates superior 91 and 108 GHz ft
and f max [11] for K or lower Ka-band circuit design, the process cost remains quite high [97]. On
the other hand, f max of 0.18 µm CMOS is only 65 GHz, which seems a severe limitation for Kaband usage if judged by the “4 or 5 times” rule of thumb.
46
3.1.3 Frequency Controlled Feedback with Parasitic Cancellation Technique
As stated in Chapter 1, Millimeter-wave CMOS ICs present formidable challenges,
demanding that designers pay extra attention to the modeling, design techniques, and layout.
Therefore, a few designers have used special techniques to break the limitation and extend the
amplifier working frequency.
By careful examination of Equation (3.2), f max is related to ft , rg and Cgd , while ft
’
depends on Cgs and Cgd according to Equation (3.1); therefore, one can tell that the main limiting
factors of f max are rg , Cgd , and Cgs . Assuming that the values of rg , Cgd ,and Cgs are extremely
small, then f max could be very large so that the amplifier design would have considerable margin.
rg could be reduced by proper layout. For example, by connecting both ends of the gate
or folding the device, the value of rg is reduced by a factor of 4.
For the parasitic capacitances, it is less efficient to reduce the value by using a different
layout. An intuitive move is to use inductances to resonate out the capacitances at a certain
frequency, which effectively makes the capacitances extremely small and the effective f max thus
becomes very large. This method has been reported to be effective in a 0.18 µm CMOS balanced
amplifier for 24-GHz applications [98] and then an improved 45-GHz balanced amplifier with
21.5-dB gain using 0.18 µm CMOS technology [99]. The π-type parallel resonance technique
used in these two references, cancels out the inherent capacitances, and thus significantly
improves the higher frequency gain. This was a tremendous inspiration and a similar and
modified technique called frequency controlled feedback with parasitic cancellation has been
used in this dissertation. More details will be provided in the later sections that this method could
effectively change the capacitances and control the peaks of the frequency response.
47
3.1.4 Wideband Techniques
Power amplifiers are often narrow band. Designers carefully select the operation point,
device size, DC bias, optimum load by load-pull simulation, and matching networks to push the
CMOS transistor to work in its limitation in terms of output power handling. However, in this
particular wideband transmitter system, each component inside, including the power amplifier,
must be wideband. The power amplifier design based on a broadband concept provides some
advantages when there is no need to tune resonant circuits, and it is possible to realize fast
frequency agility or to transmit a wide multimode signal spectrum. However, there are many
factors that restrict the frequency bandwidth depending on the active device parameters [100],
for example, as discussed in previous section, the inherent capacitances limit high frequency
performance, causing the gain rolloff in S 21 , and hence limit the bandwidth.
Common broadband amplifier design approaches include the use of compensated
matching networks, resistive matching networks, negative feedback, balanced amplifiers, and
distributed amplifiers. However, they all have drawbacks; compensated matching networks
compensate for the gain rolloff in S 21 at the expense of the input and output match; resistive
matching networks provide good input and output matching with a corresponding loss in gain
and increase in noise figure; negative feedback flattens the gain response, but sacrifices the gain
and noise figure; balanced amplifiers provide good wideband matching, but consume twice the
chip area and DC power; and distributed amplifiers require a large area and generate less gain
than does a cascade amplifier with the same number of stages. In all, the improvements in
bandwidth in the above methods are achieved at the expense of gain, matching, noise figure, area,
and complexity or similar factors.
48
A simple gain response superposition concept, employing two narrow band gain
responses with different peaks superposed, is instead adopted in this dissertation to obtain a
reasonable gain with compact size.
3.2
Feedback Amplifier Design Procedures
The brief design flow for this wideband feedback amplifier is shown in Figure 3.5. It’s a
long and iterative process requiring much effort. The details for each step are discussed in the
following sections.
Figure 3.5: Wideband feedback amplifier design flowchart
3.2.1 System Specifications
49
The purpose of this amplifier is to serve as a driver amplifier, covering the whole Kaband, instead of a narrow band power amplifier. The techniques that would be used in this
dissertation are pushing the amplifier towards its limit at high frequency, and maintaining a
reasonable high, flat gain. As mentioned at the beginning of this chapter, most of the key
parameters of an amplifier, for example: bandwidth, gain, and output power, trade off with each
other; a balance should be achieved. In this dissertation, gain and bandwidth are the priorities,
thus output power, linearity and DC consumption, etc. have been sacrificed. In addition, the
output power should not be too high for a driver amplifier, in order not to saturate the following
stages too early. The initial specifications are listed in Table 3.1.
Table 3.1: Wideband Amplifier Specifications.
Frequency
26.5 ~ 40 GHz
Gain
18 dB
Gain Flatness
±3 dB
Saturated Output Power
> 10 dB
S11
< −6 dB
S22
< −6 dB
Power Consumption
< 100 mW
Supply Voltage
< 1.2 V
Efficiency
> 10%
50
3.2.2 Architecture, Sizing and Biasing
A 4-stage common source architecture has been chosen for this amplifier. A cascode
configuration provides potentially higher gain, and better isolation between input and output so
that the device is more unilateral and hence unconditionally stable [83]; therefore, it is widely
used in power amplifiers. However, the cascode configuration requires a high voltage swing to
produce high power at the expense of degraded amplifier efficiency due to the excess drainsource voltage swing in the common-gate transistor, and there is a possibility for high-frequency
instability due to parasitic inductance at the gate terminal of common-gate transistor [84]. In
addition, power is not the top priority; thus, it is not necessary to follow the conventional design
procedures. Furthermore, it is difficult to determine the exact parasitic capacitances to cancel and
the placement of the parallel resonant inductance imposes another difficulty. Consequently, the
common-source configuration has been adopted in this dissertation.
The sizing selection in this dissertation was unconventional, because the high power or
low noise was not the highest priority but rather the gain and bandwidth. There is a standard way
to select transistor size for high-power or low-noise applications. The selection of power
transistor size depends on the required power levels and the bandwidth. About 2-3 dB margin of
gain loss for narrow band application and 3-4 dB for wideband application should be obtained
from the device Pout and amplifier Pout to include the dissipative loss and mismatch loss and to
function under safe operating conditions. Recommended bias conditions for transistors are
generally provided by vendors. In a multistage amplifier, the proper ratio of output to input stage
transistor sizes (device aspect ratio) plays an important role in realizing high PAE and high
linearity [101]. For this specific amplifier, too small a size transistor would generate very small
parasitic capacitances, leading to very large parasitic cancelling inductors, which occupy large
51
area and are hard to layout properly. Moreover, large inductors would generate their own
parasitics which would degrade or detune the overall performance. On the other hand, large
transistors could handle higher power, but would consume more DC power and generate various
large parasitics, which are not purely capacitive, and difficult to quantify and cancel. Therefore,
it is important to choose the right transistor size. To search for a starting point, references [98,
99], where the parasitic cancellation technique drew inspiration from, were the first ones to
check. The frequency range (24 GHz and 45 GHz) in references [98, 99] is close to Ka band. The
process is TSMC 0.18 µm one poly layer and six metal layers (1P6M) standard CMOS
technology. TSMC 0.18 µm mixed-signal/RF 1P6M CMOS technology has been chosen for this
design. The major difference between the standard and RF process is the thickness of the top
metal layer; the RF process utilizes a thicker top layer to reduce loss and improve power
handling, but it would not affect the intrinsic performance of the MOSFET. Therefore, this
design employed similar conditions as in references [98, 99], the same gate width of 64 µm and
the same DC bias voltage of 1 V served as a starting point for this design. A multi-finger
structure was employed to minimize the parasitic resistance.
A single transistor has been fully investigated initially. A series of simulations have been
run to determine the transistor size and DC operation point. The Advanced Design System (ADS)
was mainly used. The ADS design kits for TSMC 0.18 µm mixed-signal/RF 1P6M CMOS
technology have been provided. Figure 3.6 shows the single transistor DC and bias point
simulation in ADS. Here, VGS and VDS were swept. It generated the IV curves in Figure 3.7, and
the Gm plot in Figure 3.8. Since a feedback inductor would be placed between gate and drain, it
means VGS = VDS . From the load line in Figure 3.7, this amplifier would work in class AB, but
very close to class A, which is quite common for power amplifiers. The linearity and efficiency
52
for class AB are in between class A and class B. Figure 3.8 shows that Gm begins to saturate
after 1.2 V; hence, an increase in the DC bias would not significantly improve the amplifier gain,
but the DC consumption would increase considerably. Therefore, in current design, 1.2 V supply
voltage was employed instead of 1 V. At this point, sizing and biasing seem fine to move on.
Considering that the later stages would take in higher power than the former stages, the size of
the transistors for the later stages could be larger to increase the overall linearity. Therefore, a
finger number of 45 would be used for the later stages.
The regular small signal simulation which is usually done after the large signal
simulation for power amplifier could not provide anything valuable for this design, because the
maximum available gain which could be produced by a single transistor is uncertain until a full
analysis of the frequency controlled feedback of parasitic cancellation is performed. The number
of stages needs to be decided afterwards as well.
Figure 3.6: Single transistor DC and bias point simulation in ADS.
53
Figure 3.7: IV curves and load line.
Figure 3.8. Gm versus VDS
54
3.2.3 Frequency Controlled Feedback with Parasitic Cancellation Analysis
In this design, a major challenge is to obtain a flat, high gain profile from 26.5 GHz to 40
GHz using the TSMC 0.18 μm CMOS process, whose f max is only 65 GHz. Consequently, a
frequency controlled feedback layout employing a parasitic cancellation approach is used here to
overcome this f max limitation so as to boost the high-frequency response.
Looking back at the simplified small signal model of a single MOSFET, as shown in
Figure 3.9, there are three major inherent capacitances Cgs , Cgd , and Cds . As stated in Section
3.1.2., the main limiting factors of f max are rg and the capacitances. Therefore, for a MOSFET,
the RF performance is ultimately limited by these inherent capacitances of the transistor. A
simple yet effective solution is to arrange inductors in parallel with the intrinsic capacitances; the
parallel resonated networks become an open circuit at the desired operation frequency [98].
Figure 3.9: Simplified small signal model of a single MOSFET.
The schematic of the single stage feedback amplifier is shown in Figure 3.10 [102].
Among the four added inductors, Lgd is inserted between the gate and drain, and Ld is added
between the drain and the output. These two inductors form a feedback network and have
55
different functions. Specifically, Lgd is chosen to cancel out the intrinsic Cgd at the band center,
while Lgd is chosen to compensate the capacitive component of the output impedance and
improve the output VSWR at the upper band edge [102]. When Ld = 0 , this feedback is
reduced to the π-type Parallel Resonance (PPR) case proposed in reference [98]. The other two
inductances, Lgs and Lds , are added to compensate Cgs and Cds . After extracting the parasitic
capacitances Cgs , Cgd and Cds , Lgs , Lgd , and Lds may be obtained accordingly using the simple
LC resonance equation (3.3):
L=
1
ω 2C
(3.3)
For cascaded stages, Lds of the current stage and the Lgs of the next stage are in parallel, and can
be combined to provide Ldd .
Figure 3.10: Schematic of the single stage feedback amplifier.
The most accurate way to obtain the parasitic capacitances is to measure the actual
transistor, because the foundry provided model may not be accurate at millimeter-wave
56
frequencies. The higher frequency portion of the device model is the interpolated data based on
measurements performed at relatively lower frequencies. Therefore, the model might only be
accurate up to 20 GHz or so. In addition, the device model uses a certain layout, which is not
necessarily the same as the actual layout, so the parasitics would not be the same. However,
limited budget and time made taping out the transistor only prior to the amplifier chip impossible.
Hence, the foundry models would be used initially to extract the parasitic capacitances. Heavy
EM simulation would be performed to compensate the model inaccuracy at higher frequency.
It is too complicated to hand calculate the parasitic capacitances of a single transistor by
pulling out some equations and parameters from the HSPICE file or Spectre model, since Cgs ,
Cgd and Cds are composed by a lot of elements. Therefore, another simpler way is used
employing the Cadence Spectre simulator. DC simulation is performed and the parameters were
calculated automatically and displayed directly. Figure 3.11 shows the Spectre Simulation
schematic.
Figure 3.11: Cadence DC simulation.
57
The Analog Design Environment Tool is used to perform the DC simulation. The DC
operating point results for both finger numbers of 32 and 45 are shown side by side in Figure
3.12. The calculated parasitic capacitances and transconductance are highlighted. As mentioned
before, a gain response superposition concept, which is two narrow band gain responses with
different peaks superposed, is adopted in this design. Therefore, the frequencies used to calculate
the inductances for both finger numbers are different In order to cover the entire Ka band,
assuming the peaks are close to the band edges. The left half shows the result when the gate
length l = 0.18µ m , gate width w = 2 µ m , and finger number n = 32 . The calculated
capacitances values are: Cgs = 65.8 fF , Cgd = 21.1 fF , and Cds = 19.5 fF . Assuming a peak
would be created at 37.5 GHz after adding the inductors, the corresponding feedback inductance
is Lgd = 854.1 pH , and the other two inductances are Lgs = 195.6 pH , and Lds = 924.3 pH . For
cascaded stages,
161.4 pH . Similarly, for a finger number of 45,
Ldd L=
=
gs / / Lds
Cgs = 129.5 fF , Cgd = 29.7 fF , and Cds = 27.4 fF . Assuming this time it would create a lower
frequency peak at 27 GHz, the corresponding inductances are Lgd = 1171.4 pH , Lgs = 268.4 pH ,
Lds = 1270.1 pH , and Ldd = 221.6 pH . Note that Cgd is usually much smaller compared to Cgs ,
which makes it more sensitive to the inductive cancellation. These values were just a starting
point for the simulation, and need to be adjusted throughout the process.
One more thing to mention about Figure 3.12 is that the transconductance value
Gm = 32 mA / V matches that in Figure 3.8. It proves that the transistor ADS model is consistent
with the Spectre model.
58
Figure 3.12: Partial DC Operating Points Results for finger numbers of 32 and 45.
59
Using the extracted parasitic capacitances of the transistor, the frequency controlled
feedback with parasitic cancellation has been applied accordingly. To illustrate the merits of the
feedback network, the comparison of the gain of a single stage amplifier with and without PPR
feedback is shown in Figure 3.13. At 37.5 GHz, the gain can be significantly improved from 1
dB to 5.5 dB for a single transistor with width of 2 µ m × 32 =
64 µ m .
Figure 3.13: Comparison of the gain of a single stage amplifier with and without Parasitic Cancellation feedback.
From the simulation, at least 4 stages are needed to produce a gain of 20 dB or above,
ideally.
As stated before, Ld is chosen to compensate the capacitive component of the output
impedance and improve the output VSWR at the upper band edge [102]. To verify the effect of
Ld , the illustrative simulation result is shown here in Figure 3.14. This shows the comparison of
the maximum available gain (MAG) of stages 3&4 with and without Ld . With the presence of
60
Ld , the MAG of the latter two stages is improved by 5 dB, and the gain roll-off is decreased with
frequency by 1.5 dB. In a word, the parasitic limited high-frequency response of the MOSFET
can be significantly improved.
Figure 3.14: Comparison of the MAG of stages 3&4 with and without Ld.
Since Cgd is usually very small, the required Lgd value is large. Consequently, there was
concern about the series resistance generated by the required large on-chip spiral inductor, since
it could severely degrade the gain. In reference [98], a capacitor Cm was intentionally added in
parallel with Cgd to reduce the required Lgd . In the current case, some small resistance R f was
intentionally added in series with Lgd in the initial schematic simulation, as shown in Figure 3.10,
to include the parasitic effect of large Lgd which will be present in the layout. For layout
consistency, Lgd would be drawn in such a way that it has the exact parasitic resistance as the
61
series resistance used in the simulation, thereby eliminating the need for an additional resistor in
the actual layout.
Back to the feedback point of view, Lgd is positive feedback, which effectively boosts the
gain and also determines the resonant frequency; however, the amplifier tends to be unstable. On
the other hand, R f is negative feedback, helping to improve stability and bandwidth, albeit with
some sacrifice in gain. Consequently, one faces the usual tradeoff between stability and gain.
3.2.4 Gain Response Superposition
The feedback technique is only the first step, generating enough gain at certain
frequencies. It is a narrow band response; consequently, another technique needs to be employed
to obtain wideband flat gain response. An intuitive move is to create two gain responses with low
and high frequency peaks, which are superposed.
Four cascaded stages are used. The first two stages with 64 µ m width create a frequency
response peak at 37.5 GHz, while the latter two stages with 90 µ m width produce a peak at 27
GHz; then they are superposed to create a flat frequency response.
Figure 3.15 demonstrates the concept. The simulated maximum available gain responses
of each half circuit are shown in solid lines, assuming each port is conjugately matched at each
frequency. The dashed line shows the superposed overall response.
62
Figure 3.15: Maximum available gain responses of stages 1&2, and stages 3&4, and the superposition of the gain
responses.
In actuality, a perfect conjugate match cannot be achieved over the entire band.
Consequently, the reflections brought by the actual input, output and interstage matching
networks result in a final response which differs from these ideal predictions. This is actually
fortuitous, since it adds an additional degree of freedom to smooth the gain response.
3.2.5 Schematic and Simulation with Ideal Components
From this section, the step by step design will be discussed and analyzed, from schematic
simulation with ideal components to foundry models, and then individual layout components,
and finally the overall layout and EM simulation.
The initial simulation was performed in ADS. Only the transistor model was pulled out
from the foundry library; other components such as inductors, capacitors and resistors were ADS
63
V=
1 for all four stages. The inductors were assigned with the
built-in ideal models. V=
DD
GS
calculated values in 3.2.3. EM simulation of an inductor was run in ADS Momentum to obtain a
rough idea of R f . Then R f 1= R f 2= 10Ω and R f 3= R f 4= 15Ω were used at the beginning. There
was no way to estimate Ld at that point. However, one point which could be confirmed is that
Ld should be much smaller than Lgd and Ldd of the latter two stages, because the purpose of Ld
is to compensate the capacitive component of the output impedance at the upper band edge,
while Lgd and Ldd are calculated at the band center. Therefore, Ld = 100 pF was adopted initially.
Of course the simulation result at that point would not be the same as expected. Further tuning is
necessary. Tuning and optimization in ADS were mainly used to obtain the optimized response.
The final schematic with the components value marked is shown in Figure 3.16. For
simplicity and to conserve chip area, the first two stages are identical designs without interstage
matching, and similarly for the latter two stages. To further improve the performance, simple
input, output, and interstage (between Stages 1, 2 and 3, 4) LC matching networks are inserted.
The matching network design process was iterative, because the components were fine-tuned
along the way.
The corresponding simulated insertion loss and return loss are shown in Figure 3.17 and
Figure 3.18. The peak gain is 22.5 dB at 27.8 GHz. The gain response is very flat with a 3 dB
bandwidth of 15.1 GHz, from 25.5 GHz to 40.6 GHz. The return loss is below -10 dB over the
entire band. The stability factor Mu was calculated instead of K factor, because the Mu factor
could indicate how stable the amplifier is. From Figure 3.19, the amplifier is very stable, since
Mu is considerably above unity. There is a certain margin for degradation in the final layout with
actual components.
64
Figure 3.16: Schematic of the Ka-Band CMOS feedback amplifier.
Figure 3.17: Optimized initial schematic simulated insertion loss with ideal components.
65
Figure 3.18: Optimized initial schematic simulated return loss with ideal components.
Figure 3.19: Optimized initial schematic simulated stability Mu factor.
66
3.2.6 Simulation with Non-ideal Passive Components
The next step is to replace the ideal passive components with the non-ideal models
provided by the foundry, which include various parasitics causing performance deviation at mmwave frequencies. Therefore, the final values of the foundry models are expected to be a little
different than that of the ideal components.
Among the three passive components that used in the schematic, the inductors possess the
largest physical size and would introduce more parasitics than the capacitors and resistors. The
equivalent model of an actual spiral inductor is shown in Figure 3.20 [103]. The model includes
the parasitic components: inductance L , resistance Rs , capacitance to substrate COX , substrate
effects Rsub and Csub , and parallel capacitance CP due to the capacitance between the main spiral
and the cross-under portion [103].
Figure 3.20: The equivalent model of a spiral inductor [103].
An ideal inductor has constant inductance over the entire frequency range, while the nonideal inductor has gradually increased inductance along with the increased frequency while the
parasitic capacitances start to become more and more significant. Simple math could prove this.
67
The equivalent inductance is shown in Equation (3.4), if only considering the original inductance
and the parallel capacitance. It is clear that Leff increases with the frequency.
Leff = L
1
1 − ω 2 LC p
(3.4)
There are two ways to calculate the inductor parameters. One is to use 2-port Y
parameters, as shown in Equations (3.5) and (3.6).
L = imag (Y21 ) / 2π f 0 Y21
(3.5)
Q = −imag (Y11 ) / real (Y11 )
(3.6)
The other is to use 1-port Y and Z parameters with the second port terminated to ground. The
inductance L, resistance R , and quality factor Q were calculated from the following equations:
L = imag ( Z11 ) / 2π f 0
(3.7)
R = real ( Z11 )
(3.8)
Q = −imag (Y11 ) / real (Y11 )
(3.9)
The inductances would be slightly different, since the 1-port structure would ignore part of the
shunt parasitics at port 2. However, the difference is below 10% of the inductance; hence, for
simplicity, the 1-port structure was adopted. In addition, it is easier to extract the resistance using
the 1-port structure.
Using Lgd 1 with the original desired inductance of 495 pH and resistance of 11 Ohms as
an example, the single ended schematic is shown in Figure 3.21. The model only has certain
trace widths to select, which are 6 µ m , 9 µ m , 15µ m and 30 µ m . To save inductor area, narrower
line width is preferred. The parasitic resistance would be higher in the meantime. However,
suppressing the parasitic resistance is not the intention. Quite the opposite, a certain resistance is
68
needed. Therefore, 6 µ m was selected. ADS could simulate the Y and Z parameters in the
meantime of the S parameters. It was fairly simple to calculate the inductor parameters. By
tuning the turns (nr) and the radius (rad) of the spiral, and monitoring the generated inductance,
the desired inductance could be achieved. Similarly, every inductor could be replaced. Another
tuning and optimization was performed afterwards to maintain the flat high gain response.
The Lgd 1 parameters after optimization are shown in Figure 3.22 to Figure 3.24. With
1.25 turns, 36 µ m radius, the inductance is 420 pF around DC, and 543 pF at 37.5 GHz. The
resistance is 1 Ohm around DC, and 7 Ohm at 37.5 GHz. The Q value is fairly high, above 17
over the entire Ka band. Note that the optimized inductance value is not exactly the same as the
desired 490 pH, but it is not very far away either.
Figure 3.21: Lgd1 model simulation.
69
Figure 3.22.: Calculated Lgd1 model inductance.
Figure 3.23: Calculated Lgd1 model parasitic series resistance.
70
Figure 3.24: Calculated Q of Lgd1 model.
The resistor model is physically very small; hence, the parasitics are negligible. Therefore,
the ideal resistor could be replaced by the resistor model directly. The resistors were still kept in
this stage because the foundry inductor model couldn’t generate the right amount of inductance
and resistance at the same time. The resistors would be deleted eventually when the customized
inductors are inserted and the resistance would completely come from the parasitics of the
inductor in the real layout.
Figure 3.25 [104] is the equivalent lumped-element model of a capacitor for microwave
circuits. The element denoted "C" in the model is the nominal capacitance value; the rest of the
elements are considered parasitics. Here, LS is the self-inductance of the structure. The
equivalent series resistance (ESR) is the real part of the series impedance of a capacitor, and is
what causes loss due to heat [104]. LS and ESR are usually very small because the layout of the
71
Metal-Insulator-Metal (MIM) Capacitors are usually rectangles, close to square shape. The
parallel capacitance CP could often be ignored because the resonance caused by CP is usually
above the operating frequency. Therefore, the capacitor models replacement was also as
straightforward as the resistor models.
Figure 3.25: Equivalent lumped-element model of a capacitor [104].
In a word, among the three passive components, the inductors need special attention and
need to be designed carefully.
The schematic with the non-ideal foundry models is shown in Figure 3.26. The large
bypass capacitor was comprised of multiple smaller capacitors in parallel. The simulated results
are shown in Figure 3.27, Figure 3.28 , and Figure 3.29. The gain dropped a little, and the return
loss got a little worse as well. It is still very stable.
Figure 3.26: The schematic with the foundry models.
72
Figure 3.27: The simulated insertion loss with foundry models.
Figure 3.28: The simulated return loss with foundry models.
73
Figure 3.29: The simulated stability Mu factor with foundry models.
3.2.7 Simulation with Layout Components
Although the foundry inductor model includes the parasitic effects, its shape is fixed to
be octagonal, thereby occupying relatively large area, and therefore lacks freedom to customize
the parasitic resistance. Therefore, it is necessary to design a customized inductor. EM
simulation was required at this point. ADS Momentum was used because it could handle the
planar structure in fast and accurate fashion.
Taking Lgd 1 as an example again, the desired inductance is 543 pH at 37.5 GHz, and the
resistance is 7.16 + 3.68 = 10.8 Ω . To design an inductor, the relationship between the inductor
dimensions and the three parameters: inductance, resistance and Q, and the tradeoff between
these parameters must be fully understood. Inductors are preferred to be on the top metal layer to
reduce the parasitic resistance, thereby enhancing the power handling capability and Q. To save
area, a rectangular shape was adopted. A square is preferable in comparison to a long rectangle,
74
because the two long sides of the rectangle would be too close, and the current cancellation
becomes more severe than the square, meaning the shape is less efficient to generate inductance,
and would produce higher resistance, and lower Q. Thus, the rectangular shape would be only
used when additional resistance is needed. To generate such high inductance within limited area,
narrower line width and space between the turns is desired. Of course it would increase the
resistance and reduce the Q value, but again, our goal is not to minimize the resistance but to
produce the right amount. After going through the design rules for the thick top metal layer, the
minimum width of the trace is 2.6 µm, and the minimum space is 2.5 µm. Keeping these
restrictions and the tradeoffs in mind, the layout for Lgd 1 has been designed as in Figure 3.30. It is
worth noting that the sharp corner of each turn was chopped off to reduce the parasitics.
Figure 3.30: Lgd1 layout.
75
Next, the Momentum software could generate a layout component from the current
layout. The layout component is a layout lookalike symbol which could be placed in the ADS
schematic simulation window just like any other components, and its dataset could be linked to
the Momentum simulated S parameters. The other way is that a two port data item component
could be invoked and pointed to the Momentum dataset. The only difference is the symbol
appearance. Either way, the dataset generated by the Momentum software could be imported
back to the schematic to do post processing and calculate the inductance and resistance. The
schematic simulation and EM simulation were performed alternately until the result met the
requirement. The ultimate inductance is 521 pH and parasitic resistance is 10.8 Ohm at 37.5 GHz
as shown in Figure 3.31 and Figure 3.32. The result matched the desired value so that the layout
component was considered good enough to replace the foundry inductor model. Similarly, all the
other inductor models could be substituted.
Figure 3.31: Calculated inductance from Momentum EM simulation result.
76
Figure 3.32: Calculated parasitic resistance from Momentum EM simulation result.
However, the response after the replacement was changed, because the new dimensions
of each inductor gave slightly different parasitics, Q and frequency response compared to the
foundry models; thus, another round of tuning and optimization was required. The tuning took
more time than before, since EM simulation was involved. The gain, return loss, and stability
factor after optimization are shown in Figure 3.33 to Figure 3.35. The gain remained about the
same level. The S22 resonances changed position, due to output impedance and matching change
while swapping the inductor components. The value of S 22 at higher frequency was lower; as a
result, the stability was improved at higher frequency as well. Importantly, the performance was
still maintained reasonably well.
77
Figure 3.33: The simulated insertion loss with layout components.
Figure 3.34: The simulated return loss with layout components.
78
Figure 3.35: The simulated stability Mu factor with layout models.
3.2.8 Layout and Post Layout Simulation
Although the layout components include the parasitic effects, the coupling between the
components caused by non-ideal isolation has not been accounted for and the non-ideal ground
effect has not been considered either. Another important aspect is that the MOSFET layout itself
and its peripheral interconnects would introduce additional parasitics; hence, the parasitic
cancelling inductor value might not be valid anymore. In other words, the resonance frequency
might be shifted. All these aspects would not affect the low frequency response that much, but
would become more and more significant at mm-wave frequencies and can strongly affect the
performance of a design. To evaluate the effects of parasitics and non-ideal ground, and to gain a
higher degree of confidence of the chip design, it is important to run post-layout simulations.
The next step is to draw the real layout and run EM simulation to evaluate all of the
above effect. The strategy is to draw the layout stage by stage, avoiding blindly tuning too many
variables. The ground ring was first created with the input and output Ground-Signal-Ground
79
(GSG) pads and the power pads arranged as Power-Ground-Power-Power-Ground-Power. VDD
would be applied to the power pad. Then, the components from the beginning till the end of the
first stage along with the first piece of ground were inserted. The peripheral layout of the NMOS,
input and bypass capacitors were also included. The foundry provided NMOS layout has brought
terminals to the third metal layer M3; however, the terminals need to be brought up to the top
metal layer M6 for future connections to other components. To reduce the parasitic effect of the
interconnection of the NMOS, short wide metal pieces were used to connect to gate and drain,
and as many as possible vias were adopted to bring the NMOS terminals to the top metal layer,
since a parallel array could reduce the parasitic inductance and resistance effectively. Obeying
the design rules for this TSMC 0.18 µm RF process, the initial layout has been finished and is
shown in Figure 3.36. One trick played here is that the components are not connected together
during EM simulation; instead, ports are assigned to input and output of each component, as
shown in the zoomed-in area in Figure 3.37.
Figure 3.36: The layout of the first stage.
80
Figure 3.37: Zoom in on the layout of the first stage around the NMOS area.
Similar to designing the inductor, the layout lookalike component with the ports available
to connect at the assigned places could be placed in the schematic, and the dataset is set to the
EM simulation result. This schematic and EM co-simulation is the only way that the
capacitances and NMOS could be inserted, and Vdd could be applied as well, because
Momentum does not support active components in EM simulation.
There is a big step from schematic to layout; the performance is expected to deviate from
the schematic simulation result, even if the individual inductor EM results have been included as
discussed in the previous section. One major reason is that the input and output terminals, and
the NMOS source are referred to the real nearest layout ground instead of the ideal ground,
which would have a huge impact on the performance. Another reason is the coupling between
the components. Therefore, one requires yet another round of tuning and optimization. Returning
to the disconnection trick, it is extremely useful to quickly address to the key parts which need to
be adjusted. The terminations could be added to arbitrary components with other surrounding
81
components disconnected; however, the coupling still exists. Therefore, monitoring the
individual component value becomes very simple and convenient. Moreover, it is convenient to
insert additional ideal tuning components to do the initial tuning without the need of running the
EM simulation over and over again. The schematic with the stage1 layout component was shown
in Figure 3.38. The NMOS, capacitances, terminations, VDD, ideal RF chock, and DC block were
inserted. The source of the NMOS was connected to the nearest ground at the bottom left of the
middle ground. The comparison of the simulation results and the previous results with layout
component inductors for the first stage is shown in Figure 3.39. The peak of the frequency
response has shifted 3 GHz lower and the peak gain dropped by 2 dB. It is obvious that the
inductors were a little too large so that the resonance happened at lower frequency. A little
tuning brought the resonance back to the desired frequency. This demonstrates how important
the post layout simulation is. The stage by stage layout strategy helps break down the problem
into small pieces for ease in problem detection, and do debugging and tuning afterwards.
Figure 3.38: Stage 1 layout component.
82
Figure 3.39: The stage 1 layout simulated insertion loss in comparison with that with layout component inductors.
Before moving forward, the layout for the first stage was imported into Cadence Virtuoso
to do the Design Rule Check (DRC) using Calibre, which ensures that the layout conforms to the
design rules for faultless fabrication. The purpose to perform DRC at such an early stage is to
avoid any problems that might be very difficult to fix after the rest of the components are placed.
Once the DRC was completed, the second stage was brought in simply by mirroring the
first stage as shown in Figure 3.40. Notice that the inductors have been adjusted. Another
important change that has been made was adding a ground connecting the ground of the input
signal pad and the ground area located right to Ldd 1 . It effectively reduced the current return path,
making the ground more ideal. However, if connecting the layout component from stage 1&2 to
83
the original rest of the stages, the response was no longer flat. After trying different solutions, the
major problem was found at the ground. Although adding two pieces of ground at the left and
right side of the middle ground helped a little, the ground was still a long strip which is inductive.
Therefore, the two NMOS sources were referenced to two different ground points. The response
was improved considerably by moving the two NMOS close to each other, so that they could be
referenced to almost the same ground. The gain drop was another issue. Several things have been
done to improve the gain. All the small inductors changed to wider line width, Lgd remained the
same because increasing line width would occupy too much area. The purple color part on Ldd
was on the fifth layer M5 with 0.53 µm thickness, which would introduce higher resistance and
higher loss. Thus, the line was brought up to the top metal layer as soon as passing the crossunder part. Moreover, the cross-under portion was made of a combination of multiple layers
downwards for the same resistance reduction purpose. In addition, a larger piece of ground was
used. The modified layout is shown in Figure 3.41.
Figure 3.40: Stage 1&2 Initial layout.
84
Figure 3.41: Stage 1&2 modified layout.
Continuing to the third and fourth stage, the same philosophy applied. The major problem
was how to place Lgd and Ld . There was not enough space to place Lgd and Ld separately. Since
Ld is much smaller than Lgd , it was possible to put Ld inside the opening between the input arm
and output arm of Lgd . The crucial part is that the current direction along the spiral for both
inductors has to be consistent; otherwise the currents would cancel each other. The concept is
demonstrated in Figure 3.42. The left layout is wrong, since the currents flowing in both
inductors are different in the horizontal direction. Although the vertical currents are in the same
direction, the overlapped region is a single and short line, while there are multiple lines
overlapping in horizontal direction, meaning that the interaction is stronger. Therefore, in all the
generated inductance would be smaller than original. On the other hand, the current flowing
directions in the right layout are the same for both inductors, hence boosting both inductances.
Such kinds of coupling effects could only be calculated in the actual layout simulation.
85
Figure 3.42: Wrong layout (left) and correct layout (right) of Lgd and Ld.
After a long process, switching between ADS simulation, Momentum EM simulation,
and Virtuoso layout, the final layout in Virtuoso is shown in Figure 3.43.
Figure 3.43: Final chip layout of the Ka-band CMOS feedback amplifier.
86
It is clearly seen in the layout that the inductors in the first and second stages were no
longer symmetrical, due to the non-ideal ground effect and different coupling effect from
different surrounding components. Similarly for the latter two stages.
The ground was filled as much as possible. Filling metal strips are inserted in every metal
layer to satisfy the metal density requirement as specified in the design rules. The bottom metal
layer M1 served as ground has to be weaved as in Figure 3.44 to satisfy the design rules.
Figure 3.44: M1 pattern.
The final EM simulation result is shown in Figure 3.45 to Figure 3.48, in comparison
with all the previous results, which are simulation with ideal components, foundry models, and
layout components. From the figures, one can tell that each iteration introduced a 1~2 dB loss in
gain, although the overall shape of the responses are pretty close. The return loss maintained at a
relatively low level although the peaks were at different frequencies. The stability factor was
considerably above unity, indicating that the amplifier is unconditionally stable and very hard to
oscillate for the entire Ka-band.
87
Figure 3.45: Gain of the final layout EM simulation result in comparison with all the previous results.
Figure 3.46: S11 of the final layout EM simulation result in comparison with all the previous results.
88
Figure 3.47: S22 of the final layout EM simulation result in comparison with all the previous results.
Figure 3.48: Stability factor Mu of the final layout EM simulation result in comparison with all the previous results.
89
ADS is capable of running DC simulation and annotating the DC solution on each net of
the schematic, as shown in Figure 3.49. The first two stages draw a total current of 34.5 mA,
while the latter two stages draw 46.8 mA, since the transistor size is larger in the latter two stages.
The current is almost evenly distributed in the first stage and second stage, and the same for the
third
and
fourth
stages.
The
total
DC
power
consumption
is
PDC =
IV =
(34.5 + 46.8) mA ×1.2 V =
97.56 mW .
Figure 3.49: Annotation of the DC solution.
One final step before tape-out is to check Layout Versus Schematic (LVS) using Calibre,
which determines whether the IC layout corresponds to the original schematic of the design. The
schematic for LVS has been created in Cadence Spectre, as shown in Figure 3.50. Because the
customized inductors were used instead of the built-in foundry models, the LVS checking
software could not recognize the inductor as an inductor but only as a long spiral line. Moreover,
there was no matched component that could be placed in the schematic for such an inductor. A
workaround was to substitute all the inductors by wires, or resistors when wires would introduce
confusion, for example, Lgd and Ld . Meanwhile, matched resistors were added on top of the
inductors, as highlighted in Figure 3.51.
90
Figure 3.50: Schematic for LVS in Cadence Spectre.
Figure 3.51: Addition resistors to the layout for LVS.
91
3.3
Amplifier Measurement
3.3.1 Fabrication
The fully-integrated wideband feedback amplifier was fabricated using TSMC 0.18 µm
mixed-signal/RF 1P6M CMOS technology through MOSIS. The wafer has been diced into
individual dies, each containing one copy of the circuit. As shown in Figure 3.52, the chip
occupies an area of 1 × 0.55 mm2 including the pads, with core area of 0.79 × 0.365 mm2.
Figure 3.52: Die photo of the Ka-Band CMOS feedback amplifier.
Another chip with test structures has been taped out along with the amplifier. There are
two standalone NMOS transistors, 1 set of calibration kit, and one inductor Lgd 2 . The chip die
photo is shown in Figure 3.53. The NMOS transistors have identical sizes as used in the
amplifier; one is 64 µ m wide, the other is 90 µ m . The calibration kit contains an open, short,
through, and a long 50 Ohm line. The input and output pads are the same as what was used in the
amplifier to de-embed the pad parasitics. Unfortunately, a huge mistake has been made for the
calibration kits though. The short was not really shorted to the ground by mistake. Fortunately,
92
on second thought, the pad parasitics have actually been included in the simulation, so there is no
need to de-embed them. Therefore, another calibration kit with very small pads would be used in
the real measurement. Lgd 2 is there purely for verification of the simulation accuracy.
Figure 3.53: Die photo of the test structures chip
3.3.2 Small Signal S-parameter Measurement
Both the small signal S-parameter measurement and large signal measurement were
performed.
The small signal measurement setup consists of a probe station, an Agilent E8361C
performance network analyzer (PNA) with working frequency up to 67 GHz, and an Agilent
E3646A dual output power supply. Figure 3.54 shows the setup block diagram, while Figure
3.55 shows the actual setup. A pair of GGB 50A-GS-100-DP coplanar GSG RF probes with
93
100 µ m pitch which are good until 50 GHz were used for RF input and output. A customized
GGB multi-contact wedge DC probe for DC biasing was specially made for this design, which is
shown in Figure 3.56. It has 6 pins with 100 µ m pitch, tungsten power and ground needles
without capacitors or resistors, and SMA connectors mounted. The four power needles could be
set at four different voltages if needed.
Figure 3.54: S-parameter measurement setup block diagram.
94
Figure 3.55: Small signal measurement setup.
Figure 3.56: The customized GGB DC problem.
The chip was glued to a larger piece of copper printed circuit board (PCB) using silver
conductive epoxy adhesive, and the PCB was taped on the probe station, for easier and reliable
95
probing. The setup is shown in Figure 3.57. The two RF and one DC probes probed on the chip
directly, as shown in Figure 3.58.
Figure 3.57: Probing Setup.
Figure 3.58: Chip with probes.
96
Calibration is the key for accurate S-parameter measurement especially at mm-wave
frequencies. The losses and phase shifts caused by the cables and probes need to be de-embeded
from the measurement result. A 2-port Short-Open-Load-Thru (SLOT) calibration was
performed using GGB Picoprobe calibration substrate #CS-5, as shown in Figure 3.59.
Figure 3.59: GGB Picoprobe calibration substrate #CS-5.
The comparison between the measurement and simulation results for the wideband
feedback amplifier is shown in the following figures. The gain comparison is shown in Figure
3.60. The measured peak gain is 23.3 dB at 35.6 GHz, and it maintains a minimum 16 dB gain
over the entire Ka-Band, while a flat gain of 17.2 dB ± 0.8 dB was predicted over the entire KaBand by simulation. It shows very good agreement between the measurement and simulation
result only below 30 GHz, yet there is a few dB difference at higher band. Figure 3.61 shows the
measured and simulated return loss. The measured values of return loss S11 and S 22 are below -6
and -8 dB over the entire Ka-Band, respectively. The S11 value behaves similarly to the
simulation, but S 22 has completely changed, although it becomes better at higher frequency. The
97
measured reverse isolation S12 across the 10 to 50 GHz band is lower than -40 dB. The stability
factor Mu is calculated from the measured s-parameters, as shown in Figure 3.62. It is greater
than unity across the 10 to 50 GHz band, implying this amplifier is unconditionally stable.
Figure 3.60: Measured and simulated small signal gain of the amplifier.
Figure 3.61: Measured and simulated return loss of the amplifier.
98
Figure 3.62: Measured stability factor Mu.
Observing the above three figures carefully, the peak gain, peak S11 and S 22 , and the dip
of µ are all located at 36 GHz, indicating that the feedback inductor is a little too large, causing
the resonance to shift from the desired 37.5 GHz to 36 GHz, also more inductance leads to
higher chance of instability. In addition, the output matching, involving Ld and Ldd , needs to be
adjusted. One suspicion is the validity of the NMOS model at high frequency since there was no
precisely measured NMOS model up to 40 GHz before this design due to the budget constraints.
That is why the standalone NMOS has been taped out along with the amplifier chip. With the
actual model, this design could be improved in the future.
3.3.3 Large Signal Measurement
The large signal measurement could be done in two ways. The first way is to use an
Agilent E4417A power meter and an Agilent 8487D diode power sensor to measure the power at
99
input and output of the amplifier. The Agilent E8361C PNA serves as a power source; only port
1 is used. The measurement setup is shown in Figure 3.63.
Figure 3.63: Linearity measurement with power meter.
Basically, we are trying to “probe” the power at reference points A and B; however,
direct probing is not realistic because the setup would be much more complicated, requiring
100
more components, such as the splitter, additional power sensor, etc. The de-embedding is still
needed due to the use of a splitter. The more straightforward way is to break the measurement
into two steps. The system connection of the first step is marked using solid line. Fortunately, the
power needed to drive the amplifier into saturation is around 0 dBm, which is right at the edge of
the maximum power that the PNA could generate. Therefore, no additional amplifier is needed,
making the setup much simpler.
Since the accurate average power measurement range for the Agilent 8487D power
sensor is over -70 to -20 dBm, and the amplifier would be driven from -30 dBm to 0 dBm, thus a
Nardar 4768-20 DC-40 GHz 20 dB attenuator was inserted to drop the power down to the safe
range. The same cable (purple color) connecting to point A is now connected to the attenuator,
and then power sensor. Therefore, the power at point A’ is equivalent to that at point A. The
measured insertion loss of the attenuator is shown in Figure 3.64. It was de-embedded from the
measurement results from the power meter and then power at the input point A of the amplifier
was obtained.
The setup for the second step is marked in dashed line. Since the gain of the amplifier is
close to 20 dB and the simulated saturation power is around 10 dBm, for the same reason of
making sure the power level at the input of the power sensor is within the accurate range, another
20 dB attenuator was adopted, which is an Anritsu 41V-20 DC-60 GHz 20 dB 2 Watts attenuator.
To reverse the power reading at the power meter back to point B, the two 20 dB attenuation and
one cable loss has been measured and compensated. The insertion loss of the second anttenuator
is 20 ± 0.2 dB , similar to the previous one. The long RF cable loss is from -2.3 dB to -3.4 dB at
Ka-band.
101
Figure 3.64: The measured insertion loss of the Nardar 4768-20 attenuator.
The measurement has been completed by sweeping the power of the PNA from -30 dBm
to 0 dBm, and calculating the power at point A and B from the power meter readings accordingly.
Then the Pout versus Pin plot could be generated.
The other way is to use the Agilent E8361C PNA directly. There is a very powerful built
in function for power measurement. First of all, the power calibration needs to be performed. The
Agilent E4417A power meter connects to the PNA via GPIB. No additional amplifier or
attenuators were needed in this case, making the power calibration more stable. Following the
PNA power calibration guide, firstly the source power calibration was executed at port 1 of the
PNA by simply connecting port 1 to the input of the power sensor via an RF cable. In this step,
the cable loss would be calibrated out. Next, the receiver calibration was carried out by
connecting port 1 and port 2 via one RF cable, one through, and one adapter. A receiver
102
calibration is essentially a trace normalization. An accurate receiver calibration starts with a
source power calibration as the reference [105]. After the power calibration, the amplifier was
connected in the same way as the small signal measurement. A power sweep could generate the
Pout versus Pin curve directly on PNA. The power calibration is only valid for single frequency
and needs to be performed repeatedly for different frequencies. The results shown below are all
at band center 33.25 GHz as a demonstration.
The measurement results from both methods agreed very well, as shown in Figure 3.65.
One thing to mention is that the losses between the RF cable and the probe tip were ignored in
the large signal measurement, since even the total loss is very small, and it is hard to measure the
loss accurately. The simulated and measured gain compression and Pout versus Pin are shown in
Figure 3.66. The measured results are 2 to 3 dB higher than the simulated result at lower input
power. The difference decreases when the power increases. The amplifier can produce 10.1 dBm
of output power at band center 33.25 GHz, with the 1 dB compression point at 6.1 dBm.
Figure 3.65: Pout versus Pin using different measurement methods.
103
Figure 3.66: Simulated and measured gain compression and Pout versus Pin.
DC voltage and current have been monitored on the power supply during the input power
sweep, so the DC power has been calculated. The power added efficiency (PAE) could be
calculated from Equation (3.10).
PAE =
Pout − Pin
PDC
(3.10)
The DC current 1 dB compression point for the first two stages is 32 mA, and 56 mA for the
latter two stages. Therefore, the DC power is PDC = IV = 88mA ×1.2 = 105.6mW . The measured
and simulated PAE at 33.25 GHz is shown in Figure 3.67. The two results differ by less than 1%.
The peak PAE is 8.6% at -2.6 dBm input and 10 dBm output.
The same measurements have been completed at several frequencies. The following two
figures show the gain compression, Pout versus Pin , and PAE at band edges. The saturated power
across the entire band is similar; however, the PAE and gain vary with frequency.
104
Figure 3.67: Measured and simulated PAE at band center.
Figure 3.68: Measured gain compression, Pout versus Pin and PAE at 26.5 GHz
105
Figure 3.69: Measured gain compression, Pout versus Pin and PAE at 40 GHz.
3.3.4 NMOS Measurement
The small signal and large signal measurements have also been performed on the two
standalone transistors. Unfortunately, the on-chip calibration kit was not designed properly as
discussed in the preceding. Instead, the GGB Picoprobe calibration substrate #CS-5 has to be
used again here. Therefore, the big input and output GSG pad parasitics were not able to be
eliminated at that point. In addition, applying RF probe needles is a little tricky, since there is no
way to tell the exact 3D coordinate of the probe. Thus, it highly depends on the operator’s
experience. The usual procedure is to focus on the circuit, thereby the probe would be out of
focus at the beginning, then adjust the Z-axis of a probe, just as it comes in contact with the DUT,
the probe would be in focus, and if one continues to press down the probe, it will start to slide as
it flexes. This step is essential for a good contact. However, the position of the initial contact and
106
how much the probe slides could not be the same every time; hence, the pad effect would not be
the same which makes it difficult to extract the accurate model of the transistor.
The solution in the future would be either fabricate the standalone NMOS with smaller
pads the same as in the calibrate substrate, or redesign the on-chip calibration kit.
The following results are just for reference. The measured small signal maximum
available gain of an NMOS with 32 and 45 fingers are shown in Figure 3.70 and Figure 3.71,
respectively. From the plots, surprisingly the NMOS with fewer fingers gave more discrepancy.
The first two stages with 32-finger transistors are responsible for the higher frequency response.
That is why the amplifier performance deviates more at higher frequency. Figure 3.72 and Figure
3.73 display the measured IV curves of NMOS with 32 and 45 fingers, respectively. The
variance compared to the simulation result is not very obvious.
Figure 3.70: Measured maximum available gain of NMOS with 32 fingers.
107
Figure 3.71: Measured maximum available gain of NMOS with 45 fingers.
Figure 3.72: Measured IV curves of NMOS with 32 fingers.
108
Figure 3.73: Measured IV curves of NMOS with 45 fingers.
3.4
Conclusion
In this chapter, a 26.5 to 40 GHz wideband amplifier employing both frequency
controlled feedback with parasitic cancellation and gain response superposition has been
designed, fabricated, and measured. The peak gain is 23.3 dB at 35.6 GHz. The measured
performance of the amplifier at band center and edges is summarized in Table 3.2. Compared to
Table 3.1, the specifications are almost met. This is believed to be the first wideband amplifier
operating over the entire Ka-Band using 0.18 µ m CMOS technology. This design demonstrates
that the frequency limitation of 0.18 µ m CMOS technology for amplifier design can be
overcome using appropriate techniques. Therefore, 0.18 µ m CMOS technology is a promising
candidate for building key elements in fully integrated phased-array transceivers.
109
Table 3.2: Summary of measured performance.
Frequency(GHz)
26.5
33.25
40
Gain (dB)
16.0
20.6
16.5
Pout (dBm)
9.13
10.1
11.0
S11 (dB)
-7.2
-8.3
-8.9
S22 (dB)
-12.8
-11.2
-11.9
Current (mA)
90.2
91.6
90.5
Peak PAE (%)
6.9
8.6
11.2
FoM
4.7
11.4
59.0
110
Chapter 4
Ka-Band Phased Array Antenna Design
Utilizing Rotman Lens
4.1
Introduction
4.1.1 Phased Array Antenna Fundamentals
Phased array antennas (PAAs) consist of multiple stationary antenna elements, which are
fed coherently and use variable phase or time-delay control at each element to scan a beam to
given angles in space [18]. The behavior of the phased array in a radar or communication system
is far more complex than that of a passive, mechanically positioned antenna, because the
performance characteristics vary with scan angle. This section describes the important array
phenomena that determine scanning performance, bandwidth, and sidelobe levels of phased array
systems [18].
The overall far-field radiation pattern of an array is the product of the radiation pattern of
the antenna element and a so called array factor, given by
(4.1)
=
E Array E Antenna ⋅ F Array _ factor
The array factor quantifies the effect of combining radiating elements in an array without
the element specific radiation pattern taken into account [106]. Revisiting Figure 1.2 in Chapter 1
and assuming the array is in the XZ plane, the array factor is quantified in Equation (4.2).
=
F (u )
N
∑ A exp [ jkd (n − 1)(u − u )]
n =1
n
0
111
(4.2)
where N is the number of elements, d is the element spacing, k = 2π / λ , An is the amplitude of
the applied signal to each element, θ 0 is the scan angle, u = sin θ , and u0 = sin θ 0 . The array
factor is the summation of the contributions of each element.
For uniform excitation, the array factor can be converted to a simple result after
normalizing to the maximum amplitude:
1
sin Nkd (u − u0 )
2
F (u ) =
1
N sin kd (u − u0 )
2
(4.3)
The inter-element phase shift is kd sin θ 0 . By varying this phase shift, the beam position
can be scanned [6].
The half-power beam-width (HPBW) of the array can be derived by setting
1
sin Nkd (u − u0 )
1
2
=
1
2
N sin kd (u − u0 )
2
(4.4)
For large N, this reduces to
0.8858λ
Nd cos θ 0
θ HPBW ≈
(4.5)
In a uniform array, the nulls and sidelobes are equally spaced. The nulls occur at
u − u0 =
n/ N
.
N tan π ( u − u0=
) 
N π ( u −=
u0 )
The
peaks
occur
tan  Nπ ( u − u0 ) 
for
.
values
For
of
large
u
that
N,
are
this
solutions
of
reduces
to
1.4303 . The sidelobe
tan  Nπ ( u − u0 )  ; hence the first solution is N ( u − u0 ) =
ratio is defined as the ratio of the main beam amplitude to that of the first sidelobe. For large
112
arrays, the sidelobe ratio (SLR) is the same as that for uniform line sources, and is independent
of the main beam angle [6].
If
d
λ
and θ 0 are chosen properly, only one main beam will exist. If the element spacing
exceeds a critical dimension, additional main beams called grating lobes will occur in the array
factor because the larger spacing allows the waves from each element to add in phase at the
grating lobe angle as well as at the main beam angle [6]. The grating lobe appears whenever the
exponent is some multiple of 2π . The condition is
d
l
=
n
sin θ 0 − sin θ gl
(4.6)
A criterion for determining the maximum element spacing for an array scanned to a given
scan angle θ 0 is to set the spacing such that the nearest grating lobe is at the horizon, which leads
to the condition at the highest operating frequency f 0 :
d
λ0
≤
1
1 + sin(θ 0 )
(4.7)
which requires a spacing not much greater than one-half wavelength for wide angles of scan [18].
The number of elements and the element spacing determine the surface area, the so-called
aperture of the overall radiating structure. A larger aperture results in a higher gain. The overall
radiation pattern results in a certain directivity determined by the gain and the efficiency.
The bandwidth of an array is affected by many factors, including change of element input
impedances with frequency, change of array spacing in wavelengths that may introduce grating
lobes, change in element beam-width [6], and the beam squint phenomenon caused by the use of
phase shifters to scan the beam, as described in Chapter 1. On the other hand, using true time
113
delay could enhance the bandwidth, as demonstrated in Equation (4.8), because no frequency
dependency is present to the first order.
τn =
−n ⋅ d ⋅ sin θ 0
c
(4.8)
Therefore, to build a wideband phased array antenna, both the beam scanning device and
the antenna array should be wideband.
4.1.2 Rotman Lens Fundamentals
Since its invention in the early 1960s [42], the Rotman Lens has proven itself to be a
useful beamformer for designers of electronically scanned arrays. Inherent in its design is a true
time delay phase shift capability that is independent of frequency leading to wide bandwidth and
which removes the need for costly phase shifters and control elements for each channel to steer a
beam over wide angles [107].
For a microstrip Rotman lens, any beam incident in any of the beam ports travels
different distance to reach the array port depending on the shape of the lens contour and the
dielectric. By appropriately choosing the lens contour and the dielectric material, it is possible
for the signals arriving at the array ports to add up in phase such that in effect the beam is steered
in any particular direction [108].
The essential principle for the Rotman lens is that the optical path-length from the focal
point to any point on the corresponding wave front is a constant [109, 110]. The detailed
mathematics will be presented in the next section. While the design equations are quite well
known and reasonably simple to program, they do not take into consideration all of the realworld effects that may affect the performance of a lens. The full wave analysis will reveal the
impact of interference from waves reflected off of sidewalls and from other ports. Interference
114
effects will disrupt the phase front and cause irregularities in the beam shape. Another issue
could be cross talk from adjacent transmission lines or reflection from the port tapers as the
transmission lines transition to the parallel plate of the lens [107]. However, the full wave
analysis takes a considerable amount of time when dealing with such an electronically large
device. Therefore, a fast prototyping method which could predict the Rotman lens performance
would be extremely valuable. There is a commercially available software used for the initial,
theoretical design of the Rotman Lens, called the Rotman Lens Designer (RLD) by Remcom Inc.
The software assumes that parasitic coupling and transmission line and material dispersion are
negligible while dummy load effectiveness is ideal. Effects included are the direct and singly
reflected rays propagating between ports and the impact of dielectric losses. The port voltage
standing wave ratio (VSWR) is approximated as are the transmission line losses [107]. It has
great accuracy at low frequency; nevertheless, EM simulation is still needed afterwards for mmwave frequencies. Another fast prototyping method was proposed in Reference [48]. Besides the
improved Rotman lens design equations, the S-parameters could be predicted by treating the
Rotman lens as a two-dimensional transmitting and receiving antenna system. This method will
be discussed in a later section.
4.1.3 Antipodal Vivaldi Antenna Background
To build a wideband phased array antenna system, not only does a TTD phase shifter
need to be employed, but the antenna array elements should be wideband as well.
In order to prevent the loss caused by the interconnection cables between the lens and the
antenna array, a planar antenna array will be integrated with the Rotman lens on the same board.
Since the outputs of the Rotman lens are microstrip transmission lines, where microstrip is an
unbalanced structure, an antenna with an unbalanced structure is preferred for direct connection
115
in this beam forming system. The balanced antenna would work as well, with an additional balun.
However, the primary disadvantage of such architecture is that the balun must provide good
performance over a wide bandwidth, which complicates the design and increases the
implementation costs [111].
The Vivaldi antennas, also known as Tapered Slot Antennas (TSAs), belong to a general
class of end-fire traveling-wave antennas, and have been widely utilized in numerous
applications involving millimeter-wave integrated circuits over the last few decades [112]. The
Vivaldi antenna is an extremely broadband configuration that can be readily designed with
modern CAD simulation tools and fabricated with standard high-frequency substrate materials,
and thus can offer great promise for wideband applications [111]. First conceptualized in 1979
by Gibson, the Vivaldi antenna is a traveling wave slot antenna having an exponentially tapered
profile [113]. The initial designs of the Vivaldi antenna mainly focused on the co-planar
structure which is balanced, and therefore had to be fed by a wideband balun transformer. Later
on, a sub class named Antipodal Tapered Slot Antennas (ATSAs) was introduced by Gazit in
1988 [114]. It replaced the balun with a tapered transition between the tapered slot and the feed
line, coupling the unbalanced microstrip line with the balanced tapered slot. However, the crosspolarization of the antenna is high due to the unbalanced nature. Afterward, Langley developed
the antipodal architecture into a balanced structure again in [115] and [116] by adding another
conductor layer, to balance the electric field of the conductor in the dielectric substrate, so as to
reduce the cross-polarization. In this dissertation, the unbalanced antipodal Vivaldi antenna has
been adopted for easier integration with the Rotman lens, consequently compromising on the
cross-polarization.
116
In this dissertation, a true time delay device Rotman lens for beam scanning, and a
wideband antipodal Vivaldi antenna array have been designed, fabricated, and measured.
4.2
Design of Ka-band Rotman Lens
The design of the Rotman Lens has been separated into several steps. First of all, an
understanding of the Rotman lens principle is provided together with a derivation of the design
equations. Second, analytical modeling is carried out using Matlab. Next, full wave simulations
are performed using Computer Simulation Technology (CST) Microwave Studio (MWS).
Finally, the board is sent out for fabrication. The design details will be provided in the following
sections.
4.2.1 Rotman Lens Principle and Design Equations
The geometry and design parameters of a microstrip Rotman lens are shown in Figure 4.1.
Figure 4.1: Geometry and design parameters of a Rotman lens.
117
There are two curves and one straight line. The left curve is the focal arc on which beam
ports are supposed to be located. The focal arc is a partial circle. There are three perfect focal
points on the focal arc, which are two off-axis focal points F1 and F2 , and an on-axis focal point
F0 . The array curve is the right curve on which array ports are placed with coordinates of ( X , Y ) .
The straight line is the array plane on which antennas are distributed. The transmission delay
lines are connecting array ports and antennas. G is the on-axis focal length, F is the off-axis focal
length, α is the scanning angle, ϕ is the scanning angle seeing from the antenna array, and α
and ϕ are not necessarily the same. Wo is the on-axis transmission line length, W is the off-axis
transmission line length, and N is the lens numerical aperture, which is independent of the other
parameters and purely depends on the number of the antennas and spacing between them.
Since a Rotman lens was invented in 1963, the lens equation has been well explained and
modified in many publications. The main difference between the microstrip Rotman lens and the
original parallel plate structure is the substrate effect. The Rotman lens body sees the dielectric
constant of e r , whereas the microstrip delay line sees the dielectric constant of e eff . These
parameters have been included in the modified design [117].

Gent's equations for optical path-length equality between a general ray FPQK from the

focal point and the ray through the origin FO1O2 M have been updated as the following equations:
FFF
e r ( F1 P) + e eff W + D sin θ = e r F + e eff W0
FFFF
e r ( F2 P) + e eff W − D sin θ = e r F + e eff W0
FFFFG
e r ( F0 P) + e eff W = e r G + e eff W0
where
118
(4.9)
(4.10)
(4.11)
FFF
( F1 P) 2 = F 2 + X 2 + Y 2 + 2 FX cos α − 2 FY sin α
(4.12)
FFFF
( F2 P) 2 = F 2 + X 2 + Y 2 + 2 FX cos α + 2 FY sin α
(4.13)
FFFFG
( F0 P) 2 =( X + G ) 2 + Y 2
(4.14)
Normalize the dimension parameters to the focal length F , n =
y=
(W − W0 )
N
G
, g = , w=
,
F
F
F
Y
. Also for simplicity, define a0 = cos α , b0 = sin α , a1 = cos ϕ , and b1 = sin ϕ .
F
After some algebraic manipulation, Equation (4.15) is obtained:
aw2 + bw + c =
0
(4.15)
with
e eff  1 b1 2
g −1 2 
a=
) 
 1 − ( n) − (
e r  e r b0
g − a0 
=
b
e eff
er


a0 − 1
g −1
1 2
)+ ( 2 −
)b12 n 2 
 2g(
2
g − a0 e r b0 ( g − a0 )



b14 n 4
b
1  gb 2 n 2
−
− ( 1 n) 2 
c=  1
2
4 r ( g − a0 )
b0
εε
r  g − a0

The solution of the quadratic equation is given by
w=
−b ± b 2 − 4ac
2a
(4.16)
With the obtained w , the normalized coordinates ( x, y ) of the points on the array curve can be
solved as in Equation (4.17) and (4.18).
=
x

−1  e eff
1
( g − 1) w + b12 n 2 


g − a0  e r
er

119
(4.17)
=
y
e
1 b1
n(1 − eff w)
er
e r b0
(4.18)
This way, the array curve has been solved completely. Now, move to the left curve, which is a
part of a circle with the radius of R and center at C0 ( −G + R, 0 ) . Thus, the distance between the
circle center and the origin is C= G − R . Again, normalize the dimensions to the focal length F .
Define r =
R
C
, and c= = g − r . According to the law of cosines on the triangle F1O1C0 :
F
F
2
1 + c2 − r 2 1 + ( g − r ) − r
cos α =
=
2c
2( g − r)
2
(4.19)
Then r can be calculated:
r = 1−
g 2 −1
2( g 2 − g cos α )
(4.20)
Assuming the point is moving from F1 towards F0 and stops at some point H in between, then
α becomes α ' , and ϕ becomes ϕ ' . According to Snell’s Law:
sin α ' sin α
=
sin ϕ ' sin ϕ
(4.21)
Apply the law of sines on the triangle HO1C0 :
r
g −r
=
'
sin α sin β
(4.22)
 g −r

sin α '  , where β is the angle between line HC0 and HO1 .
It results in β = arcsin 
 r

Then the normalized coordinates ( x1 , y1 ) of the points on the focal curve can be solved in
Equation (4.23) and (4.24).
x1 =( − g + r ) − r cos( β + α ' )
120
(4.23)
=
y1 r sin( β + α ' )
(4.24)
The antenna elements are distributed evenly on the line perpendicular to the x axis, with
the crossing point at O2 (W0 , 0 ) . Assuming there are an odd number antennas, then the middle
is d
antenna is located at (W0 , 0 ) . Assuming the antenna array spacing
=
λ0 @ 30GHz
= 5mm ,
2
the coordinates of the kth antenna above the x axis are (W0 , kd ) . Note that the antennas below
the x axis are mirrored.
At this point, the focal curve, array curve, and antenna array coordinates have been fully
resolved.
4.2.2 S-Parameter Modeling
The parallel plate region of the Rotman Lens can be considered as a 2-D free space, since
only TEM waves can propagate. Hence the ports can be described as 2-D antennas with a 1-D
radiating edge [48]. It is convenient to name the ports on the focal curve as beam ports (BPs)
with port width Lb , and the ports on the array curve as array ports (APs) with port width La . The
edge of the port connecting with the Rotman lens body can be treated as a continuous array of
point sources. By Huygens’ Principle, a continuous array of point sources is equivalent to a
continuous field distribution [118]. The pattern on the port edge can be calculated as follows [48]:
Fport (φ ) = ∫
Lb ,a /2
− Lb ,a /2
ai ( y ')e + jky 'sin(φ ) dy '
(4.25)
where ai ( y ') is the current distribution along the edge of the port. It can be assumed as a
constant current distribution, as long as the HE0 mode is dominant. Consequently, with
ai ( y ') = 1 , Fport (φ ) can be reduced to
121
Fport (φ )b ,a =
sin(
p Lb ,a
sin(φ ))
λ
p Lb ,a
sin(φ )
λ
(4.26)
The 2-D propagation can be modeled with a modified Friis formula, with the distance r
between the phase centers of the radiating edge ports [48], the transmission loss, which is
insertion loss is defined as
Pr La Lb
=
( Fport (φ )b ) 2 ( Fport (φ ) a ) 2
λr
Pt
(4.27)
where Pr is the received power at array ports, and Pt is the transmitted power at beam ports.
To calculate return loss, the radiated power Prad from the edge of the beam ports should
be obtained first. Due to reciprocity, this is also true for the receiving array ports [48]. The power
density created in the direction Φ is
E2
2
S r (r , φ ) S=
S avg Dmax F (φ )
=
max
2
Emax
P 2p Lb ,a
= t
( Fport (φ )b ,a ) 2
2p rh λ
(4.28)
with h as the substrate thickness.
The port is orthogonal to the parallel plate region and can radiate into the angle range of
−
π
2
to
π
2
. The radiated power can be expressed as follows, with dAw (r , φ ) = trdφ :
Prad = ∫
p /2
−p /2
= Pt
S r (r , φ )dAW
Lb ,a
λ
p /2
∫p
− /2
( Fport (φ )b ,a ) dφ
2
Therefore, the return loss can be calculated.
122
(4.29)
Prad
=
Pt
1−
Lb ,a
λ
p /2
∫p
− /2
( Fport (φ )b ,a ) 2 dφ
(4.30)
4.2.3 Calculate and Plot Rotman Lens Using Matlab
The design equations and S parameter modeling equations derived in the previous
sections could be all entered into Matlab. The final Matlab codes are included in Appendix A.
The only thing that is missing is the material selection. First of all, Rogers RO3000 series high
frequency laminates has been selected, because it has low dielectric loss, so the Laminates can be
used in applications up to 30 - 40 GHz. In addition, it has stable dielectric constant versus
temperature and frequency, so it is ideal for wideband applications. A metal thickness of 1 oz (35
µ m ) has been selected to reduce the resistive loss. There are three laminates under that RO3000
family, which are RO3003, RO3006, and RO3010, with dielectric constant of 3, 6.15, and 10,
respectively. There are several standard thickness options for each laminate. The question is how
to select the right dielectric constant and thickness.
The main principle applied here is to suppress higher order modes at the ports. For the
case of the microstrip realization, the line will not support a true TEM wave as a consequence of
the inhomogeneous medium. At non-zero frequencies, both the E and H fields will have
longitudinal components, leading to a hybrid mode [119]. The longitudinal components are small
however, and so the dominant mode is referred to as quasi-TEM [120]. The dimensions of the
port are restricted by the occurrence of the first hybrid mode HE1 at the maximum frequency
f max , leading to a maximum dimension Lmax as in Equation (4.31).
Lmax =
c
2 f max e r ,eff
123
(4.31)
According to [121], when W / t ≥ 1 , which is the case for this design, the effective dielectric
constant is approximately
=
e eff
e r +1 e r −1
2
+
2
1
1 + 12 t
(4.32)
W
Clearly, it is related to the line width; thus, Lmax is not an absolute value but a range. The upper
limit of e eff is e r ; therefore, the lower limit of Lmax is
c
2 f max e r
. On the other hand, the lower
limit of e eff and hence the upper limit of Lmax happens at the minimum line width, in this case,
the 50 Ohm delay line will be the narrowest structure.
Equation (4.32) is only an approximation; another more accurate way is to use the
LineCalc tool in ADS. The interface is shown in Figure 4.2. The Rogers 3003 board information
has been filled in. At f max = 40 GHz , the effective dielectric constant is calculated on the right
box as K _ Eff = 2.454 . Substituting this value into Equation (4.31), the upper limit of Lmax is
2.39. A similar calculation has been performed for other board materials. It must be emphasized
that the width obtained from the LineCalc is just a reference. The value is not exactly the real
value, although very close, since some non-ideal effects such as the finite ground, radiation, etc.,
are not included in the LineCalc calculation. Whereas the EM simulation will be able to include
all these non-ideal effects and give an accurate result.
124
Figure 4.2: LineCalc in ADS for microstrip line calculation on Rogers 3003.
Looking at the cross section of the microstrip line, not only does the port width affect the
higher order modes, but also the thickness of the substrate. The higher the dielectric thickness,
the lower the cutoff frequency, so that the higher order modes have higher chance to be excited
in a given substrate. Considering that the thinnest option with 5-mil thickness would make the
board too flexible to hold the entire structure on the same plane so as to adversely affect the
performance, the second thinnest thickness of 10-mil has been chosen.
Another restricting factor derives from the antenna design. For tapered slot antenna
design, there is a general rule stating that the approximate optimum range for the effective
125
thickness over wavelength
heff
λ0
, as defined in Equation (4.33), should be in the range of 0.005 to
0.03 in order for the antenna to exhibit standard traveling-wave characteristics [122].
heff
=
λ0
(
) λh
e r −1
(4.33)
0
The parameters and the above two criteria of three Rogers boards have been compared, as
shown in Table 4.1.
Table 4.1: Comparison of three Rogers laminates.
Laminates
RO3003
RO3006
RT6010
Dielectric Constant
er
3
6.15
10.6
Substrate Thickness h
(mil)
10
10
50
heff / λ0
0.0203
0.04
0.0654
Lmax (mm)
2.17~2.39
1.51~1.76
4.35~5.02
2.10~2.12
1.82~1.96
9.06~7.64
2.27~2.43
1.66~1.6
9.52~9.94
Beam Port Width
(mm)
Array Port Width
(mm)
11 beam ports and 9 array ports, and 30 degree steering angle with 6 degree steps have
been adopted to meet the Lmax requirement. The beam port width has been estimated by
calculating the distance between the two nearby beam ports using Matlab; similarly for the array
ports. The port width gradually increases while moving up or down along the beam/array curve
from the center port due to the curvature. The curvature cannot be too large, since the ports at the
edge would be too wide resulting in higher order modes. By tweaking the geometrical
parameters, the contours of the Rotman lens can be adjusted for the optimum port size.
126
From the comparison, RO3003 is the best candidate for this design because the heff / λ0
ratio is within the ( 0.005, 0.03) range; the beam port width is under the Lmax limit; and the array
port width meets the requirement except for the upper and lower ports. However, the other two
boards could not meet the criteria.
The Matlab generated plots are listed below. Notice that the Rotman lens has been shifted
right by G to make the x coordinates all greater than 0 for easy modeling in CST MWS. Figure
4.3 shows the Rotman lens contours normalized to the focal length F . Figure 4.4 shows the
actual dimensions in meters. For both figures, the green dots stand for the beam ports, red dots
stand for the array ports, and the blue dots stand for the antenna array. The antennas were set
λ0 @ 30GHz
2
= 5mm away from each other. The 20-port S-parameters have been calculated. The
geometrical parameters have been further adjusted for better performance. The insertion loss
between the 6th beam port and 5th array port, which are the two ports in the middle, is shown in
Figure 4.5. It is approximately -13 dB. The return loss of the two ports is plotted in Figure 4.6,
where the red dots stand for the beam ports, and blue dots stand for the array ports. Both ports
have good return loss, which is below -8 dB for the entire Ka-band.
127
Figure 4.3: Normalized Rotman lens contours generated in Matlab.
Figure 4.4: The Rotman lens contours generated in Matlab.
128
Figure 4.5: The insertion loss between the 6th beam port and 5th array port.
Figure 4.6: The return loss of the 6th beam port and 5th array port.
129
4.2.4 EM Simulation
The analytical modeling method provided a very fast prototyping. However, it did not
consider cross talk from adjacent ports, the refection from the wall or other ports, the loss from
the actual input ports, also the finite ground effect, and substrate and metal loss, etc. Therefore,
full wave EM simulation is necessary. The CST MWS software has been used. It handles such an
electrically large object better then ADS Momentum in terms of simulation time and accuracy.
The coordinates of the beam and array curves was exported to two .csv files, which were
imported by CST MWS. By filling in the space enclosed by the two curves, the initial Rotman
lens body was formed.
There were several additional components which needed to be added. First of all, the
actual input and output ports using an exponentially tapered structure as an impedance
transformer were added. The length was chosen to be twice the wavelength for wider bandwidth
of the transition. The port width of each port calculated from Matlab was fine-tuned for perfect
attachment to the Rotman lens body without any slot or too much overlap with the nearby ports.
Second, the sidewall was created connecting the beam curve and array curve. Beyond the
edge array ports, some “spillover” power needs to be absorbed at the lens side walls. Some of the
power scattered back from the array port apertures will be incident on the lens sides. It is
therefore important to have good absorption at the sidewalls for a significant range of angles of
incidence [123]. The sidewall has a triangular layout. The dummy ports terminated on the
sidewall were created to absorb the reflected signals, thereby preventing the signals from
bouncing around inside the Rotman lens body. The dimensions of these dummy ports are
restricted by the same rules as the beam and array ports. A total of 12 dummy ports with 6 on the
top and the other 6 at the bottom were adopted to satisfy the port width requirement. To achieve
130
an optimal angle of the dummy port to the incident wave, it should point to the middle of the
beam/array contour [48].
Lastly, the 50 Ohm transmission lines with the calculated length Wi , i = 1...9 were
attached to the end of the array ports to ensure path length equality so that the design equations
are valid. The lines are meandered in order to achieve the desired different lengths and to end at
the antenna positions calculated in Matlab for future connection with the antenna array. The bent
part was actually the half of a sine wave with a function of a sin ( bx ) , with the purpose of
obtaining the exact length easily. By adjusting a and b , the length of the bend can be obtained
as desired. The 50 Ohm line width was 0.61 mm at the center frequency of 33.25 GHz from the
LineCalc tool in ADS. However, the EM simulation demonstrated the width should be 0.58 mm .
In addition, 50 Ohm transmission lines were also added to the beam ports to spread out
the ports and make the inputs at the same plane for future assembly. Notice that the beam port
distance is not evenly distributed; the purpose is to perform certain measurements. The details
will be discussed in the next session. The length here does not matter because only the relative
phase between the array ports matters, which is determined by the Rotman lens contour and the
length of the delay lines at the array ports. The top and bottom dummy ports were extended and
ended at the same planes as well; the length does not matter due to the same reason.
The modeling process was not straightforward due to the curvature, fixed delay line
length, and irregular coordinates, etc. Therefore, considerable calculation has been involved to
ensure that the geometry is correct, and the structure was made as parametric as possible to
simplify the drawing and tuning process. A long list of parameters has been built, some of them
were defined by equations involving other parameters. This approach significantly improves the
modeling efficiency and accuracy. The final Rotman lens structure drawn in CST MWS is shown
131
in Figure 4.7. The waveguide port was adopted for more precise result. The port numbers are
marked on the picture. There are 20 input/output ports (port 1 to 20), and 12 dummy ports (port
21 to 32). The large number of ports resulted in a considerably long simulation time.
Figure 4.7: The Rotman lens in CST MWS.
In general, the size of the port is a very important consideration. On one hand, the port
needs to be large enough to enclose a significant portion of the microstrip line’s fundamental
quasi-TEM mode. On the other hand, the port size should not be chosen unnecessarily large
because this may cause higher order waveguide modes to propagate in the port. The larger the
port, the lower the cut-off frequency of these modes. Since the higher order modes are somewhat
artificial, they should not be considered in the simulation. Therefore, the port size should be
chosen small enough that the higher order modes cannot propagate, and only one (fundamental)
132
mode should be chosen at the port. On the other hand, choosing a port size too small will cause
degradation of the S-parameter’s accuracy or even instabilities of the transient solver. As a rule,
the size of the port is determined by the so-called extension factor k , according to Figure 4.8.
Figure 4.8: Wave port size.
Its optimal value varies over a range from 5 to 10 depending on the ratio W
h
, on the substrate
permittivity, and on the frequency range (because of frequency dispersion of the fundamental
Quasi-TEM mode). The size of the port can be briefly verified by visualization of the E and/or H
field of the port mode [124]. In this design, k = 8 was chosen for the beam ports, and k = 7 for
the array ports due to tighter distance. The E-field of the port mode for the first beam port (port 1)
and array port (port 12) are shown in Figure 4.9 and Figure 4.10, respectively. Both ports indeed
enclose a significant portion of the line’s field, and the field distribution is quasi-TEM mode. In
addition, the impedance calculated automatically is close to 50 Ohm.
133
Figure 4.9: E-field of the port 1 mode at 33.25 GHz.
Figure 4.10: E-field of the port 12 mode at 33.25 GHz.
The frequency domain solver was utilized in preference over time domain solver, because
the time domain solver was significantly slower than the frequency domain solver for this large
structure. The scalar plot of the absolute E-field at 26 GHz, 33.25 GHz, and 40 GHz with the
input of the top beam port 1 is shown in Figure 4.11, Figure 4.12, and Figure 4.13, respectively.
134
Figure 4.14 shows the vector plot of the E-field at 33.35 GHz with the input of the middle beam
port 6. The field plots indicate that the propagation mode is quasi-TEM. The energy fed through
one input port spreads out to other ports. The color of the scalar E-field plots implies the field
strength, from which one could tell the energy distribution. Figure 4.13 demonstrates this in
more obvious fashion than the other two figures. It is clear that the energy flow direction is
consistent with the input port direction; the wave spreads out like a ripple; most of the energy
flows to the array ports at the opposite side, while some energy flows to the adjacent ports due to
coupling and dummy ports. For the vector E-field, both color and arrow density indicates the
field strength. Similar field distribution behavior can be seen in Figure 4.14, and the field is
symmetrical around the X axis.
Figure 4.11: The E-field of the Rotman lens at 26 GHz with port 1 as input.
135
Figure 4.12: The E-field of the Rotman lens at 33.25 GHz with port 1 as input.
Figure 4.13: The E-field of the Rotman lens at 40 GHz with port 1 as input.
136
Figure 4.14: The E-field of the Rotman lens at 33.25 GHz with port 6 as input.
The 32-port S-parameter has been imported into ADS for post processing. A 32-port data
item has been placed and pointed to the touchstone .s32p file, and 32 terminations have been
added. The ADS schematic is shown in Figure 4.15.
137
Figure 4.15: Post processing in ADS.
The phase of the array ports relative to different input beam ports are shown in Figure
4.16. Since the Rotman lens is symmetrical, only the results from the top half of the input beam
138
ports are plotted. It is obvious that the phase difference of the adjacent array ports gradually
increases while the input port moves from center to the edge. The phase difference from the
center input (port 6) is 0 degrees, demonstrating that the Rotman lens contours and delay lines
are properly designed.
Figure 4.16: The phase of the array ports relative to different input beam ports from CST simulation.
Next, the phase difference in each plot from each input port was averaged. Recall the
relationship between the steering angle and the phase difference as discussed before,
Φ = −2π f
nd
0.005
sin θ 0 = −2π f
sin θ 0
c
c
139
(4.34)
where Φ is the phase difference, and θ 0 is the steering angle. Since the phase Φ in ADS restarts
from -180 degrees whenever it reaches 180 degrees, therefore n = 1 in this case. The steering
angle could be estimated by Equation (4.35). A negative value means clockwise.
 3 ×1010 Φ 

 πf

θ 0 = − arcsin 
(4.35)
The estimated steering angle plots are shown in Figure 4.17. The negative sign was
removed for these plots. The spikes can be ignored, since they were created by the periodic -180
to 180 degrees switchover. The steering angle is 0 degrees for the center port, then increases with
6 degree steps moving from center to edge input beam ports. The steering angle variation with
frequency degrades when the angle increases.
Figure 4.17: Estimated steering angle from CST simulation.
The insertion loss plots for the top half odd number input ports are shown in Figure 4.18.
The insertion loss is similar for all the input ports. It is about -15 dB over the entire Ka-band,
which is 2 to 3 dB lower than the previous Matlab result. However, this is expected because the
140
EM simulation accounts for all the non-ideal effects as listed before: finite ground, coupling,
taper, radiation, metal loss, etc. and dummy ports absorb some power as well.
Figure 4.18: The insertion loss for certain ports from CST simulation.
The return loss for beam, array, and dummy ports is shown in Figure 4.19. Again, only
the result for half of the ports is displayed due to symmetry. The return loss is in reasonably good
range, which is < −8dB for all of the ports over the entire Ka-band. The main reason for the
discrepancy between the EM simulation and the Matlab calculation is the non-ideal impedance
transformer: the taper. The longer the taper, the smoother the transition, leading to better return
loss. The effective electrical length is longer at higher frequency than that at lower frequency;
therefore, the return loss improves as the frequency increases.
The simulation results are reasonable; consequently, the next step is to make necessary
changes for future assembly and measurement.
141
Figure 4.19: The return loss for certain ports from CST simulation.
4.3
Design of Ka-Band Antipodal Vivaldi Antenna Array
A visiting student Zhi Yao was the co-designer of this antenna array, and the co-author of
this section.
As stated before, the unbalanced antipodal Vivaldi antenna has been adopted, since a
balanced configuration requires a 3-layer board, which would give rise to integration difficulty
with the Rotman lens on a 2-layer board. Although degraded cross-polarization is the price to
pay, it is not our main concern.
The general configuration of the antipodal Vivaldi antenna is shown in Figure 4.20. The
top side of the board is etched to give a 50 Ohm microstrip feed line which is then flared to
produce one half of a conventional tapered slot of the Vivaldi. On the bottom side, the ground
plane is reduced to give a 50 Ohm twin line. This is then flared in the opposite direction to the
142
top. They are like wings on opposite sides of the substrate. With the gradual transition from a
microstrip line to a twin line, the unbalanced feed line is changed and transformed into a
balanced tapered slot patch structure. The energy in the traveling wave is bounded to the
conductor region formed by the twin lines and progressively radiates into free space as the slot
separation increases [116]. The smooth microstrip-to-twin line-to tapered slot transition has a
very wide bandwidth capacity and therefore the ultra-wide bandwidth potential of the antenna
element can be realized [115].
In general, the electrical properties of antennas are characterized by input impedance,
efficiency, gain, effective area, radiation pattern, and polarization properties [125]. In this design,
the primary performance metrices are the beam width, gain, and return loss. Since the desired
steering angle of the antenna array is ±30 , as designed in Rotman lens, the half power beam
width (HPBW) of the individual antenna element should be at least 60 .
The configuration of the antipodal Vivaldi antenna is flexible. The ground transition
contour could be a segment of a circle, an ellipse, an exponential curve, or the combination. The
profile of the taper slot was chosen to be elliptical. Because of the different functions of the
transition part and the flared tapered slot, it is effective to consider the two parts seperately; that
is to say, to modify the dimensions of the ground on the left side to obtain good transition and
thus good matching, and modify the flared tapered slot on the right side to obtain good radiation
characteristics. The dimensions of the antenna element are marked in Figure 4.20. D 2 is the
length of the ground before transition, D1 is the length of the twin line, S is the width of the
twin line, and W is the total width of the antenna, which is 5 mm as restricted by the Rotman
lens design. The flared tapered slot is comprised of a quarter of an ellipse and a straight line
extension in the y direction. The major axis lengh of the quarter elipse is 2La , while the length
143
of the minor axis is 2Lb . The length of the extension is W / 2 − ( Rb _ trans − Lb) − s . The ground
plane transition curve is also a quarter of an ellipse, with the major axis length of 2 Ra _ tran ,
and the minor axis length of 2 Rb _ tran . There is another quarter of ellipse at the inner side of
the taper, with the length of the minor axis of 2ra . The slot ellipse does not start right after the
twin line; the parameter d is here to describe the distance between the end of the twin line and
the beginning of the ellipse.
Figure 4.20: The schematic of a the Antipodal Vivaldi antenna with dimensions defined.
The analytical equations for the tapered slot on the top side are the following equations.
=
Lb ratio− Lb ( Rb−trans + s )
La = ELb
(4.38)
s
2
(4.39)
z=0
π
2
(4.37)
=
x La sin θ − La
=
y Lb cos t + Lb −
where
(4.36)
≤θ ≤π .
144
(4.40)
CST MWS has been selected as well for this EM simulation. With the help of the above
parameters, the model has been built efficiently, as shown in Figure 4.21. The same board,
Rogers 3003, has been used for this antenna array.
Figure 4.21: The modeling of the Vivaldi antenna in CST MWS, viewing in different angle.
145
A thick dielectric slab has been added to the end of the antenna. The main purpose of that
is to improve the performance at the lower frequencies. The antenna array spacing should not
significantly exceed half of the wavelength in order to prevent the grating lobes, hence the width
of the antenna is limited. Due to this width restriction, the antenna actually works better at higher
frequencies. To improve the performance at lower frequencies, one direct way is to change the
media where the wave is travelling into. By adding the thick substrate, the e r value is increased
compared to the original media which is air. Therefore, the wave propagation velocity is
decreased, so as the effective wavelength, hence the effective resonant frequency increases.
Since the antenna works better at higher frequencies, boosting up the effective resonant
frequency improves the performance at lower frequencies. In addition, the original HPBW in H
plane was too wide at low frequencies, which means the radiation was diffracting very quickly in
the vertical direction. It resulted in low total gain at low frequencies. By adding the thick
dielectric slab, the effective wavelength and hence the diffraction is reduced. Therefore the total
gain at low frequencies can be improved.
The simulated return loss, half power beam width, and gain for a single Vivaldi antenna
element are shown in Figure 4.22, Figure 4.23, and Figure 4.24, respectively. The antenna is
matched very well across the entire Ka-band. The beam width is greater than 60 degrees. The
gain is reasonably good. The far field radiation patterns at 26.5 GHz, 33.25 GHz, and 40 GHz are
shown in Figure 4.25 to Figure 4.27.
146
Figure 4.22: Simulated return loss of a single Vivaldi antenna.
Figure 4.23: Simulated half power beam width of a single Vivaldi antenna.
147
Figure 4.24: Simulated gain of a single Vivaldi antenna.
Figure 4.25: The radiation pattern of the single Vivaldi antenna at frequency 26.5 GHz.
148
Figure 4.26: The radiation pattern of the single Vivaldi antenna at frequency 33.25 GHz.
Figure 4.27: The radiation pattern of the single Vivaldi antenna at frequency 40 GHz.
149
Construct a 1× 9 Vivaldi antenna array from the single element, which is shown in Figure
4.28. The far field radiation patterns are shown in Figure 4.29 to Figure 4.31. From the result,
an 1 × 9 antipodal Vivaldi antenna array that functions well for beam steering throughout the
Ka-band is finally obtained.
Figure 4.28: The Vivaldi antenna array.
150
Figure 4.29: The radiation pattern of the Vivaldi antenna array at frequency 26.5 GHz.
Figure 4.30: The radiation pattern of the Vivaldi antenna array at frequency 33.25 GHz.
151
Figure 4.31: The radiation pattern of the Vivaldi antenna array at frequency 40 GHz
4.4
Preparation for Fabrication, Assembly, and Measurement
Originally, the fabrication plan includes the fabrication of a Rotman lens, a Rotman lens
with an antenna array attached, and some test structures. However, some necessary changes were
made to the plan or the structure itself along the way, which will be discussed in this section.
4.4.1 Connectors and CPW to MS Transition
First of all, the SMA connectors are needed to connect to the input/output ports to feed or
receive a signal. Considering that there will be multiple copies fabricated, each board will have
tens of connectors; therefore, the connectors that could be easily assembled and disassembled
will be very convenient and a huge budget saver. The 2.92 mm SMA end launch connector from
Southwest Microwave, Inc. is the best candidate. This connector is screwed on, and the only
152
place that needs solder is at the tiny coaxial pin; thus, it is very convenient to use. However, the
size is not very compact. The width is 0.5 inch (12.7 mm) which is larger than the original beam
ports spacing. Fortunately, there is more freedom for beam ports, since they could be spread out
according to the connector size without dimensional constraint. Therefore, the distance between
the beam ports was expanded to 14 mm to give a little margin. The 2.92 mm SMA works only up
to 40 GHz. Consewquently, it will have an impact on the measurement at the upper band edge,
which will be discussed later. The 2.4 mm connector which works up to 50 GHz is a better
choice; however, the 2.92 mm connector has been selected due to budgetary considerations.
For the array ports, the spacing is fixed at 5 mm. Therefore, the compact SGMC
Microwave 2.92 mm SMA PCB mount connector 362-35-00-000 has been selected. This is the
most compact 2.92 mm SMA PCB mount connector that we could find, although the maximum
width is 0.296 inch (7.5 mm) which is still greater than the original antenna array spacing.
Therefore, the measurement was broken down into even and odd channel measurements; each
measurement would measure one half of the array ports with the other half terminated. This way,
the connector distance could be doubled as 10 mm, which would provide enough margin. The
tradeoff is that an additional Rotman lens needs to be fabricated, which would increase the cost.
Both connectors have the grounded coplanar GSG configuration. Although it is an
unbalanced structure, a certain transition involving vias from grounded coplanar waveguide
(GCPW) to microstrip (MS) line is still needed because the ground changes from the top to the
bottom. There are various ways to design the transition; a comparison has been made for four
different CPW to MS transitions in [126]. Inspired from the paper, the transition for the
Southwest end launch connector is designed as shown in Figure 4.32. The large holes are the
screw holes, and also serve as part of the transition. An exponential taper was used. Formulas for
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grounded coplanar waveguide were used to compute the necessary gap width at each point in the
transition taper fields at sharp corners. A length of straight CPW was added prior to the field and
impedance matching taper, allowing a true coplanar waveguide mode to be set up before the
transition [126]. The simulated E-field and insertion loss of the transition for beam ports are
shown in Figure 4.33. Figure 4.34 shows the results for array ports. The insertion loss for both
cases is smaller than 1 dB, which is reasonably good.
Figure 4.32: The GCPW to MS transition for beam ports (left) and array ports (right).
Figure 4.33: The E-field and insertion loss of GCPW to MS transition for beam ports
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Figure 4.34: The E-field and insertion loss of GCPW to MS transition for array ports
4.4.2 Terminations
The main purpose of the dummy ports is to absorb the reflected signal inside the Rotman
lens body to prevent multi-reelection. Therefore, a 50 Ohm termination on board could do the
job, instead of the expensive connectors. In addition, the even/odd channel strategy would
require half of the array ports terminated on board.
The most simple way to create a 50 Ohm termination is to connect the output to a 50
Ohm resistor on the top metal, and then ground it by a via. This is absolutely fine with low
frequency application, whereas for this design at Ka-band, the parasitics generated by the resistor,
the via, and the via pad could not be ignored, and need to be considered carefully.
To start with, a resistor with premium high frequency performance is required. To reduce
the size and consequently the parasitics, small size is preferred. On the other hand, the size
cannot be too small to hand solder. The 02016 size has therefore been selected. The typical high
frequency resistor equivalent circuit is shown in Figure 4.35, where C is the internal shunt
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capacitance, L is the internal inductance, R is the resistance. Lc is the external connection
inductance, and Cg is the external capacitance to ground.
Figure 4.35: The typical high frequency resistor equivalent circuit
Here, only the internal components affect the resistor selection, since all the 02016
resistors have the same size and the same external connection was assumed. The complex
impedance of the chip resistor is given by (4.41).
XL
R + jω ( L − R 2C − L2Cω 2 )
R
=
Z=R
1 + C ( R 2C − 2 L ) ω 2 + L2C 2ω 4
1+j R
XC
1+j
R
The resistor is purely resistive when=
(4.41)
L
= Z 0 . The smaller the LC product, the
C
greater the frequency range over which the resistor looks approximately resistive. The data sheet
of Vishay Sfernice 50 GHz thin film microwave resistors indicates the following frequency
dependent performance in Figure 4.36. Among the resistors with different values, the 25 Ohm
resistor gives the best performance at higher frequency. The 50 Ohm resistor has slightly worse
performance, but still performs reasonably well. However, to realize a 50 Ohm termination, two
25 Ohm resistors need to be placed in series, which would lead to bigger footprint, more
parasitics, and double the cost; thus the advantage of the 25 Ohm is no longer valid. Therefore, a
50 Ohm resistor was the final choice.
156
Figure 4.36: Impedance curve of a Vashay Sternice 02016 chip resistor.
Simulations have been performed using CST MWS and ADS Momentum for the entire
termination including a via. The via was not too thin which would generate high parasitic
inductance and create fabrication difficulty, nor too large which would generate high parasitic
capacitance. The model in CST MWS is shown in Figure 4.37. The via pad is about the same
size as the resistor Pad. Since the CST MWS EM simulation cannot include the circuit model,
the EM/Circuit co-simulation feature has been utilized. It is a similar concept to that as used in
ADS, putting layout component into schematic. The interface is shown in Figure 4.38. The
layout lookalike model links to the EM simulation result. Ports 2 and 3 which are not visible in
Figure 4.37, are lumped ports located at the edges of the resistor pad. An ideal 50 Ohm resistor
was inserted in between port 2 and 3, since the performance for the real 50 Ohm resistor is nearly
ideal. The simulated return loss is shown in Figure 4.39. The result is very good at lower band,
worse but still reasonable at upper band.
157
Figure 4.37: The 50 Ohm termination in CST MWS.
Figure 4.38: EM/Circuit co-simulation in CST MWS.
158
Figure 4.39: The simulated return loss of the 50 Ohm termination in CST MWS.
An identical simulation has been performed in ADS for comparison. The model in
Momentum and the simulated return loss after connecting 50 Ohms between ports 2 and 3 in
ADS schematic are shown in Figure 4.40 and Figure 4.41, respectively. Comparing the
simulation results from CST MWS in Figure 4.39 and that from ADS Momentum in Figure 4.41,
the result from ADS is a little better than that from CST, especially at higher frequencies.
However, the difference is trivial.
Figure 4.40: The 50 Ohm termination in ADS Momentum.
159
Figure 4.41: The simulated return loss of the 50 Ohm termination in ADS.
Other configurations have also been considered. Two 100 Ohm resistors would be
another solution to realize a 50 Ohm termination. For example, two 100 Ohm resistors with one
via; two 100 Ohm resistors with two vias to reduce the parasitic inductance. These three
configurations in conjunction with the Southwest end launch connectors as shown in Figure 4.42
have been fabricated for comparison.
Figure 4.42: Three configurations of 50 Ohm termination.
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4.4.3 Absorbing Material, Thick Substrate Block, and Metal Block
From the simulation result of the above terminations, the return loss is not perfect at high
frequency. To improve this, and in addition, to reduce the coupling between the ports, some
absorbing material can be applied on top of the transmission line.
An absorbing material is usually ultra-thin, flexible, magnetically loaded, silicone rubber
material with high permittivity and permeability, and is electrically non-conductive. It is
engineered to reduce or eliminate surface currents, cavity resonances, coupling, and generally
dampen reflections. Emerson and Cuming ECCOSORB® BSR-1 has been found to be quite
effective at millimeter wave frequencies. According to the data sheet, it could provide 149
dB/cm attenuation at 18 GHz when the incident wave is normal to the surface, where the length
is the absorbing material thickness. For this design, however, most of the energy propagates in
the substrate along the transmission line, only some of the energy radiates in the air or dissipates
through heat. Therefore, the attenuation would not be as intense as on the datasheet.
The absorbing material can be easily cut to different shapes to comply with the Rotman
lens contour and meandered lines. There is an option employing pressure sensitive adhesive
(PSA) to the absorbing material. The absorbing material with PSA could be applied on the
dummy port and sidewall region; nevertheless, this option is not suitable for other ports since the
input beam ports and output array ports would be switched during the measurement, and hence
the absorbing material has to be placed differently.
4.4.4 Final Layout
In all, a Rotman lens with antenna array, a Rotman lens with even array ports, a Rotman
lens with odd array ports, and some test structures including a back-to-back Southwest
connectors, back-to-back SGMC Microwave PCB mount connectors, and three 50 Ohm
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termination configurations have been fabricated. The layout tool is Protel. The final layout is
shown in Figure 4.43. The list of components and minimum number is shown in Table 4.2.
Figure 4.43: Final Layout for Rotman lens and test structures.
162
Table 4.2: Component list.
Components
Southwest 2.92 mm SMA end
launch connector
SGMC Microwave 2.92 mm
SMA PCB mount connector
Vishay Sfernice thin film
microwave 50 Ohm resistors
Vishay Sfernice thin film
microwave 100 Ohm resistors
Minimum Number
Comments
11
Can be reused
11
Hard to be reused
46
4
Emerson and Cuming
ECCOSORB® BSR-1
2
Absorbing material
2.92 mm coaxial cable
4.5
2
36 dummy ports, 9 array
ports, 1 test structure
Test structure
12 inch × 12 inch, 1 regular,
1 with PSA
1 input, 1 output
Measurements
Several structures have been measured. In general, two types of the measurements have
been performed. One is the far-field radiation pattern measurement inside the anechoic chamber.
The other one is the 2-port S-parameter measurement.
4.5.1 Assembly
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The board dimension is 10.4 × 15.4 cm2 for both the Rotman lens with even and odd
array ports, and 12.1 × 15.4 cm2 for the Rotman lens with antenna array.
The resistors are too time consuming to hand solder and are very easy to be shorted due
to the small size if applying excessive solder by accident. The best way to solder all the resistors
at once is to use the reflow soldering. First of all, a solder paste which is a sticky mixture of
powdered solder and flux is used to temporarily attach resistors to their contact pads, after which
the entire assembly is positioned in the reflow oven, as shown in Figure 4.44, and is subjected to
controlled heat, which melts the solder, permanently connecting the joint. The reflow oven we
used is the Gold-Flow Model FG-C2 from Automated Production Systems, Inc.
Figure 4.44: Reflow oven.
As mentioned in Section 4.3, a thick substrate block would be attached to the end of the
antenna to improve the low frequency response. Polyvinyl Chloride (PVC) Type I has been
selected and machined into the desired shape. It has dielectric constant 3.19, similar to Rogers
3003; hence, not much discontinuity created.
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The Southwest end launch connector is compatible with any thickness, since it is screwed
in. On the other hand, the SGMC Microwave PCB mount connector has fixed distance of 0.71
inch between the top pins and bottom pin, which is much higher than the substrate thickness of
10 mil. The connector therefore could not be soldered on securely. A metal block with 0.7 inch
thickness has been machined and inserted in between the bottom plane of the board and the
bottom pin of the connector.
The Rotman lens with antenna array after connectors and resistors assembly is shown in
Figure 4.46.
Figure 4.45: The Rotman lens with antenna array after connectors and resistors assembly.
A fixture with the same size as the PCB has been made to hold the board to prevent the
board deformation by the heavy connectors. A slot has been cut in the front to hold the thick
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substrate block in the front. The fixture is attached to the motor to be able to sweep in the E and
H plane, as shown in Figure 4.46. Both normal and PSA applied absorbing material has been
affixed; The large pieces covering the dummy port are PSA applied; the other portion is covered
by small pieces of the regular non-adhesive material.
Figure 4.46: The fixture to hold the board and attach to the motor.
4.5.2 Antenna Radiation Pattern Measurement
The antenna radiation pattern measurement setup consists of an anechoic chamber, an
Agilent 8510B network analyzer, a control computer, a horn antenna, a low noise amplifier
(LNA) , an amplifier (PA), an Agilent E3646A dual output power supply and a HP 6237B triple
output power supply. The block diagram of the measurement setup is shown in Figure 4.47. The
actual lab setup is shown in Figure 4.48.
The anechoic chamber at UC Davis is realized by completely covering all of the chamber
inner surfaces with the ECCOSORB® VHP-4 pyramidal absorbers to eliminate the reflection
from various surfaces. This serves to provide a nonreflecting environment similar to free space.
166
This particular pyramidal absorber can reduce the reflection to at least the –30 dB level above 3
GHz according to the data sheet. The shape of this anechoic chamber is tapered. The diverging
geometry effectively avoids wide-angle specular reflection from the side walls, floor and ceiling,
which limit the anechoic performance of a rectangular chamber at low frequencies [127].
The signal flow in the measurement is actually backwards, that is the Vivaldi antenna
array acts as a receive antenna array. Due to the reciprocity of the passive Rotman lens with the
antenna array, the radiation pattern could be obtained both ways. The port 1 on the Agilent
8510B network analyzer is connected to the horn antenna to inject the signal into the chamber.
The Vivaldi antenna array receives the signal, which is amplified by the 18 – 40 GHz Miteq JS418004000-30-8P LNA with output P1dB of 8 dBm. The purpose of putting the LNA at the first
stage after the antenna is to boost the system signal to noise ratio, and increase the dynamic
range. An Agilent E3646A dual output power supply is put outside of the chamber and provides
the DC bias for the LNA through a long BNC cable. The LNA is followed by a 17 – 40 GHz
Hittite HMC283LM1 SMT medium power GaAs MMIC amplifier with 15~20 dB gain and 21
dBm saturated power. It amplifies the signal further, which is then connected to the port 2 on the
network analyzer to complete the loop. The PA is biased by an HP 6237B triple output power
supply inside the chamber. The VGS is required to be negative. The Labview program on the
computer communicates with the network analyzer and the motor through GPIB cable. The
motor with the antenna array attached is controlled to sweep in the E and H plane; hence, the
received signal level changes according to the radiation pattern. The S21 data for each frequency
and each angle are recorded into a text file. The radiation pattern can be obtained via some post
processing. The radiation patterns at 27 GHz, 30 GHz, and 37 GHz are shown in, Figure 4.49,
Figure 4.50, and Figure 4.51, respectively.
167
Figure 4.47: Antenna radiation pattern measurement setup block diagram, using network analyzer.
Figure 4.48: Antenna radiation pattern measurement actual setup.
168
Figure 4.49: The measured E-plane far field radiation patterns at 27 GHz.
Figure 4.50: The measured E-plane far field radiation pattern at 30 GHz.
169
Figure 4.51: The measured E-plane far field radiation pattern at 37 GHz.
From the plots, the desired steering angle of 30 and 6 steps are met for the entire band.
The pattern is very clear at 30 GHz. The reason is that the spacing of the antenna is
λ0 @ 30GHz
2
= 5mm , which is perfect for 30 GHz, while not optimum for other frequencies.
There are grating lobes which emerged at 37 GHz, especially for the edge ports, because the
spacing is greater than the one-half wavelength criterion at frequencies above 30 GHz. The
higher the frequency, the shorter the wavelength, and the higher chance the grating lobes would
appear. Only half of the radiation patterns at 37 GHz are displayed, because the grating lobes
make the plots unclear; moreover, the structure is perfectly symmetrical. The readings from the
network analyzer above 37 GHz fluctuated significantly, therefore no obvious pattern could be
extracted. The possible reasons are the long 2.92 mm coaxial cable introduces higher loss at
upper band edge; the highest working frequency for the cables, the connectors and the amplifiers
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are 40 GHz. These losses were added on to the loss introduced by the Rotman lens, which is
already very high. Therefore, the final received signal level is around the noise floor at the
network analyzer. Due to the limitation of the instrument, the upper band could not be measured
at this point.
4.5.3 S-parameter Measurement
The S-parameter measurement setup is straightforward. Only the Agilent E8361C
performance network analyzer (PNA) is needed. Then the DUT is connected in between the port
1 and port 2, as shown in Figure 4.52. The measurement results were saved in .s2p files, which
were imported into ADS to do post processing.
Figure 4.52: 2-port S-parameter measurement setup.
The measurement started with the Rotman lens with even or odd output array ports. The
input and output ports were manually switched. Although due to the symmetry of the structure,
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only 6 (beam ports) ×9 (array ports)=54 measurements are necessary, 11×9=99 measurements
have still been performed for in case that some connectors might not make good contact. An
additional 54 measurements with absorbing material, in which the input ports are the bottom half
beam ports (port 6 to port 11), have been performed.
For one input beam port, the results from the output even and odd array ports were
integrated into one schematic, as shown in Figure 4.53.
Figure 4.53: Post processing in ADS for beam port 6.
The results with absorbing material will be presented. Firstly, the results of the middle
beam port (port 6) were examined. The return loss for beam port 6 from the nine measurements
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is shown in Figure 4.54. In theory, the return loss from the 9 measurements should be the same.
However, the results divide into two groups; one group is from the board with even array ports,
the other is from the board with odd array ports. The possible reason is that the measurements for
the two boards were performed in separate days, the Southwest connectors are reused for the
second measured board; hence, the tiny pin might be deformed during the disassembly, which
might introduce some variance. Also, the calibration was done twice, which might cause
additional variation.
The return loss for all the array ports is shown in Figure 4.55. Comparing Figure 4.54 and
Figure 4.55, it is obvious that the SGMC PCB mount connectors used on the array ports have
much worse performance than the Southwest end launch connectors, especially at the upper band.
This is the main reason causing the performance degradation at the higher frequencies, which
could be seen in the following sections.
The insertion loss between the 9 array ports and the middle beam port 6 is shown in
Figure 4.56. The fluctuation is larger and the loss is higher at the upper band. The main cause is
the SGMC PCB mount connectors.
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Figure 4.54: The measured return loss of beam port 6, nine times.
Figure 4.55: The measured return loss of the array ports.
174
Figure 4.56: The measured insertion loss between the 9 array ports and the beam port 6.
The average phase difference was calculated from the measured S-parameters, yielding
the steering angle as shown in Figure 4.57. Ignoring the spikes generated by ADS phase
wrapping at ±180 , the steering angle is around 1 , which is very close to the desired 0 degree
scanning.
Figure 4.57: The steering angle calculated from the measured S-parameter with the input of beam port 6.
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To demonstrate the effect of absorbing material, the same measurements have been
performed without any absorbing material. The comparison of the measured results with or
without absorbing material, along with the simulation results are shown in Figure 4.58 and
Figure 4.59. The red curve stands for the measurement result with absorbing material, while the
green curves stands for that without absorbing material, and the blue curve is the simulated result
without connectors.
Figure 4.58: The comparison of the measured return loss with or without absorbing material, and the simulated result.
Figure 4.59: The comparison of the measured insertion loss with or without absorbing material, and the simulated result.
176
From the above results, the absorbing material only helps a little on the loss and
fluctuation caused by the Rotman lens itself, but not on that caused by the connectors.
Moving on to the edge beam port 11, the measured return loss and insertion loss are
shown in Figure 4.60 and Figure 4.61, respectively. The return loss is divided into two groups as
well, which represent the board with odd and even array ports. However, comparing Figure 4.60
with Figure 4.54, the behaviors of the two groups are opposite, which proves that the difference
is not from the calibration, but from the connectors.
Taking another look at the extreme case, the deep green curve, in Figure 4.61 and Figure
4.56, the curve represents the insertion loss from beam port 6 to array port 7 in Figure 4.61, and
the insertion loss from beam port 11 to array port 7 in Figure 4.56. Both curves are very similar
although the input changed. The only reason is that the effect of the connector at port 7 is
overriding the other effects. This is another proof that the SGMC PCB mount connectors are
playing a strong role here. Now looking another green curve in Figure 4.55, as expected, the
position of the peaks of the return loss matches the dips of the insertion loss.
Figure 4.60: The measured return loss of beam port 11, nine times.
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Figure 4.61: The measured insertion loss between the 9 array ports and the beam port 11.
The calculated steering angles from the half of the beam ports (port 6 to 11) from the
measured S-parameters are shown in Figure 4.62. The steering angle has a certain deviation from
what is expected. Again, the connectors might be a strong reason.
Figure 4.62: The calculated steering angles from the beam ports 6 to 11.
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Next, the test structures shown in Figure 4.63 have been measured. There are two
identical test boards, which contain the back-to-back Southwest connectors, back-to-back SGMC
Microwave PCB mount connectors, and three 50 Ohm termination configurations. The
Southwest connectors were reused again after disassembly from the Rotman lens boards.
Figure 4.63: The test structures.
The insertion loss and return loss of the Southwest end launch connector back to back
structure are shown in Figure 4.64 and Figure 4.65, respectively. The two boards were measured
on separate days as well.
179
Figure 4.64: The measured insertion loss of the Southwest connector back to back structure.
Figure 4.65: The measured return loss of the Southwest connector back to back structure.
The insertion loss for board 1 is below 2 dB, meaning the loss from the single connector
is below 1 dB. However, the result is not flat for board 2. From the return loss plot, it can be
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confirmed that the connector at the port 2 on the board 2 has some degradation at the upper band
edge.
The insertion loss and return loss of the SGMC PCB mount connector back to back
structure are shown in Figure 4.66 and Figure 4.67, respectively. Both boards have been
measured twice on separate days. From the results, the same board has similar performance on
different days, which again proves that the calibration is not the main reason of the deviation
between the Rotman lens with odd and even array ports, but the connector itself. The
performance of this SGMC connector is much worse than that of the Southwest connector. It has
too much loss and fluctuation.
Figure 4.66: The measured insertion loss of the SGMC connector back to back structure.
181
Figure 4.67: The measured return loss of the SGMC connector back to back structure.
The measured return loss of the three termination configurations, along with the
simulation result for the termination with one 50 Ohm resistor are shown in Figure 4.68.
Figure 4.68: The measured return loss of the three termination configurations and the simulated result for 1 50 Ohm
resister termination.
182
The simulation and measured results for the 50 Ohm termination are at the same level.
Surprisingly, the terminations with two 100 Ohm resistors are slightly better than the termination
with a single 50 Ohm resistor. However, the difference generated by the connectors might cover
the difference generated by the resistors. With the help of the absorbing material, the difference
would be less significant.
4.6
Summary
In this chapter, a Ka-band phased array based on the Rotman lens and Vivaldi antenna
array has been successfully designed, fabricated, and measured. The different CPW to MS
transitions, and the 50 Ohm terminations have been analyzed. The analytical S-parameter
modeling of the Rotman Lens using Matlab enables the fast prototyping. The Vivaldi antenna
was employed to ensure the broadband operation. The phased array has 11 inputs and 9 outputs
with the dimensions of 10.4 × 15.4 cm2. It can scan over the ±30 range, with 6 steps from 27
GHz to 37 GHz according to the radiation pattern measurement. Due to the instrument limitation,
the pattern between 37 GHz and 40 GHz could not be measured. However, the predicted steering
angle calculated from the measured S-parameters indicates the array could work at that range.
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Chapter 5
5.1
Conclusion and Future Work
Conclusion
In this dissertation, an investigation into novel wide band CMOS-based microwave and
millimeter wave technologies has been performed in order to develop high performance phased
array antenna based transmitter systems for applications including plasma diagnostics, radar, and
communication systems.
This dissertation has demonstrated the design, implementation, and characterization of
the individual building blocks for a Ka-Band (26.5 - 40 GHz) Phased Array Antenna (PAA)
system, which includes a wideband feedback amplifier using the 0.18 μm CMOS process, and a
true time delay wideband Rotman lens integrated with a wideband antipodal Vivaldi antenna
array on PCB.
In the wideband CMOS amplifier design, the biggest challenge is to overcome the
inherent 0.18 µm CMOS process limitations, and make the amplifier work up to a frequency
corresponding to 2/3 of its f max . A frequency controlled feedback with a parasitic cancellation
technique has been employed to overcome the limitation, thereby boosting the high-frequency
response. Another challenge is to create a flat gain response, since parasitic cancellation is a
narrow band operation. A gain response superposition concept has been adopted to obtain a flat
gain response by creating two resonances at lower and upper band using multiple stages.
Significant EM simulation in ADS Momentum has been involved in the design and layout
process to predict the performance at high frequencies. This amplifier achieves a peak gain of
23.3 dB at 35.6 GHz, maintaining > 16 dB gain, < -7.2 dB input return loss, and < -11.2 dB
output return loss over the entire Ka-Band. The maximum output power is 10.1 dBm, with an
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output power of 6.1 dBm at the 1 dB compression point, while consuming 109.9 mW under 1.2
V supply at 33.25 GHz. The chip area is 1× 0.55 mm2 with a core area of 0.79 × 0.365 mm2. This
is believed to be the first wideband amplifier operating over the entire Ka-Band using 0.18 μm
CMOS technology. This design indicates that the frequency limitation of CMOS technology for
amplifier design can be overcome by appropriate techniques, which can be applied to more
advanced CMOS technology for the V-band MIR system on DIII-D
The response is not as flat as simulated with a high peak observed at the upper band. This
is attributed to the fact that the foundry provided model is only accurate up to 20 GHz. The
parasitic cancellation approach is highly dependent on the model accuracy to provide resonance
at right frequencies.
The true time delay device is another component in the phased array antenna system to
enable wideband beam forming, including beam steering and beam shaping. Beam steering has
been emphasized in this dissertation. An 11-in, 9-out microstrip Rotman Lens has been designed
and implemented. The lens design equations have been re-derived and implemented by Matlab
code. In addition, a novel analytical modeling which treats the port edge as a continuous array of
point sources has been developed and implemented using Matlab as well. The S-parameters can
be estimated without running time consuming EM simulation at the initial stage, thereby
enabling fast prototyping. EM simulation has been carried out in CST afterwards to include all
the nonideal effects which is critical for design in the millimeter wave regime. Special attention
has been paid on the port taper design, port width, on-board dummy port termination, and CPWG
to MS transition design. Absorbing material has been applied to further improve the performance.
Due to the physical port size limitation, the measurement has been divided into even and odd
185
channel measurements. The S-parameters have been obtained, post processed, and analyzed. The
steering angle estimated using the measured S-parameters matched the simulation result.
To ensure wideband operation, an antipodal Vivaldi antenna array with unbalanced
microstrip line feed has been designed and integrated with the Rotman Lens on the same Rogers
3003 board. A thick PVC dielectric slab has been added in front of the antenna array to improve
lower frequency performance. CST MWS has been utilized for the EM simulation. In the end,
the far field radiation pattern of the Rotman lens with the antipodal Vivaldi antenna array has
been measured in the UC Davis anechoic chamber. The beam steering with 30° steering angle
and 6° steps over a wide frequency range from 26.5 GHz to 37 GHz has been successfully
demonstrated during the measurements. The measurements were performed only up to 37 GHz
due to the instrument limitations.
The analytical and experimental results of the above designs provide guidance toward the
development of a new PAA system for future use in MIR systems with significantly enhanced
performance.
5.2
Future Work
5.2.1 CMOS Switch
Refer back to the system schematic in Chapter 1. The missing component is the single
pole double throw (SPDT) switch or SPNT which would require only one signal source.
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Figure 5.1: Schematic of the PAA transmitter.
A travelling-wave concept can be employed to realize wideband and low insertion loss.
The SPDT schematic is shown in Figure 5.2 [128], with two equal, but independently biased,
arms. Each arm contains shunt switching FETs in conjunction with quarter wave transformers.
Figure 5.2: Schematic of a SPDT switch using traveling-wave concept [128].
187
During operation, one arm passes the signal (the "on" arm) and the other isolates the
signal (the "off" arm). The FETs in the “off arm” are biased in the “on” state and act as small
shunt resistances. They approximate a short circuit. The FETs in the “on arm” are pinched-off,
and act primarily as shunt capacitances, forming a capacitive loaded transmission line [129]. The
quarter-wave transformer is used to transform the low impedance of the arm into high impedance,
almost like a short to an open, providing perfect isolation between the two arms.
The preliminary simulation has been performed in ADS. The NMOS dimensions are 64
µ m / 0.18 µ m . The simulation result is shown in Figure 5.4. The remaining step is to create the
layout and perform EM simulation.
Figure 5.3: The equivalent circuit model of the off arm and on arm.
188
Figure 5.4: The simulated insertion loss and isolation of the travelling wave SPDT.
Eventually, the SPDT and the amplifier will be integrated into the same die, which will
then be integrated with the Rotman lens PCB using flip chip technique.
5.2.2 CMOS Amplifier
Although the wideband amplifier design in this dissertation has successfully
demonstrated the concept of parasitic cancellation feedback and the gain response superposition,
the performance was not optimum due to the NMOS model inaccuracy. It is necessary to obtain
the accurate model for future design, especially for millimeter wave applications.
The standalone NMOS transistors have been fabricated. However, the calibration kit was
incorrectly designed, resulting in the fact that the probe pad effect could not be de-embedded.
Building a correct calibration kit is required. Then the NMOS transistors could be re-measured.
The same techniques can be applied to the design of the V-band (50 - 75 GHz) wideband
amplifier on 0.13 µ m CMOS process.
189
5.2.3 Rotman Lens with Vivaldi antenna array
The measurement of the radiation pattern could be redone using more advanced network
analyzer with higher dynamic range, so that the upper band performance could be characterized.
The poor performance of the SGMC PCB mount connector has interfered with the Sparameter measurement of the Rotman lens. Connectors with better quality and compact size
need to be searched.
The Rotman lens could be used in other configurations. For example, it could be stacked
to build a 2-D array or combined with a piezoelectric transducer (PET) [30, 31] to enable
continuously beam steering. Multiple ports could be simultaneously illuminated to explore the
possibility of beam shaping.
5.2.4 Alternative True Time Delay Techniques
There are many advantages associated with the Rotman lens, such as wide bandwidth,
low cost, high power handling capability, and low power consumption, etc. However, it could
not realize continuously beam steering, the loss is relatively high, and the structure is somewhat
bulky. For future practical use in an actual MIR system, there exist many possibilities which
could be explored in terms of design improvements and adjustment.
In a true time delay device, the time delay is proportional to the transmission line length,
which might lead to relatively large size. A slow wave transmission line structure is a promising
candidate. There are many slow wave structures which
have been reported, including the
synthetic quasi-TEM transmission lines with gridded ground plane [130, 131]; the slow wave
microstrip structure with periodic ground pattern, which is realized with metal pads etched in the
ground plane connected by thin lines to form a distributed LC network [132]; the left-handed
transmission lines [133, 134].
190
Applying the compact slow wave transmission lines to the existing true time delay
technique, for example, non-linear delay line, switched delay line, the dimensions could be
significantly reduced. In addition, the true time delay device could be realized on a CMOS
process if the size is sufficiently compact.
In a word, with the experience of designing the system at Ka-band, the next step is to
move the working frequency to V-band (50 - 75 GHz) or higher band. Implement the true time
delay phased array system on chip is our ultimate goal.
191
Appendix A
Matlab Codes for Rotman Lens
Design
A.1. Rotman Lens Design Equations and S_parameters modeling
% The codes contain Rotman lens design equations, S-Parameter
% modeling, and plot.
function Rotman2=Rotman_Lens_Epsr_Sparam(f,f1,f2,i,g,alpha,psi,j,k)
epsr=3; %RO3003
%epsr=6.15; %RO3006
%epsr=10.6; %RT6010
lambda0=3e8/(f*1e9);
lambda=lambda0/sqrt(epsr);
%--------substrate thickness
t=0.25e-3; %RO3003 and RO3006 substrate thickness
%t=1.27e-3; %RT6010 substrate thickness
teff=(sqrt(epsr)-1)*t;
ratio=teff/lambda0
%--------Microstip line width
%---RT6010
%W=1.97294e-3; epsr_eff=9.557; %26.5 GHz
%W=2.18783e-3; epsr_eff=9.847; %33.25 GHz
%W=2.35378e-3; epsr_eff=10.026 %40 GHz
%---RO3003
%W=1.337530e-3; epsr_eff=2.563; %33.25 GHz, d=0.5mm
%W=1.382340e-3; epsr_eff=2.607; %40 GHz, d=0.5mm
W=0.619771e-3; epsr_eff=2.454; %40 GHz, d=0.25mm
%---RO3006
%W=0.356413e-3; epsr_eff=4.45; %33.25 GHz, d=0.25mm
%W=0.363401e-3; epsr_eff=4.529; %40 GHz, d=0.25mm
%Calculate Lmax
Lmax=3e8/2/(f2*1e9)/sqrt(epsr_eff)*1e3
Lmax1=3e8/2/(f2*1e9)/sqrt(epsr)*1e3
%Rotman lens design equations
F=i*lambda0;
W0=20e-3;
G=F*g;
a0=cos(alpha*pi/180);
b0=sin(alpha*pi/180);
192
a1=cos(psi*pi/180);
b1=sin(psi*pi/180);
gamma=b1/b0;
beta=1/g;
%Calculate array ports and curve
N=[-4/2*lambda0:1/2*lambda0:4/2*lambda0]; %9 ports
%N=[-4/2*lambda0:1/64*lambda0:4/2*lambda0]; % Calcute the points on the
%array curve
n=N/F;
for l=1:length(n);
%zeta(l)=n(l)*gamma*beta;
A(l)=epsr_eff/epsr*(1-(g-1)^2/(g-a0)^2-1/epsr*(b1/b0)^2*n(l)^2);
B(l)=sqrt(epsr_eff/epsr)*(-2*g-1/epsr*n(l)^2*b1^2*(g-1)/(g-a0)^2+2*g*(g1)/(g-a0)+2/epsr*(b1/b0)^2*n(l)^2)
C(l)=1/epsr*(-n(l)^4*b1^4/4/epsr/(g-a0)^2+g*n(l)^2*b1^2/(g-a0)(b1/b0)^2*n(l)^2);
F1=@(w)A(l)*w^2+B(l)*w+C(l);
w(l)=fzero(F1,0.01)
end
W=w*F+W0;
x2=g+(1/(2*epsr)*b1^2*n.^2+sqrt(epsr_eff/epsr)*(g-1)*w)/(a0-g);
y2=b1/b0*n.*(1/sqrt(epsr)-sqrt(epsr_eff)/epsr*w);
X2=x2*F;
Y2=y2*F;
m2=[x2', y2', w'];
M2=[X2', Y2', W'];
M2_cst=[(X2*1e3)', (Y2*1e3)'];% in mm, for CST import
A = ones(9,1)*(G+W0)*1e3
N_cst=[A, (N*1e3)'];
%Write into CSV file for CST to import
csvwrite ('m2_nor.csv',m2);
csvwrite ('M2.csv',M2);
csvwrite ('M2_cst.txt',M2_cst);
%d2={'x2','y2','w'; x2' y2' w'}
%xlswrite ('d2.xls',d2);
hold on;
%Calculate beam ports and curve
theta_degree=-psi:psi/5:psi; %RO3003
%theta_degree=-psi:psi/128:psi; % Calcute the points on the beam curve
theta=theta_degree*pi/180;
193
rou=1-(1-beta^2)/2/(1-beta*a0);
alpha2=asin(sin(theta)/gamma);
phi=asin((1-rou)/rou*sin(alpha2));
x1=rou*(1-cos(alpha2+phi))*g;
y1=rou*sin(alpha2+phi)*g;
X1=x1*F;
Y1=y1*F;
m1=[x1', y1'];
M1=[X1', Y1'];
M1_cst=[(X1*1e3)', (Y1*1e3)'];
csvwrite
csvwrite
csvwrite
csvwrite
('m1_nor.csv',m1);
('M1.csv',M1);
('M1_cst.txt',M1_cst);
('N_cst.txt',N_cst);
%save results.dat x1 y1 x2 y2 w -ascii -double;
%Plot normalized beam, array curve and antenna array
figure(1)
plot (x2,y2,'--rs');
hold on;
plot (x1,y1,'--gs');
plot ((G+W0)/F, n, '--bs');
xlabel('X Dimension, Normalized to F');
ylabel('Y Dimension, Normalized to F');
%Plot beam, array curve and antenna array
figure(2)
plot (X2,Y2,'--rs');
hold on;
plot (X1,Y1,'--gs');
plot (G+W0, N, '--bs');
xlabel('Actual X Dimension');
ylabel('Actual Y Dimension');
clear figure;
%S-parameter modeling
r=sqrt((X1(j)-X2(k))^2+(Y1(j)-Y2(k))^2);
a=sqrt((X2(k)-G)^2+(Y2(k))^2);
b=sqrt((X1(j))^2+(Y1(j))^2);
c=sqrt((X2(k))^2+(Y2(k))^2);
d=sqrt((G-X1(j))^2+(-Y1(j))^2);
BP=sqrt((X1(j)-X1(j+1))^2+(Y1(j)-Y1(j+1))^2)*1e3
AP=sqrt((X2(k)-X2(k+1))^2+(Y2(k)-Y2(k+1))^2)*1e3
phib=acos((r^2+d^2-a^2)/(2*r*d));
phib_degree=phib*pi/180;
phia=acos((r^2+c^2-b^2)/(2*r*c));
phia_degree=phia*pi/180;
for freq=f1:1:f2;
194
lambda0=3e8./(freq*1e9);
lambda=lambda0/sqrt(epsr);
Fnb=sinc(Lb./lambda.*sin(phib));
Fna=sinc(La./lambda.*sin(phia));
S21=La*Lb./lambda./r.*Fnb.^2.*Fna.^2;
S21_dB=10*log10(S21);
Fnb_phi=@(phi)(sin(pi*Lb./lambda.*sin(phi))./(pi*Lb./lambda.*sin(phi))).^2;
Fna_phi=@(phi)(sin(pi*La./lambda.*sin(phi))./(pi*La./lambda.*sin(phi))).^2;
Integb=quadl(Fnb_phi,-pi/2,-1e-50)+quadl(Fnb_phi,1e-50,pi/2);
Intega=quadl(Fna_phi,-pi/2,-1e-50)+quadl(Fna_phi,1e-50,pi/2);
S11b=1-Lb./lambda*Integb;
S11b_dB=10*log10(S11b);
S11a=1-La./lambda*Intega;
S11a_dB=10*log10(S11a);
%Plot insertion loss S21
figure(3)
plot (freq,S21_dB,'--rs');
hold on;
xlabel('Frequency(GHz)');
ylabel('Transmission Loss S21(dB)');
%Plot return loss S11 for both beam ports and array ports
figure(4)
plot (freq,S11b_dB,'--rs');
hold on;
plot (freq,S11a_dB,'--bs');
xlabel('Frequency(GHz)');
ylabel('Return Loss S11(dB)');
end
195
A.2. Matlab Codes for Calculating the Bended Delay Line Length
function Delay=Delay_Lines(a,b)
%all in mm
% lower limit
x1=-pi/2/b;
% upper limit
x2=3/2*pi/b;
deltax=x2-x1
% Define the function
syms x;
curve=a*sin(b*x);
% OUTPUTS
% METHOD 1. Using the calculus formula
% S=int(sqrt(1+dy/dx^2),a,b)
% finding dy/dx
poly_dif=diff(curve,1);
% applying the formula
integrand=sqrt(1+poly_dif.^2);
curve_length=double(int(integrand,x,x1,x2))
%curve_length=int(integrand,x,x1,x2)*1e3
delta_length=curve_length-deltax
%use function handle and quadl
%integrand=@(x)(sqrt(1+(a*b/x2*pi*cos(b/x2*pi*x)).^2));
%curve_length=quadl(integrand,x1,x2)*1e3 %in mm
%fprintf ('\nExact length =%g',leng_exact);
x_prime=x1:(x2-x1)/100:x2;
curve_prime=a*sin(b*x_prime);
figure(1)
plot (x_prime,curve_prime,'--rs');
196
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