close

Вход

Забыли?

вход по аккаунту

?

Integration of microwave and millimeter wave systems in a precision multichip-module deposited process

код для вставкиСкачать
INTEGRATION OF MICROWAVE AND MILLIMETER
WAVE SYSTEMS IN A PRECISION
MULTICHIP-MODULE DEPOSITED PROCESS
A DISSERTATION
SUBMITTED TO THE DEPARTMENT OF
ELECTRICAL ENGINEERING
AND THE COMMITTEE ON GRADUATE STUDIES
OF STANFORD UNIVERSITY
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF PHILOSOPHY
John Edward Post, Jr.
M ay 2005
Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
UMI Number: 3171810
INFORMATION TO USERS
The quality of this reproduction is dependent upon the quality of the copy
submitted. Broken or indistinct print, colored or poor quality illustrations and
photographs, print bleed-through, substandard margins, and improper
alignm ent can adversely affect reproduction.
In the unlikely event that the author did not send a com plete manuscript
and there are missing pages, these will be noted. Also, if unauthorized
copyright material had to be removed, a note will indicate the deletion.
®
UMI
UMI Microform 3171810
Copyright 2005 by ProQuest Information and Learning Company.
All rights reserved. This microform edition is protected against
unauthorized copying under Title 17, United States Code.
ProQuest Information and Learning Company
300 North Zeeb Road
P.O. Box 1346
Ann Arbor, Ml 48106-1346
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
© Copyright by John E. Post, Jr. 2005
All Rights Reserved
ii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
I certify that I have read this dissertation and that, in my opinion, it is fully adequate in
scope and quality as a dissertation for the degree o f Doctor o f Philosophy.
(3•U iW
G. Leonard Tyler, Principal Adviser
I certify that I have read this dissertation and that, in m y opinion, it is fully adequate in
scope and quality as a dissertation for the degree o f Doctor o f Philosophy.
Ivan R. Linscott
\
I certify that I have read this dissertation and that, in m y opinion, it is fully adequate in
scope and quality as a dissertation for the degree o f Doctor o f Philosophy.
Lambej
iselink
Approved for the University Committee on Graduate Studies.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Abstract
Multichip-module-deposited (MCM-D) processes are a potential means o f integrating
millimeter and microwave systems.
A new technique is applied to characterize embedded capacitors to frequencies as
high as 25 GHz in order to extract the parameters o f a circuit model, including the effects
of interconnect parasitics.
MCM-D embedded capacitors constructed with a 175-nm
thick anodized layer between 2-pm thick ground and power planes have a capacitive
density o f approximately 450 pF/mm with an intrinsic quality factor o f about 175.
Removing the silicon substrate from beneath the capacitor reduces the two-port
embedded capacitor’s minimum insertion loss from 0.1 to less than 0.05 dB while
decreasing the insertion loss at 25 GHz from 3.0 to 0.35 dB, as compared with an
identical capacitor that retains the silicon substrate.
A swept-frequency method gives the parameters o f a single transmission line in the
presence o f width discontinuities at the line’s end. Measurement o f a nominally 50 Q
impedance, Au-plated microstrip line (width 46-jum, thickness 25-pm, on a 31-pm Si02
substrate) yields a value within 0.2% o f W heeler’s equation modified to account for the
strip thickness.
Design equations developed for one-quarter wavelength discrete resonators are
adapted to the design o f micron-scale MCM-D interdigitated-line bandpass filters. These
filters require one-sixth the length o f a comparable coupled-line bandpass filter,
demonstrate 7-12 dB insertion loss with center frequencies o f 2.5 to 50 GHz, and have 5
to 10% fractional bandwidths.
Coupled-line transmission-line transformers (TLTs) are an alternative means for
accomplishing the functions o f n:m impedance transformation, phase inversion, and
electrical isolation.
A four-turn, spiral-shaped, Ruthroff-type TLT constructed o f
microstrip lines with inner radius 300 pm (width 20-pm, thickness 25-pm, spacing 20
pm, Au-plated metal on a 31-pm SiC>2 substrate) transform impedances at gigahertz
v
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
frequencies with about 0.5 dB dissipative loss. Measured and predicted normalized input
impedance for this transformer agree to within about 5% to 6 GHz.
The stability o f resistively loaded microwave amplifiers is predicted over a range o f
frequencies by obtaining the stability parameter ju for a cascaded resistor/transistor
network. Measurements and predictions o f ju for three different amplifiers agree to better
than 10% up to 1 GHz.
vi
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Acknowledgements
It is appropriate to begin this dissertation by acknowledging the support, encouragement,
and inspiration provided by a diverse group o f people along an almost nine year journey,
beginning with my arrival at Stanford University in August, 1996, and concluding with
the publication o f this dissertation in March, 2005.
The people I have met as a faculty member during two tours with the Department o f
Electrical Engineering and Computer Science at the United States M ilitary Academy at
W est Point, NY have had a deep and lasting impact on my personal and professional
development. I especially want to thank Brigadier General (Ret.) Daniel Litynski who
was instrumental in providing the opportunity for me to pursue a doctoral degree, and
Colonels Andre Sayles, Bill Lane, and Gene Ressler for their support and encouragement
throughout this long and nonlinear process. Colonel (Ret.) John Oristian, Stanford Ph.D.
1989, provided early inspiration to consider pursuing an advanced degree in conjunction
with military service. Additionally, I want to thank Lieutenant Colonels George Nowak
and John Carrano for their camaraderie, friendship, and for teaching me to see the humor
in every situation.
I am indebted to a number o f people at Stanford University and STAR Lab for their
assistance with the academic and research aspects o f doctoral work. I want to thank my
advisor, Prof. Len Tyler, for his willingness to supervise m y research work and for
providing steadfast encouragement throughout this long process. I have learned a great
deal from his dedication to clarity and precision in written and oral communication. His
patience, good humor, and willingness to take on the challenges and frustrations
presented by a non-traditional student were essential to the success o f this endeavor. I am
grateful to Dr. Ivan Linscott for his friendship and support during m y time on campus and
for providing a number o f keen insights as I was preparing my oral defense.
Special
thanks to my lab and study partner, Dr. Frank Bauregger, for his encouragement and
assistance in helping me clear the many hurdles that appear along an academic path at
Stanford University.
I also want to thank Prof. Bruce Wooley, Prof. Lambertus
Hesselink, and Dr. Linscott for serving on my Oral Examination Committee, and in the
vii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
case o f Prof. Hesselink and Dr. Linscott, I also thank them for their willingness to serve
as members o f m y Dissertation Reading Committee.
I was fortunate to have had the opportunity to complete much o f my work through the
assistance o f the people and the facilities o f the Massachusetts Institute o f Technology
Lincoln Laboratory.
This provided me with the unusual opportunity to interact
simultaneously with people from two o f the nation’s premier engineering institutions. I
especially want to thank Dr. Mark Gouker for allowing me to collaborate with his group
in research on multi-chip modules, for fabricating and characterizing my devices, and for
many helpful and interesting discussions along the way. I will always remember with
fondness the people, experiences, and opportunities I was blessed with during my time at
Lincoln Laboratory.
I want to thank my family for allowing me to accept the opportunity to pursue
doctoral studies, for patiently enduring the many frustrations that appeared during the
journey, and for providing the ongoing encouragement that ultimately allowed me to
succeed. In particular, I thank my wife Susan for her love and support during the time I
was preoccupied with this effort, and I thank my daughters Clairelise and Elisabeth for
their patience and understanding during the many hours Dad worked on his “paper.”
Finally, I want to acknowledge the Ultimate Designer, who has provided us with a
world o f incredible complexity, and gifted us with life and the ability to peer into a small
portion o f His handiwork.
The heavens declare the glory of God; the skies proclaim the work of his hands. Ps. 19:1.
viii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Table of Contents
Abstract.........................................................................................................................................v
Acknowledgments.................................................................................................................... vii
List o f Tables............................................................................................................................xiii
List o f Figures............................................................................................................................xv
Chapter 1
Introduction
1
1.1
A Potential Multichip Module Millimeter W ave A pplication.......................... 2
1.2
Multichip Module Types and Properties............................................................... 6
1.2.1
Multichip Module, Laminated (M CM-L)..............................................................8
1.2.2
Multichip Module, Ceramic (M CM -C)................................................................ 9
1.2.3
M ultichip Module, Deposited (M CM -D)........................................................... 10
1.3
Motivation and Organization.................................................................................11
Chapter 2
Modeling and Characterization MCM-D Embedded Capacitors
13
2.1
Embedded Capacitor Design and Experimental M ethod.................................. 13
2.2
Embedded Capacitor Circuit M odel..................................................................... 17
2.3
Quality Factor o f Embedded C apacitors............................................................ 21
2.4
One-Port High-Frequency Measurement Results.............................................. 23
2.5
Two-Port High-Frequency M easurement Results..............................................30
2.6
Conclusion............................................................................................................... 33
Chapter 3
Design and Characterization of MCM Transmission Lines
35
3.1
Quasi-TEM Transmission Line A nalysis............................................................ 35
3.2
Standard and Embedded Microstrip Line............................................................39
3.3
Coplanar W aveguide.............................................................................................. 44
3.4
Transmission Line Performance Characterization.............................................47
3.5
Measurement-Based Transmission Line M odeling........................................... 51
3.6
Microstrip Line and CPW Experimental Verification...................................... 58
ix
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.7
Transm ission Line Characterization..........................................
3.8
C onclusion.............................................................................................................. 72
Chapter 4
PMCM-D Microwave Filters
68
73
4.1
Filter Types and Characteristics............................................................................73
4.2
PMCM-D Stepped-Impedance Low-Pass Filters...............................................74
4.3
PMCM-D Coupled-Line Bandpass Filters.......................................................... 80
4.4
PMCM-D Interdigitated-Line Bandpass F ilte rs ................................................85
4.5
Conclusion................................................................................................................93
Chapter 5
Analysis & Design of Monolithic Transmission Line Transformers 95
5.1
Introduction to Transmission-Line Transform ers.............................................. 95
5.2
Transmission-Line Transformer Theory..............................................................98
5.3
Planar, Symmetric, Coupled Microstrip Transmission Line.......................... 101
5.4
Admittance Matrix Representation o f Coupled L in e s ....................................109
5.5
Transmission-Line Transformers for Impedance Transformation.................114
5.6
1:1 Transmission-Line Transformers for Phase In v ersio n .............................124
5.7
1:1 Transmission-Line Transformers for Electrical Isolation.........................129
5.8
Modeling Planar, Spiral, Coupled Microstrip Transmission Lines............... 133
5.9
Design Rules for Spiral-Shaped Coupled-Line TLTs..................................... 143
Chapter 6
PMCM-D Transmission Line Transformers
145
6.1
PMCM-D Spiral-shaped TLTs............................................................................145
6.2
PMCM-D Spiral-shaped TLT Experimental M ethod......................................148
6.3
Spiral-shaped TLTs for 2:1 Impedance Transform ation.................................150
6.4
Spiral-shaped TLTs for 1:2 Impedance Transform ation................................154
6.5
Spiral-shaped TLTs for Phase Inversion............................................................156
6.6
Spiral-shaped TLTs for Electrical Isolation...................................................... 158
6.7
Spiral-shaped TLT Dissipative Loss.................................................................. 162
6.8
Conclusion..............................................................................................................164
x
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 7
Stability and Noise Performance of Resistively Loaded Microwave
Amplifiers
165
7.1
Microwave Amplifier Stability.......................................................................... 165
7.2
Two-Port Stability and Power Gain...................................................................167
7.3
Microwave Amplifier Noise Performance....................................................... 173
7.4
Experimental PMCM-D Microwave Am plifiers............................................. 178
7.4.1
Experimental Amplifier Stability Performance............................................... 178
7.4.2
Experimental Amplifier Noise Performance....................................................181
7.5
Conclusion.............................................................................................................186
Chapter 8 Conclusion
187
8.1
Summary................................................................................................................ 187
8.2
Contributions.........................................................................................................189
8.3
Future W ork........................
191
Appendix A Characterizing Devices on Multichip Modules
193
Appendix B Derivation of Two-Port Terms
197
Bibliography
199
XI
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
List of Tables
Table 1.1
Multichip module types and basic properties..................................................... 7
Table 2.1
Test results for six one-port embedded capacitors...........................................24
Table 2.2
Two-port embedded capacitor oxide and substrate capacitance....................31
Table 3.1
Predicted Zo and e x eff for a 5-pm thick PMCM-D microstrip line.............. 43
Table 3.2
Predicted Z0 and e r eff for a 25-pm thick PMCM-D microstrip line............ 43
Table 3.3
Predicted a, b, and £r eff for Z0 = 50 Q. PMCM-D CPW ................................46
Table 3.4
Designed vs. measured transmission line Zo and e r eff for microstrip
Table 3.5
Designed vs. measured transmission line Zo and s Teff for C PW ................... 66
Table 4.1
Interdigitated-line bandpass filter with 5% fractional bandwidth................. 88
Table 4.2
Interdigitated-line bandpass filter with 10% fractional bandwidth............... 88
Table 4.3
One-quarter wavelength microstrip line at seven frequencies....................... 90
Table 5.1
Comparison o f electrical properties for a coupled microstrip pair and
58
an array o f coupled microstrips......................................................................... 140
Table 5.2
Summary o f coupled-line TLT results.............................................................144
Table 6.1
Spiral-shaped coupled-line geometric information........................................147
Table 6.2
Spiral-shaped coupled-line electrical parameters...........................................147
Table 6.3
Spiral-shaped coupled-line electrical parameters...........................................153
Table 7.1
Predicted stability, gain, and noise performance for the FHR02X
transistor amplifier.........................................................................
Table 7.2
169
Fujitsu FHR02X noise parameters for Fds - 2V, / Ds = 10 m A ....................182
xiii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
XIV
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
List of Figures
Figure 1.1
Typical millimeter/microwave receiving system.......................................... 3
Figure 1.2
Single-wafer multichip module integration o f heterogeneous circuits.... 5
Figure 1.3
Stacked-wafer multichip module integration o f heterogeneous circuits... 5
Figure 1.4
Comparison o f packaged and unpackaged die attachment methods.......... 8
Figure 1.5
Illustration o f multichip module laminated fabrication................................9
Figure 1.6
Cross section o f the precision multichip module (PMCM-D) w afer........10
Figure 2.1
Simplified cross section o f one- and two-port embedded capacitors.... 16
Figure 2.2
Top view o f one- and two-port PMCM-D embedded capacitors
Figure 2.3
Circuit models o f the embedded capacitor and interconnect..................... 18
Figure 2.4
Measured parallel resistance Rp for C 1- C 6.................................................. 25
Figure 2.5
Measured conductance Gp and capacitance Cp for C r Q , ......................... 25
Figure 2.6
Embedded capacitor series resistance R ....................................................... 28
Figure 2.7
Embedded capacitor capacitance C = \l(coX)..............................................28
Figure 2.8
Embedded capacitor and interconnect quality factor Q ............................. 29
Figure 2.9
Embedded capacitor impedance |Z|............................................................... 29
Figure 2.10
Two-port representation o f embedded capacitor equivalent circuit......... 30
Figure 2.11
Two-port embedded capacitor insertion loss and return loss.................... 32
Figure 3.1
Distributed circuit model for a quasi-TEM transmission line...................37
Figure 3.2
Transverse section o f standard microstrip line............................................40
Figure 3.3
Transverse section o f an embedded or ‘buried’ microstrip line............... 42
Figure 3.4
Transverse section o f coplanar w aveguide.................................................. 45
Figure 3.5
Microstrip line and CPW measurement setup............................................. 49
Figure 3.6
PMCM-D microstrip line insertion and return loss measurements..........50
Figure 3.7
On-wafer microstrip line scattering parameter measurement................... 52
Figure 3.8
Transmission line discontinuity m odel......................................................... 52
Figure 3.9
Zo o f 168-pm width, 8-mm length microstrip line......................................61
Figure 3.10
Zo o f 168-p.m width, 16-mm length microstrip line....................
xv
with permission of the copyright owner. Further reproduction prohibited without permission.
17
61
Figure 3.11
Zo o f 60-pm width, 10-mm length microstrip line..................................... 62
Figure 3.12
Z0 o f 48-pm width, 6-mm length microstrip line....................................... 62
Figure 3.13
Measured and predicted insertion and return losses...................................65
Figure 3.14
Measured and predicted insertion and return losses...................................65
Figure 3.15
Z0 o f 60-pm width CPW with 156 pm ground line separation.................67
Figure 3.16
Dispersion jB(co) diagram for microstrip line and CPW ........................... 69
Figure 3.17
Attenuation diagram for microstrip line and CPW ..................................... 69
Figure 3.18
Measured transmission line incremental resistance and inductance........71
Figure 3.19
Measured transmission line incremental conductance and capacitance...71
Figure 4.1
Typical specifications for a low-pass filter.................................................. 74
Figure 4.2
Lumped element low-pass filter prototype.................................................. 75
Figure 4.3
Geometry o f 2 GFIz, 3d-order, 0.25 dB equal-ripple low-pass filter........77
Figure 4.4
Geometry o f 10 GHz, 13th-order, 0.25 dB equal-ripple low-pass filter..77
Figure 4.5
Third-order, low-pass Chebyshev stepped-impedance filter.....................79
Figure 4.6
Thirteenth-order, low-pass Chebyshev stepped-impedance filter............ 79
Figure 4.7
Derivation o f coupled-line bandpass filter equivalent circuit
Figure 4.8
Geometry o f 5th order, 0.1 dB equal-ripple bandpass filter.......................84
Figure 4.9
Chebyshev bandpass filter insertion and reflection loss............................ 85
Figure 4.10
Voltage and current distributions along microstrip lines
Figure 4.11
One-quarter wavelength interdigitated-line bandpass filter...................... 86
Figure 4.12
Transverse center section o f a 5th order interdigitated-line filter............... 87
Figure 4.13
50 GHz interdigitated-line bandpass filter.................................................. 91
Figure 4.14
Interdigitated-line bandpass filter with 2.5 GHz center frequency.......... 91
Figure 4.15
Interdigitated-line bandpass filters with 5% fractional bandwidths........ 92
Figure 4.16
Interdigitated-line bandpass filters with 10% fractional bandwidths.......... 92
Figure 5.1
On-wafer monolithic transformer configurations....................................... 96
Figure 5.2
Inexpensive transmission-line transformer.................................................. 97
Figure 5.3
TLT normalized input impedance vs. frequency....................................... 97
Figure 5.4
Guanella’s transmission-line transformer.................................................... 99
Figure 5.5
Multiline extension o f a Guanella transmission-line transform er.......... 100
............. 82
............. 86
xvi
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Figure 5.6
Voltage transformation ratios o f Guanella
transmission-line transformers..............................................................
100
Figure 5.7
R uthroff s transmission-line transformer............................................. ....101
Figure 5.8
Electromagnetic field distribution in coupled microstrip lines....... ....103
Figure 5.9
Incremental distributed circuit model for coupled lines................... ....103
Figure 5.10
Voltage and current conventions for coupled transmission lin es,,. ...11 0
Figure 5.11
Symmetric coupled transmission line driven in the even m ode....... ...110
Figure 5.12
Symmetric coupled transmission line driven in the odd m ode....... ....110
Figure 5.13
Four-port coupled-line m odel............................................................... ....114
Figure 5.14
Coupled-line transmission-line transformer....................................... ... 115
Figure 5.15
Two-port networks described by admittance param eters................
115
Figure 5.16
Voltage transformation ratio « ‘2 vs. electrical length.....................
120
Figure 5.17
Current transformation ratio n
vs. electrical le n g th ...................
120
Figure 5.18
Normalized input impedance Zin Y2 vs. electrical length...............
121
Figure 5.19
Normalized input impedance Z- Y2 vs. electrical length...............
121
Figure 5.20
Voltage transformation ratio
122
Figure 5.21
Current transformation ratio n
vs. electrical length.....................
122
Figure 5.22
Normalized input impedance Z n Y\ vs. electrical length...............
123
Figure 5.23
Normalized input impedance Z
Yx vs. electrical length...............
123
Figure 5.24
Two-port phase-inverting transmission-line transform er................
125
Figure 5.25
Voltage transformation ratio w“ v vs. electrical length...................
127
Figure 5.26
Voltage phase angle vs. electrical length............................................
127
Figure 5.27
Normalized input impedance Z™v YL vs. electrical length...............
128
Figure 5.28
Normalized input impedance Z inv YL vs. electrical length.............
128
Figure 5.29
Two-port electrically-isolating transmission-line transformer....... ... 130
1<y
1 vs. electrical length...................
91
XV II
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
vs. electrical length......................... 131
Figure 5.30
Voltage transformation ratio
Figure 5.31
Voltage phase angle vs. electrical length....................
Figure 5.32
Normalized input impedance Z?*° YL vs. electrical length....................132
Figure 5.33
Normalized input impedance Z ‘^v Yh vs. electrical length................... 132
Figure 5.34
Port definitions for spiral-shaped, coupled microstrip lines...................134
Figure 5.35
Spiral-shaped coupled microstrip lines...................................................... 134
Figure 5.36
Approximate electromagnetic field distribution in an array
131
o f coupled microstrip lines.......................................................................... 136
Figure 5.37
Inductance o f microstrip line arrays excited in even and
odd m o d e s..................................................................................................... 136
Figure 5.38
Total inductance o f 1-mm length microstrip line arrays with
even- and odd-mode excitations................................................................. 138
Figure 5.39
Lumped element model o f R uthroff s transform er.................................. 140
Figure 5.40
Even-mode inductance o f 1-mm length microstrip line arrays
without ground planes.................................................................................. 142
Figure 5.41
Odd-mode inductance o f 1-mm length microstrip line arrays
without ground planes.................................................................................. 142
Figure 6.1
PMCM-D transmission-line transformer................................................... 146
Figure 6.2
PMCM-D suspended transmission-line transform er............................... 146
Figure 6.3
Experimental setup for measuring TLT scattering param eters.............. 149
Figure 6.4
Normalized input impedance |Zin |Tl
Figure 6.5
Normalized input impedance |Zin|Tl vs. frequency for 2:1 STLTs.... 153
Figure 6.6
Normalized input impedance |Zin|Tl
vs.
Figure 6.7
Normalized input impedance \Z-m \Y^
frequency for 1:2 STLTs............. 155
Figure 6.8
Phase angle o f nv vs. frequency for 1:1 STLT........................................ 157
Figure 6.9
Normalized input impedance |Zjn|TL vs. frequency for 1:1 STLT
Figure 6.10
Phase angle o f ny vs. frequency for 1:1 STLT........................................ 160
Figure 6.11
Normalized input impedance |Zjn|7L vs. frequency for 1:1 STLT
vs.
vs.
frequency for 2:1 STLTs.... 151
frequency for 1:2 STLTs.... 155
xviii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
157
160
Figure 6.12
Phase angle o f ny vs. frequency for 1:1 STLT........................................ 161
Figure 6.13
Normalized input impedance |Zjn|FL vs. frequency for 1:1 STLT
Figure 6.14
Dissipative and reflective losses for the STLTs..................................... 163
Figure 6.15
Dissipative and reflective losses for the suspended S T L T s...................163
Figure 7.1
Input and output stability circles for FHR02X transistor
161
amplifier at 2 G H z........................................................................................ 166
Figure 7.2
Stability parameter, //, computed from measured scattering
parameters for FHR02X transistor............................................................. 168
Figure 7.3
Procedure to determine network stability parameter ft............................ 169
Figure 7.4
Stability parameter // vs. frequency............................................................ 170
Figure 7.5
Cascade o f two-ports to determine resistively stabilized
amplifier noise factor....................................................................................174
Figure 7.6
Test fixture constructed for Fujitsu FHR02X microwave am plifier.... 179
Figure 7.7
Microwave amplifier test circuit for measuring stability parameters... 179
Figure 7.8
Stability parameter // for three FHR02X transistor amplifiers
Figure 7.9
Microwave amplifier gain and noise figure test circuit........................... 182
Figure 7.10
Noise figure and gain for amplifier without stabilization........................183
Figure 7.11
Noise figure and gain for amplifier with stabilization
Figure 7.12
Noise figure and gain for amplifier with stabilization............................. 184
Figure 7.13
Noise figure and gain for amplifier with stabilization............................. 184
Figure A. 1
Diagram o f a typical multichip module experimental layout..................194
Figure A.2
Circuit models for network analyzer measurements................................ 195
Figure A.3
Parallel connection o f two two-port networks...........................................196
180
......................183
xix
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
XX
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter One
Introduction
There is considerable interest in the development and application o f new interconnect
technologies that are hilly compatible with high-speed analog and digital circuits for
transmitting and processing information in computer and communications systems
(Tripathi, 1997). As an example, consider an application that requires both high-speed
analog and digital functions. Extremely dense, low-power, memory elements and gates
necessary for high-speed digital integrated circuits currently are the result o f a silicon
complimentary metal oxide semiconductor (CMOS) fabrication process (Weste, 1994).
On the other hand, compound III-V semiconductors, such as gallium arsenide (GaAs), are
frequently used for high-speed analog, radio
frequency (RF),
and microwave
components, because these provide the extremely high electron mobilities necessary for
successful device operation at millimeter and microwave frequencies (Ladbrooke, 1989).
Efficiently combining these generally incompatible technologies into systems requires an
interconnection network that supports both high-density, high-speed connections for
digital circuits and low-loss connections for millimeter and microwave signals.
A multichip module (MCM) is “a package containing several chips on a ceramic or
other type substrate (Miller, 1990).” Recently, M CM s have attracted interest as a means
o f integrating dissimilar technologies, including the mixed-signal systems described in
the previous paragraph. Structurally, an MCM substrate contains one or more conducting
layers sandwiched between insulating dielectrics that provide high-density connections
between the individual ICs. As compared with traditional packaging approaches, MCMs
offer reduction in size, weight, and cost, as well as increased reliability and improved
thermal performance (Ginsberg and Schnorr, 1994).
1
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 1: Introduction
2
Balde and Johnson (1990) and Sherwani et a l (1995) report the advantages o f MCMs
for high-speed digital circuits dating from the late 1970s. Interest in the performance o f
MCM interconnects at high frequencies was first motivated by the desire to achieve
gigahertz clock frequencies for digital circuits (Schwab et al., 1989). Results from early
investigations indicated that fabrication process tolerances using ceramic MCM
technology could be brought under sufficiently tight control to maintain relatively
constant interconnect impedances, minimizing signal loss from reflections associated
with dimensional variations along the transmission line.
This progress, together with other encouraging results, led a number o f researchers to
consider further the suitability o f MCMs as an integration technology that includes
microwave and millimeter wave applications where performance, size, and weight are
critical factors (Carchon et a l, 2001 & 2003; Kulke et a l, 1999; Piloto, 1999; Arnold et
a l, 1997; Arnold and Pedder, 1992; Zu et a l, 1992).
This dissertation explores new opportunities to integrate millimeter and microwave
components and circuits in an improved, silicon-based multi-chip module process in
order to advance work in this area. Specifically, the goal o f this work is to investigate the
high-frequency performance o f selected active and passive components and circuits
fabricated with this process to facilitate integration o f important microwave and
millimeter wave systems.
The purpose o f this dissertation is to investigate these
components and circuits to understand better their suitability for millimeter and
microwave applications, as well as develop models for use during the design process that
represent accurately their performance.
1.1 A Potential MCM Millimeter Wave Application
In order to illustrate the functional requirements MCM processes must satisfy in order to
integrate successfully a typical millimeter wavelength application, consider a portion o f a
millimeter receiving system, as shown in Fig 1.1. The function o f the receiving system is
to ‘down-convert’ received millimeter signals to a baseband frequency with sufficient
signal-to-noise ratio and signal level that a high-speed analog-to-digital convertor (ADC)
can adequately digitize the desired signal (Hendricks, 1997; Wepman, 1995). Signals
entering
the
receiving
system
at
the
antenna
are
amplified
by
the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
low-
1.1: A Potential MCM Millimeter Wave Application
3
Ant
LNA
BPF
Mixer
BPF
IF Amp
to ADC
^
Osc.-PLL
\
.
^
Buffer
xN
Freq. Mult.
BPF
Fig. 1.1 Typical millimeter/microwave receiving system. The system amplifies,
selects, and converts a signal in the millimeter/microwave frequency range into a
band-limited signal with sufficient amplitude for digitization.
-noise amplifier (LNA) prior to bandpass filtering (BPF).
For many millimeter and
microwave systems a highly-directive antenna limits potential out-of-band interference,
making it practical to locate the BPF after the LNA, as shown, thus improving the system
noise figure. Next, the RF signal is mixed with a tone generated by a local oscillator
chain; this operation shifts the signal ‘carrier’ to a lower intermediate frequency (IF)
more suitable for additional amplification and filtering.
Finally, the IF signal is
bandpass-filtered and amplified prior to digitization by the ADC. Consideration o f this
example and related applications leads to several important capabilities an M CM
substrate must provide in order to integrate millimeter/microwave systems.
High-performance
interconnects
are
necessary
for
MCM
integration
of
millimeter/microwave applications. Successful interconnection at gigahertz frequencies
usually requires a low-loss transmission line designed to match the system impedance in
order to minimize insertion loss. A related requirement is the need to connect to external
components through bond wires or flip-chip attachments in a way that also minimizes
impedance discontinuities in order to limit signal reflections.
Passive filters perform important functions in receiving systems by separating desired
from undesired signals. Impedance transformers often are necessary to maximize power
transfer between stages.
The ability to construct filters, impedance transformers, and
other sub-circuits ‘on-wafer’ using high-quality embedded passive components increases
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 1: Introduction
4
the degree o f integration and reduces the cost o f parts and module assembly while
improving reliability.
The capability to fabricate a high-density o f horizontal and vertical interconnections
supports the integration o f high-speed digital ICs. At the same time, the size o f an MCM
wafer is sufficient to allow spatial separation where necessary to minimize cross-talk
between analog and digital signals.
These capabilities allow the integration o f high-
performance mixed-signal circuitry on the same substrate which, in turn, helps to
minimize interconnect lengths and reduces overall system size.
Figure 1.2 provides a conceptual view o f an MCM integration o f a mixed-signal
application that includes millimeter/microwave systems.
This example contains both
active and passive ‘bump-bonded’ components interconnected through use o f low-loss
transmission lines fabricated from gold plated conductors. The inclusion o f high-quality
passive components and high-performance, on-wafer filters reduces the area required
while improving system reliability.
Figure 1.3 shows an extension o f this concept accomplished by stacking o f MCM
layers.
In this instance the use o f micromachined voids eliminates the mechanical
interface that would otherwise be present in vertical stacking o f individual single-wafer
modules. The figure also depicts layer-to-layer interconnects along with active devices
embedded in the stack.
Figures 1.2 and 1.3 provide a conceptual framework for MCM integration o f mixedsignal applications that include millimeter and microwave systems. Fabrication o f actual
systems at this time, however, requires selecting one o f the three available MCM
technologies, as briefly reviewed in the next three sections.
Because each MCM
technology is in a different stage o f maturity, with different capabilities, limitations, and
costs, no optimum solution currently exists to the overall problem o f integrating mixedsignal applications that include millimeter and microwave systems.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.1: A Potential M CM Millimeter Wave Application
Passive filters
\
X
Flip-chip
bump-bonded
.
components
miature
‘ x
microstrip
\
/
Plated thick.
An conductor^^gp^
Thru-wafer
ground vias
Coplanar
waveguide
Spi™' i"ductors
Fig. 1.2 Single-wafer MCM integration of mixed-signal circuits. Figure illustrates
microstrip line and coplanar waveguide transmission lines, embedded passive
components, filters, and ‘flip-chip’ attachment o f external components. Courtesy of
MIT Lincoln Laboratory, Lexington, MA.
Ferrite co re
External lum ped
elem en ts
Stripline /
layer
Digital
layer
Em bed
digital 1C
Layer-to-layer
c o n n e c tio n s
Analog
device with
digital control
Fig. 1.3 Stacked-wafer MCM integration o f mixed-signal circuits. Figure illustrates
use of voids created by micromachining to allow vertical stacking o f single-wafer
modules along with layer-to-layer interconnects and embedded ICs. Courtesy of
MIT Lincoln Laboratory, Lexington, MA.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 1: Introduction
6
1.2 Multichip Module Types, Properties, and Advantages
The International Society for Hybrid Microelectronics (ISHM) recognizes three multichip
module types, with salient details given in Table 1.1 (Ginsberg and Schnorr, 1994):
•
MCM-L — contains laminated layers o f conductors on dielectric substrates.
•
MCM-C — contains a multilayer ceramic dielectric substrate where each
layer contains a printed conductive trace.
•
MCM-D — contains metal and dielectric layers deposited on top o f a
substrate material, usually silicon.
The area o f a typical multichip module is approximately 100 mm2, although substrates
created by the MCM-L process can be larger, as shown in the table. The cost o f material
also varies significantly between the three types o f MCM. This has led to the dominance
o f low-cost MCM-L for mass-produced consumer applications. The other substrates are
found primarily in applications that are driven by technical requirements rather than cost.
Referring to Table 1.1, each MCM type includes several materials that are useful as
substrates, such as alumina (AI2 O 3) used in MCM-C. The dielectric constant is a critical
parameter in many applications because it determines the interconnect capacitance which
in turn directly effects the propagation delay along the conductor. An important set o f
design parameters comprises width, separation, and density o f the conductive traces
sandwiched between the dielectric layers. The use o f very thin layers attainable in the
MCM-D process leads to a high vertical density o f conductive layers, while the small
trace width and lateral separation o f traces allows a high horizontal density o f conductors.
The most obvious advantages o f MCMs lie in the area o f improved reliability and
packaging efficiency. The improved thermal conductivity arising from attaching a bare
die directly to the MCM substrate instead o f through a chip carrier package reduces
semiconductor junction temperatures while eliminating an entire level o f packaging, as
shown in Fig. 1.4. The corresponding reduction in the number o f potential failure points
directly improves reliability, while improvement in packaging efficiency results because
more dice can be fit into a given space. Closer chip-to-chip spacing also improves highfrequency electrical performance.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Property
MCM-C(eramic)
MCM-D(eposited)
MCM-L(aminate)
Substrate
Low-s
Co-fired
Silicon
Low-s polymers
Printed wiring board
Dielectric material
SiN, BeO
A120 3
S i0 2
Polyimide
Fiber/epoxy composites
Dielectric constant
2 .7-6.9
8.9-10.0
3.8
2-10
2-7.2
Substrate material
AIN
A120 3
Si, GaAs, SiC,
diamond
Ceramics, Si,
metals, diamond
FR4, etc.
Thermal
conductivity
High-to-veryhigh
High
Very high
Very high
Poor
Line width (pm)
125
125
10
15
750
Line separation
(pm)
125-375
125-375
10-30
25
2250
Line Density
(mm/mm)
20
40
400
200
30
Pinout (mm '2)
1500-6000
800-3000
1500-3000
Typical size (mm)
100-150
150
100
660
Substrate cost
High
Moderate
Moderate
Low
Table 1.1. Multichip Module Types and Basic Properties (after Ginsberg and Schnorr, 1994, Table 2.1).
Chapter 1: Introduction
8
Leads
Bond Wire
1
Die
Solder Bump
Bond Wire
\
Die
1
L ia m £ A
Circuit Board
t
(b)
Multichip Module
Solder Joint
Fig. 1.4 Comparison of (a) packaged and (b) unpackaged die attachment methods.
Attaching a bare die directly to the wafer eliminates one step in the packaging
process, improving the module’s reliability while also reducing the cost of assembly.
1.2.1 MCM-L
M CM -L is manufactured through the lamination o f sheet layers o f organic dielectric in a
manner very similar to that o f traditional printed circuit board (PCB) technology. In fact,
MCM-L can be considered as ‘fine-line’ PCB technology (Sherwani et a l, 1995). Figure
1.5 illustrates the steps in the fabrication process. Figure 1.5 (a) shows that the desired
pattern for each layer is etched on a single sheet. Next, Fig. 1.5 (b) shows that the sheets
are cut and the adjacent layers are bonded with heat and pressure to form a sublaminate.
Finally, Fig. 1.5 (c) shows that the sublaminates are bonded together to construct the
laminate and holes are drilled and plated to form ‘through’ or ‘buried’ vias.
The large process variations inherent in MCM-L fabrication require system designs
that tolerate wide ranges o f interconnect performance. Nevertheless, because o f its lowcost, MCM-L substrates dominate the market for such mass-produced consumer
electronics items as cellular telephones and pagers, even at frequencies as high as 2.5
GHz (Gilbert, 1997). Primarily because o f performance limitations due to fabrication
constraints, the literature reflects only little interest in applying M CM -L technology to
integration o f much more technically demanding millimeter and microwave systems.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.2: Multichip Modules
9
Laminating
Through via
| Etching |
Buried via
(c)
Fig. 1.5 Illustration of MCM-L fabrication. Left-to-right: (a) Pattern etching of a
single layer, (b) Bonding of individual layers to form sublaminate, (c) Completed
laminated MCM showing ‘through’ and ‘buried’ vias. (After Sherwani et al., 1995,
Fig. 2.8).
1.2.2 MCM-C
MCM-C is the oldest multichip module technology. It is based on techniques pioneered
in the 1980s by mainframe and supercomputer manufacturers, (e.g., Johnson et al., 1990).
This approach incorporates three distinct technologies: i) thick-film ceramic (TFC), ii)
high-temperature co-fired ceramic (HTCC), and iii) low-temperature co-fired ceramic
(LTCC) (Ginsberg and Schnorr, 1994).
Thick-film technology requires sequential
processing for each layer while the co-fired ceramic layers are fabricated in a single step
o
as the name implies. High-temperature co-fired ceramics are processed above * 1500 C,
which requires use o f refractory metals such as tungsten and molybdenum as conductive
traces.
Low-temperature co-fired substrates are processed at temperatures below
» 900°C, allowing use o f noble metals such as gold or copper as conductive traces. A
disadvantage o f the alumina (AI2O3) ceramic dielectric substrate used in many MCM-C
processes is its relatively high dielectric constant, e r « 10, Table 1.1. High-permittivity
dielectrics increase signal propagation delay due to greater interconnect-to-substrate
capacitance, as compared with low permittivity dielectrics. The suitability o f MCM-C as
an integrating technology for millimeter/microwave applications remains under active
exploration (Piloto, 1999; Kulke et al., 1999).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 1: Introduction
10
1.2.3 MCM-D
MCM-D is constructed by depositing alternating thin-film layers o f metal and dielectric
on a substrate material in a manner similar to a typical integrated circuit fabrication
process.
An example o f a silicon MCM-D process, a cross section o f a precision
multichip module deposited process, is shown in Fig. 1.6. This ‘PM CM -D’ process is
designed specifically to address performance-limiting shortfalls in current MCM-D
technology, such as non-uniform trace widths, lack o f planarity in the signal and
dielectric layers, and the requirement to stagger the vias that provide connectivity
between the layers (Gouker et al., 2000; Gilbert and Pan, 1997). Several key features o f
this process include: i) 5-pm thick signal layers, ii) an optional 20-pm thick plated gold
layer to reduce signal attenuation, Hi) 7 pm o f intermetal dielectric separation to reduce
interconnect capacitance, iv) use o f chemical-mechanical polishing (CMP) to improve
the planarity o f the layers, and v)
solder bumps that provide for ‘flip-chip’ die
attachment. The process also incorporates a resistive layer and an integrated decoupling
capacitor layer o f 550 pF/mm . Micromachining o f the substrate to eliminate highfrequency parasitic losses within the silicon wafer is an option with this process. As a
result o f these enhancements, the PMCM-D process is a promising technology for
integrating millimeter/microwave applications (Gouker et al., 2000).
Plated top metal -
- PbSn solder
bump
CMP
damascene
stacked vias
7 pm CMP
intermetal
dielectric
Resistor layer
.
\
f
!
J --------------- :
Three 5 pm
signal layers
SiO,
Anodized Al
decoupling "
capacitor
-Two 2 pm Al
power planes
Substrate
Micromachining
Silicon
Fig. 1.6 Cross section of the precision multichip module (PMCM-D) wafer. The
process includes an optional 2 0 -pm thick plated gold layer to reduce interconnect
losses. Solder bumps provide for ‘flip-chip’ attachment o f transistors and ICs.
Courtesy of MIT Lincoln Laboratory, Lexington, MA.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.3: Motivation and Organization
11
1.3 Motivation and Organization
This dissertation investigates the suitability o f MCM-D technology to serve as a highperformance integration platform for millimeter/microwave systems.
The impetus for
this work stems from an interest in optimizing the design o f microwave systems and
components to improve some aspects o f their performance. This initial interest served to
motivate studies on optimizing the noise performance o f individual and coupled
oscillators (Post et al., 1998), as well as studies on optimizing the quality factor o f spiral
inductors on silicon (Post, 2000).
Recent efforts investigated resistively-loaded
microwave amplifiers in order to optimize their stability and noise performance (Post,
2004).
Insights gained from previous work complement, illuminate, and motivate the
investigation o f MCM-D technology presented in this dissertation.
In particular, this work examines the performance o f selected active and passive
components and circuits commonly employed as building blocks in microwave and
millimeter wave systems.
The devices described here were fabricated in PMCM-D
technology by the Advanced Silicon Technology Group at MIT Lincoln Laboratory,
headed by Dr. M ark Gouker, whose associates also designed the embedded capacitors as
well as the three widest microstrip transmission lines. All other devices described here
were designed by the author, who also made the preliminary measurements and
examination o f many o f the structures. Chapter Two describes and analyzes embedded
MCM-D capacitors, and proposes an embedded capacitor and interconnect equivalent
circuit model to electrically represent these devices.
The chapter then presents an
original method to experimentally extract the models values from scattering parameter
measurements.
Chapter Three reviews basic transmission-line theory for context and
examines experimentally the performance o f microstrip and coplanar waveguide PMCMD transmission lines. This requires development o f a new method for determination o f
transmission line propagation parameters. Chapter Four reviews passive filter theory in
the context o f MCM-D substrates and reports on the performance o f three typical
millimeter/microwave bandpass and low-pass filters realized in PMCM-D technology.
An important, unanticipated, result for bandpass filters is the presence o f a large
dissipative component o f insertion loss, as well as discrepancies between standard theory
and the performance o f the realized devices. Chapter Five reviews the theory o f lineal
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 1: Introduction
12
transmission-line transformers, and then uses this as the basis o f a new analysis of
coupled-line spiral-shaped, planar transmission-line transformers.
Chapter Six applies
the insights developed in Chapter Five to the design o f the spiral-shaped, planar
transmission-line transformers.
The chapter then compares microwave measurements
with model predictions for four different types o f PMCM-D transmission line
transformers.
Chapter Seven presents a new technique for optimizing the tradeoffs
between microwave amplifier gain, noise performance, and stability for various
combinations o f simple resistive input and output networks. The chapter then compares
theoretical predictions with measured results for amplifier gain, noise performance, and
stability. Finally, Chapter Eight summarizes the research conclusions, discusses how this
work advances the field, and describes directions and opportunities for future work.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Two
Modeling and Characterization of
MCM-D Embedded Capacitors
Passive components, whether embedded or discrete, are necessary building blocks for
millimeter and microwave systems.
At present, embedded components offer the
advantages o f lower cost, smaller size, better reliability, and reduced external parts count
as compared with discrete components (Arnold et al., 1997). This chapter models and
characterizes PMCM-D embedded capacitors and investigates their suitability for
capacitive coupling and bypass applications in microwave circuits integrated on MCMs.
2.1 Embedded Capacitor Design and Experimental Method
It is possible to fabricate two types o f embedded metal-insulator-metal (MIM) capacitors
using MCM-D technology.
The first type uses the top, metal interconnect layers in
combination with separating dielectric “interlayers” to form both parallel plate and lateral
flux, i.e., interdigitated, MIM capacitors. The capacitive density o f these structures is
limited by either the relatively thick interlayer dielectric, which typically is 5-50 um in
thickness between metal layers, or the minimum reliably achievable conductor spacing
required between the signal traces, which is typically 10-20 um between interdigitated
metal fingers. Because o f this, capacitors formed using lateral separation in only the top
metal interconnect layer provide a capacitive density o f no more than a few pF/mm
ij
(Carchon et al., 2001).
A second type o f MCM-D MIM embedded capacitor is formed by anodizing the layer
between the M CM -D’s ground and power planes. This type o f structure was initially
proposed to eliminate the need for discrete decoupling capacitors that suppress ‘ground
13
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
14
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
bounce’ transients caused by digital circuit switching (Takken and Tuckerman, 1993). A
typical anodized layer thickness o f 0.15 pm along with a relative dielectric constant o f s^
= 8.8 for anodized aluminum results in capacitive densities ranging from 460-600
pF/mm2 (Keeney et a l, 2002; Chahal et al., 1998)— much larger than is possible with the
standard dielectrics used to form interconnect layer capacitors. The very thin dielectric
also reduces the inductance o f the anodized layer to just a few pH (Ulrich and Shaper,
2003; Chen et al., 2000), an amount much smaller than the inductance o f the interconnect
necessary to connect to the capacitor. Because o f this, interconnect parasitics limit the
performance o f MCM-D embedded capacitors in a manner similar to the way lead
parasitics limit the performance o f chip components.
The relatively small physical size o f embedded capacitors, when applied in typical
microwave applications such as filtering and decoupling, minimizes the area that is not
otherwise available for interconnects.
The one- and two-port PMCM-D embedded capacitors examined in this chapter make
up three test sets o f six parallel devices designed and by fabricated by Gouker and his
colleagues. These embedded capacitors are interesting to investigate because the results
demonstrate that even the robust and relatively short interconnects provided in the
examples here limit the performance o f embedded capacitors at microwave frequencies.
The capacitors in the three sets differ only by the capacitor’s plate area, the method o f
connecting to the plates, and the presence or absence o f the silicon substrate below the
bottom plate. For the first set, one-port devices were formed by connecting the top plate
o f each capacitor to the signal terminal o f a GSG probe pad while the bottom plate served
as signal return.
For the second and third sets, two-port devices were formed by
connecting each capacitor plate to the signal terminal o f a GSG probe pad. Additionally,
for the third set, the silicon substrate was removed from beneath the two-port capacitors
to reduce the bottom plate capacitance.
One-port capacitors serve two prim ary purposes in circuit applications. The first is as
a parallel element in a resonant circuit or a low-pass filter; the second is to provide low ac
impedance to ground for power supply decoupling and in similar applications.
W ith
regard to application as a practical parallel element, a capacitor must have a self­
resonance frequency well above the circuit operating frequency if it is to maintain
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.1: Embedded Capacitor Design and Experimental Method
15
constant capacitance and a high quality factor, especially when capacitor losses are
detrimental to circuit operation.
Two-port capacitors also have two primary circuit applications.
The first is as a
series element in a series resonant circuit or a high-pass filter; the second is to provide ac
coupling between stages o f a circuit. For best performance in the first application, the
two-port capacitor also must have a self-resonance frequency well above the operating
frequency in order to maintain constant capacitance and a high quality factor. In the
second application, the capacitor should have low dissipation loss to minimize signal
attenuation through the capacitor as well as low reflection loss.
Figure 2.1 illustrates the features o f the PMCM-D process relevant to the fabrication
o f one- and two-port capacitors. As shown in the figure, the process o f anodizing the top
surface o f the 2-pm thick aluminum ground plane prior to patterning and depositing the
2-pm thick aluminum power plane provides the structure for the embedded capacitors.
Providing a connection to an isolated section o f the power plane through a via stack and
using the ground plane as the signal return forms a one-port capacitor.
Similarly,
providing a connection through via stacks to isolated sections o f both the power and
ground planes creates a two-port capacitor.
As the figure shows, a substrate
micromachining step to remove a section o f the silicon substrate reduces the bottom plate
parasitic capacitance o f the two-port capacitor.
In each test structure for an embedded capacitor, coplanar GSG probe pads 60 pm x
100 pm in size connect to the capacitor plates through a short stub and via stack, as
shown in Fig. 2.2. These test configurations closely match the minimum interconnect
lengths necessary to employ an embedded capacitor in typical microwave circuit
applications. For the one-port capacitor, Fig. 2.2(a), the center GSG pad connects to the
capacitor’s top plate through a short stub and dense via stack, as shown in Fig. 2.1(a),
while the GSG ground pads connect to the ground plane through two other via stacks, not
shown in Fig. 2.1(a).
In the two-port capacitor, Fig. 2.2(b), the top plate connects
through a dense via stack and short stub to the signal terminal o f the right GSG probe
pad, as shown on the right side o f Fig. 2.1(b). The isolated section o f the ground plane
that serves as the capacitor’s bottom plate connects to the signal terminal on the left GSG
probe pad through a second via stack and short stub, as shown on the left side o f Fig.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 2: Characterization and M odeling o f MCM-D Integrated Capacitors
16
Signal
terminal
1
CMP
damascene
stacked vias
Three 5 pm Al
signal layers
>
7 pm Si02
intermetal
dielectric
SiO
2 pm Al power plane
2 pm Al ground plane
Anodized Al
dielectric
Silicon
Substrate
Signal return (ground)
(a)
Signal
terminals
Three 5 pm Al
signal layers
CMP
damascene
stacked vias
jiinmn
jifiiiiu
7 pm Si02
intermetal
dielectric
2 pm Al power plane
2 pm Al ground plane
Anodized Al
dielectric
Substrate
Micromachining
Silicon
Substrate
(b)
Fig. 2.1 Simplified cross section of notional one- and two-port embedded capacitors.
One-port (a) differs from two-port (b) in that the bottom plate of the two-port
capacitor is isolated and connected to a signal terminal shown on the left side of the
figure while the top plate is connected to a signal terminal shown on the right side of
the figure. Micromachining removes the silicon substrate to reduce capacitance
between the bottom plate and the substrate. Ground pads and associated via stacks
are not shown in either figure.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.2: Embedded Capacitor Circuit Model
17
M M If
(a)
(b)
Fig. 2.2 Top view of one- and two-port PMCM-D embedded capacitors. One-port
capacitor (a) with simplified cross section, Fig. 2.1(a). Two-port capacitor (b) with
simplified cross section, Fig. 2.1(b). The outline of the vias in the dense via array is
visible in the protrusions in the top metal layer. The lattice structure surrounding the
capacitors on the figure periphery is metal fill required to maintain wafer planarity
during processing. Photos courtesy of MIT Lincoln Laboratory.
2.1(b). The remaining ground plane outside o f the isolated section connects the two GSG
ground pads through via stacks and serves as the signal return.
Sample two-port
capacitors with and without the silicon substrate removed were built for test purposes.
Appendix A discusses the experimental setup for characterizing embedded components
on MCMs.
2.2 Embedded Capacitor Circuit Model
A circuit model o f the embedded capacitor and interconnect suitable for use at
microwave frequencies is shown in Fig. 2.3(a). Capacitance Cp represents the parallel
plate capacitance while Rp represents the dissipative loss o f the dielectric (Agilent, 2003;
Burghartz et al., 2003).
The elements R\ and L\ model the series resistance and
inductance o f the interconnect and the capacitor’s plates respectively.
Parasitic coupling exists between each plate o f the capacitor and the ground plane
through the Si02 dielectric and the silicon substrate.
Figure 2.3(a) includes parasitic
impedances in parallel with each terminal o f the capacitor to model this effect. As shown
in the figure, elements Rox and Cox model the parasitic resistance and capacitance through
the SiC>2 dielectric between the capacitor’s top plate and via stack and the pow er plane.
Elements Rs\ and Cs\ model the parasitic resistance and capacitance through the silicon
substrate (Hasegawa, 1967) between the capacitor’s bottom plate and the ground plan.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
18
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
I,
rAAMr-i
1
2
AAAAr— W
AMAr— W --------1[
r
c.p
C,ox
y
R,ox
(a)
(b)
Fig. 2.3 Circuit models of the embedded capacitor and interconnect, (a) Complete
model, (b) Series equivalent circuit between terminals 1 and 2.
Measurements show that the top plate parasitics Cox and Rox are negligible so they are
not considered further.
Two conditions make it possible to neglect the bottom plate
parasitics Csj and Rsj. The first instance occurs when the capacitor is connected as a oneport. In this case the capacitor’s bottom plate, terminal 2 in Fig. 2.3(a), is connected to
the ground plane, effectively shorting RSI and CSi. The second instance occurs when the
silicon substrate below the capacitor’s bottom plate is removed by substrate
micromachining. Measurements show the latter mitigates substrate parasitics.
The impedance between terminals 1 and 2 in Fig. 2.3(a) is
Z —
+ j(oL\ H— —
(2 .1)
Figure 2.3(b) shows a series equivalent circuit between terminals 1 and 2 obtained after a
parallel to series conversion o f the parallel combination o f Cp and R p. Note that after the
conversion, the model is no longer congruent with the actual structure, so the equivalent
series resistance and capacitance become frequency dependent. In addition, the product
RpCp appears in both expressions, which is less satisfying physically. The expression for
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.3: Quality Factor o f Embedded Capacitors
19
the total series resistance in Fig. 2.3(b) predicts that the series resistance o f the capacitor
will rise as the frequency decreases because o f dielectric loss.
At a sufficiently high frequency, the small reactance o f Cp effectively shorts out Rp
leaving only the interconnect resistance R\. Under this condition the impedance o f the
series equivalent circuit, Fig. 2.3(b), becomes
\
Z = R + j X = R x + j a>Li
v
—
o)C,
(2 .2)
The reactance X o f Eq. (2.2) is zero at roo = \I{L\CV), the self-resonant frequency o f the
series equivalent circuit. Thus, taking the real part o f both sides o f Eq. (2.2) at a)0 gives
R x =Re(z(®0)).
(2.3)
Setting the reactance A in Eq. (2.2) equal to zero and solving for Lx at &>0 gives
Next, taking the imaginary portion o f both sides o f Eq. (2.2) and applying Eq. (2.4) to
eliminate L\ and solving for Cp yields
(2.5)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
20
after which L x can be found. Note that Eq. (2.5) includes a correction term to account
for the capacitor’s finite-self resonant frequency, so it is valid over a wide range of
frequencies. Evaluating this expression at co « o) q minimizes the impact o f any error in
the measurement of a>0 .
Finally, solving Eq. (2.6) for Rp results in
* pp W
w v= -
/
Re
1
\
•
(2 .6)
VZ- Ri ~jo)Lx
Equation (2.6) for R p( oj) accounts for the observation that dielectric loss varies as a
function o f frequency (Wedge et al., 1991; Gupta et al., 1979). A later section develops a
simple scaling relationship that provides Rp for any frequency from a single impedance
measurement.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.3: Quality Factor o f Embedded Capacitors
21
2.3 Quality Factor o f Embedded Capacitors
The quality factor, Q, o f a reactive component is an important performance metric and is
defined as
Q = 2*
energy stored-------------energy loss in one oscillation cycle
(2 ?)
For capacitors, only the energy stored in the electric field is o f concern— any energy
stored in magnetic fields due to interconnect inductance is parasitic. Rewriting Eq. (2.7)
for the case o f a capacitor in a general series RLC circuit results in
_
_
peak electric energy - peak magnetic energy
WE - WM
energy loss in one oscillation cycle
WL
Q = I j t — —----------- ;-------------------------------------------------- = L tc ------------------,
(2 .8)
ji
2 ft I 2R
where WE = — ~— , WM = - 5— , and WL =
— and I0 is the peak current in the
2 m zC
2
o) 2
circuit, following Pozar (1990). Incorporating the definitions for WE, WM, and WL into
Eq. (2.8) gives
Q
0)1
o jC
R
^ ' Im (z )
Re(z) ’
(2.9)
where Z = R + j coL-(oC
Substituting the appropriate values from the embedded capacitor’s series equivalent
circuit in Fig. 2.3(b) for R, L, and C in Eq. (2.9) and rearranging yields
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
22
1
Q=
w
i 3
-• \ - 6 ) 2L xCp 1 +
l + (v R pCv ) 2\ {
V
or
intrinsic
ohmic
-resonance •
(2 . 11)
The first factor in Eq. (2.10) is the intrinsic quality factor o f the capacitor itself—
designated intrinsic >n Eq. (2.11). The second factor in Eq. (2.10) accounts for the ohmic
loss in the interconnect and is designated Fohmjc in Eq. (2.11). The third factor in Eq.
(2.10) accounts for the self-resonance loss due to the inductance L\ and is designated
^self-resonance
Eq. (2.11). The final two factors have values between 0 and 1 to account
for the degradation in Q due to the resistive and inductive interconnect parasitics.
Reducing either the interconnect resistance R\ or the interconnect inductance L\ increases
the value o f the corresponding factor and the Q o f the embedded capacitor.
In order to understand better the fundamental properties o f embedded capacitors,
consider the factor i?pCp in intrinsic •
Applying the parallel plate model for the
capacitance Cp and the resistance Rp (e.g., Wadell, 1991) to express this product in terms
o f the capacitor’s geometric dimensions and dielectric properties results in,
— = P£ >
(2 . 12)
where A is the capacitor plate area, d is the spacing between the plates, and s and p are
the dielectric permittivity and resistivity, respectively. Equation (2.12) demonstrates that
the product R PCP is fixed for a particular family o f embedded capacitors since it depends
only on the resistivity and permittivity o f the dielectric material, not the construction o f
the individual capacitors.
Hence,
£?jntrjnsic
is expected to be the same for every
embedded capacitor in a family. Since the product o f RpCp is constant, reducing Cp
must increase Rp and consequently F 0hmic and Q, as Eqs. (2.10) and (2.11) demonstrate.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.4: One-Port High-Frequency Measurement Results
23
Thus, at a given frequency, electrically smaller capacitors o f this type will always achieve
a higher Q than larger value capacitors, assuming R\ and L\ remain the same.
2.4 One-Port High-Frequency Measurement Results
In order to provide experimental verification o f the circuit model introduced in Sect. 2.2,
scattering parameters were obtained and analyzed for the set o f six PMCM-D one-port
embedded capacitors shown in Table 2.1.
The measurements were obtained with an
Agilent E8361A network analyzer attached to 150-pm pitch coplanar GSG RF probes
calibrated by characterizing short, open, load, and thru (SOLT) structures and an alumina
impedance standard substrate (ISS) containing a laser-trimmed 50 Q resistive standard.
After calibration, scattering parameters were measured over the range o f 0.010 to 25 GHz
for each capacitor. The results were then expressed in terms o f an impedance Z,
Z = 5 0 1^
1 .
1-Sn
(2.13)
Table 2.1 records the values for the self-resonant frequency fo and the circuit model
parameters R,, L\, Cp, and Rv for the six one-port capacitors obtained from the procedure
described in Sect. 2.2 to the results from Eq. (2.13).
Equation (2.5) for the parallel
capacitance Cp was evaluated at 10 MHz— well below the lowest self-resonant frequency
o f any capacitor. Equation (2.6) for the parallel resistance R v was evaluated at 75 MHz.
As shown in Table 2.1, self-resonant frequency fo increases as the capacitance Cp
decreases as expected. The values for series inductance L\ are very similar for each case.
The increase in series resistance R\ with frequency is attributed to rising ‘skin effect’
losses with increases in frequency. Figure 2.9 shows that a logarithmic plot o f the self­
resonant frequency^ versus capacitor series resistance R results in a line with slope close
to y[f , which is characteristic o f skin-effect loss (Wedge et a l , 1991). An approximate
inverse relationship between Cp and i?p, discussed in the previous section, is clearly
evident from the results in the table as is the approximately constant value o f the RVCV
product for the six different capacitors.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
24
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
Capacitor
Area fumxuml
fo (GHz)
QipF)
U (PH)
R, (Q)
Rd( kfl)
RPCp (n S)
1
426 x 426
2.26
81.0
61.3
0.149
4.68
0.379
2
319x319
3.13
45.0
57.4
0.217
10.1
0.455
3
295 x 295
3.20
38.8
63.9
0.217
10.3
0.400
4
1 4 3 x 143
7.07
8.93
56.8
0.303
44.1
0.394
5
1 0 5 x 105
9.32
4.84
60.3
0.336
87.5
0.424
6
59x59
16.1
1.52
64.7
0.442
284
0.432
Table 2.1.
Test results for six one-port embedded capacitors. Self-resonant
frequency and circuit model parameters are found from the procedure in Sect. 2.2
with Z obtained by substituting measured scattering parameters into Eq. (2.13).
Figure 2.4 shows Rp from Eq. (2.6) obtained with measured Z from Eq. (2.13) and R,
and Li from Table 2.1 for the six one-port embedded capacitors. This figure indicates that
Rp falls approximately at 1I f which is attributed to the effects o f dielectric loss.
The 1I f slope o f these lines suggests a simple frequency scaling technique to
determine R p{ f ) ■ Once Rp is known at a frequency /m, it is possible to determine Rp at a
frequency/ by scaling Rp by f j f or,
* p ( / M Pm - y >
(2-14)
where Rpm is the value o f Rp obtained at the frequency/,!.
Figure 2.5 plots Cp and Gp = MRP as a function o f plate area for the six one-port
embedded capacitors shown in Table 2.1. Regression analysis o f the data yields 446.3
•j
y
pF/mm for the capacitive density C \ and 1.151 mS/mm for the conductive density GaRearranging the parallel plate capacitor and resistor equations for the capacitive and
conductive densities results in Ca = Cp/A = e ld and Ga = M{ARP) = \/(pd) where, as
before, d is the dielectric thickness and A is the plate area. Then, assuming e r = 8.8 for
anodized aluminum (Keeney et al., 2002) w ith Ca = 446.3 pF/mm from Fig. 2.5 gives d
= 0.175 pm. This is consistent with the capacitive density o f 460 pF/mm for a 0.170 pm
thick anodized aluminum dielectric reported by Keeney et al. (2002). The resistivity of
the anodized aluminum dielectric is found to be p = 5 k Q m at 72.5 MFIz.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.4: One-Port High-Frequency Measurement Results
Measured 0 (± lcr)
Regression ---------
m = -0.944
m = -0.943
m = -1.08
m = -1.04
m = -1.09
Frequency (GHz)
Fig. 2.4 Measured parallel resistance Rp for Ci-C6. Regression lines mark the linear
least squares fit of Rp. Slope m indicates 1// increase of dielectric loss. Error bars
show ± lcr distribution expected for data with normally distributed error.
100
250
Cp 0 (± lcr)
90
Regression -------Gp
o (±lcr)
80
Regression
70
O
225
ir
200
175
60
150
: 50
125
40 -
100
30
75
20
50
10
GA= 1151.3 pS/mm2 - 25
CA= 446.33 pf/mm2
i
0.15
0.2
X^L
a&'L
fw
0.
0
1
i
0.05
0.1
(O
3
CD
Capacitor plate area (mm )
Fig. 2.5 Measured conductance Gp and capacitance Cp for Ci-C6- Regression lines
mark the linear least squares fit of the capacitive and conductive densities CA and GA.
The y intercept for GA is -3.180 pS while the y intercept for CA is -125.9 fF. Error
bars show ± lcr distribution expected for data with normally distributed error.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
26
Chapter 2: Characterization and M odeling o f MCM-D Integrated Capacitors
The intrinsic quality factor for the one-port embedded capacitors is found by
combining the definition o f ^intrinsic >Eqs. (2.10) and (2.11), the scaling relationship for
Rp, Eq. (2.14), and the definitions o f capacitive and resistive densities. Hence,
Sintrinsic
J
GA
=
176.4 .
(2A9>>
Substituting the result o f Eq. (2.19) for a>RpCp into the expressions for resistance and
capacitance in Fig. 2.3 (b) demonstrates that the error in the ‘high-frequency’ equivalent
circuit, Eq. (2.2), is approximately 3 parts in 105 for the series capacitor and less than
12% at the h ighest/0, 16.1 GHz, for the series resistor.
Establishing the accuracy o f the embedded capacitor and interconnect circuit model
requires a comparison o f measurement results obtained from Eq. (2.13) for both the real
and imaginary portions o f the embedded capacitor’s total impedance Z = R + j X with
model results obtained by substituting the values in Table 2.1 in Eq. (2.6) with Rp from
Eq. (2.14). Figure 2.6 compares the measured and modeled series resistance R o f the six
embedded capacitors. The increase in R for all the capacitors at low frequencies is due to
dielectric loss as inferred from Fig. 2.3(b) and Eq. (2.14). The increase in measured R for
all o f the capacitors above « 6 GHz is due to skin-effect loss.
Skin effect loss causes error in the modeled series resistance R in two different cases.
The first instance is when the capacitor’s self-resonant frequency falls in the skin-effect
range. Applying Eq. (2.3) in this case results in a value for R\ that includes unmodeled
skin-effect loss. This explains the discrepancy between modeled and measured R in the 1
to 10 GHz range for capacitors C4 , C5 , and C&.
The second instance is when the
capacitor’s self-resonant frequency falls below the skin-effect range. Applying Eq. (2.3)
in this case results in a value for R\ that does not account for skin-effect loss in the region
above 6 GHz. This explains the discrepancy between modeled and measured R above 10
GHz for Ci, C 2, and C3 . Since capacitors normally operate only below their self-resonant
frequency, only the first case (i.e., R for C4 , C5 , and G,) results in an error, which is
important from a practical standpoint.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.4: One-Port High-Frequency Measurement Results
27
Figure 2.7 compares the measured and modeled imaginary part o f Z obtained by
applying C = \l{o>X) to express this quantity as the capacitance o f C\, C3 , and C(,. The
agreement between measured and modeled results in the figure is typically within a few
percent.
Figure 2.8 shows the quality factor for the six embedded capacitors obtained by
applying Eq. (2.13) with measured Z, Eq. (2.13), versus the modeled quality factor
obtained by substituting the values in Table 2.1 in Eq. (2.10) with Rp from Eq. (2.14). As
shown in the figure, the model slightly underestimates Q for C4 , C5 , and C(, just below
each capacitor’s self-resonance frequency.
This occurs because the model slightly
overestimates the series resistance R at the same frequencies, as discussed previously.
The scatter in the measured Q o f C5 and Q, at low frequencies is attributed to the
difficulty o f accurately determining the quality factor o f very low-loss, i.e., high-Q,
components.
Examination o f the factors o f Eq. (2.10) by substituting values from Table 2.1 shows
that F ohmic accounts for most o f the reduction in Q due to the relatively large
interconnect resistance R\.
Steps taken to reduce this resistance could allow the
capacitor’s Q to more closely approach intrinsic •
Figure 2.9 compares the measured impedance |Z| from Eq. (2.13) for the six
embedded capacitors with the modeled impedance |Z| obtained by substituting the values
in Table 2.1 in Eq. (2.1) with Rp from Eq. (2.14).
The capacitor-interconnect
combination acts as a series resonant circuit so that the lowest ac impedance to ground is
found at / 0 . At frequency / 0 the inductive and capacitive reactances offset each other
completely and only the small series resistance R\, indicated by
value o f each curve in Fig. 2.9, remains.
at the minimum
Figure 2.9 also shows that the fractional
bandwidth o f the series resonant RLC circuit decreases for the smaller capacitors as Q
increases from 5.84 for C\ at 2.26 GHz to 14.8 for CV, at 16.1 GHz.
It is also interesting to note that, because o f the series resonance o f L\CP, the
impedance o f the embedded capacitor-interconnect circuit grows as frequency increases
above fo. This behavior is different than that o f an ideal capacitor whose impedance
decreases as frequency increases.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
28
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
10
1
Measured 0
Predicted -
o
o: 10
10
10
10
Frequency (GHz)
10
Fig. 2.6 Embedded capacitor series resistance R. Measured R increases at higher
frequencies due to skin-effect loss not accounted for in the model. R increases at
lower frequencies due to dielectric loss in series with the capacitor predicted by the
model.
300
200
Measured 0
Predicted -
100
Q.
o o o(mmmmmm
-100
-200
-300
Frequency (GHz)
Fig. 2.7 Embedded capacitor capacitance C = ll(coX). The model successfully
predicts the capacitance to 25 GHz. Results for capacitors C2, C4, and C5 are similar.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.5: One-Port High-Frequency Measurement Results
200
Measured 0
Predicted -
180
160
140
120
& 100
40
Frequency (GHz)
Fig. 2.8 Embedded capacitor and interconnect quality factor Q. The scatter in the
measured Q o f C5and C6 at low frequencies is attributed to measurement error.
Measured 0
Predicted R, .
Frequency (GHz)
Fig. 2.9 Embedded capacitor impedance |Z|. R, from Table 2.1 is shown by “ • ” at
the bottom of each curve. Dashed line has a positive slope of 2:1 indicating the
expected rate of increase in resistance due to skin effect losses in the conductor.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 2: Characterization and M odeling o f MCM-D Integrated Capacitors
30
2.5 Two-Port High-Frequency Measurement Results
Two-port scattering parameters were measured from 0.050 to 25 GHz for the two sets o f
PMCM-D two-port embedded capacitors with and without the silicon substrates
introduced in Sect. 2.2 and shown in Fig. 2.1(b).
In order to determine the series
impedance Z and parallel impedances Z ox and Z sj for the circuit model in Fig. 2.10(a),
it is necessary to apply the relationships shown in Fig. 2.10(b) after first converting
scattering parameters to admittance parameters. Once this is done it is possible to solve
for the element values o f the circuit model o f the series impedance Z shown in Fig.
2.10(a) by the procedure discussed in Sect. 2.2. Then the model parameters Cox and Rox
and Csi and Rst in Fig. 2.10(a) are found from the appropriate real and imaginary parts o f
Zox and Zsi.
Measured and predicted results for the two-port embedded capacitors for capacitance,
quality factor, and impedance are similar to what is shown in Figs. 2.7-2.9 in the
previous section for the one-port embedded capacitor.
'OX
Fig. 2.10 Two-port representation of embedded capacitor equivalent circuit, (a)
Circuit model o f the embedded capacitor and interconnect showing the relationship
between circuit model parameters and parallel and series elements in the n equivalent
circuit, (b) n equivalent circuit showing relationship between two-port admittance (Y)
parameters and series impedance Z and shunt impedances Z ox and Z sj.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.5: Two-Port High-Frequency Measurement Results
31
Capacitor
Standard
Q o jm
Micromachined
C„ (fF)
Standard
c si (tF)
Micromachined
C,( (fF)
1
69.6
69.4
448
109
2
51.6
70.7
326
108
3
56.3
73.3
313
115
4
65.1
67.7
187
75.1
5
57.8
60.9
150
71.4
6
58.1
58.7
118
72.2
Table 2.2 Two-port embedded capacitor oxide and substrate capacitance. Table
compares Cox and CSI for PMCM-D embedded capacitors with and without the silicon
substrate measured at approximately 200 MHz.
At microwave frequencies the relatively large parasitic bottom plate capacitance o f
the two-port embedded capacitors appears in parallel with terminal 2 o f Fig. 2.10(a).
This increases the capacitor’s dissipative loss as a result o f signal dissipation in the
dielectric. The impedance mismatch caused by the shunting effect o f Z si also increases
the reflection loss. In order to demonstrate the reduction in substrate parasitics achieved
by removal o f the silicon substrate beneath the bottom plate o f the capacitor, Cox and CSj
were obtained from measurements for both types o f two-port capacitors after the manner
outlined in Fig. 2.10. These results are presented in Table 2.2, which compares values for
Cox and CSi for two-port embedded capacitors with and without the silicon substrate. As
may be seen from the table, the presence or absence o f the silicon substrate has little
effect on the oxide capacitance Cox. The substrate capacitance CSj, however, is reduced
by as much as one fourth for embedded capacitors without the silicon substrate as
compared with the embedded capacitors with the silicon substrate in place.
The effect o f substrate micromachining on the microwave performance o f two-port
embedded capacitors is shown in Fig. 2.11 which compares measured insertion loss, IL =
-201og|5,2i|, and return loss, RL - -201og|Sn|, in dB, for embedded capacitor Ci fabricated
with and without the silicon substrate.
As shown in the figure, the micromachined
capacitor has less than one half o f the minimum insertion loss o f the other capacitor while
achieving almost a decade o f additional bandwidth. The minimum return loss is greater
than 20 dB for the standard capacitor but greater than 30 dB for the micromachined
capacitor—equivalent to a reflection due to the mismatch o f less than 0.1% o f the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
32
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
0.05
0.10
0.15m
2
0.20 «
0.25 £
2 25
0.30 S
0.35
40
Measured o, 0
Predicted------
0.40
0.45
45
0.50
Frequency (GHz)
Fig. 2.11 Two-port embedded capacitor insertion loss and return loss. Capacitor Ci
with silicon substrate in place “o”. Capacitor Ci with silicon substrate removed “ 0 ”.
incident power. At 25 GHz the insertion loss for the micromachined capacitor is only
0.35 dB as compared with 3.0 dB for the standard capacitor—an improvement o f almost
2.7 dB. At 25 GHz the return loss for the micromachined capacitor is 10 dB greater than
the return loss for the standard capacitor.
These results demonstrate the performance
improvement achieved at microwave frequencies by removing the silicon substrate from
beneath the bottom plate o f the two-port embedded capacitors.
The substantial reduction in substrate parasitics from removing the silicon substrate
also allows accurate modeling o f the insertion loss o f the two-port embedded capacitor
computed from the series impedance Z, Eq. (2.1), as is also shown in Fig. 2.11. The
modeled return loss is shown for comparison and follows the trend o f the measured
results except near / 0 , approximately 1.02 GHz. At that frequency the series circuit is
self-resonant and the impedance Z equals the interconnect resistance R\, so little o f the
power incident on the capacitor is returned to the source by reflection. The insertion loss
for all six micromachined capacitors was approximately the same at 25 GHz, but overall
bandwidth decreased proportionally for the smaller capacitors as a result o f their
increased insertion loss at lower frequencies as compared with that o f capacitor C\.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.6: Conclusion
33
2.6 Conclusion
PMCM-D embedded capacitors constructed by separating metal layers with an anodized
aluminum dielectric appear satisfactory for many microwave circuit integration
applications requiring capacitive coupling and bypass up to at least 25 GHz. A simple
model o f the embedded capacitor and interconnect demonstrates good agreement between
measured and modeled results for both the one-port and two-port PM CM -D embedded
capacitors. Analysis indicates that the electrical performance o f the one-port capacitors is
limited primarily by the parasitic resistance o f the associated interconnect and via stack
used to connect to the embedded capacitor.
For two-port PM CM -D embedded
capacitors, removing the silicon substrate by micromachining reduces the bottom plate
capacitance by as much as a factor o f four as compared with an em bedded capacitor with
silicon substrate.
Removing the silicon substrate serves to halve the embedded
capacitor’s minimum insertion loss while decreasing the insertion loss at 25 GHz from
3.0 dB to 0.35 dB, as compared with an identical capacitor that retains the silicon
substrate. Substrate removal also allows use o f a simple model to predict the embedded
capacitor’s insertion and return loss. The insertion loss prediction is accurate to within a
few tenths o f a dB over the entire frequency range to 25 GHz, w hile the return loss
prediction has the same accuracy except near the capacitor’s self resonant frequency.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
34
Chapter 2: Characterization and Modeling o f MCM-D Integrated Capacitors
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Three
Design and Characterization of
Multichip-Module Transmission Lines
Multichip modules must provide for high-performance interconnects between circuit
components
if they are to
serve
successfully as
a platform
for integrating
millimeter/microwave applications. MCM-D interconnects are usually in the form o f onwafer microstrip transmission lines or coplanar waveguide. In order to achieve optimum
performance, on-wafer interconnects must have low conductive and dielectric losses to
minimize signal attenuation, uniform trace width to maintain constant line impedance,
and a propagation mode that is linear with frequency to minimize signal dispersion.
The first section o f this chapter reviews transmission line theory in order to highlight
the performance parameters relevant to the transmission line design and characterization
problem.
The sections that follow extend the theory by identifying the performance
parameters for the particular cases o f microstrip and coplanar waveguide transmission
lines. They also discuss the problem o f experimentally determining these performance
parameters for microstrip transmission lines and coplanar waveguide implemented in
MCM-D technology.
3.1 Quasi-TEM Transmission Line Analysis
In general, an electromagnetic wave propagating along an inhomogeneous transmission
line such as microstrip line or coplanar waveguide contains both transverse and
longitudinal field components.
At low frequencies, the strength o f any longitudinal
components o f the electromagnetic wave are much smaller than those o f the w ave’s
transverse components and are neglected— an approach referred to as the quasi-transverse
35
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
36
Chapter 3: Design and Characterization of MCM Transmission Lines
electromagnetic, or quasi-TEM, approximation (Edwards, 1995; Cheng, 1990). At higher
frequencies, the possible longitudinal field components increase in strength and number,
with the result that the quasi-TEM approximation is increasingly in error. At sufficiently
high frequencies non-TEM propagation modes become dominant. Fortunately, the small
physical size o f an MCM microstrip transmission line results in a cutoff frequency for the
first higher-order mode o f approximately 1 THz, well above any operating frequencies o f
interest for these structures (Gardiol, 1994; Tuncer and Neikirk, 1992). Thus, quasi-TEM
analysis is useful for the analysis and design o f inhomogeneous transmission lines
operating well into the gigahertz frequency range.
The quasi-TEM field distribution is equivalent to one obtained by assuming the
transmission line consists o f distributed circuit elements, as depicted in Fig. 3.1. This is
because the form o f the wave equations that describe the propagation o f the electric and
magnetic fields and the form o f the voltage and current wave equations along a
transmission line are identical (Gardiol, 1994).
Applying K irchoff s voltage and current laws (KVL, KCL) to the incremental circuit
model in Fig. 3.1 leads directly to the wave equations for voltage and current in the
transmission line as follows (Dworsky, 1988; Gupta et al., 1979). By KVL, the voltage
drop between the outside nodes in Fig. 3.1 is
/
V ( : ) - V ( z + Az)y
zl{2)
(3.1)
v
Applying KCL at the upper right hand node leads to
(3.2)
Taking the limit as the length differential A z -> 0 in the above equations yields
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.1: Quasi-TEM Transmission Line Analysis
37
.
^
^ +Az)
— -AAAA/------i(z+Az)
f(z)
Y=G+jcoC
Zo
1
1 * 1
k-
-A z -
Fig. 3.1 Distributed circuit model for a quasi-TEM transmission line. An
incremental line section of length A z of an infinite length line is shown. In the
circuit Z is the impedance of the series branch while Y is the admittance of the
parallel branch. Component values represent per-unit-length quantities.
dV
dz
dl_
dz
=- z i ,
(3.3)
=-YV.
(3.4)
Eliminating I and V in Eqs. 3.3 and 3.4, respectively, results in
d 2V
Z Y V = 0,
(3.5)
Y Z I = 0.
(3.6)
dz2
d 2I
dz2
Assuming a variation along the z-axis o f Vae ±yz for the voltage wave and I 0e ±yz for
the current wave, where y = a + JP and a and p are the attenuation and phase constants
respectively, Eqs. 3.5-3.6 lead to two one-dimensional eigenvalue equations
(y1 - Z Y ) v oe ±^ = 0,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(3.7)
38
Chapter 3: Design and Characterization o f MCM Transmission Lines
= 0.
(3.8)
Since Z Y = Y Z , solving for the eigenvalues for either case results in
Y =±4ZY.
(3.9)
The two propagation constants in Eq. (3.9) describe waves that may propagate with
attenuation in the forward and reverse directions (± z ) along the transmission line.
In order to find the characteristic impedance Z 0 o f the transmission line, note in Fig.
3.1 that Z 0 looking into any portion o f a section o f infinite transmission line is constant
(Lee, 1998). Thus, applying the observation that Y is in parallel with Z 0 leads to
Zn —Z A z +
(3.10)
Expanding Eq. (3.10) and canceling like terms
Zq2 - y + Z 0 Z A z .
(3.11)
In the limit as A z -» 0, Eq. (3.11) simplifies to the characteristic impedance o f the line,
In the lossless case, (R = G - 0), the characteristic impedance Zq becomes
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.2: Standard and Embedded Microstrip Line
39
while the propagation constant y reduces to
(3.14)
from which,
(3.15)
P = ± W LC
In the lossy case, a * 0 so the wave amplitude decreases as it propagates along the
transmission line as a result o f ohm ic and dielectric losses.
Such losses grow as the
operating frequency increases (Faraji-Dana and Chow, 1990; Pucel et ah, 1968). Ohmic
loss results from the imperfect conductors used to construct the transmission line and is
incorporated into the resistance R in Fig. 3.1. Ohmic losses increase as the square root o f
frequency because the rising internal impedance o f the conductor results in current
crowding around the conductor periphery—the so-called “skin effect” (Weeks et al.,
1979). Dielectric loss from dissipation modeled by the shunt conductance G, Fig. 3.1,
results from the imperfect insulators employed as dielectrics, and grows in direct
proportion to increasing frequency (Wedge et ah, 1991).
The quality factor o f the line, Q, is a convenient method to specify line loss
(3.16)
2 « to t
2 {a c + « d )
Formulas for estimating dielectric loss, a A, and ohmic loss, etc, in microstrip line are
given in the literature (Gupta et ah, 1979; Wedge et ah, 1991). Typically, conductive
losses dominate up to a certain frequency, above which dielectric losses prevail.
3.2 Standard and Embedded Microstrip Line
Standard microstrip line, commonly found on planar structures, has been explored
extensively theoretically and experimentally (Itoh, 1989; Bogatin, 1988; Wheeler, 1977).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
40
Chapter 3: Design and Characterization o f MCM Transmission Lines
w
t
A
h
* r
1
r
Fig. 3.2 Transverse section of standard microstrip line. The microstrip line is
fabricated by overlaying a conductive trace on a dielectric backed by a conducting
ground plane that is much wider than the microstrip line. Ground plane thickness is
assumed to be more than a skin depth at the frequency o f interest.
Such lines are constructed by overlaying a conductive strip on a dielectric material
backed by a ground plane as shown in Fig. 3.2. In the figure, w is the width o f the
microstrip line, t is the thickness o f the microstrip line, h is the height o f the microstrip
line above the ground plane, and eTis the relative permittivity o f the supporting dielectric
material.
Expressions for the characteristic impedance o f microstrip line commonly
assume the dielectric covered ground plane shown in Fig. 3.2 is much w ider than the
microstrip line.
W adell (1991) consolidates results from many approaches to estimating the
characteristics o f standard microstrip transmission lines. In order to assess the accuracy
o f these approaches, Bogatin (1988) compares a number o f theoretical predictions with
experimental results. He concludes that W heeler’s equation,
377
ln( 1.0 +
+ 1.0
4"
.
4.0 h 14.0 + 8.0/er 4.0 h
w
14.0 + 8.0/ffj. 2 / 4.0 h \ 2
1L0
11.0
1.0 + 1.0/e
H------------------- -71
w
2
2.0
(3.17)
predicts the characteristic impedance o f the finite thickness standard microstrip line
depicted in Fig 3.2 with an error o f less than 3% for all ratios o f h / W .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.2: Standard and Embedded Microstrip Line
41
W heeler derived the form o f Eq. (3.17) assuming that the microstrip has no thickness.
Waddell accounts for the additional capacitance in the practical case o f a microstrip line
with finite conductor thickness by defining an equivalent width
w - w + A w'
(3.18)
for which a vanishingly thin line o f width W has the same Zo as the thick line o f width w.
The correction term Aw' is given by
4e
Aw,= , ( i . o + i . Q K ) ln
2n
m
2+
(3.19)
1/ n
w/t + 1.1
The effective relative permittivity s T eff is found from an improved form o f
Schneider’s equation (Waddell, 1991),
£r +1.0
£ i eff -
2.0
+
Gr —1.0
1 .......
2.0, 1 +
(3.20)
12.0 h
w
where w/h > 1. The effective relative permittivity is the equivalent relative permittivity
required if the inhomogeneous dielectric shown in Fig. 3.2 is replaced with a
homogeneous dielectric that fills the half-space above the ground plane without changing
the characteristic impedance (Gardiol, 1994).
Fully or partially embedded or ‘buried’ microstrip lines are commonly encountered in
MCM-Ds, a result o f the overglass layer that is applied to seal the wafer, as shown in Fig.
3.3 (Ryu, 2000).
The additional dielectric with thickness b results in an increased
capacitance between the microstrip line and ground, a decreased Z 0 , and an increased
et
eg-, as compared with standard microstrip line. W heeler’s and Schneider’s formulas
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
42
I |«--------- W--------- *| i
b
f
t
1
.
i.
t
h
f
(a)
-WKKKM
vv
(b)
Fig. 3.3 Transverse section of an embedded or ‘buried’ microstrip line, (a) Fully
embedded microstrip line. This situation occurs when an overglass layer is applied
to seal the wafer, (b) Partially embedded microstrip line. This situation occurs when
the microstrip line in (a) is plated with a layer of gold to reduce loss, cf. Fig. 1.3 In
either case, the microstrip line is called ‘inhomogeneous’ because of the presence of
two different dielectrics.
do not explicitly take this additional dielectric covering into account. Nevertheless, these
formulas provide a useful starting point for designing fully or partially embedded
microstrip line when b/h is small.
Table 3.1 lists the predictions o f Eq. (3.17) and Eq. (3.20) for the characteristic
impedance Z 0 and effective relative permittivity e x eff for five PMCM-D microstrip
lines o f decreasing widths studied here. Each microstrip line consists o f a 5-pm thick
metal layer on top o f 31 pm o f SiC>2 dielectric ( s r = 4.2).
As the table shows,
characteristic impedance Z 0 increases with decreasing line width while the effective
relative permittivity s T eff decreases with decreasing line width. Interpolating between
the values in Table 3.1 demonstrates that a 57.2-pm width PMCM-D microstrip line will
have a Z 0 « 50 Q.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.2: Standard and Embedded Microstrip Line
Width (um)
168
60
56
52
48
Z o (Q )
24.3
48.6
50.6
52.7
55.0
43
Sr
eff
3.49
3.20
3.18
3.16
3.14
Table 3.1 Predicted Z0 and s Teff for a 5-pm thick PMCM-D microstrip line.
Figures 1.6 and 3.3(b) illustrate how plating a gold layer 20-pm thick on top o f the 5pm thick aluminum signal layer results in a 25-pm thick, gold-plated conductor. Table
3.2 lists the predictions o f Eq. (3.17) and Eq. (3.20) for the characteristic impedance Zo
and effective relative permittivity s T eff for microstrip lines formed from this 25 pmthick, gold-plated layer. The predicted behavior o f the characteristic impedance Zo and
effective relative permittivity e x eff with decreasing microstrip w idth for the gold-plated
metal layer is similar to the previous case. Interpolating between the values in Table 3.2
demonstrates that a 48.4-pm width, gold-plated microstrip line will provide a Zo « 50 Q.
Width (um)
50
48
46
44
40
Z/Q )
49.2
50.2
51.3
53.3
54.7
gr eff
3.15
3.14
3.13
3.12
3.10
Table 3.2 Predicted Z0 and s Teff for 25-pm thick, gold-plated PMCM-D microstrip
line.
The characteristic impedance o f microstrip line is a function o f the microstrip line
geometry and the relative dielectric permittivity, as Eq. (3.17) demonstrates.
The
thickness of the dielectric layer in MCM-D processes is typically set by fabrication
restrictions not under the designer’s control. Because o f this, the width o f the microstrip
line is the only free parameter controlling its characteristic impedance. Thus, it is not
possible to, for example, adjust the width o f the microstrip line in order to reduce ohmic
losses by increasing width without simultaneously reducing the line’s Z0.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
44
Chapter 3: Design and Characterization o f MCM Transmission Lines
3.3 Coplanar Waveguide
Coplanar waveguide (CPW) is fabricated on top o f a dielectric material by centering a
signal line between parallel ‘ground’ lines, as shown in Fig. 3.4 (Wadell, 1991; Bahl and
Bhartia, 1988; Gupta et al., 1979). This structure provides an additional degree o f design
freedom that is not available in standard microstrip line. In the figure, a is the width of
the signal line, b is the separation o f the ground lines, t is the thickness o f the lines, h is
the thickness, and er is the relative permittivity o f the dielectric material. Jackson (1986)
reports that coplanar waveguide provides lower loss and less dispersion than microstrip
line for characteristic impedances near 50 Q.
Closed-form expressions for computing i) the characteristic impedance and ii) the
relative dielectric constant for CPW are available from several sources (e.g., see Gupta et
al., 1979). W addel (1991) provides convenient forms for computing the characteristic
impedance and relative dielectric constant that also correct for the finite thickness o f the
metal layer. Both o f these functions are expressed as ratios o f elliptic integrals that are
parameterized by k , k ' , k l , k t ' , k ], a n d k ]'.
These variables are in turn functions o f the
layout dimensions a and b as well as the layout dimensions corrected for conductor
thickness, at and bt. Waddel gives the characteristic impedance for CPW as
30.0;r K (k t ’)
(3.21)
The effective relative permittivity is the equivalent relative permittivity required if the
inhomogeneous dielectric shown in Fig. 3.4 is replaced with a homogeneous dielectric
that fills the space without changing the characteristic impedance. The effective relative
permittivity corrected for thickness is
e r eff ~~1
l.4t
(3.22)
K (k ')
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.3: Coplanar Waveguide
45
<- - - - - - - - - - ►
*0
........................
t
T
£r
'
i
h
r
Fig. 3.4 Transverse section of coplanar waveguide. CPW is fabricated by overlaying
conductive traces on top of a dielectric material that does not contain a ground plane.
The ground line width is assumed much larger than the signal line width.
and the effective relative permittivity for CPW is
s r - 1 .0 K (k') K {k x)
£r eff - i - 0 -
K{k) K {kx')
2.0
(3.23)
The widths and spacings corrected for finite conductor thickness are found by applying
1.25/
at = a + ■+
n
i. = bt
bt
1 + ln
(3.24)
l -25t + 1 + ln
n
(3.25)
The parameters for the ratios o f elliptic integrals are defined as
k - k ~ b
(3.26)
’
(3.27)
bt
k '= jl.0 - k 2
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(3.28)
46
Chapter 3: Design and Characterization o f MCM Transmission Lines
k t ' = y j \ . 0 ~ k t2 ,
(3.29)
sinh ^
(3.30)
=
sinh
v 4h )
k { = ^ l.0 -k x
(3.31)
Finally, an approximation o f the ratios o f complete elliptic integrals o f the first kind is
K{k )
K ( k •)
2.0 n
In 2.0
Vl.0 +
(3.32)
/ r 1+ ^ / l.O +
k
'
J l.0 + K ' - i l l . 0 + K'
for 0 .0 < ^ (x -)/^ (A r')^ l-0 a n d 0 .0 < a: < i /V 2 (Wadell, 1991).
Table 3.3 lists the predictions for the width and separation necessary for 50 Q
PMCM-D CPW, computed from Eqs. 3.21-3.32 for a 5-pm thick top metal layer over 31
pm o f Si(>2 dielectric, />y = 4.2. As the table shows, it is necessary to increase the ground
plane separation as the signal trace width increases to maintain constant
Zo-
The table
includes the predicted effective relative permittivity e T eff for CPW.
a (pml
50.0
b ('pm')
86.0
Z0(Q)
50.0
2.52
57.2
95.0
50.0
2.47
60.0
98.0
50.0
2.46
70.0
110.0
50.0
2.40
& eff
Table 3.3 Predicted a, b, and eTeff for Z„ = 50 Q PMCM-D CPW.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
47
3.4: Transmission Line Performance Characterization
Tables 3.1-3.3 indicate that it is possible to fabricate either a microstrip line or CPW
with an approximately 50 Q characteristic impedance.
3.4 Transmission Line Performance Characterization
A technique for gaining insight into transmission line performance is plotting the
insertion loss and the return or reflection loss versus frequency.
Insertion loss is a
connection’s signal reduction due to the combination o f conductive and dielectric losses,
plus signal reflection from any impedance mismatch. Mathematically, insertion loss is
defined as the fractional decrease in power transmitted to a matched load when a subject
device is ‘inserted’ or placed in series between a source and load, usually in an
impedance matched system. Expressed in decibels,
IL = —101og|iS'12|2 (dB).
(3.33)
It is possible to decompose Eq. (3.33) to separate the degree o f signal reduction due
to power dissipation within the subject device from the signal reduction due to the return
o f power to the source (Ginzton, 1957). The loss due to dissipation is
(3.34)
while the loss due to reflection is
(3.35)
where both Tosses’ represent the fractional decreases in power delivered to the load.
Notice that in terms o f decibels, insertion loss is equal to the sum o f the dissipative and
reflective losses. Also, for devices with characteristic impedances approximately equal
to the system impedance, little power is reflected so IL « L D .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
48
Chapter 3: Design and Characterization o f MCM Transmission Lines
A direct measure o f reflected source power is return loss RL defined as (Pozar, 1990)
i?Z = -101og|Sn |2 (dB),
(3.36)
which is the fraction o f power incident on a device that is returned to the source. In this
instance larger values o f return loss indicate the load reflects less o f the incident source
power and is a better match to the source impedance. Return loss and reflection loss
demonstrate approximately inverse behavior because an increase in either is always
associated with a decrease in the other. Note that when expressed as direct fractions,
rather than as dB, return loss and reflective loss sum to unity.
Return loss is a useful performance metric for systems with characteristic impedances
approximately equal to the system impedance because it depicts small reflections on an
expanded scale as compared with Lo, which facilitates performance comparisons. In the
case o f an on-wafer transmission line, the needed scattering parameters may be obtained
with a microwave network analyzer and wafer probing station.
Figure 3.5(a) shows one technique.
As shown in the figure, the microstrip line
stretches between the signal terminals o f the probe pads that are themselves in contact
with the GSG probes. Each pair o f ground pads is connected through via stacks to the
M CM -D’s ground plane which serves as the signal return.
Figure 3.5(b) depicts a similar technique for measuring the scattering parameters o f
CPW. The CPW signal and ground lines are connected between their respective pads
that are themselves in contact with the GSG probes. Substrate micromachining removes
the silicon substrate which leaves the CPW line and ground lines suspended by the
dielectric layer.
Scattering parameters were measured from 0.010 to 50 GHz for a 60-pm width, 10mm length PMCM-D microstrip line in the manner shown in Fig. 3.5(a). Fig. 3.6 shows
the total insertion loss, IL, and return loss, RL, for this microstrip line relative to 50 Q
source and load impedances. As shown in the figure, the insertion loss for the line is
slightly more than 2 dB/cm at 50 GHz. The figure also shows that the return loss is more
than 20 dB across the band. This indicates that the microstrip line reflects less than 1%
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.4: Transmission Line Performance Characterization
49
Ground plane
Via stacks to
ground plane
Probe
Probe
«
P o rt 1
Network A nalyzer
P o rt 2 »
(a)
Probe
Probe
CPW
«
P o rt 1
N etwork A nalyzer
P o rt 2 •
(b)
Figure 3.5 Microstrip line and CPW measurement setup, (a) Microstrip line is
connected between the signal terminals of the probe pads while the ground plane
serves as signal return, (b) CPW signal line and ground lines are formed from the
same metal layer and connected between their respective terminals on the probe pads.
o f the incident power back to the source. The return loss peaks at frequencies for which
the line is a multiple o f one-half wavelength because this length o f line does not
appreciably transform the 50 Q network analyzer load impedance which minimizes
reflections.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
50
Chapter 3: Design and Characterization o f MCM Transmission Lines
0.5
2-20
3 30
3.01S
3.5“
4.0
4.5
40
Frequency (GHz)
Fig. 3.6. PMCM-D microstrip line insertion and return loss measurements.
Insertion loss and return loss provide useful general metrics to describe transmission
line performance. M ost design equations, however, describe transmission lines in terms
o f characteristic impedance Z 0 and relative effective free space permittivity e x eff . This
difference requires a measurement approach that allows convenient comparison between
transmission line design equation predictions and measured scattering parameter results.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.5: Measurement Based Transmission Line Modeling
51
3.5 Measurement-Based Transmission Line Modeling
Accurate determination o f transmission line characteristic impedance Zo and propagation
constant y - a + j f i is important to establish the performance o f MCM-D interconnect
models at microwave and millimeter wavelengths. Eisenstadt and Eo (1992) analyzed
the two-port representation o f a transmission line in order to relate the characteristics o f
Z0 and y to scattering parameter measurements.
They applied their method to
characterization o f 1-cm length interconnects on a silicon substrate to 20 GHz (Eo and
Eisenstadt, 1993). Their method works well for determining Zo o f lossy interconnects,
but not for determining the characteristic impedance o f low-loss transmission lines
(Lowther and Lee, 2000; Ryu et a l, 2000; Martens, 1998). Williams and Marks (1991,
1993) attribute this difficulty to the electrical discontinuity present at the connection o f
the transmission lines. They suggest estimating the characteristic impedance by a method
that averages measurement results from several different lengths o f transmission line to
smooth out the discontinuity’s effect.
Another approach indirectly determines the
characteristic impedance through measurement o f the propagation constant y and an
estimate o f the dc capacitance o f the transmission line (Marks and Williams, 1991).
Figure 3.7(a) shows a GSG probe in contact w ith the left end o f a microstrip line as
shown schematically on the left side Fig. 3.5(a). As the photograph shows, the w idth o f
the gray microstrip conductor, the white probe pad, and GSG probe are almost the same
in this instance. In the photograph o f Fig. 3.7(b), however, the microstrip line width is
about three times that o f the GSG probe and probe pad, so a microstrip ‘stub’ connects
the two structures.
The difference in width between the microstrip line and the stub
introduces an electrical discontinuity which is m odeled by the equivalent circuit shown in
Fig. 3.7(c) (Gardiol, 1994; Pozar, 1990). An identical problem exists on the right end o f
the microstrip line (not shown), as well as for CPW, which also may have a width
discontinuity between the ground line and the GSG ground pad, Fig. 3.5(b).
If a ‘dummy’ structure is available that includes the width variations, such as shown
in Fig. 3.7(d), it is possible to use the procedure in Sect. 2.2 o f the previous chapter to
attempt to calibrate the electrical discontinuity. For very low loss lines, however, even if
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
52
Chapter 3: Design and Characterization o f MCM Transmission Lines
Zd/2Zd/2
(c)
(d)
Fig. 3.7 On-wafer microstrip transmission line scattering parameter measurement,
(a) GSG probe (the trident-shaped object) that connects to the left end o f the
microstrip line, which has the same width as the probe pad. (b) GSG probe that
connects through a narrow ‘stub’ to a wider microstrip line, (c) Lumped element
equivalent circuit of the electrical discontinuity due to the step change in the width
between the stub and microstrip line in (b). (d) Potential ‘dummy’ structure for
removing the effect of the electrical discontinuity from the measurement by
calibrating the effect of the step change in width between the stub and microstrip line.
Photos courtesy o f MIT Lincoln Laboratory.
Zd/2 L J 2
Zd/2 Zd/2
==Cd
Z0,y
==Cd
Fig. 3.8 Transmission line discontinuity model. In the case of microstrip line, the
lumped element equivalent circuits at the ends of the transmission line represent
the electrical discontinuity due to the step change in width between the microstrip
line and the connecting stub from the probe pads. In the case of CPW, the lumped
element equivalent circuits at the ends o f the transmission line represent the
electrical discontinuity due to possible step changes in width between the CPW
signal line and the connecting stub from the probe pads, and/or the change in width
between the CPW ground lines and the ground terminal of the probe pads, e.g. Fig.
3.5 (b). For either situation, Zd and Cd represent the inductance and capacitance
respectively that account for the step change(s) in width.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.5: Measurement Based Transmission Line Modeling
53
dummy structures are available, residual errors in this procedure may introduce additional
difficulties.
Thus, a different technique is necessary to determine accurately the
characteristic impedance o f low-loss lines with width discontinuities. This is especially
important in cases where only a single transmission line is available for characterization,
in which event it is not possible to average out the effect o f the discontinuity.
In order to better understand this problem, consider the network shown in Fig. 3.8.
This network includes the electrical discontinuity at the ends o f the transmission line, but
without the connecting stubs such as the one shown on the left side o f Fig. 3.7(c). The
connecting stubs are neglected because they are very short, «100 pm in length or 0.03 A,
at 50 GHz, so their transforming effect is negligible.
The transmission parameter
representation o f the circuit in Fig. 3.8 is found by cascading the individual two-ports,
with second-order terms in the discontinuity neglected for simplicity, to give
c o sh (//)
1
ja>Ld
'A
B~
Jo>Cd
1
C
D
Z 0 sinh(y/)
1
..... 1
oO
w
1
jtaLd
_jG)C&
1
. (3.37)
Expanding Eq. (3.37) and solving for the ratio o f the off-diagonal terms results in
_ B _ (z0 ~ (ojld f To )sinh(y /) + jo)2Ld cosh(/ /)
Z7 0 —
- — —
C
(3.38)
jo)2C d cosh(y/)+(T 0 - (aCd f Z 0)sinh(y/)
where Z 0 is the uncorrected, apparent characteristic impedance o f the transmission
line.
If the electrical discontinuity is absent, then Cd = L d = 0, and Eq. (3.38) reduces to
Hence, in the absence o f the electrical discontinuity, no correction is necessary and Z 0 is
equal to the characteristic impedance o f the transmission line itself, which is the desired
result. Otherwise, the electrical discontinuity resulting from the transmission line width
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
54
changes causes the uncorrected characteristic impedance Z 0 to vary as a complicated
function o f the electrical length, the characteristic impedance o f the line, and the values
o f the discontinuity elements La and Cd, as Eq. (3.38) shows.
As an example o f the effect o f the electrical discontinuity on the uncorrected
characteristic impedance Z 0 , consider the simple case o f Cd = 0 and Zd * 0. Now, Eq.
(3.38) reduces to,
Z 02 = ! = Z02 - ( « L d )2 + 2 > Z dZ 0 cothO'7).
(3.40)
Examination of Eq. (3.40) shows that in the case o f a very lossy transmission line
{al > l), Z 0 » Z 0 since |coth(a/ + jfil) | « 1 for any value o f ft so Z 0 is not particularly
sensitive to changes in frequency. In the case o f low-loss transmission lines {al « l),
however,
coth(cc/ + j n n j 2 ) « al
for n
equal to a positive odd
integer while
coth(«/ + j n n / 2 ) » l/a l » 1 for n equal to a positive even integer. Thus, the low-loss
case results in dramatic fluctuations o f Z 0 with frequency changes as the electrical length
o f the line approaches even and odd multiples o f one-half wavelength. Equation (3.40)
shows that the size o f the fluctuation grows with frequency.
At sufficiently high
frequencies additional attenuation due to rising conductive and dissipative losses
increases al and reduces the size o f the hyperbolic cotangent term. This effect limits
fluctuation growth at high frequencies.
The fluctuations o f Z 0 with frequency are
greatest for lines either with very small attenuation a, or very short physical length I.
The fluctuations in Z 0 with frequency are not limited to inductive discontinuities.
When Cd ^ 0 and id = 0, Eq. (3.38) reduces to
Z 02 = — = ----------------------.
C l-(ry C dZ 0) + 2/<wCdZ 0 coth(y/)
(3.41)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.5: Measurement Based Transmission Line Modeling
55
Examination o f Eq. (3.41) shows, in a manner similar to the inductive discontinuity, that
the capacitive discontinuity also causes the uncorrected line impedance Z 0 to fluctuate as
the electrical length o f the line approaches even and odd multiples o f one-half
wavelength.
Comparison o f Eqs. (3.40) and (3.41) indicates that they have inverse behavior with
changing frequency.
In Eq. (3.40), Z 0 decreases as the frequency approaches that at
which the microstrip line is a multiple one-half wavelength and then increases after
passing it. Conversely, in Eq. (3.41) Z 0 increases as the frequency approaches the half­
wavelength frequency and then decreases after passing it. These behaviors facilitate our
ability to discriminate between the two cases when reviewing results.
For both cases, the spacing between the fluctuations increases for physically shorter
lines and decreases for physically longer lines because o f a proportional change in the
frequencies at which the line appears a multiple o f one-half wavelength. At the same
time, the fluctuation amplitude increases for physically shorter lines because o f their
smaller attenuation and decreases for physically longer lines because o f their larger
attenuation.
Thus, an optimum line length could balance the interaction between the
location and severity o f the fluctuations and assist with accurate determination o f the
line’s impedance.
In order to remove the effects o f the discontinuity, it is necessary to solve Eq. (3.37).
This is done by first manipulating Eq. (3.37) to expose the transmission line matrix
cosh(y/) Z0 sinh(y/)
70 sinh(y/) cosh(y /)
1
7'e*Z-d
ja>C&
1
-l
1
j(oLd
'A B~
C D j(oCA
1
-l
'A' Br
C D'
(3.42)
Now, taking the ratio o f off-diagonal terms in the two outer matrices results in
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
56
Chapter 3: Design and Characterization o f MCM Transmission Lines
the corrected Zo o f the transmission line, which is the desired result.
Assuming that the transmission line discontinuity model shown in Fig. 3.8 models
accurately the physical situation, in order to apply Eq. (3.42) to remove the effects o f the
electrical discontinuity, it is necessary to find the capacitance C<j and the inductance L&
since they are not known a priori. Quasi-TEM analysis o f microstrip line and CPW,
Sects. 3.2 and 3.3, predicts that the transmission line characteristic impedance is a
function only o f the geometry o f the structure, and not a function o f the measurement
frequency. Given this, the optimum values o f the capacitance Cd and the inductance Cd
are those that best remove the fluctuations in Z 0 , Eq. (3.43). In order to accomplish this,
it is necessary to first approximate the characteristic impedance Z 0 by a linear function
Z 0 obtained from a linear least squares fit o f Z 0, Eq. (3.43). Next, values o f Cd and Ld
are examined to find those that minimize the difference between Z 0and Z 0 in a least
squares sense. This is equivalent to finding the values o f Cd and L& that best remove the
fluctuations in Z 0 so it most closely resembles a linear function. Once the difference
between them is minimized both Z 0 and Z 0 are plotted along with Z 0 to allow visual
examination o f the results.
In order to determine the other key transmission line performance metric, the
propagation constant y = a + j f i , it is necessary to solve the two-port transmission line
equations for y and then convert the result to scattering parameters (Eisenstadt and Eo,
1992). This result is
(3.44)
(3.45)
In Eq. (3.44), the sign is chosen for K that results in a negative value for a consistent
with wave attenuation along the transmission line.
Additionally, since the network
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.5: Measurement Based Transmission Line Modeling
57
analyzer output is limited to phase values that range between ± 180°, it is necessary to
‘unwrap’ the phase constant (3 to recover its original value . Longer transmission line
lengths and higher frequency measurements increase the amount o f phase change along
the transmission line which reduces the uncertainty in network analyzer phase
measurements.
Once the phase constant /? is obtained, the effective relative permittivity e T eff for a
transmission line with inhomogeneous dielectric is found as follows. The phase velocity
for a TEM wave is
1
1
(3.46)
By definition, phase velocity is also equal to the product o f frequency/ and the guide
wavelength Ag ,
(3.47)
Combining these two equations yields the effective relative permittivity e T eff (Martens,
1998),
(3-48)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
58
3.6 Microstrip Line and CPW Experimental Verification
As a means o f providing experimental verification o f the microstrip line design
equations, on-wafer scattering parameters were obtained for microstrip lines measured
after the manner shown in Fig. 3.5(a). The measurements were made using an Agilent
E8361A network analyzer attached to 150-pm pitch coplanar GSG RF probes calibrated
using a short, open, load, and thru (SOLT) calibration technique and an alumina
impedance standard substrate (ISS).
The microstrip lines were fabricated according to the PMCM-D process introduced in
Chpt. 1 with construction details shown in Table 3.4. The first set o f six microstrip lines
consists o f 5-pm thick metal lines separated from the ground plane by 31 pm o f silicon
dioxide. Each end of the microstrip line connects through a 60-pm width by 100-pm
length stub to a 60-pm width by 100-pm length pad. These microstrip lines include 8and 16-mm length sections o f 168-pm width microstrip line, 60-pm width, 10-mm length
microstrip line, and 56-, 52-, and 48-pm width microstrip lines all 6-mm in length. A
second set o f four microstrip lines consists o f 25-pm thick, gold-plated metal lines also
separated from the ground plane by 31 pm o f silicon dioxide and similarly terminated.
These lines include 50-, 46-, 40-, and 32-pm width microstrip lines all 6-mm in length.
168
168
60
56
52
48
50
46
40
32
8
16
10
6
6
6
3
6
6
6
5
5
5
5
5
5
25
25
25
25
21.7
20.2
2.2
0.0
0.0
0.0
0.0
0.0
0.0
0.0
i ■o
G
r(pm) L(rarn) t(pm) C«i(pH)
0.0
0.0
0.0
4.2
5.2
6.6
9.9
6.1
7.6
10.2
% Error
S r_eff
% Error
ZoCO)
desian measured
desian measured
24.3
24.3
48.6
50.6
52.7
55.0
49.2
51.3
54.7
61.5
23.0
23.3
46.7
48.6
50.8
53.5
48.5
51.2
54.9
59.9
5.3
4.1
3.9
4.0
3.6
2.7
1.4
0.2
-0.4
2.6
3.49
3.49
3.20
3.18
3.16
3.14
3.15
3.13
3.10
3.05
3.87
3.70
3.53
3.40
3.39
3.38
3.34
3.05
3.02
2.98
Table 3.4 Designed vs. measured transmission line Z0 at 0.010 GHz and £r eff at 50
GHz for PMCM-D microstrip. Percent error = (d-m)/m*100.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-10.9
-6.0
-10.3
-6.9
-7.3
-7.6
-6.0
2.6
2.6
2.3
3.6: Microstrip Line and CPW Experimental Verification
59
Figure 3.9 shows results for the first line in the table, a 168-p.m width, 8-mm length,
microstrip line. The fine solid line in the figure is the real part o f the uncorrected line
impedance Z 0 obtained from Z 0 = ^ B / C with B and C found from measured scattering
parameters. As shown in the figure, the uncorrected line impedance Z 0 oscillates near
those frequencies where the electrical line length approaches multiples o f one-half
wavelength. Applying the technique discussed in the previous section produces values o f
Cd and Li in Eq. (3.42), including the terms previously neglected, that minimizes the
difference between Z 0 and Z0 . A capacitance Cd = 0.0 fF and an inductance Z,d = 21.7
pFI minimize this difference as the dark solid and dashed lines in the Fig. 3.9 show. The
first line in the table also records the value for Z 0 at 0.010 GHz. Applying Eqs. (3.44)
and (3.48) results in the value 3.49 for £yeff at 50 GHz shown in the table.
Fig. 3.10 depicts results obtained in the same manner for the 16-mm length, 168-pm
width microstrip line shown in the second line o f Table 3.4. For the 16-mm length line,
the best value for the discontinuity model was Zd = 20.2 pH and Cd = 0.0 fF. As in the
case o f the shorter 8-mm microstrip line, a discontinuity capacitance Cd o f 0.0 fF was
again found, so the width discontinuity is apparently primarily inductive in both these
cases.
The fluctuations in the uncorrected line impedance
Z 0 , Fig. 3.10, are
approximately one-half the size o f those in Z 0 in Fig. 3.9. This occurs because the 16mm length microstrip line has approximately twice the loss o f the 8-mm length
microstrip line thereby reducing the amplitude o f the fluctuations o f the hyperbolic
cotangent term in Eq. (3.40). In both figures, the uncorrected characteristic impedance
Z0 decreases as the frequency approaches that at which the line is a multiple o f one-half
wavelength and then increases above that frequency, as predicted by Eq. (3.40).
The
dashed line in both figures shows the least square estimate Z 0 o f the corrected
characteristic impedance Z 0 . The corrected Z 0 o f 23.0 Q obtained at 0.010 GHz is
within 4-5% o f the design Z 0 obtained from W heeler’s equation for both lines, as shown
in Table 3.4.
The uncorrected characteristic impedance Z 0 o f the 60-pm width, 10-mm length
microstrip line is shown in Fig. 3.11. In this instance the microstrip line and probe pad
are the same width so there is no width discontinuity at that location. There is, however,
a small mismatch between the width o f the signal lead o f the GSG probe and that o f the
probe pad as shown in Fig. 3.7(a).
An attempt to remove this discontinuity using a
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
60
dummy pad structure increased the fluctuations in Z 0 rather than reducing them. This
illustrates the sensitivity o f the characteristic impedance determination to errors that
remain after calibrating with dummy pad structures. The heavy solid line in the figure
shows the result found for Z 0 from applying Eqs. (3.42) and (3.43), including the terms
previously neglected, with an inductance Ld = 2.2 pH and capacitance Cd = 0.0 fF. The
corrected Z0 o f 46.7 Q is 4% lower than the prediction from W heeler’s equation given in
the table. A slight reduction in the fluctuation o f Z 0 is noticeable between 10 and 30
GHz; only a minor reduction is seen above 30 GHz. Apparently the discontinuity model,
Fig. 3.8, does not adequately correct for the mismatch between the GSG probe and probe
pad.
Figure 3.12 shows results for the 46-gm width, 6-mm length microstrip line
fabricated using the 25-pm thick, gold-plated metal layer. As above, the heavy solid line
in Fig. 3.12 shows the result found for Z 0 from applying Eqs. (3.42) and (3.43), but now
with an inductance L A= 0.0 pH and capacitance Cd = 6.1 fF. In this instance the width o f
the microstrip line is less than the width o f the probe pad and the electrical discontinuity
appears capacitive instead o f inductive. The dashed line again depicts the least squares
estimate o f the characteristic impedance Z 0 for this line.
The measured Z 0 o f 51.3
Q obtained at 0.01 GHz is very close to W heeler’s prediction o f 51.2 Q as shown in the
table.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.6: Microstrip Line and CPW Experimental Verification
40
Frequency (GHz)
Fig. 3.9 Characteristic impedances of 168-pm width, 8-mm length microstrip line.
Z 0 (light solid line). Z q (dark solid line) obtained by from L a = 21.7 pH and Cd =
0.0 fF. Least squares fit to
Zq
(dashed line).
50
45
40
35
30
—25
©
N
20
15
10
5
0
40
Frequency (GHz)
Fig. 3.10 Characteristic impedances of 168-pm width, 16-mm length microstrip line.
Z q (light solid line). Z q (dark solid line) obtained by from La = 20.2 pH and Cd =
0.0 f F. Least squares fit to
Z q
(dashed line).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
62
60
55
50
40
35
30,
0
20
30
Frequency (GHz)
10
40
50
Fig. 3.11 Characteristic impedances of 60-pm width, 10-mm length microstrip line.
Z q (light solid line). Z0 (dark solid line) obtained by from Ai = 2.2 pH and Q =
0.0 f F. Least squares fit to
Z q
(dashed line).
60
55
_50
E
40
35
30
0
10
20
30
Frequency (GHz)
40
50
Fig. 3.12 Characteristic impedances of 48-pm width, 6-mm length microstrip line.
Z q (light solid line). Z q (dark solid line) obtained by from id = 0.0 pH and Cd =
6.6 fF. Least squares fit to
Z q
(dashed line).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
63
3.6: Microstrip Line and CPW Experimental Verification
Table 3.4 consolidates the results for microstrip lines ranging in width from 32 pm to
168 pm. The error for Z 0 is no worse than approximately 5%, while the error for e r eff
falls in the range from +3% to -11%.
This indicates that, in the case o f PMCM-D
embedded or partially embedded microstrip line, the error incurred applying W heeler’s
and Schneider’s equations to the task o f estimating the microstrip line characteristic
impedance and relative permittivity is in the range o f a few to several percent. The table
also show:
it the effect o f the line width discontinuity is inductive when the microstrip
line is wider than the probe pads and capacitive when the line is narrower than the probe
pads. When the probe pads and microstrip line are both 60 pm width, removing a small
inductive electrical discontinuity partially compensates for the transition between the
GSG probe and the probe pads.
It is possible to obtain additional confirmation o f the effectiveness o f the w idth
discontinuity correction technique by comparing insertion loss and return loss
measurements and predictions for the two microstrip line thicknesses. Measured values
o f insertion and return losses are obtained by applying Eqs. (3.33) and (3.36) to measured
scattering parameters developed after the manner shown in Fig. 3.5(a). Predicted values
are obtained through application o f Eq. (3.37) with y from Eq. (3.48), values for the
discontinuity components from Table 3.4, and Z 0 from the procedure presented in the
previous section for each microstrip line. The transmission parameters that result from
application o f Eq. (3.37) for the transmission line interface model in Fig. 3.8 are then
converted to scattering parameters for use in Eqs. (3.33) and (3.36) to obtain IL and RL.
Figure 3.13 compares measured and predicted insertion and return losses for the 52pm width, 6-mm length, microstrip line. Figure 3.14 compares measured and predicted
insertion and return loss for the 46-pm width, 6-mm length, gold-plated microstrip line.
These lines are interesting to examine because their characteristic impedances are near 50
Q, thereby making their use likely where it is necessary to interface with a 50 Q system.
As shown in the figures, the agreement between measured and predicted values o f
insertion loss for the two microstrip lines is within about 0.1 dB from 0 to 50 GHz. The
agreement between measured and predicted values o f return loss typically is within a few
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
64
Chapter 3: Design and Characterization o f MCM Transmission Lines
dB in the 10 to 50 GHz range. Below 10 GHz the model overestimates the return loss
compared with measured results. This is attributed to low-frequency measurement error
in y from Eq. (3.48) due to the difficulty o f accurately determining the electrical length o f
the transmission lines at frequencies where they appear electrically short.
Two other aspects o f the microstrip lines presented in these figures are o f interest.
First, the return loss o f both transmission lines is almost 30 dB, equivalent to less than
0.1% reflection o f power incident on the transmission line, up to approximately 25 GHz.
Secondly, the insertion loss o f these two different transmission lines appears to be very
similar. Apparently, whatever loss reduction is obtained by applying the 20-pm thick
plated gold layer is lost when the line width is reduced from 52 pm to 46 pm. The
current density throughout most o f the plated gold layer is very low compared to the
current density near the perimeter o f the microstrip line because the skin depth at
gigahertz frequencies is only a few microns.
Thus, the current density is very low
throughout the interior o f the gold metal so little additional loss reduction results from the
additional metal thickness.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.6: Microstrip Line and CPW Experimental Verification
Measurement 0
Prediction-----
0.5
2.0co
2.5 w
c
3.0 5
"S3
cm
3.5
40
4.0
45
4.5
20
30
Frequency (GHz)
40
Fig. 3.13. Measured and predicted insertion and return losses. PMCM-D 5-pm thick
microstrip line 52 pm width and 6 mm length.
Measurement 0
Prediction-----
0.5
.oo 2.0 m
T3
o
c
W
2.5 m
25
3 30
3.0 c
3.5 $
40
oo,
4.0
45
4.5
20
30
Frequency (GHz)
Fig. 3.14. Measured and predicted insertion and return losses. PMCM-D 25-pm
thick plated gold microstrip line 46 pm width and 6 mm length.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
66
Sections o f coplanar waveguide 3-mm in length were also fabricated according to the
PMCM-D process described in Chpt. 1. Table 3.5 shows construction details, design, and
measured results for these lines. The first four lines in the table consist o f 5-pm thick,
60-pm and 80-pm width signal lines with ground line separations ranging between 100pm and 160-pm. The last three lines in the table consist o f 25-pm thick, gold-plated
metal signal lines 22-, 24-, and 36-pm in width with ground line separations o f 74-, 64-,
and 82-pm respectively. Substrate micromachining was applied in all cases to remove
the silicon substrate, suspending the CPW structure on a bridge o f SiCh dielectric.
(pm) A(pm) f (pm) L d(pH) Cd(fF)
60
60
60
80
22
24
36
100
116
156
160
74
64
82
5
5
5
5
25
25
25
0.0
0.0
0.0
0.0
0.0
3.2
0.0
2.3
18.7
13.8
22.0
6.1
0.0
12.5
% Error
Z 0(Q )
desian measured
51.6
64.0
84.7
72.7
60.1
40.3
43.2
45.1
73.2
71.8
81.1
57.5
47.9
62.4
12.6
-14.4
15.2
-11.6
4.3
-18.9
-44.4
% Error
£ r_eff
desian measured
2.43
2.26
2.03
2.04
2.57
2.97
2.78
2.00
3.00
2.20
2.89
2.39
2.38
2.30
17.7
-32.7
-8.4
-41.7
7.0
19.9
17.3
Table 3.5 Design vs. measured transmission line Z0 at 0.010 GHz and er eff at 50
GHz for 3-mm length PMCM-D CPW. Figure 3.4 defines the dimensional symbols
for CPW. Percent error = (d-m)/m* 100.
Scattering parameters were obtained for the 60-pm width, 3-mm length CPW where
the separation between the ground lines is 156 pm, as shown in the third line in Table
3.5. These measurements were obtained after the manner shown in Fig. 3.5(b). In this
case the CPW signal line and the probe pad are both 60 pm width so there is no width
discontinuity at the pad. The CPW ground lines, however, are significantly wider than
the GSG ground pads which introduces a width discontinuity at that location.
Figure 3.15 depicts the CPW measurement results. The fine solid line in the figure is
the real part o f the uncorrected line impedance Z 0 obtained from Z 0 = ^ B / C with B
and C found from measured scattering parameters. The extensive variation in Z 0 due to
the width discontinuity and the very low loss o f this short line is readily apparent.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.6: Microstrip Line and CPW Experimental Verification
67
200
180
160
140
£ 120
80
40
0—
40
Frequency (GHz)
Fig. 3.15 Characteristic impedances of 60-pm width CPW with 156 pm ground line
separation. Uncorrected impedance, Z q , (light solid line). Corrected impedance,
Zq , (dark solid line) obtained by from l.(\ = 0.0 pH and Cj = 13.8 fF . Least squares
fit to corrected impedance,
Z q
, (dashed line).
Applying Eqs. (3.42) and (3.43) with an inductance
= 0.0 pH and capacitance Cd =
13.8 fF results in the improvement shown by the heavy solid line in the figure. The
dashed line again depicts the least squares estimate o f the characteristic impedance Z 0
for this line. The measured Z 0 o f 84.7 Q obtained at 0.01 GHz is approximately 15%
higher than the predicted value o f 71.8 Q, as given in the table.
The results in Fig. 3.15 demonstrate that the discontinuity model, Fig. 3.8, adequately
accounts for the electrical effects o f the width discontinuity between the CPW ground
planes and the ground pads. Table 3.5 shows that the design formulas presented in Sect.
3.3 for PMCM-D CPW appear accurate to within about 20%, w ith the exception o f one
case for Z 0 and two cases for £ r
•
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
68
3.7 Transmission Line Characterization
Dispersion diagrams for the 52-pm width, 6-mm length, microstrip line, 46-pm width, 6mm length, gold-plated microstrip line, and the 24-pm width, 3-mm length CPW are
shown in Fig. 3.16. These lines were chosen as representative of lines with Z0 near 50
Q. The circles, squares, and diamonds in Fig. 3.16 show the results for the measured
phase constant o f the quasi-TEM mode, Eq. (3.48), for each o f the three cases.
The high degree o f linearity in the phase constants demonstrates that any dispersion is
very small in all three cases up to 50 GHz. The diagram also shows the limiting cases o f
propagation in free space and propagation in a homogeneous dielectric w ith a relative
permittivity o f c,. The quasi-TEM predictions for the phase constant (5 for the three lines
are also shown in the figure. These are found from /? = m jvp = 6)^JeT eff j c 0 with the
appropriate e x eff for each line from Tables 3.3 and 3.4
The quasi-TEM prediction
models accurately microstrip line propagation to better than 300 Grad/s, or approximately
50 GHz.
The transmission line attenuation constant a quantifies the rate o f attenuation of
waves during transmission line propagation. Figure 3.17 gives the attenuation per-unitlength for the 52-pm width, 6-mm length microstrip line, 46-p.m width, 6-mm length,
gold-plated microstrip line, and the 24-pm width, 3-mm length CPW. The attenuation is
plotted in dB/cm to facilitate comparison between transmission lines o f different lengths.
Straight lines on the plot indicate the dominant region for ohmic loss, slope 0:1; skin
effect loss, slope 1:2; and for dielectric loss, slope 1:1 (Wedge et al., 1991). Attenuation
due to skin effect loss is clearly evident above 2 GHz with increasing loss due to
dissipation in the dielectric noticeable above 10 GHz. Both microstrip lines have lower
attenuation above 1 GHz than the much narrower CPW lines, which is to be expected
because o f the additional conductor area in the microstrip lines.
Additionally, the
attenuation o f the 25-pm thick, gold-plated microstrip line is only a few tenths o f a
dB/cm less than that o f the 5-pm thick microstrip line.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.7: Transmission Line Characterization
52 jam pstrip o
46 pm pstrip □
24 pm CPW 0
Quasi-TEM prediction
150
200
100
Frequency (GRad/s)
250
300
Fig. 3.16 Dispersion fl(co) diagram for microstrip line and CPW. Dashed lines
show homogeneous dielectric (top) and free space (bottom) propagation while
symbols show measured /? for the three different lines.
,o
10
TD
C
Dielectric loss
(slope 1:1)
l
10
•1
Skin-effect loss
(slope 1:2)
Ohmic loss (slope 0:1)
10
-2
10'
■1
,0
10
10
1
Frequency (GHz)
Fig. 3.17 Attenuation diagram for microstrip line and CPW. Solid lines show loss
regions dominated by ohmic loss (slope 0 :1 ), skin-effect loss (slope 1 ;2 ), and
dielectric loss (slope 1 :1 ).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 3: Design and Characterization o f MCM Transmission Lines
70
Once the propagation constant y and the characteristic impedance Z 0 are known, the
element values for the distributed circuit model shown in Fig. 3.1 are determined by
applying the standard transmission line relationships
y = ^ (R + jo}L)(G + joyC ),
(3.49)
Solving Eqs. 3.49 and 3.50 for the element values results in
R = Re(y Z 0),
(3.51)
L = R e ( /Z 0)/<y,
(3.52)
G - R e (y /Z 0),
(3.53)
C = R e ( y /Z 0)/ca.
(3.54)
Fig. 3.18 gives the inferred resistance and inductance per-unit-length obtained from
Eqs. 3.51-3.52 with
line.
y
and Z 0 for the 54-pm width, 6-mm length, PMCM-D microstrip
For comparison, the small circle at / = 0
is the dc resistance o f 0.96
n
Q/cm computed for the 6-mm length aluminum conductor assuming a 4x10 S/m
conductivity. Fig. 3.14 shows the inferred conductance and capacitance per-unit-length
obtained through application o f Eqs. 3.53-3.54. The small circle at / = 0 is the static
capacitance o f 1.21 pF/cm computed from measured
ex
eff and
Zq
from Table 3.3. The
capacitance C is essentially constant above approximately 1 GHz, again supporting the
validity o f quasi-TEM analysis for PMCM-D microstrip line.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.7: Transmission Line Characterization
£o
X
c
vd
40
Fig. 3.18 Measured transmission line incremental resistance and inductance.
PMCM-D microstrip line is 52-pm width, 6-mm length. Small circle a t / = 0 marks
the computed dc resistance o f 0.96 Q/cm.
o
LL
3.
O
<1—
Frequency (GHz)
Fig. 3.19 Measured transmission line incremental conductance and capacitance.
PMCM-D microstrip line is 52-^im width, 6-mm length. Small circle at/ = 0 marks
the computed static capacitance of 1.21 pF/cm.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
72
Chapter 3: Design and Characterization o f MCM Transmission Lines
3.8 Conclusion
Empirical evidence obtained from a new swept frequency scattering parameter
measurement approach demonstrates that PMCM-D microstrip line is a suitable highperformance transmission line for interconnecting components in millimeter/microwave
systems. The microstrip line is essentially dispersion free for most purposes up to 50
GHz. The standard quasi-TEM expressions predict the characteristic impedance Z0 and
relative effective permittivity e r eff of embedded and partially embedded microstrip line
to within approximately 5% and 10% respectively. A 52-pm width aluminum microstrip
line on a 31-pm thick layer o f SiC>2 dielectric results in well-controlled characteristic
impedance very near 50 Q with an insertion loss o f approximately 2.0 dB/cm at 50 GHz;
the performance o f a 46-pm width gold-plated microstrip line on a 31-pm thick layer of
SiC>2 dielectric is similar. Additional investigation is necessary for PM CM -D CPW to
narrow the differences between measured results and design predictions. The attenuation
o f CPW with a 24-pm width signal line was only slightly greater than the two much
wider microstrip lines. This indicates that PMCM-D CPW might ultimately demonstrate
lower loss than PMCM-D microstrip line o f the same characteristic impedance.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Four
PMCM-D Millimeter and Microwave
Filters
In typical receiving systems, passive filters separate signals at different frequencies, as
discussed in Sect. 1.1. This chapter investigates the performance o f PMCM-D low-pass
and bandpass filters constructed from microstrip line. The low-pass filters considered are
o f a stepped-impedance type implemented by alternating sections o f high- and lowcharacteristic impedance
microstrip
lines.
Similarly, the bandpass
filters
are
implemented in two configurations, one with one-half wavelength coupled microstrip
lines and the other one with one-quarter wavelength interdigitated microstrip lines. The
low-pass filters are formed from the 5-pm thick metal layer because narrower lines can
be fabricated with that thickness o f layer; bandpass filters are formed from the 25-pm
thick gold-plated metal layer in order to reduce ohmic losses.
4.1 Filter Types and Characteristics
Filters normally encountered in receiving systems include those with low-pass, high-pass,
bandpass, and bandstop responses. Figure 4.1 illustrates a typical response o f a low-pass
filter and-depicts terms in common use for specifying filter performance. Insertion loss
IL represents the overall signal reduction in passing through the filter, due to the
combination o f dissipative loss within the filter, LD, from ohmic or dielectric losses, and
signal reflection,
due to impedance mismatch at the terminals o f a filter, as discussed
in Sect. 3.4. The cutoff frequency, f c, indicates the frequency where the insertion loss
increases with frequency beyond some specified minimum value, e.g., 3 dB.
73
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
74
,L
r Reflection loss (ZR)
-
Dissipation loss
Increasing
insertion
loss (/I)
( I
d
)
Passband
0
Increasing
reflection
loss ( L r )
Stopband
/
fc
Fig. 4.1 Typical specifications for a low-pass filter. The signal passes through the
filter with small loss below the cutoff frequency f c. Above f c loss increases rapidly.
Note that in dB, insertion loss is the sum of the dissipative and reflective losses.
Typically, MCM-D filters are implemented with lumped elements.
For example,
Gouker’s group designed and measured a 7th order, lumped element 1.5 GHz PMCM-D
bandpass filter. This filter is constructed from suspended spiral inductors formed from
the top metal layer and embedded capacitors with construction similar to those described
in Chpt. 2. The filter demonstrates a fractional bandwidth of approximately 25% and an
insertion loss o f about 13 dB. Combining lumped and distributed elements offers another
approach.
Charcon (2003) reports on a 3rd order, 30 GHz MCM-D bandpass filter
constructed from coupled sections o f coplanar waveguide and interdigital capacitors.
This filter has an IL of 2.5 dB, an 8% bandwidth, and a RL o f about 20 dB.
4.2 PMCM-D Stepped-Impedance Low-Pass Filters
Classically, lumped element low-pass filters are constructed by cascading series inductors
with parallel capacitors, as shown in Fig. 4.2.
The impedance o f the series elements
increases with rising frequency while the impedance o f the parallel elements decreases
with rising frequency. For this reason, the filter input strongly reflects higher frequencies
while lower frequencies are more readily delivered to the load. At a given frequency
above f c, the amount o f power reflected at the input terminals o f the filter grows as the
number o f filter sections, referred to as the filter order, increases.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.2: PMCM-D Stepped-Impedance Low-Pass Filters
A
75
A
*—nm
p—
i—nffPc ,= { =
c.
Q
n
Fig. 4.2 Lumped element low-pass filter prototype. Filter is implemented by
cascading alternating sections of series inductors and parallel capacitors. The order
o f the filter is equal to the number of reactive elements— in this case 2 n.
In order to develop a correspondence between a lumped-element low-pass filter and
an equivalent network o f microstrip lines, consider the transmission parameter two-port
representations o f each o f the lumped elements shown in Fig. 4.2, as well as the
transmission parameter two-port representations o f a section o f transmission line.
A series inductor is represented with two-port transmission parameters by
' A
C
B ~
'1
D
_0
1
j X
_
a parallel capacitor by
'A
B'
' 1
o'
C
D
JB
A
and a section o f lossless transmission line by
A
B
cos{j3l)
j Z {) sin(/?/)
C
D
jY 0 sin(j3l)
cos(/?/)
(4.3)
where /3l is the electrical length o f the line and Z 0 = 1/F0 is the line impedance. Notice
that restricting the electrical length p i to a suitably small range, such as p i < x/% ,
reduces the two diagonal terms in the matrix to approximately equal to unity. W ith this
change, the transmission line two-port representation becomes
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
76
Chapter 4: PMCM-D Microwave Filters
'A
B~
C
D
1
j Z 0p f
1
I
Lastly, it is necessary to select an appropriate value for the characteristic impedance o f
the microstrip line in order for Eq. (4.4) to approximate either a series inductor, Eq. (4.1),
or a parallel capacitor, Eq. (4.2).
This is done by reducing the width o f the microstrip line to increase the line
impedance Z 0, which decreases the lower-left term in the transmission line matrix. As
this occurs, the transmission line parameters more closely approximate the parameters o f
a series inductor with X = Z 0/? /. For a given line impedance, the inductive reactance X
is set by changing the electrical length p i o f the microstrip line, provided that p i remains
restricted to a suitable range.
Conversely, increasing the width o f the microstrip line reduces the line impedance
Z 0, which decreases the upper-right term in the transmission line matrix.
When this
occurs the transmission line parameters more closely approximate the parameters o f a
parallel capacitor with B - Y{)p i . For a given line admittance, the capacitive susceptance
B is set by changing the electrical length pi o f the microstrip line, subject to the
restriction on p i .
The filters that result from staggering the width o f the microstrip line are commonly
referred to as ‘stepped-impedance’ low-pass filters, possibly because o f their stair-step
appearance, but also because o f the abrupt transitions in their characteristic impedances.
In order to investigate the performance o f stepped-impedance filters, two 0.25 dB
equal-ripple filters were designed for implementation with PMCM-D microstrip lines
following a method presented by Trinogga et al. (1991). The insertion loss o f the first
filter is specified by a 3rd-order Chebyshev polynomial while the insertion loss o f the
second filter is specified by a 13th-order Chebyshev polynomial.
The desired cutoff
frequencies for the two low-pass filters are 2 GHz and 10 GHz, respectively.
Figures 4.3 and 4.4 depict the geometry o f the microstrip lines that form these filters.
In Fig. 4.3, the 40-um width narrow sections o f microstrip line are designed to have Z q=
66.0 Q, corresponding to series inductors while the 177-pm width microstrip line in the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.2: PMCM-D Stepped-impedance Low-Pass Filters
40 pm
77
40 pm
177 pm
i_
1
i
H
4.0 mm
6.4 mm
4.0 mm
Fig. 4.3 Geometry of 2 GHz, 3d-order, 0.25 dB equal-ripple low-pass filter.
Inductive elements are represented by 40-pm width microstrip lines while the
capacitive element is represented by a 177-pm width microstrip line. Design
assumes 50 Q source and load impedances, not shown.
8 pm
200 pm
t
j
0.57 mm
1.16 mm
H-H« " >M < —
1.59 mm
1.27 mm
1.79 mm
r
L
t
r
1.30 mm
1.27 mm
4 «~H«
4 <-H«
1.82 mm
1.82 mm
t
r
t
0.57 mm
1.16 mm
1.79 mm
4H
1.59mm
Fig. 4.4 Geometry of 10 GHz, 13th-order, 0.25 dB equal-ripple low-pass filter.
Inductive elements are represented by 8 -pm width microstrip lines while capacitive
elements are represented by 200-pm width microstrip lines. Design assumes 50 Q
source and load impedances, not shown.
center is designed to have
Zq-
24.7 Q, corresponding to a parallel capacitor. In Fig. 4.4,
the narrow microstrip line sections are designed to have
microstrip line sections are designed to have
Z q=
Zq
= 122 Q while the wide
22.5 Q.
Once the physical layout o f a proposed filter is established, it is possible to verify the
filter’s performance with a microwave simulation program such as PUFF (Wedge et al.,
1999).
PUFF computes scattering parameters for single or coupled microstrip line
sections based on their characteristic impedance and electrical length.
The PUFF
algorithm makes use o f the transmission line quality factor Q in order to account for
conductor losses for single microstrip line, as discussed in Sect. 3.1.
The scattering
parameters for the overall microwave network are calculated within PUFF by cascading
the scattering parameters from each line section. After obtaining the filter’s scattering
parameters, the filter designer may plot the insertion loss to verify that the layout meets
design requirements, as well as compare predictions and measured results.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
78
PUFF was used to predict the performance o f the stepped-impedance low-pass filter
geometries shown in Figs. 4.3 and 4.4. For the microstrip lines shown in Fig. 4.3, PUFF
reported characteristic impedances o f 64.0 Q and 23.8 Q for the narrow and wide
microstrip lines. This was within 4% o f the desired values o f 66.0 Q and 24.7 Q. For the
narrow and wide microstrip lines shown in Fig. 4.4, PUFF reported characteristic
impedances o f 122 Q and 21.6 Q— again w ithin 4% o f the desired values o f 126 iQ and
22.5 Q. These discrepancies are attributed to the difference between analysis formulas
such as W heeler’s equation that predict
Zq
based on microstrip geometry, and the
synthesis formulas used within PUFF to predict microstrip geometry based on
Z q (Wedge
et al., 1999). Additionally, PU FF’s analytical expressions assume a microstrip line o f
zero thickness which introduces a small error compared to expressions that correct for
thickness such as Wheeler’s formula, Eq. (3.17).
Figures 4.5 and 4.6 compare predicted and measured insertion loss, Eq. (3.33), and
reflection loss, Eq. (3.35), for each o f the stepped-impedance low-pass filters.
In all
cases, measured results are obtained from a measurement setup similar to the one shown
in Chpt. 3, Fig. 3.5 (a), with the microstrip line replaced with a stepped-impedance filter.
The predicted results are obtained from PUFF simulations o f the geometries shown in
Figs. 4.3 and 4.4, as discussed in the previous paragraph.
The insertion loss at cutoff for both filters is greater than the design value o f 0.25 dB
as a result o f dissipation loss in the microstrip lines. In order to account for line loss in
the PUFF simulations, a transmission line quality factor Q is required. Various 0 values
were examined to find the value that best matches measured insertion loss. As shown in
each figure, simulating the low-pass filters with a transmission line quality factor o f Q =
18 results in agreement for insertion and reflection losses to within less than 1 dB in Fig.
4.5. and to within a few tenths o f a dB in Fig. 4.6
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.2: PMCM-D Stepped-impedance Low-Pass Filters
cq 2
Measurement 0
Prediction-----Frequency (GHz)
Fig. 4.5 Third-order, low-pass Chebyshev stepped-impedance filter. Filter design
cutoff frequency is 2 GHz with a 0.25 dB equal-ripple response. Predicted insertion
and reflection loss obtained by PUFF simulation compared with measured results.
Measurement 0
Prediction------
m
-o
15s
to
to
o
c 20
o
t:
25*=
Q
to O2 K5
sz
40,
Frequency (GHz)
Fig. 4.6 Thirteenth-order, low-pass Chebyshev stepped-impedance filter. Filter
design cutoff frequency is 10 GHz with a 0.25 dB equal-ripple response. Predicted
insertion and reflection loss obtained by PUFF simulation compared with measured
results.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
80
The cutoff frequency for the filter in Fig 4.6 is noticeably higher than the design
cutoff frequency o f 10 GFIz. No simulation tool was available to verify the performance
o f the design prior to implementing the filter. In an effort to identify more accurate
design equations, Trinogga’s approach was compared by means o f PUFF simulations
w ith another design approach due to Pozar (2001). The results demonstrate that Pozar’s
expressions are the more accurate o f the two in achieving the desired cutoff frequency.
For example, for the 10 GFIz, 13th-order, 0.25 dB equal-ripple filter, a PUFF simulation
shows that a filter designed by Pozar’s method has an f c o f 9.4 GHz, 6% lower than
desired, while a filter designed by Trinogga’s method has a n /c o f 13.4 GHz, 34% higher
than desired.
4.3 PMCM-D Coupled-Line Bandpass Filters
The method for designing bandpass filters by cascading coupled microstrip lines is based
on the correspondence between lumped circuit elements and coupled-line sections (Pozar,
1991). Each coupled-line pair is described by an even-mode impedance Zoe and odd­
mode impedance Z q0• The even-mode impedance Zoe is the characteristic impedance of
one o f the microstrip lines relative to ground when the signals exciting each o f the pair of
lines are equal in amplitude and phase. The odd-mode impedance Z q0 is the characteristic
impedance o f one o f the microstrip lines relative to ground when the signals exciting each
O
o f the pair o f lines are equal in amplitude and 180 out-of-phase. Section 5.2 discusses
the properties o f coupled microstrip lines in greater detail.
Figure 4.7 outlines the steps needed in order to develop the correspondence between
cascaded coupled-line sections and a lumped-element bandpass filter.
The design
equations require that an nth-order filter contain n + 1 coupled-line sections. Thus, three
cascaded coupled-line sections are necessary to implement, for example, a 2nd-order
filter, Fig. 4.7(a).
Figure 4.7(b) shows an equivalent-circuit model o f a single coupled-line section
consisting of one-quarter wavelength sections o f transmission line connected to the input
and output terminals o f an admittance inverter. The admittance inverter serves to invert
an impedance that is connected to its terminals according to the relationship Ym = J 2/TL,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.3: PM CM-D Coupled-Line Bandpass Filters
81
where FL and J are the load and inverter admittances, respectively. In order to link the
coupled-line section and equivalent circuit model, Pozar (1991) provides expressions that
relate the even- and odd-mode characteristic impedance Zoe and Zo0 o f the coupledmicrostrip lines, Fig. 4.7(a), to the characteristic impedance Zo o f each o f the one-quarter
wavelength sections and the admittance J\ o f the admittance inverter, Fig. 4.7(b), once
they are known.
Cascading three o f these equivalent circuits to represent the three coupled lines, Fig.
4.7(a), results in two sections o f one-half wavelength transmission line— which are
equivalent to parallel L C resonators— separated by an admittance inverter, Fig. 4.7(c). In
this figure, the central admittance inverter transforms the final equivalent parallel LC
resonator into an equivalent series L C resonator. The admittance inverters and sections
o f one-quarter wavelength transmission line that remain at the two ends o f the cascade
serve to scale the impedance level at the input and output terminals o f the filter.
Figure 4.7(d) shows the final lumped-element equivalent circuit for the three-section
coupled-line filter, Fig. 4.7 (a).
The lumped-element equivalent circuit represents
accurately the coupled-line filter at frequencies near resonance. The equivalent circuit,
however, does not predict the periodic response o f the coupled lines at frequencies that
are multiples o f the frequency where the coupled line is a one-quarter wavelength.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
82
Z()e; Z q0
Z'oe, Z ’qq
1
H
-►k-
Zoe, Z{Oo
-►Kx/4
(a)
x/4
x/4
X/4
X/4
1*
*
*
*
Jx
Z0
, -90°
hi
n
Z0
,
(b)
X/4
X/4
N
N
X/4
X/4
%
-*K
Ji
-90°
. X/4
H
Jx
Z0
Z0
-90°
X/4
H
" W
-90°
X/2
X/2
(c)
L2
C2
nnnn
A
1
(d)
Fig. 4.7 Derivation of coupled-line bandpass filter equivalent circuit, (a) Cascade of
X/4 coupled-line sections with even-mode impedance Z0e and odd-mode impedance
Z0o. (b) Equivalent circuit of a single X/4 coupled-line section. Admittance inverter
J\ accounts for impedance inversion in the coupled-line section, (c) Cascade o f three
equivalent circuits, (b), to represent the three coupled lines shown in (a), (d) Final
lumped-element equivalent circuit for a 2 nd-order, coupled-line bandpass filter.
Design assumes fixes source and load impedances, typically 50 Q, not shown,
(adapted from Pozar, 1991, Fig. 9.45).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
—H
4.3: PMCM-D Interdigitated-Line Bandpass Filters
83
The operation o f the coupled-line bandpass filter can be understood by considering
the equivalent circuit in Fig. 4.7(d). At the center frequency o f the filter, / 0 , the parallel
LC resonator appears as an open while the series L C resonator appears as a short. Under
this condition the input impedance o f the filter is 50 Q and all signal power incident on
the input o f the filter is transmitted to the load. At other frequencies the impedance o f the
parallel LC resonator diminishes while the impedance o f the series LC resonator grows
and the input impedance o f the filter is no longer 50 Q. Because o f the input impedance
mismatch at frequencies other than / 0 , a portion o f the incident signal power is reflected
and the amount o f signal power transmitted to the load decreases.
In order to investigate the performance o f coupled-line bandpass filters, three 0.1 dB
equal-ripple bandpass filters with center frequencies o f 10, 20, and 30 GHz were
designed and then fabricated using PMCM-D coupled microstrip lines. The insertion loss
for each filter was specified by a 5th-order Chebyshev polynomial. Figure 4.8 depicts the
physical layout o f the six coupled microstrip lines that form these filters. The even- and
odd-mode impedances for each coupled-line pair are set by the width and spacing o f each
pair o f lines as shown in the figure. The length o f each coupled line pair is equal to onequarter wavelength at the desired center frequency o f the filter.
Again, the microwave simulation program PUFF was employed to predict the ideal
performance o f the line layouts shown in Fig. 4.8. The simulation program computes
scattering parameters for individual sections o f coupled microstrip line based on their
even- and odd-mode impedances Zoe and Z0o and their electrical length (31, and then
cascades the results to obtain the scattering parameters for the overall microwave
network. The PUFF algorithm does not account for dissipative loss in coupled microstrip
lines, so the simulation results represent lossless filter performance.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
84
Chapter 4: PMCM-D Microwave Filters
• 1
.
J18 pm
T 22 Limt
_________i
I
........
30 um
I
30 pm
68 p m j
+
>
]30 pm
\<----- :^
-------------------- ►f*-------------►(^------------- kf*-------------
-
X/4
18
X!4
X/4
X/4
X/4
X/4
Fig. 4.8 Geometry of 5th-order. 0.1 dB equal-ripple coupled microstrip line bandpass
filter. Filter is formed by cascading six coupled microstrip line sections. Even- and
odd-mode impedances for each coupled-line pair are set by the width and spacing of
each pair of lines. Design assumes 50 Q source and load impedances, not shown.
Figure 4.9 compares predicted and measured insertion loss, Eq. 3.33, and reflection
loss, Eq. 3.35, for each one of the three coupled microstrip line bandpass filters. The
measured results are obtained from a measurement setup similar to the one shown in
Chpt. 3, Fig. 3.5 (a), with the microstrip line replaced with a coupled-line filter. The
predicted results for the three coupled-line bandpass filters are obtained from PUFF
simulations o f the geometries shown in Fig. 4.8, which are assumed lossless as discussed
in the previous paragraph.
In each instance, the minimum insertion loss frequency is
within 1% o f the design center frequency. The measured reflection loss is approximately
0 dB inside each of the filter’s passbands, which demonstrates that the input impedance
around the center frequency o f each filter is approximately 50 Q , as desired.
The
measured insertion loss results differ prim arily because o f the 7 dB to 9 dB dissipative
loss that appears in each filter’s passband, but which is not accounted for in the
simulation. The results also show, however, that the dissipative loss in the filter is not
relatively constant but that it increases for frequencies above and below the filter
passband. Further investigation is necessary in order to explain this effect.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4: PMCM-D Interdigitated-Line Bandpass Filters
-
85
20
Frequency (GHz)
Fig. 4.9 Chebyshev bandpass filter insertion and reflection loss. Coupled-line
bandpass filters designed for 10, 20, and 30 GHz center frequencies and 0.1 dB
equal-ripple, 5*-order responses. Measured (0 ) and predicted (— ) IL and measured
( 0 ) 2*.
4.4 PMCM-D Interdigitated-Line Bandpass Filters
The overall length o f the cascaded sections o f the coupled-line bandpass filters o f the
previous section is an important practical limitation. The total length o f the coupled-line
filter is (n+1)774, so the amount o f space necessary to fabricate high-order and/or lowfrequency filters becomes excessive in terms o f practical on-wafer implementation.
One approach to minimizing the length o f the coupled-line bandpass filter is based on
the observation that, near the resonant frequency o f the one-half wavelength line, the
voltage and current distributions along the first half o f the line, Fig. 4.10(a), are
equivalent to the distributions along a grounded one-quarter wavelength line, Fig.
4.10(b).
Thus, folding together each end o f the one-half wavelength microstrip line
shown in Fig. 4.7(a) and grounding it at its midpoint results in the more compact, onequarter wavelength interdigitated-line structure o f Fig. 4.11.
Near the one-half
wavelength resonant frequency this structure is electrically similar to the coupled-line
bandpass filter, but is only a one-quarter wavelength in total length for all order filters.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
86
fa)
2
Ii
(b)
A
4
Fig. 4.10 Voltage and current distributions along microstrip lines near resonance.
Distributions along first half of one-half wavelength microstrip line, (a), are
equivalent to distributions along grounded one-quarter wavelength microstrip line,
(b).
±
lI
II
II
£
4
Fig. 4.11 One-quarter wavelength interdigitated-line bandpass filter. Filter is
formed by folding each of the ends of the three one-half wavelength lines shown in
Fig. 4.7(a) together and grounding their midpoints. The two outside lines transform
the filter impedance to that of the reference line, typically 50 Q, and do not
contribute to the order of the filter. Figure not to scale.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4: PM CM-D Interdigitated-Line Bandpass Filters
_ _ _ _ _ Coi ______ C12
i
1—11—1
T c0
C23
1—11—1
iC i
C34 ______ C45 ______ C56
r 11 1
lc 2
87
1— m
lc 3
i " 1
1 C4
i—|h~ i
lc 5
1
lC 6
Fig. 4.12 Transverse center section of a 5th-order interdigitated-line filter. Figure
shows capacitances between line and ground, Cj, and between adjacent lines, Ck,k+iDesign procedures for interdigitated-line filters are provided by Matthaei et ah, (1980).
M atthaei’s method was applied originally to the design o f microwave bandpass filters
employing machined aluminum bars as one-quarter wavelength resonant elements. For a
given fractional filter bandwidth and desired value o f passband ripple, M atthaei’s
formulas specify the self-capacitance Cj per-unit-length between each one-quarter
wavelength element and ground as well as the required mutual-capacitance Ck,k+i perunit-length between adjacent one-quarter wavelength elements. It is important to note
that since M atthaei’s analysis is based on quasi-static field considerations, the values o f
the self- and mutual-capacitances are, to first order, independent o f frequency.
Thus,
once these capacitances are known for a particular design, it is necessary only to adjust
the individual resonator’s length in order to change the center frequency o f the filter.
The approach taken in this work is to substitute one-quarter wavelength microstrip
line resonators for M atthaei’s aluminum bars. The dissipative loss in M atthaei’s 1 GHz
prototype filter was only a few tenths o f a dB because the relatively large surface area o f
the aluminum bars minimizes ohmic loss and the resulting dissipation. This gives close
correspondence between predicted and measured filter insertion loss for this case
(Matthaei et. al, 1980).
The much smaller line cross sections inherent in PMCM-D
microstrip line results in a relatively larger dissipative loss compared to a ‘standard’
microwave filter, which constitutes an important performance distinction between the
two implementations.
Figure 4.12 is a transverse section o f a 5th-order interdigitated-line filter showing the
self- and mutual-capacitance definitions for each one-quarter wavelength microstrip line.
The two outside elements serve as impedance transformers. It follows that implementing
an «th-order interdigitated-line bandpass filter requires n + 2 one-quarter wavelength
interdigitated microstrip lines.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 4: PMCM-D Microwave Filters
88
Capacitor
Co
Q fnF/m)
111.5
C4
3.252
3.252
82.0
51.0
128.9
4.268
75.0
50.0
111.5
25.26
C 56
C6
82.0
50.0
129.9
C45
C5
75.0
51.0
128.9
C34
Space f um)
27.0
4.268
C 23
C3
Width ( urn)
45.0
50.0
111.5
C ]2
C2
fnF/m)
25.26
C01
C,
Ck- k+1
27.0
45.0
111.5
Table 4.1 Interdigitated-line bandpass filter with 5% fractional bandwidth. Table
lists self- and mutual-capacitances for a 0.1 dB equal-ripple 5th-order response. Two
columns at right give microstrip line width and spacing between lines.
Capacitor
Co
C01
c,
C 12
C2
C23
C3
C34
c4
Cj fnF/m)
101.1
101.2
48.0
56.0
52.0
121.4
6.480
123.2
66.0
52.0
66.0
6.480
121.4
52.0
8.503
101.2
56.0
48.0
20.0
35.65
101.1
Space f pm)
20.0
8.503
C56
Q
Width (urn)
42.0
35.65
C45
C5
Ck.k+iipF/m)
42.0
Table 4.2 Interdigitated-line bandpass filter with 10% fractional bandwidth. Table
lists self- and mutual-capacitances for a 0.1 dB equal-ripple 5th-order response. Two
columns at right give microstrip line width and spacing between lines.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4: PMCM-D Interdigitated-Line Bandpass Filters
89
Tables 4.1 and 4.2 show the self- and mutual-capacitances obtained by applying
M atthei’s formulas to the design o f a 5th-order, 0.1 dB ripple, interdigitated microstrip
line bandpass filters with 5% and 10% fractional bandwidths. The last two columns in
each table list the values o f the width and spacing o f the seven coupled lines in each
filter.
These values are found from a two-dimensional finite element analysis o f the
transverse section o f the interdigitated-line filter, Fig. 4.12. The width o f each microstrip
line and the spacing between lines were adjusted iteratively during the finite element
analysis until the predicted self- and mutual-capacitances were within approximately 2%
o f the required values o f Cj and Ck,k+i in the tables. This approach accounts for twodimensional fields between the microstrip lines but ignores longitudinal fields and
fringing effects at the end o f the lines. These parasitic fields may introduce unwanted
effects once the length o f the resonant elements becomes comparable to their spacing.
The length o f each o f the one-quarter wavelength elements is computed from
c0
£ t eff ) where c0 is the speed o f light in free s p a c e ,/is the center frequency o f
the filter, and s T eff is the effective relative permittivity o f the dielectric, defined in Sect.
3.2. Table 4.3 lists the required line lengths for filter center frequencies from 2.5 to 50
GHz. These results were obtained assuming s T eff = 2.80, which is slightly less than the
s r eff = 3 .1 0 predicted in Chpt. 3 for an isolated PMCM-D microstrip line. The former
value is estimated to account for, roughly, the reduction in s T eff due to the coupled
microstrip line structure limiting the lateral spread o f the electric field in the dielectric.
In order to understand better the potential performance o f interdigitated-line bandpass
filters, two sets o f six 5th-order, 0.1 dB equal-ripple filters were fabricated with element
lengths needed to achieve center frequencies from 5 GHz to 50 GHz, as given in Table
4.3.
Additionally, a single 2.5 GHz center frequency, 10% fractional bandwidth
interdigitated-line bandpass filter was fabricated with the element length given in Table
4.3. Table 4.1 lists the width and spacing o f the microstrip lines for the set o f six filters
with 5% fractional bandwidths; Table 4.2 lists the width and spacing o f the microstrip
lines for the set o f six filters with 10% fractional bandwidths.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
90
Chapter 4: PMCM-D Microwave Filters
Frequency (GHz)
2.5
5
10
20
30
40
50
&
e ff
2.80
2.80
2.80
2.80
2.80
2.80
2.80
a/4
(urn)
17928
8964
4482
2241
1494
1121
896
Table 4.3 One-quarter wavelength microstrip line at seven frequencies. Fixed value
o f 6'r eff is used because the dependence of Ar_eff on line width is very weak.
Figure 4.13 shows a 50 GHz PMCM-D interdigitated-line bandpass filter designed for
a 5% fractional bandwidth and a 0.1 dB equal-ripple, 5th-order response. This filter was
fabricated with the line widths and spacings listed in Table 4.1 and an element length o f
896 pm, Table. 4.3. Input and output connections to the filter are through the coplanar
GSG probe pads located on the right side o f the upper and lower elements in the figure.
Scattering parameters were obtained for all 13 interdigitated-line filters with a
measurement setup similar to the one shown in Chpt. 3, Fig. 3.5(a), with the microstrip
line replaced with an interdigitated-line filter. Additionally, for purposes o f predicting
the ideal performance o f each filter, lossless lumped-element bandpass filters o f the same
order, fractional bandwidth, and ripple were synthesized and studied by simulation. Such
predictions are useful for comparing with measured filter bandwidths and center
frequencies but they do not account for the loss or the periodic nature o f microstrip lines.
Figure 4.14 shows the insertion loss predicted for an ideal filter and the measured
insertion and reflection losses for the 2.5 GHz interdigitated-line bandpass filter. The
minimum insertion loss frequency near 2.3 GHz is approximately 7% lower than the
design center frequency o f 2.5 GHz.
The measured response closely follows the
prediction for the upper skirt, but the location o f the lower skirt progressively departs
from theory. The insertion loss results differ primarily by the 12 dB attenuation due to
dissipative loss. The presence o f this rather large, unmodeled real loss, may also account
for the broadening o f the filter passbands relative to the predictions for lossless devices.
The measured results also show a response near 7.5 GHz due to the periodic response o f
the microstrip lines that is not predicted by a simple lumped-element bandpass filter.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4: PMCM-D Interdigitated-Line Bandpass Filters
-
Fig. 4.13 50 GHz interdigitated-line bandpass filter designed for 5% bandwidth.
Filter size is approximately 620 pm by 900 pm. Filter is formed from capacitivelycoupled sections of grounded one-quarter wavelength interdigitated-line microstrips
with width and spacing from Table 4.1 and length from Table 4.3 Connections to
filter input and output are through GSG probe pads connected to the right-side of the
upper and lower microstrip lines. Photo courtesy o f MIT Lincoln Laboratory.
Measurement 0
Prediction-----
-20
25®
40
40
Frequency (GHz)
Fig. 4.14 Interdigitated-line bandpass filter designed for 2.5 GHz center frequency,
10% fractional bandwidth, 0.1 dB equal-ripple, 5th-order response. Predicted
insertion loss obtained by lossless simulation compared with measured results.
Secondary response centered near 7.5 GHz occurs when filter elements are
approximately three-quarter wavelength.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
92
Chapter 4: PMCM-D Microwave Filters
Frequency (GHz)
Fig. 4.15 Interdigitated-line bandpass filters designed for 5, 10, 20, 30, 40, and 50
GHz center frequencies, 5% fractional bandwidths, 0.1 dB equal-ripple, 5th-order
responses. Measured ( 0 ) and predicted ( ___ ) insertion losses and measured (0 )
reflection loss.
Frequency (GHz)
Fig. 4.16 Interdigitated-line bandpass filters designed for 5, 10, 20, 30, 40, and 50
GHz center frequencies, 10% fractional bandwidths, 0.1 dB equal-ripple, 5th-order
responses. Measured ( 0 ) and predicted ( ___) insertion losses and measured ( 0 )
reflection loss.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4: PMCM-D Interdigitated-Line Bandpass Filters
93
Figures 4.15 and 4.16 compare ideal filter insertion loss predictions with measured
insertion and reflection losses for the six interdigitated-line filters with center frequencies
o f 5, 10, 20, 30, 40, and 50 GHz, and fractional bandwidths o f 5% and 10%, respectively.
Insertion loss measurements are omitted at frequencies above the filter passband to
minimize clutter in the figure. Reflection loss measurements are shown only near the
filter passbands for the same reason. The minimum insertion loss frequency is within
approximately 5% o f the design center frequency, Table 4.3, as is evident in the figures.
Also evident in the figures is greater variation in insertion loss within the passband than
is predicted. The difference between measured and predicted filter bandwidth increases
for the higher frequency filters.
The lower skirts are wider than predicted and the
difference grows with increasing frequency.
The upper skirts match closely the
predictions at low frequencies but diverge increasingly at high frequencies.
These
discrepancies are attributed to the effects o f longitudinal fields, fringing capacitance at
the microstrip line ends, and dissipative loss in the conductors. These effects become
more significant with decreasing resonator length.
4.5 Conclusion
Stepped-impedance low-pass filters and coupled-line and interdigitated-line bandpass
filters fabricated in PMCM-D appear suitable for less demanding millimeter/microwave
system filtering needs.
Measurements o f insertion and reflection losses for stepped-
impedance low-pass filters with 2 and 10 GHz cutoff frequencies and 3rd- and 13th-order,
designed for 0.25 dB equal-ripple responses agree with predicted responses to within a
dB for the first case and to within few tenths o f a dB for the second case. Coupled-line
bandpass filters with 10, 20, and 30 GHz cutoff frequencies and 5th-order, designed for
0.1 dB equal-ripple responses demonstrate unmodeled insertion losses between 7 -9 dB
inside the passband. Interdigitated-line bandpass filters require one-sixth the length o f a
comparable bandpass filter implemented from coupled microstrip lines. Interdigitatedline filters with center frequencies between 2.5 and 50 GHz, 5 % and 10% fractional
bandwidths, and 5th-order, designed for 0.1 dB equal-ripple responses, with 7-12 dB
insertion loss, are demonstrated. The minimum insertion loss frequency and the design
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
94
Chapter 4: PMCM-D Microwave Filters
center frequency differ less than approximately 7% for all thirteen filters, and can be
adjusted easily by changing the lengths o f the one-quarter wavelength resonators.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Five
Analysis and Design of Monolithic
Transmission-Line Transformers
Coupled microstrip lines, discussed in the previous chapter, also form the basis for
transmission-line transformers. These devices are not only electromagnetically coupled
by their intrinsic fields, they are connected at their terminals so that they are also subject
to the constraints o f circuit laws. Thus, in order to analyze devices such as transmissionline transformers it is necessary to combine concepts from circuit theory and
electromagnetic field theory.
This chapter begins by reviewing the theory o f lineal
transmission-line transformers formed from coupled microstrip line and then extends this
concept to include coupled microstrip lines formed into spiral shapes.
5.1 Introduction to Transmission-Line Transformers
Transformers are indispensable in radio frequency applications because o f the need to
match impedance levels to maximize power transfer while also eliminating reflections.
At the same time, there are also needs for other functions such as phase inversion and
electrical isolation. As an example, consider the receiving system shown in Fig. 1.1.
Signals entering the receiving system at the antenna could be carried by 50 Q coaxial
cable to the low-noise amplifier (LNA). Unless the input impedance o f the LNA is also
50 Q, which is not the norm, it is necessary to precede the input o f the LNA with either a
transformer or some other type o f matching network to maximize power transfer.
Whether on macro or micro scales, the dominant coupling mechanism for inductive
transformers is magnetic coupling, while any capacitive coupling is parasitic because it
imposes a finite self-resonant frequency that limits the useful bandwidth o f the device.
95
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
96
Chapter 5: Analysis and Design o f Monolithic T ransmission-Line Transformers
□
(a)
(b)
(c)
Fig. 5.1 On-wafer monolithic transformer configurations. (a) Tapped, (b)
interleaved, and (c) stacked. In (a) and (b), different trace weights represent different
conductor segments. In (c), the turns are stacked vertically, one above the other, so
only the top layer is shown, (after Mohan et. al, 1998, Fig. 1).
Discrete inductors and transformers increase magnetic coupling through the use o f
closely spaced turns over a high-permeability core.
These options are normally not
possible in monolithic construction. Additionally, the close proximity o f the conductor to
the substrate in monolithic devices increases parasitic capacitive coupling o f each turn to
ground, thereby limiting high-frequency performance (Lee, 1998).
Figure 5.1 illustrates the three primary realizations o f monolithic on-wafer
transformers.
Implementing both the tapped, Fig. 5.1(a), and interleaved, Fig. 5.1(b),
transformers on the top metal layer reduces capacitive coupling to the substrate, but also
reduces mutual magnetic coupling between the inductors.
The stacked configuration,
Fig. 5.1(c), has improved magnetic coupling due to the closer proximity o f the metal
layers, but suffers from a low self-resonant frequency due to the small separation between
the metal layers and the reduced distance to the substrate.
The theory, design, and
performance o f monolithic transformers in a variety o f semiconductor processes is
covered extensively in the literature (e.g., Laney et al., 2001; M ohhan et al., 1998;
Howard et al., 1989).
The device pictured in Fig. 5.2 suggests another approach to the problem o f highfrequency impedance transformation. Although this device is commonly referred to as a
transformer, it is actually a transmission-line transformer (TLT). As the next section will
show, the principle o f operation o f the TLT is different from the magnetically coupled
transformer. The measurements shown in Fig. 5.3 o f a typical inexpensive, consumer
oriented, television-type implementation illustrate that the TLT is inherently a wide-band
device.
As shown in the figure, this simple device performs a 1:4 impedance
transformation up to at least 400 M Hz— exceptional bandwidth from a low-cost device.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
Fig. 5.2 Inexpensive transmission-line transformer. Type shown is commonly used
to match the 300 Q impedance of an antenna to 75 Q coax. Ferrite core increases the
even-mode impedance to improve the low frequency response o f the device. Device
size is approximately 2 x 3 cm.
0.5
0.45
0.4
0.35
0.3
0.25
C
N
0.2
0.15
0.1
0.05
0.5
0.1
1
Frequency (GHz)
Fig. 5.3 TLT normalized input impedance vs. frequency. Performance is typical of
inexpensive television-type transmission-line transformers and illustrates its inherent
wide-band nature.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
98
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
5.2 Transmission-Line Transformer Theory
In 1944, G. Guanella reported the development o f a high-frequency transformer
constructed using two transmission lines series connected at the input and parallel
connected at the output, as shown in Fig. 5.4 (Guanella, 1944). The qualitative operation
o f this device is understood easily from Fig. 5.4, as follows.
First, assume that the
transmission lines are identical, uncoupled except at their terminals, and have a
characteristic impedance o f Z 0 .
Next, assume the electrical length fil
o f the
transmission lines is sufficiently long that transmission line effects are apparent, but short
enough that the total phase shift along the line remains small.
If the transmission lines in Fig. 5.4 were ideal, then the current in the conductors of
each o f the two transmission lines would be equal and opposite.
Additionally, if the
phase shift along the line is small the voltages at the beginning and end o f the line are
approximately equal. Given the end connections, K irchhoff s current law requires the
load current to equal twice the input current while the load voltage must equal one-half o f
the input voltage due to the symmetry o f the problem.
Stated another way, the input
voltage must equal twice the load voltage and the input current must equal one half o f the
load current. Either way, the input impedance equals four times the load impedance and
the Guanella transformer provides a 4:1 impedance transformation expressed as
2 i„ = ™ = ^ k = « L .
lin
(5.1)
ik
2
Figure 5.5 shows an extension o f this method to form a Guanella transformer with an
n: 1 voltage transformation ratio, where n is equal to the number o f transmission lines in
the figure (Rotholz, 1981). As before, the inputs o f the n transmission lines are series
connected while the n outputs are parallel connected. Following an identical method of
2
analysis as above demonstrates that this Guanella transformer perform s an n :1
impedance transformation expressed as
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.2: Transmission-Line Transformers Theory
99
Fig. 5.4 Guanella’s transmission-line transformer. Figure shows reference conventions for
transmission-line transformer voltages and currents. Transmission lines are series
connected at their input, parallel connected at their output, and assumed to be electrically
short so that the phase of the input and output quantities is approximately equal.
7
—
A in -
(5.2)
.
hn
It is also possible to construct a Guanella transformer with an arbitrary m:n voltage
transformation ratio where m and n are integers. This type is synthesized by connecting
the transmission line inputs and outputs in parallel or series as appropriate to achieve the
desired voltage transformation ratio. The voltage transformation ratios for the first four
orders o f this type o f Guanella transformer are shown in Fig. 5.6.
Rotholz’s paper
details a method for predicting both the low- and high-frequency response o f Guanella
transformers.
A more practical implementation o f the transmission-line transformer for impedance
transformations using a single transmission line, Fig. 5.7, was introduced by Ruthroff
(1959).
R uthroffs transformer also performs a 2:1 voltage or 4:1 impedance
transformation, Eq. 5.1, shown by following the same analysis procedure as for the
Guanella transformer.
The simplicity o f R uthroff s transformer makes it an attractive
candidate for monolithic implementation.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
100
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
- v, = — +
L_________________
I
Fig. 5.5 Multiline extension of a Guanella transmission-line transformer. Figure
shows reference conventions for transmission-line transformer voltages and currents.
Transmission lines connected in series at their input, in parallel at their output, and
assumed to be electrically short so that phase o f the input and output quantities is
approximately equal.
1:1
Order 1
1
2:1
2:3
/
2:5
Order 2
/
3:1
\
/
5:3
3:4
Order 3
\
4:1
Order 4
Fig. 5.6 Voltage transformation ratios of Guanella transmission-line transformers.
Figure shows first four orders obtained by connecting the transmission line inputs
and outputs in parallel or series to achieve the desired voltage transformation ratio.
For example, to construct a third-order Guanella transformer with a voltage
transformation ratio of 2:3, connect the first two transformer’s inputs in series and
connect their outputs in parallel to form a 2:1 transformer. Then, with the first
combination, connect a third transformer in series at the input and in parallel at the
output to form a 2:3 voltage ratio transformer (after Rotholz, 1981, Fig. 3).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.3: Properties o f Planar, Symmetric, Coupled Microstrip Transmission Lines
'1
+
V
rm
4n
101
4- 2ijn
Z 0 ,J31
2
V
h.
V, = - = •
2
Fig. 5.7 Single transmission line connected to form Ruthroff s transmission-line
transformer. Figure shows reference conventions for transmission-line transformer
voltages and currents. Transmission lines are assumed to be electrically short so that
the phase of the input and output quantities is approximately equal.
5.3 Properties o f Planar, Symmetric, Coupled Microstrip
Transmission Lines
When two or more transmission lines are placed in close proximity, their electric and
magnetic fields interact and the lines are said to be coupled (Dworsky, 1988; Gupta et. al,
1979). In general, coupled transmission lines m ay consist o f non-planar, asymmetric,
uniformly coupled conductors in an inhomogeneous media (Tsai and Gupta, 1992;
Tripathi, 1977; Marx, 1973). Such coupled transmission lines are described using the
propagation constants y c and y n , the conductor voltage ratios R c and R n , and the line
impedances Z cl, Z c2, Z n l, and Z n2, where the subscripts c and 7i refer to the so-called
co- or in-phase and anti-phase modes respectively (Tsai and Gupta, 1992). An important
simplification results in the case o f planar, symmetrically coupled microstrips because the
generalized modes reduce to the even and odd modes o f excitation, Fig. 5.8. In this case,
the coupled system is completely described using the even- and odd-mode propagation
constants y e and y 0 , together with the even- and odd-mode characteristic impedances
z0e and z0o.
As discussed in Chpt. 3, the longitudinal components o f the electromagnetic wave for
microstrip line operating in the low-GHz range are much smaller than the w ave’s
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
102
transverse components and can be neglected— this corresponds to the so-called quasitransverse electromagnetic (quasi-TEM) approximation (Edwards, 1995; Cheng, 1990).
Assuming that the transmission line fields are quasi-TEM is equivalent to assuming
that the planar, symmetric line consists o f incremental distributed circuit elements as
depicted in Fig. 5.9.
At sufficiently low frequencies the transmission line behaves
according to the lumped element L and C values obtained from static field calculations
where E and H are orthogonal (Dworsky, 1988). Hence, analysis o f this circuit model
allows determination o f the propagation constants and characteristic impedances for the
even and odd modes. In the figure, resistance R accounts for the resistive loss in each
conductor, conductances G and Gm model the dissipative loss in the dielectric,
inductances L and L m account for the self- and mutual-inductance o f the lines, and
capacitances C and Cm model the self- and mutual-capacitance o f the lines. The selfand mutual-impedances Z s and Z m and the self- and mutual-admittances Ts and Ym are
defined as shown in the figure assuming sinusoidal steady-state conditions.
Applying K irchhoff s voltage (KVL) and current (KCL) laws to the incremental
distributed circuit model shown in Fig. 5.9 leads directly to the transmission line
equations and propagation constants for the coupled system as follows (Dworsky, 1988;
Gupta et. al, 1979). In the sinusoidal steady-state, the incremental voltage drop per unit
length is
(5.3)
/
V
K2 ( z ) - F 2 ( z
Az
+ Az>A
= Z s/ 2 (z ) + Z m / l (2 ) 5
(5.4)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.3: Properties o f Planar, Symmetric, Coupled Microstrip Transmission Lines
+*
(a)
(b)
Magnetic Field Lines-------- ►
Electric Field Lines -------- ►
Magnetic Wall (PMC)
Electric Wall (PEC)
Fig. 5.8 Electromagnetic field distribution in coupled microstrip lines, (a)
Symmetrically coupled microstrip lines excited in the even mode. A notional
magnetic wall (PMC) shown by the bold dashed line exists because of the magnetic
field symmetry. The total inductance of each microstrip increases because of positive
mutual-inductance between the microstrip lines.
(b) Symmetrically coupled
microstrip lines excited in the odd mode. A notional electric wall (PEC) shown by
the bold dotted line exists because of the electric field symmetry. The total
inductance of each microstrip decreases because of negative mutual-inductance
between the microstrip lines.
Ys = G +jeoC
Ys=G+jcoC
hi2) ^
Zs=R+ja>L
"vwv—
/| ( z + A z )
f
h(2+^)
•Zrn =Ja)An
Ym=Gm+ja>Cm
/
jm
'-'m ' j k
Az)
C(z)
AAA/V
N .
1
nUlF-\
,
> / 2(z+Ae)
h i2)
ZS=R+jcaL
Ys=G+jmC
Fig. 5.9 Incremental distributed circuit model for coupled lines. All component
values are specified per unit length.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
103
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
104
where V\ and /, are the node voltages and branch currents as defined in the figure.
Similarly, applying KCL at the upper and lower right-hand nodes, respectively, leads to
7 1(z +
A z ) - / 1(z )
Az
/ 2 (z + A z ) - / 2 (z )'
V
A
z
“ ( n + r . n W z + A z J - l ^ z + Ar),
(5.5)
= ( n + l ' m ) r 2(z + Az)-}'nl»'1(z + Az).
(5.6)
J
Taking the limit o f the above as the length differential A z -» 0 and adopting matrix form
yields
dV
(5.7)
dz
dl_
dz
=-M r,
(5.8)
where
[Z]=
(5.9)
Zm
zs
and
M=
7 +
^ 7m
- 71m
- 7Am
7''s “-4-7
(5.10)
Eliminating V and then / in Eqs. 5.7 and 5.8 yields the same wave equations for
variables voltage and current in the coupled microstrip line system
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.3: Properties o f Planar, Symmetric, Coupled Microstrip Transmission Lines
d 2V
105
[z][Y]V= 0,
(5.11)
[y][z]/ =0.
(5.12)
d z2
d 2I
d z2
These are the governing equations for complex voltage and current along the discreteelement transmission line.
Assuming a variation with length o f V0e~ ^ for the voltage waveform and 10e~:/z for
the current waveform, leads to the eigenvalue equations,
(>'2M - [ z ] M k e - '* = 0 ,
(5.13)
( r 2[ / ] - [ r ] [ z ] ) v ' " = o ,
(5.14)
where [/] is the identity matrix.
It is easy to show that since [z ] |V] = [y ][z ], the
eigenvalues are the same for I and V .
Determining the eigenvalues for either case requires solving the fourth-order equation
y A- l a y 2 + a 2 - b 2 = 0 ,
(5.15)
where
=
b = r z m + rm( z m ~ z ) .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5,16)
(5,17)
106
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
Application o f the quadratic formula to Eq. (5.15) yields
y
2
2a ± ^ 4 a 2 - 4 a 2 + 4 b 2
^ L
= -------------------------------- = a ± b ,
(5.18)
7 =±4a±b.
(5.19)
The four propagation constants described by Eq. (5.19) represent forward and reverse
waves each o f which each have a fast and a slow component corresponding to the even
and odd propagation modes.
For the even, fast modes
y e = ± ^ 7 b = ±V(Z + Z m)T =
,
(5.20)
while for the odd, slow modes
To = ± V ^ = + V ( Z - Z m)(7 + 2 r m) = ± V z X ,
(5.21)
where Z e , Ye (Z0, T0) are the even (odd) incremental transmission line immittances.
The even- and odd-mode characteristic impedances are now found easily from
transmission line theory (Lee, 1998). These are
IZ P
Iz + z r
ZJ0Ope = j-iTI 7 L = J - ~ ^ 7 J!L,
Ye
V Y
(5-22)
^0o -
(5.23)
Y + 2Y„
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.3: Properties o f Planar, Symmetric, Coupled Microstrip Transmission Lines
107
Equations (5.20)-(5.23) describe completely the propagation constants and characteristic
impedances for the even and odd modes, as set by the self- and mutual-immittances and
o f the individual circuit elements.
Additional insight into the operation o f the coupled microstrip transmission lines is
available in the simplified case o f lossless lines (R = G = 0). Under this assumption, the
four equations above reduce to
re
JP t
= ± y W (Z + I m ) C = ± 7 ' W Z e C e >
r,0 = j f i 0 = ±ja>y](L - Lm )(C + 2Cm) = ± j ( o ^ £ 0 ,
z»=
(5-24)
(5.25)
<5-26)
e
Z 0 o = J L Lm = , P - ,
Oo v c + 2 c m
ycn
(5.27)
where the subscripts ‘e ’ and ‘o ’ continue to designate even and odd modes. From Eqs.
(5.24) and (5.25), the phase velocities for the propagation o f the even and odd modes are
O)
ve =
Pe
(5.28)
y l(L + L jC
o
(5.29)
=
°
P0
V ( i - i m)(C + 2 C m)
4 1 ^ ;
Equations (5.28) and (5.29) show that the propagation velocity is distinct for each
mode in the general case o f an inhomogeneous dielectric. Removing the dielectric and
replacing it with free space, so that the structure becomes homogeneous, requires the
propagation velocity for each mode to equal c0 , the speed o f light in free space. This is
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
108
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
shown in Eq. (5.30), where the superscript ‘0 ’ indicates free space values o f static
capacitance, and /jQ and f 0 represent free space permeability and permittivity,
respectively
(5.30)
co
Combining Le = L + Lmand L0 = L - L m with Eq. 5.30 yields the self- and mutualinductances for the coupled line system in terms o f the static capacitances,
r
L = Vo£o
1
1
VL e
_
(5.31)
o/
J
✓~r0
1_
V^e
(5.32)
J
Then, the characteristic impedances for the even and odd modes in terms o f the four static
capacitances are found by applying Eqs. (5.26) and (5.27) with Eqs. (5.30)-(5.32)
W o
_
-'e '-'e
-*0e
VCoCo
0o
(5 3 4 )
The phase constants are found from Eqs. (5.24) and (5.25) with Eq. (5.30)
Pe =
C° ’
(5-35)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.4: Admittance Matrix Representation o f Coupled Lines
109
(5.36)
A, =
5.4 Admittance Matrix Representation o f Coupled Lines
A pair o f electrically coupled transmission lines forms a four-port network conveniently
modeled by an admittance matrix representation (Dworsky, 1988). In order to develop
this representation it is necessary to determine the individual elements, Ytj , o f the
admittance matrix in terms o f the characteristic immittances and propagation constants o f
the coupled transmission-line system.
Figure 5.10 depicts the voltage and current
conventions for a pair o f symmetrically coupled transmission lines excited by even- and
odd-mode current sources. Even-mode sources excite responses that have the same phase
on the two lines, Fig. 5.11; odd-mode sources excite responses that have the opposite
phase on the two lines, Fig. 5.12. The total response at the four terminals is found by
superposition o f the individual responses.
Referring to all three figures and applying superposition yields immediately the four
line voltages
V1 = v e + v o>
(5.37)
v2 ~ ve - vo>
(5.38)
v 3 = v e + v o>
(5.39)
^4 = v e - V 0
(5.40)
Solving these four equations gives the mode voltages at each end o f the line
v,e
Vl +^2
2
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5.41)
110
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
»
le ~ lo ~ l2
►
<
V2 9~
l2
i
t
1e
lo
” * v2
I
V j* ►
h + lo ~h
z- 0
-*
| l\ ~ le + *o
z=/
Fig. 5.10 Voltage and current conventions for coupled transmission lines. Pairs of
‘even’ sources force equal currents in each side of the coupled line pair, while ‘odd’
sources force equal but opposite currents in each side. Ground return for coupled
lines not shown, (after Dworsky, 1988, Fig. 51).
h
►
l2
ve*~
»
t
<---- *2 = h
~ * ve
I
i
ve*—
-j^ ►
*e —*1
z- 0
ve
| h ~ *e
z =1
Fig. 5.11 Symmetric coupled transmission line driven in the even mode. The voltage
responses are the same on each line. Ground return for coupled lines not shown.
-*'o =*2
►
- v 0*~
I
t
-
1X
l
I
<— h = -*'o
- - v ;
vo * “
— H►
1
z=0
-® yo
f
t
| h = h>
z =1
Fig. 5.12 Symmetric coupled transmission line driven in the odd mode. The voltage
0
responses are 180 out-of-phase on each line. Ground return lines not shown.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.4: Admittance Matrix Representation o f Coupled Lines
111
(5.42)
v ; = ^ ,
(5.43)
v0 =
(5.44)
^
.
Applying KCL to Fig. 5.10 leads to the line currents at each end o f the line
*1 —*'e +zo>
(5-45)
*2 ~ L — »
(5.46)
h ~ l'e ~ l'o »
(5 -47)
i
i
i4 = ie + i0 .
(5.48)
Solving these four equations results in the mode currents at each end o f the line
(5.49)
- e = ^ ,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5.51)
112
Chapter 5: Analysis and Design o f Monolithic T ransmission-Line Transformers
(5.52)
A transmission matrix representation o f the transmission line for each mode results in
the form for the input-output relationship for the even mode
cosh(ye/)
Z 0e sinh(ye/)
70e sin h (/e/)
cosh(ye/)
^0
cosh(y0/)
Z 0o sinh(y0/)
o
loo sinh(y0/)
cosh(y0/)
(5.53)
and for the odd mode
(5.54)
1
Substituting for ve and ve from Eqs. (5.41) and (5.43) in Eq. (5.53), and also
substituting for ie and ie from Eqs. (5.49) and (5.51) in Eq. (5.53) results in the
relationship between the total currents and voltages at each port for the even mode
Vi + v2
2
h +h
. 2 .
cosh(ye/)
Z0e sinh(ye/)
T0e sinh(ye/)
cosh(ye/)
v4 + v3
2
i4 + /3
2
(5.55)
Similarly, substituting for v0 and v0 using Eqs. (5.42) and (5.44) for the odd mode in
t
Eq. (5,54), and also substituting for i0 and iQ using Eqs. (5.50) and (5.52) in Eq. (5.54)
<
1
v, - v 2
2
h ~h
2
i
1
results in
cosh(y0/)
Z0o sinh(y0/)
/Oo sinh(y0/)
cosh(y0/)
2
i4 - 13
2
(5.56)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.4: Admittance Matrix Representation o f Coupled Lines
113
Converting Eqs. (5.55) and (5.56) from transmission parameters to admittance parameters
gives
coth (yel)
- c s c h (yel)
- c s c h ( j el)
coth(ye/)
1
2
(5.57)
J
1
>
1
>
1
co th (/01)
- c sc h (/01)
- csch(y0/)
c o th (/0/)
2
v4 - v 3
(5.58)
to
J
o
2
II
2
i4 - z3
L
V1 + v2
2
v4 + v3
L
2
1
I
ll
2
i4 + z3
a>
q + i2
At this point, it is possible to solve for the individual currents, q through i4, by
appropriate manipulation o f Eqs. (5.57) and (5.58). For example, summing the first row
o f Eqs. (5.57) and (5.58) eliminates i2, solves for q in terms o f Vj through v4 ;
inspection o f the expression for q yields >’i i , >’i2>>’i3»and y ]4. Repeating this process to
solve for i2 , z3, and i4 gives the admittance terms for the coupled-line four-port
admittance matrix, Eqs. (5.59) (5.62), which is represented in schematic form in Fig.
5.13 (Dworsky, 1988; Zysman and Johnson, 1969)
y \l = y i2 = L33 = L44 = ^ (Y0o coth(y0/) + 70e co th (/e/) ) ,
(5.59)
yi2 = L21 = L34 = L43 = ~ | ( F0o coth(y0/ ) - F 0e co th (/e/)),
(5.60)
yi3 = L31 = L24 = L42 = ^ (Jb ocsch0'o/ ) - Ibecsch0'e/ ))»
(5-61)
yi4 = L41 = L23 = L32 = “
(1OocschO'oO + JOecsch0'e/ )) ■
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5 -62)
114
Chapter 5 : Analysis and Design o f Monolithic Transmission-Line Transformers
*2
V2 • "
h
2
3
1.
*0e,o ’ y e,o
V, # -
1
4
Fig. 5.13 Four-port coupled-line model. The network model is developed by
superposing the responses when excited by pairs of even- and odd-mode sources.
5.5 TLTs for Impedance Transformation
Connecting ports 1 and 3 and grounding port 4 reduces the four-port network shown in
Fig. 5.13 to the two-port network shown in Fig 5.14. In Fig. 5.14 two-port quantities are
represented using capital letters, while lower case letters continue to represent four-port
quantities. The relationship between the two sets o f quantities for this case is: v, = V2, v2
= Vh v3 = V2, v4= 0, i2 = /,, and i, + /3= / 2. Additionally, the two ends o f the coupled line
are assumed to be in close proximity, perhaps by folding the transmission line back on
itself, so that the phase change across the conductor connecting ports 1 and 3 is
negligible.
The two-port admittance parameter network that results from imposing the terminal
I
i
i
I
FJ
I
I
I
connections shown in Fig. 5.14 on the four-port network o f Fig. 5.13 is
_*21
(5.63)
*22 _ 7 2 .
where expressing the two-port parameters in terms o f the four-port parameters, y\j, Sect.
5.3, as shown in Appendix A, results in
*n = T n ,
(5.64)
Y\ 2 ~ *21 - T l 2 + T l 4 >
(5.65)
*22 = 2 (Tl 1 + T o ) -
(5.66)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.5: TLTs for Impedance Transformation
115
^0e,0o ’ 7 e,o
/i
— in
V\ = V2<
Fig. 5.14 Coupled-line transmission-line transformer. Network is formed by
imposing RuthrofFs connection, Fig. 5.7, on the four-port coupled line network
shown in Fig. 5.13.
?21
nn
(b)
Fig. 5.15 Two-port networks described by admittance parameters, (a) Input
impedance looking into port 1 with load admittance Y2 connected to port 2. (b) Input
impedance looking into port 2 with load admittance Fj connected to port 1.
It is convenient to describe transmission-line transformer operation between two welldefined ports using the familiar concepts o f voltage, current, and impedance from lumped
element transformer theory.
12
12
The voltage transformation ratio, «v , current trans12
formation ratio, ni , and input impedance, Z-n looking into port 1 with load admittance
Y2 on port 2 are defined in Eqs. (5.69), (5.70), and (5.73) respectively (Morrill et al.,
1992) with voltages and currents for the two-port defined as shown in Fig. 5.15(a).
The two-port circuit equations governing the configuration o f Fig. 5.15(a) are
I x =Yn Vl + Yn V2 ,
(5.67)
I 2 =Y2iVi +Y22V2 = - Y 2V2 .
(5.68)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
116
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
12
Solving for the voltage transformation ratio, «v , using Eq. (5.68) yields
12_Fi _
nv =
Y2 +Y22
(5.69)
'21
12
The current transformation ratio,
, is defined as
Y21V1+Y22V2
n !2 =
(5.70)
YU V1 + Y12V2
h
Solving for V\ from Eq. (5.68) and substituting into Eq. (5.70) gives
-T o
ToT
2 21
-*
» !2 =
(5.71)
Yl \ ( Y2 + * 22 ) “ * 12*21
' 21
Finally, solving for V2 from Eq. (5.68) and substituting into Eq. (5.67) results in
A =V\
> 1 1 ^ 2 + ^ 2 2 ) - y n » 2i
*2 + T22
y2
7 I2 - Y L ^in -
(5.72)
J
+ y 22
A rt,(r2+Ya )-r]2r2l
(5.73)
A>
Conversely, looking into port 2 with load admittance Yx on port 1, as shown in Fig.
5.15(b), and following a similar approach yields
21
v2
V
V)
Y\
+ * ll
(5.74)
*12
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.5: TLTs for Impedance Transformation
117
Yn-Yj
Y22-{Yl +Yn ) - Y 2 r Yn
n 21 = - i i
-I
21 n ?
7 21_«v
^in
Y i+ Y n
Y22-(Y] + Yu ) - Y 2 r Yl 2 '
(5.75)
(5.76)
Comparison o f Eqs. (5.69), (5.71), and (5.73) with Eqs. (5.74)-(5.76) indicates that
the transformations for the two cases, Fig. 5.15, assuming Y\ = Y2, are different unless
'
Yu =Y22,
(5.77)
Y\2 ~ Y2i •
(5.78)
Reviewing Eqs. (5.64)-(5.66) shows that R uthroff s transmission-line transformer,
Fig. 5.14, meets the condition imposed by Eq. (5.78), but not the condition imposed by
Eq. (5.77). Thus, R uthroff s transmission-line transformer is a reciprocal device— as it
must be— but it is not symmetric.
In order to understand the fundamental operational mode o f the coupled line
transmission-line transformer, consider the case o f two coupled lines placed very far from
the ground plane. This causes the even-mode capacitances Ce and C® to diminish, with
the result that the even-mode admittance Toe vanishes almost entirely, as shown by Eq.
(5.33). In this case, propagation along the coupled line is exclusively odd mode, so the
currents along the coupled lines are as shown in Fig. 5.7.
Consider first excitation o f port 1, as in Fig. 5.15(a). Combining Eqs. (5.64)-(5.66)
with Eqs. (5.59)-(5.62) and setting Foe = 0 allows expression o f Eqs. (5.69) and (5.71) as
7°0 (c o s O v ) + 1) + j s i n ( / y )
(5.79)
^Oo ( c o s ( /y ) + i)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
118
b ,2 = 2
M /y )+ o
(5 80)
2cos (p ol)+ j -z~-sin(/30l)
y
2
Equations (5.79) and (5.80) demonstrate that the voltage and current responses are
functions only o f the ratio o f the odd-mode to load admittance and the electrical length o f
the coupled line— not the values o f the individual load and line admittances themselves.
A criterion for choosing a ‘best’ value for the admittance ratio is to select the value that
yields the visually flattest voltage, current, or impedance transformation as a function o f
the electrical length o f the coupled line. Figure 5.16 demonstrates this and shows that
increasing the ratio o f Too to Y2 (or o f Z 2 to Zq0) flattens the frequency response o f the
voltage transformer described by Eq. (5.79).
Figure 5.17 shows that the flattest
frequency response for the current transformer described by Eq. (5.80) is obtained with
an admittance ratio o f approximately 1.4:1 as shown.
Figure 5.18 shows that the
frequency response o f the normalized impedance transmission-line transformer, found by
multiplying Eq. (5.79) by Eq. (5.80), is flattest with an admittance ratio o f approximately
1.6:1 as shown. As shown in the figures, for electrical lengths longer than approximately
1 radian the transmission-line transformer voltage, current, and impedance transformation
are no longer relatively constant, but becomes a function o f the electrical length o f the
line.
It is possible to use an approach similar to the one presented in this section to
optimize the admittance ratio for other transmission-line transformer frequency
responses, e.g., phase behavior.
The case o f a more general coupled line w ith a non-zero value o f even-mode
admittance is shown in Fig. 5.19 with the odd-mode to load admittance ratio set to 1.6:1.
This result demonstrates that increasing the even-mode admittance substantially degrades
the performance o f this TLT near frequencies where it is electrically short and serves to
reduce the transformer’s useful bandwidth. Because the voltage, current, and impedance
transformations shown in Figs. 5.16-5.19 resembles those provided by a conventional
transformer with a turns ratio o f 2:1 this case is referred to as a 2:1 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.5: TLTs for Impedance Transformation
119
Again making use o f Eqs. (5.64)-(5.66) with Eqs. (5.59)-(5.62) with odd-mode
propagation and lossless conditions, Eqs. (5.74) and (5.75) can be expressed as
c° s ( / y ) + 2 y s i n ( / y )
=
--------------- s i n
4 sin(/?0/ ) + j
j / l . , 1 )
,
....
.
------------r 0o (l + cos
(5-81)
(5 82)
(l - cas{fi0l ))
These two equations demonstrate the same behavior as that for 2:1 TLTs identified in
Eqs. (5.79) and (5.80); specifically, that the voltage and current responses are functions
only o f the ratio o f the odd-mode to load admittance and the electrical length o f the
coupled line.
Figure 5.20 shows that the flattest frequency response for the voltage
transformer described by Eq. (5.8,1) is obtained w ith a ratio o f approximately 2.8 o f Too to
Y\ (or o f Zi to Zoo). The flattest frequency response for the current transformer described
by Eq. (5.82) is obtained by decreasing the ratio o f Too to Y\ or o f Z\ to Zo0 as shown in
Fig. 5.21.
The flattest frequency response for the normalized impedance transformer
described by multiplying Eq. (5.81) by Eq. (5.82), and shown in Fig. 5.22, is obtained
with an admittance ratio o f approximately 2.6 as shown. As before, for electrical lengths
longer than approximately 1 radian, the TLT voltage, current, and impedance
transformation are no longer relatively constant, but becomes a function o f the electrical
length o f the line.
The case o f a more general coupled line w ith a non-zero value o f even-mode
admittance is shown in Fig. 5.23, where the odd-mode to load admittance ratio is set to
2.6:1. Figure 5.23 demonstrates that increasing the even-mode admittance substantially
degrades the performance o f this TLT at frequencies where it is electrically short and
serves to reduce its bandwidth.
Because the voltage, current, and impedance
transformations shown in Figs. 5.20-5.23 resemble those provided by a conventional
transformer with a turns ratio o f 1:2, this case is referred to as a 1:2 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
120
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
3.5
C
2.5
Electrical Leng(J?0/
1>y
Fig. 5.16 Voltage transformation ratio ny
(radians)
vs. electrical length J30 1 for five odd­
mode admittance to load admittance ratios for a 2:1 TLT.
4
3.5
3
2.5
2
— 1.5
1
0.5
0 -2
•1
,0
Electrical Length /30l (radians)
10
Fig. 5.17 Current transformation ratio ny vs. electrical length /?0 1 for five odd­
mode admittance to load admittance ratios for a 2:1 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.5: TLTs for Impedance Transformation
10
9
8
7
a
Si
>-
6
CM
N
5
4
3
2
1
0
•1
•2
,o
Electrical Length P J (radians)
17
Fig. 5.18 Normalized input impedance Zjn T2 vs- electrical length /?0 / for five
odd-mode admittance to load admittance ratios for a 2:1 TLT.
Y„ /Y =1.6
4.5
3.5
CM
>-
2.5
C
Yn
=Yn
/1000
0e
Oo
Y.0e =Y.Oo7100
Y.Oe=Y Oo150
N
YOe=YOo120
Y. =Y. 710
0.5
Electrical Length p 0l (radians)
Fig. 5.19 Normalized input impedance
A2
Y2
vs.
electrical length P 01 for five
even-mode admittances for a 2:1 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
122
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
0.9
0.8
|
0.7
Y Oo/Y 1=1.0
Y IY =2.0
Oo 1
Yn
IY =2,8
Oo 1
Yn
IY =4.0
Oo 1
Y nJ Y =8.0
0.6
Sjc > 0.5
0.4
0.3
0.2
Electrical Length P J (radians)
Fig. 5.20 Voltage transformation ratio nv
i
vs. electrical length Pa I for five odd­
mode admittance to load admittance ratios for a 1:2 TLT.
0.5
0.4
0.2
Electrical Length P J (radians)
Fig. 5.21 Current transformation ratio
.21
vs. electrical length P 0 1 for five odd­
mode admittance to load admittance ratios for a 1:2 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.5: Coupled Line TLTs for Impedance Transformation
1r
0.9
V f 1'0
0.8
W
S' 0.7
<2
0.6-
20
Y OoIY 1=2.6
Y IY =4.0
Oo 1
Y.Oo/Y 1=8.0
0.5
N
0.4
0.3
0.2
0.1
0L
-2
10
10
10
Electrical Length P J (radians)
Fig. 5.22
Normalized input impedance Z;21 Tj vs. electrical length P 01 for five
odd-mode admittance to load admittance ratios for a 1:2 TLT.
0.5
0.45
Y. IY =2.6
0.4
0.35
0.3
— 0.25
CM C
^ 0.2
0.15
0.05
Electrical Length p j (radians)
Fig. 5.23 Normalized input impedance
,21
"in
7j vs. electrical length /?0 / for five
even-mode admittances for a 1:2 TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
124
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
5.6 1:1 TLTs for Phase Inversion
A second terminal condition reduces the four-port network shown in Fig. 5.13 to a twoport network, Fig. 5.15. Figure 5.24 shows a two-port network formed by grounding
opposing ends o f the coupled line structure and referencing the excitation o f the ports as
shown. The relationship between the two sets o f quantities for this case is: v, = Vh v3 =
V2, v2 = V4 = 0, ix = /,, and z3 = I2. Again, the two-port admittance parameter network is
h _
i
1
bj
i
i
1
represented as
y 22_
Y i.
where now,
Yn = T n ,
(5-83)
Y n = Y 2 ] = y ]3,
(5.84)
Y2 2 = y u .
(5.85)
Thus, this transmission-line transformer is also both reciprocal and symmetric.
Substituting Eqs. (5.83)—(5.85) into either Eq. (5.69) or Eq. (5.74) yields the voltage
transformation ratio
«vmv = —h c t Z l l ,
To
(5.86)
where TL = Tj = T2 is the load admittance. Substituting Eqs. (5.83)-(5.85) into either
Eq. (5.71) or Eq. (5.75) yields the current transformation ratio
n inv
___________ T l3 ' L
Tn
-Yh +(yu2
(5.87)
T l3
)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.6: 1:1 TLTs for Phase Inversion
125
^0e,0o ’ 7 e,o
-# v 3 - V 2
ST*
V\ = vi • —
11 - i\ ----- ►
Fig. 5.24 Two-port phase-inverting transmission-line transformer formed by
grounding opposing ends of a four-port coupled line network.
Combining Eqs. (5.83) and (5.84) with Eqs. (5.59}-(5.62), and assuming only odd-mode
propagation and lossless conditions, Eqs. (5.86) and (5.87), respectively, reduce to
Yoo c ° s ( / y ) + 2 / s i n ( ^ 0/)
»r =
n ;nv
(5.88)
2 j __________
=
r0o
(5.89)
sin (^0/) + 2ycos(/?0/)
With regard to the importance o f the odd-mode admittance to the load admittance
ratio and the electrical length o f the coupled line, Eqs. (5.88) and (5.89) demonstrate the
same type o f behavior seen in previous cases. A special case o f these equations arises
when the admittance ratio equals 2:1. Under this condition, the magnitude o f the voltage
and current responses becomes unity for all electrical lengths.
Figures 5.25 and 5.27
show that this case leads to the flattest frequency response for the voltage transformer
described by Eq. (5.88), and the normalized impedance transformer described by the
product o f Eqs. (5.88) and (5.89).
The phase response for the 1:1 phase-inverting transformer flattens as the ratio o f F0o
to Yt increases, as shown in Fig. 5.26. If the admittance ratio is sufficiently large, this
transformer provides phase inversion over almost two decades o f frequency change.
Because the transmission-line transformer described by Eq. (5.88) provides electrical
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
126
isolation between the two ports along with phase inversion, it is called a phase-inverting
TLT.
The case o f a more general phase-inverting transmission-line transformer with a non­
zero value o f even-mode admittance is shown in Fig. 5.28 where the admittance ratio is
set to 2:1. Once again, increasing the even-mode admittance substantially degrades the
low-frequency performance o f the phase-inverting TLT and serves to reduce its
bandwidth.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.6: 1:1 TLTs for Phase Inversion
W
50
y 0o/ y l= i .qo
Yn
IY. =2.00
Oo L
Y JY ^.O O
Y 0o/Y l = 8 . 0 0
i;.,
10
10
Electrical Length J30l (radians)
Fig. 5.25 Voltage transformation ratio
vs. electrical length (50 I for five odd­
mode admittance to load admittance ratios for a 1:1 phase-inverting TLT.
Y0o/ V ° - 50
-20 ....... y0o/yl=i .oo
-40 —
Cf)
§
-60
I
-80
y0o/y u= 20°
Y^/Y^.OO
i*-
Yn„/Y, =8.00
>
C
"c* -100
O
)
c
< -120
Q
U)
05 -140
JZ
Q.
-160
Electrical Length P Ql (radians)
Fig. 5.26 Voltage phase angle vs. electrical length /?0 1 for five odd-mode
admittance to load admittance ratios for a 1:1 phase-inverting TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
128
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
4
3.5
a
3
§
Y.Oo/Y,L=0.50
Y0oI YL=1.00
Y0oIY,L=2.00
Y0oIY,L=4.00
Y0oA',L=8.00
2.5
N~
\ \
2
1.5
1
0.5
10
Electrical Length
Fig. 5.27 Normalized input impedance Z "
pj
10
(radians)
Tl vs- electrical length fi0 1 for five
odd-mode admittance to load admittance ratios for a 1:1 phase-inverting TLT.
Y0e =Yn
Oo/1000
....... Y0e =YOo/100
Yn
=Yn
0e
Oo/50
Yn0e =Y.Oo/20
Y. =Y„ /10
S'
I
bf
0.8
0.6
0.4
0.2
Electrical Length/?0/ (radians)
Fig. 5.28 Normalized input impedance
Yl
v s.
electrical length /?0 1
fo r
five
even-mode admittances for a 1:1 phase-inverting TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.7: 1:1 TLTs for Electrical Isolation
129
5.7 1:1 TLTs for Electrical Isolation
The third terminal condition that reduces the four-port network, Fig. 5.15, to a two-port
network is shown in Fig. 5.29.
In the figure, the two-port network is formed by
grounding adjacent ends o f the coupled-line structure. The relationship between the two
sets o f quantities for this case is: v, = Vx, v2 = V2, v3 = v4= 0, ix = /,, and i2= I2. Again, the
1
r
1
1
two-port admittance parameter network is represented as
CT
(5.63)
1
72.
t
* 2 .
> l'
where now,
*11
=
(5.90)
T il ’
(5.91)
*12 ~ *21 “ Tl2>
(5.92)
Thus, this transmission-line transformer is reciprocal and symmetric. Substituting into
either Eq. (5.69) or Eq. (5.74) yields the voltage transformation ratio
*L + T l l
(5.93)
>12
Similiarly, substituting into either Eq. (5.71) or Eq. (5.75) yields the current
transformation ratio
« r = .............
-•^ -- '4 ----- r .
T i r * L +(>11
~ >1 2
)
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5.94)
130
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
^ 0 e ,0 o ’
12 ~ h
----- 1
7 e ,o
v2 «— «
V1 = v l
11 = h
Fig. 5.29 Two-port electrically-isolating transmission-line transformer formed by
grounding adjacent ends of a four-port coupled-line network.
Combining Eqs. (5,90)-(5.92) with Eqs. (5.59)-(5.62), and still assuming only odd-mode
propagation and lossless conditions, Eqs. (5.93) and (5.94), respectively, reduce to
2 ./ta n ( /y ) +
0o
(5.95)
r 0o
is o
=
1.
(5.96)
The response in Eq. (5.95) is a function only o f the odd-mode admittance to the load
admittance and the electrical length o f the coupled line, while the response in Eq. (5.96)
is independent o f both. Figures 5.30-5.32 show that increasing the ratio o f Too to El
provides the flattest response for the magnitude and phase response o f the transmissionline transformer described by Eq. (5.95) and the normalized impedance transformer given
by the product o f Eqs. (5.95) and (5.96). The transmission-line transformer described by
Eq. (5.95) provides electrical isolation between the two ports without phase inversion, so
it is called an electrically-isolating TLT.
The case o f a more general, electrically-isolating TLT with a non-zero value o f even­
mode admittance is shown in Fig. 5.33 with the admittance ratio set to 2.00. As seen
before, this result also shows that increasing the even-mode admittance substantially
degrades the performance o f the electrically-isolating TLT at frequencies where it is
electrically short and serves to reduce its bandwidth.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.7: 1:1 TLTs for Electrical Isolation
Y _ IY, = 0 . 5 0
3.5
—
W
W
200
00
Y ./ Y , = 8 .0 0
2 .5
—
1 .5
0 .5
E le c tric a l L e n g th
Fig. 5.30 Voltage transformation ratio
pj
(ra d ia n s )
vs. electrical length /?0 1 for five odd­
mode admittance to load admittance ratios for a 1:1 isolating TLT.
200
180
</> 1 6 0
.......
—
W
0-50
y 0 o/ y l = i . o o
W
200
Y0oIY,L= 4 . 0 0
Y . IY, = 8 . 0 0
o
.<2 >
C
®
100
?
<
80
$
5
Q.
60
40
E le c tric a l L e n g th f j j ( r a d ia n s )
Fig. 5.31 Voltage phase angle vs. electrical length fi0 1 for five odd-mode
admittance to load admittance ratios for a 1:1 isolating TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
132
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
3.5
a
’w '
Y. /Y, =0.50
0o L
Yn
/Y =1.00
0o L
Y /Y, =2.00
0o L
Yn
IY, =4.00
0o L
Y„ /Y, =8.00
2.5
Sc
N
0.5
Electrical Length p i (radians)
Fig. 5.32 Normalized input impedance jZ^°
vs.
electrical length fin I for five
odd-mode admittance to load admittance ratios for a 1:1 isolating TLT.
Y0e =YOo/1000
Y0e =YOo/100
Y =Y /50
0e
Oo
YOe=YOo/20
Y 0e
. =YOo/10
Y„ IY, =2
>J
hf
0.8
0.6
0.4
0.2
Electrical Length /?0/ (radians)
Fig. 5.33 Normalized input impedance Zjn 7 l
vs.
electrical length
I for five
even-mode admittances for a 1:1 isolating TLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.8: M odeling Planar, Spiral, Coupled Microstrip Transmission Lines
133
5.8 Modeling Planar, Spiral, Coupled Microstrip
Transmission Lines
It seems natural to form coupled microstrip line structures into Archimedean spirals to
make the most efficient use o f wafer space— in a configuration similar to the square
spiral transformers shown in Fig. 5.1. This requires development o f a simplified model
o f coupled microstrip transmission lines formed in this manner. A note o f caution is
appropriate before proceeding. In general, for inhomogeneous parallel transmission lines
such as coupled microstrip lines, n conductors will sustain n distinct generalized modes
(Marx, 1973).
For the purposes o f this section, however, the transmission-line
transformer connection is assumed to impose a boundary condition that supports only
even and odd propagation modes and characteristic immittances along coupled lines.
Figure 5.34 shows the port definitions for the spiral-shaped coupled microstrip
transmission lines. The outermost and innermost coupled microstrip lines in the figure
form terminals 2 and 4, respectively, while the two inner lines form terminals 1 and 3, as
also shown. Connecting terminals 1 and 3 and grounding terminal 4 reduces the fourport network, Fig. 5.13, to the two-port network, Fig. 5.14. This spiral transmission-line
transformer (STLT) is capable o f impedance transformations similar to a conventional
transformer with a turns ratio o f 1:2 or 2:1, depending upon source and load orientation.
Grounding terminals 2 and 4 reduces the four-port spiral-shaped network to the STLT
equivalent o f that shown in Fig. 5.24.
As before, this network provides electrical
isolation between the ports along with phase inversion and is referred to as a phaseinverting STLT.
Grounding terminals 3 and 4 reduces the four-port spiral-shaped network to the STLT
equivalent of that shown in Fig. 5.29. This network provides electrical isolation between
the ports without phase inversion, so, again, this configuration is referred to as an
electrically-isolating STLT.
In order to determine the even- and odd-mode propagation constants and impedances
for coupled-line structures with multiple lines, it is necessary to determine the electric
and magnetic fields for each mode. In general, this is a complex problem because o f the
varying curvature o f the spiral path and the potential for longitudinal fields. Several
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
134
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
Fig. 5.34 Port definitions for spiral-shaped, coupled microstrip lines. Port labels
also serve to designate the upper terminal of each terminal pair. The coupled-line
model, Fig. 5.13, models the resulting four-port network.
Fig. 5.35 Spiral-shaped coupled microstrip lines. Expanded view of a portion of the
interior shows that the segments locally approximate parallel coupled elements if the
curvature of the spiral is small.
simplifying assumptions are necessary to make the problem tractable. To this end,
assume the curvature o f the spiral is sufficiently small that straight parallel
elements serve adequately to approximate the coupled microstrip lines, Fig. 5.35.
Second, assume the coupled microstrip lines reside in the spiral’s interior where the
fields are approximately uniform between turns, i.e., where the effects o f both the
inner and outer edges of the structure can be ignored safely.
This second
assumption is clearly invalid for the inside and outside coupled lines o f the spiral;
limiting the proportion o f the total coupled line length made up by the inside and
outside lines serves to reduce the effect o f this error. Third, assume the frequency
is sufficiently low that the phase differences between adjacent turns is negligible.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.8: Modeling Planar, Spiral, Coupled Microstrip Transmission Lines
135
The equations o f Sect. 5.2 pertain strictly to the incremental distributed circuit model
shown in Fig. 5.9, but they lead to the general concepts o f the even (odd) mode
transm ission line immittances Z e,Y e (Z 0,Y 0), and the even (odd) mode propagation
constant y e (y0). Rather than modifying the circuit model to account for the additional
complexity o f the spiral-shaped coupled microstrip lines, the approach taken in this work
focuses on determining the approximate even- and odd-mode capacitances for a linear
array o f coupled microstrip lines, subject to the three restrictive assumptions just
discussed, above.
After obtaining the capacitance with dielectric absent, the
‘homogeneous’ capacitance, and the capacitance with the dielectric in place, the
‘inhomogeneous’ capacitance, the even- and odd-mode immittances and propagation
constants are found by application o f Eqs. (5.33)—(5.36). The validity o f these equations
in this case is assumed because RuthrofPs transmission-line transformer connection, Fig.
5.7, forces the spiral coupled lines to have the same even- and odd-mode structure as the
isolated pair o f coupled microstrip lines shown in Fig. 5.8.
In order to visualize better the electromagnetic field distribution, consider a portion o f
a cross section o f a uniform array o f microstrip lines excited in the even mode as shown
in Fig. 5.36(a). In this instance, there is no electric field coupling between any o f the
microstrip lines— they are effectively electrically isolated.
Every microstrip line is
magnetically coupled to all the others, but the magnetic coupling diminishes rapidly with
distance due to the presence o f the conductive ground plane so only adjacent coupling is
shown in the figure. With this field configuration the magnetic coupling is reinforcing so
the total inductance o f each microstrip line is greater than its self-inductance. For this
first-order effect, notice that the m icrostrip’s magnetic field is not altered if a magnetic
wall (PMC) is inserted between the microstrips as shown in the figure.
Figure 5.36(b) depicts the result o f exciting the uniform array o f coupled microstrip
lines in the odd mode.
Electric field coupling between non-adjacent microstrips o f
opposite polarity is limited because o f the relatively large separation o f these lines. For
this reason, only electric field coupling between adjacent microstrip lines is considered in
this figure. Odd-mode excitation results in negative mutual-inductance between adjacent
microstrip lines that reduces the magnetic field between the strips.
The conductive
ground plane again limits magnetic coupling from non-adjacent lines. Because o f this
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
136
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
■
•
i
■
— 4 --- v -—— 4 -—
- i r -
----------+
-
f-
^
(a)
(b)
Magnetic Field Lines........... ►
Electric Field Lines --------- ►
Magnetic Wall (PMC) ■
Electric Wall (PEC)
Fig. 5.36 Approximate electromagnetic field configuration in an array of coupled
microstrip lines, (a) Even-mode excitation of a portion of a uniform array of coupled
lines. Only the magnetic field lines representing each microstrip’s self-inductance
and mutual-inductance with adjacent neighbors are shown. The positive mutualinductance between adjacent microstrips serves to increase the total inductance of
each microstrip, (b) Odd-mode excitation of a portion of a uniform array of coupled
lines. The negative mutual-inductance between adjacent microstrips serves to
decrease the total inductance of each microstrip.
nh
nDE3 C E
□O DB DE DEI
3D.
i
2b
rwi r®~i nan nrr
(a)
(b)
a
[E
[B
tE
nn
-►I Hm
rsn
nn
r^n
2b
[W] c e
(c)
ch
cm
(d)
Fig. 5.37 Inductance of microstrip line arrays excited in even and odd modes, (a)
Array of four coupled microstrip lines excited in the even mode, (b) Equivalent
configuration after replacing ground plane with image lines with opposing currents,
(c) Array of four coupled microstrip lines excited in the odd mode, (d) Equivalent
configuration after replacing ground plane with image lines with opposing currents.
Then, repeated application of Hoer and Love’s (1965) formula gives the total
inductance of each of the top lines in (b) and (d), which is the same as the total
inductance of the microstrip lines in (a) and (c).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.8: M odeling Planar, Spiral, Coupled Microstrip Transmission Lines
137
the symmetry o f the electric field in this structure is not altered if an electric wall is
inserted between each microstrip line in the array.
It is possible to apply image theory to demonstrate quantitatively the qualitative
discussion presented in the previous paragraph and shown in Fig. 5.36. Image theory
allows replacement o f the ground plane with image conductors with opposing currents for
the cases o f even-mode excitation, Fig. 5.37 (a), and odd-mode excitation, Fig. 5.37 (c)
(Balanis, 1989). Formulas for the inductance o f rectangular conductors given by Hoer
and Love (1965) are applied to compute the total inductance for each conductor. This is
found by totaling each line’s self-inductance and the contributions o f positive and
negative mutual-inductance from the neighboring lines shown in Fig. 5.37 (b) or (d).
Figure 5.38 shows the calculated total inductance for each line in three microstrip line
arrays o f increasing size with even-mode and odd-mode excitation. The figure shows
that in the case o f odd-mode excitation, with the exception o f the outermost lines, the
inductance o f the microstrip lines does not vary more than approximately 10% across the
arrays. The figure also shows the inductance when the three arrays are excited in the
even mode. In this case the inductance variation excluding the outermost lines is less
than 10%.
The properties o f the coupled microstrip line array also limit growth in the even-mode
inductance with increases in the size o f the microstrip line array. Increasing the number
o f coupled lines in the array from six to ten lines increases the inductance o f the
innermost pair o f microstrip lines by less than 6%. As Eqs. (5.26) and (5.27) show, the
even- and odd-mode characteristic impedances are found from the square root o f the
even- and odd-mode inductances. This square-root dependence further reduces the effect
o f the variations in microstrip line inductance on transmission-line transformer
performance.
Figure 5.38 and the preceding analysis demonstrate that little error is incurred by
assuming that the interior fields are uniform across the array.
Thus, the problem o f
determining the fields in the array reduces to the problem o f finding the fields in the
center o f the microstrip line array subject to the appropriate boundary conditions for
either even- or odd-mode excitation.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
138
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
qj
010 coupled microstrip lines
□ 8 coupled microstrip lines
° 6 coupled microstrip lines
x
c
Even-mode excitation
O'
''Q'"
Odd-mode excitation
0.1
0
1
2
3
4
5
6
7
Microstrip line number
8
9
10
Fig 5.38 Total inductance of 1-mm length microstrip line arrays with even- and odd­
mode excitations. Excluding the outermost microstrip lines, the inductance variation
referenced to that of the innermost microstrip line pair in each array is no more than
+5.0 to -12% for odd-mode excitation. Excluding the outermost microstrip lines, the
inductance variation referenced to that of the innermost microstrip line pair in each
array is no more than -7.5% for even-mode excitation. For the innermost microstrip
lines, the increase in even-mode inductance from the smallest to largest microstrip
line array is less than 6%.
Finite element analysis provides a convenient method for finding the fields and the
needed capacitances through numerical solution o f Laplace’s equation in the region
bounded by the pairs o f electric walls or magnetic walls and the ground plane, Fig. 5.36,
for the homogenous and inhomogeneous structures.
This gives the voltage V (x ,y )
everywhere within the enclosed region for each case. The corresponding electric field is
found by numerically differentiating V (x ,y ). Then it is necessary to solve for the even­
mode capacitances, C<? and Ce , and odd-mode capacitances, C® and C0 , by equating
the energy stored in the electric field with the energy stored in a lumped element
capacitor for each case (Dworsky, 1988). Finally, applying Eq. 5.33 with the even-mode
capacitances, C® and Ce , gives the even-mode impedance, Z 0e while applying Eq. 5.34
with the odd-mode capacitances, C° and C0 , gives the odd-mode impedance, Z 0o.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.8: Modeling Planar, Spiral, Coupled Microstrip Transmission Lines
139
Table 5.1 compares the results from applying these techniques to a pair o f coupled
microstrip lines and to a coupled microstrip line array both implemented from 20-pm
wide, 25-pm thick gold-plated metal PMCM-D microstrip lines spaced 20 pm apart.
Referring to the table and to Figs. 5.8(a) and 5.36(a), the even-mode capacitances Cg and
Ce decrease in the microstrip array compared to the microstrip pair because the magnetic
wall reduces fringing o f the electric field. This results in an almost fifty percent increase
in the even-mode impedance for the microstrip array compared to the microstrip pair.
Again, referring to the Table 5.1 and Figs. 5.8(b) and 5.36(b), the odd-mode
capacitances C® and C0 are increased slightly in the microstrip array compared to the
microstrip pair because o f the additional electric field coupling in the microstrip array.
For this reason the odd-mode impedance o f the microstrip array is reduced approximately
twenty percent compared to the microstrip pair.
Prior to ending the discussion o f spiral-shaped coupled microstrip lines, it is
important to consider one additional concept.
It is also possible to model the spiral­
shaped lines shown in Fig. 5.35 connected as a 2:1 STLT by assuming the spiral
microstrip lines act as coupled lumped-element inductors as shown in Fig. 5.39. Mesh
analysis o f this circuit results in
ZL
Z M ~ RL
+ ^ L
ZM -
ZL +RL
> in ~
~ h
_
J l
-
0
The input impedance o f the circuit in Fig. 5.39 is found from solving Eq. (5.97).
Assuming the lines are strongly coupled magnetically ZM = ZL , so Eq. (5.97) gives
v
Zm ~
Z in _
Lm
4flL + ^ L
L
i+
COL
'V 2
coL
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(5.98)
140
Chapter 5: Analysis and Design o f Monolithic T ransmission-Line Transformers
Microstrip
Microstrip
pair
array
c
c0
59.33 pF/m
81.90 pF/m
141.8 pF/m
182.2 pF/m
Zoo
36.37 Q
27.31 Q
ce°
24.40 pF/m
15.77 pF/m
Q
Z0e
71.74 pF/m
51.28 pF/m
79.72 Q
117.3 0
Table 5.1 Comparison of electrical properties for a coupled microstrip pair and an
array of coupled microstrips. PMCM-D coupled microstrip lines are 20-p.m wide,
25-pm thick gold-plated metal, spaced 20 pm apart. Values are obtained by solving
Laplace’s equation across each enclosed region to compute the even- and odd-mode
capacitances for each structure and then applying Eqs. 5.33 and 5.34 respectively to
compute the even- and odd-mode impedances.
Fig. 5.39 Lumped element model of Ruthroff s transmission-line transformer. The
circuit models magnetic coupling between the spirals to account for impedance
change at the input terminals due to ‘transformer action. ’
For frequencies where / » ( f ? L/2;rZ), the above expression reduces to Z in = 4 R L .
Thus, in addition to impedance transformation due to coupled-line effects, ordinary
transformer action has the potential to contribute to impedance transformation for
sufficiently large values o f the inductance L or at sufficiently high frequency/ .
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.8: Modeling Planar, Spiral, Coupled Microstrip Transmission Lines
141
The conductive ground plane strongly suppresses transformer action in the spiral­
shaped coupled microstrip lines. Time varying currents in the spiral coupled lines induce
currents in the ground plane which tend to cancel the original currents, reducing the
magnetic coupling between the turns, as also can be inferred from Fig. 5.36(b) and (d).
This effect strongly limits impedance transformation due to transformer action for
coupled microstrip lines above conductive ground planes.
Removing the ground plane eliminates the parasitic ground plane currents with the
result that the magnetic coupling between the lines is strengthened. That this occurs is
shown in Fig 5.40, which depicts the total inductance o f each line found from Hoer and
Love’s formulas for the same three microstrip line arrays that form the basis o f Fig. 5.37,
but with the ground planes removed. As shown in the figure, removing the ground plane
increases the even-mode inductance by almost an order o f magnitude as compared with
the same microstrip line array with the ground plane present, Fig. 5.38. This gives a two
order-of-magnitude increase in transformer action as compared with the previous case as
a result o f the square term in the denominator o f Eq. (5.98).
Figure 5.38 shows that increasing the number o f lines in an array from six to ten in
the presence o f a ground plane increases the even-mode inductance o f the innermost pair
o f microstrip lines by less than 6%. In Fig. 5.40, however, increasing the number o f lines
in an array from six to ten in the absence o f a ground plane increases the even-mode
inductance o f the innermost pair o f microstrip lines by 40%. Image theory provides the
explanation for this difference. A microstrip line above a ground plane is equivalent to a
pair o f conductors containing opposing currents without a ground plane, Fig. 5.37(a) and
(b). The contribution o f mutual-inductance from each o f the lines in a pair is opposite in
sign and almost equal in magnitude resulting in almost complete cancellation. Removing
the ground plane is equivalent to removing the image conductor. W ithout the ground
plane there is no cancellation, with the result that the inductance grows directly w ith the
number o f microstrip lines in the array, Fig. 5.40.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
142
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
. —-<3>-...... --o—.
4.5[
x
>S
0)
O
.
cro 4^
t3
•o
_c
A"'
""A
...-Q -----------Q -
■c3.5
“S
2o
2.5}
O -------------------
~''Ov
0
._
010 coupled microstrip linesP
G 8 coupled microstrip lines
6 coupled microstrip lines
_J____ _!_____ i_____ I_____ I_
2
3
4
5
6
7
8
9
Microstrip line number
10
Fig. 5.40 Even-mode inductance of 1-mm length microstrip line arrays without ground
planes. For the innermost microstrip lines the increase in even-mode inductance from
the smallest to largest microstrip line array is 40% compared to a 6% increase in Fig.
5.38 for the same three microstrip line arrays with ground planes.
0.5r
0 10 coupled microstrip lines
□ 8 coupled microstrip lines
° 6 coupled microstrip lines
0.45
<>
0.4 i
1.0.35
00
1 °-3
ts
-o 0.25
c
■c
p
o
.:o—- —
X
b —-- -Ef '
—
---------
,
0 .2
•\
to
§0.15
2
0.1
/
\y /
©
0.05
0;
2
3
4
5
6
7
Microstrip line number
8
10
Fig. 5.41 Odd-mode inductance of 1-mm length microstrip line arrays without ground
planes. Excluding the outermost microstrip lines, the variation in odd-mode inductance
is as much as 78% from the innermost line pair compared to approximately 10%
variation in Fig. 5.37 for the same three microstrip line arrays with ground planes.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.9: Design Rules for Spiral-Shaped, Coupled-Line TLTs
143
Figure 5.41 demonstrates that removing the ground plane also increases the variation
o f the odd-mode inductance across the array. Without the ground plane, the odd-mode
inductance is no longer relatively constant across the microstrip lines in the interior o f the
array, as the figure shows. This invalidates the second o f the three assumptions, above,
made during the development o f the planar, spiral, coupled transmission line model and
limits the ability o f the approach developed in this chapter to model spiral transmissionline transformers constructed without ground planes.
The additional magnetic coupling produced without the ground plane produces an
impedance transformation due to transformer action per se in addition to the
transformation produced by the transmission-line transformer configuration. Chapter 6
demonstrates that this combination produces impedance transformations much greater
than the 2:1 transformations due to R uthroff s connection alone.
5.9 Design Rules for Spiral-Shaped Coupled-Line TLTs
Examining the voltage, current, and impedance transformation predictions for the
transmission-line transformer presented in Sections 5.4—5.6 demonstrates that the odd­
mode to load admittance ratio and electrical length o f the transformer govern the
transformer’s high-frequency response, at least in the lossless case. The results also show
that the even-mode to odd-mode characteristic admittance controls the low-frequency
response o f the TLT. Thus, the approximate analysis presented in Sect. 5.7 is expected to
predict the even- and odd-mode characteristic admittances for the spiral coupled lines
with sufficient accuracy to allow design o f four types o f spiral-shaped coupled
transmission-line transformers:
i)
2:1 Impedance Transforming STLTs, ii)
Impedance Transforming STLTs, Hi)
1:1 Phase-Inverting STLTs, and iv)
1:2
1:1
Electrically-Isolating STLTs.
In summary, the primary insights developed in this chapter, based on an analysis o f a
simplified model o f an array o f coupled microstrip lines and a coupled-line network
model o f the transmission-line transformer, are: i) forming a coupled-line transmissionline transformer into a spiral results in approximately (within -2 0 % , Table 5.1) the same
odd-mode characteristic admittance as a lineal isolated coupled microstrip line pair; ii)
forming the coupled-line transmission-line transformer into a spiral increases the even-
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
144
Chapter 5: Analysis and Design o f Monolithic Transmission-Line Transformers
Kl
Z nv
Kl
17
1 in 1I
2:1 TLT
>i
>1
1.4
1.6
1:2 TLT
2.8
»1
<1
2.6
-1:1 TLT
2.0
»1
2.0
2.0
1:1 TLT
»1
»1
N/A
»1
Table 5.2 Summary of coupled-line transmission-line transformer results. Table
lists the approximate values of the ratio of the odd-mode characteristic admittance to
load admittance to achieve the flattest frequency response for the four types of
coupled-line transmission-line transformers.
mode characteristic admittance by almost one-half as compared with the lineal isolated
coupled microstrip line pair, which results in improved performance o f the STLT relative
to the TLT when the lines are electrically short; Hi) the ratio o f odd-mode characteristic
admittance to load admittance primarily controls the response near frequencies where the
line is electrically one-quarter wavelength; iv) for flattest impedance transformation the
2:1 TLT odd-mode to load admittance ratio should equal approximately 1.6, for flattest
impedance transformation the 1:2 TLT odd-mode to load admittance ratio should equal
approximately 2.6, for flattest impedance transformation the odd-mode to load
admittance ratio should equal 2.0 for the phase-inverting transformer, and; v) the ratio o f
even-mode characteristic admittance to odd-mode characteristic admittance primarily
controls the response o f the transmission-line transformer near where the line is
electrically much shorter than one-quarter wavelength. Ideally, this ratio should be as
small as possible to maximize the low-frequency response o f the STLT.
Table 5.2 summarizes the key results obtained in this chapter.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Six
PMCM-D Spiral-Shaped
Transmission-Line Transformers
The previous chapter identifies several assumptions necessary to allow
application o f the four-port coupled microstrip line network to the problem o f
modeling spiral-shaped transmission-line transformers.
These include limiting
spiral curvature to inhibit longitudinal fields, restricting the proportion o f the total
coupled line length made up by the inside and outside lines, and minimizing
transformer action through the presence o f a conductive ground plane.
This
chapter compares predictions obtained from the four-port coupled microstrip line
model with measurements for the four types o f transmission-line transformers
presented in the previous chapter. This establishes a basis to quantify the limits o f
these restrictions and to understand better actual device performance.
6.1 PMCM-D STLTs
Coupled microstrip transmission lines with and without ground planes were
formed into spiral shapes and implemented in PMCM-D.
The spiral-shaped
coupled lines were fabricated from 20-pm wide, 25-pm thick gold-plated metal
microstrip lines spaced 20 pm apart, as shown in Fig. 6.1. Eliminating the ground
plane and removing the silicon substrate through micromachining ‘suspends’ the
coupled-line structure on the SiOa dielectric, Fig. 6.2. Three different spiral-
145
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
146
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
Fig. 6.1 PMCM-D transmission-line transformer. Coupled microstrip lines
25-pm thick form circular spirals with inner radii of 300 and 340 pm. GSG
pads on right connect to port 2, Fig. 5.34, while GSG pads on left connect to
port 1. The surrounding lattice structure is metal fill to maintain wafer
planarity during processing. Photo courtesy of MIT Lincoln Laboratory.
Fig. 6.2 PMCM-D suspended transmission-line transformer. Eliminating
the ground plane and removing the silicon substrate through micromachining
floats or ‘suspends’ the coupled-line structure on the glass-like Si02
dielectric. Photo courtesy of MIT Lincoln Laboratory.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.1: Spiral-Shaped PMCM-D TLTs
Turns t>er spiral
3
4
4
r, (pm)
50
100
300
147
ra (pm)
90
140
340
Length (pm)
3967
7547
12570
Table 6.1 Spiral-shaped coupled-line geometric information. Coupled lines
are 20-pm wide, 25-|iim thick gold-plated metal, spaced 20 pm apart. Table
lists number of turns per spiral, radii of the inner turn, r;, and outer turn, r0.
Last column gives the average of the lengths of the inner and outer spirals.
C,° (pF/mi
15.77
C, (pF/m)
51.28
ZoJQ)
117.3
C„° fpF/m)
81.90
Cn (pF/m)
182.2
ZooiQ)
27.31
IJ J l
1.831
Table 6.2 Spiral-shaped coupled-line electrical parameters. Even- and odd­
mode capacitances determined by finite element analysis. Ratio of odd­
mode admittance to load admittance is based on a load impedance of 50 Q.
shaped coupled-line structures were examined. These are summarized in Table
6.1, which lists the number o f turns in each spiral, the inner and outer beginning
radii o f the two coupled lines, i.e., lines at terminals four and three respectively,
o f Fig. 5.34, and the average o f the lengths o f the two turns. This range o f values
provides for multiple comparisons between model predictions and device
measurements for the 2:1 and 1:2 transmission-line transformers. For the phaseinverting and electrically isolating transmission-line transformers, a single mid­
range size o f four turns with r\ — 100 pm was examined, as is also listed in Table
6 . 1.
Values in Table 6.2 are obtained from finite element analysis applied to a
coupled microstrip line isolated between pairs o f magnetic or electric walls, as
appropriate for each mode, and as shown in Fig. 5.36 and discussed in Sect. 5.7.
Table 6.2 lists the even- and odd-mode capacitances and impedances resulting
from this analysis. The ratio o f odd-mode admittance to load admittance shown
in Table 6.2 was found based on a load impedance o f 50 Q , Sect. 5.4.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
148
6.2 PMCM-D STLT Experimental Method
The sections that follow compare experimental results and predictions for the four
types o f transmission-line transformers, in most cases fabricated with and without
the ground plane and silicon substrate. Performance predictions are obtained by
first computing the even- and odd-mode impedances and phase constants from
Eqs. (5.33)-(5.36) based on the even- and odd-mode capacitance values in Table
6.2.
Next, the elements o f the four-port coupled-line admittance matrix are
determined by substituting the even- and odd-mode impedances and phase
constants into Eqs. (5.59)-(5.62).
The predicted input impedances o f the 2:1 and 1:2 STLTs are obtained from
Eqs. (5.73) and (5.76), respectively, with two-port admittance parameters
obtained from Eqs. (5.64) (5.66). Similarly, the predicted input impedance o f the
phase inverting STLT is obtained from the product o f Eqs. (5.86) and (5.88) with
two-port admittance parameters obtained from Eqs. (5.83}-(5.85).
Finally, the
predicted input impedance o f the non-phase inverting STLT is obtained from the
product o f Eqs. (5.93) and (5.94) with two-port admittance parameters obtained
from Eqs. (5.90H 5.92).
Experimental transmission-line transformer measurements for the test spirals
were obtained in the manner depicted and described in Fig. 6.3.
The
measurements were taken with an Agilent E8361A network analyzer attached to
150-pm pitch coplanar GSG RF probes calibrated using a short, open, load, and
thru (SOLT) calibration technique and an alumina impedance standard substrate
(ISS).
Scattering parameters were measured from 0.010 to 25 GHz for each
spiral-shaped transmission-line transformer.
Once the scattering parameters are obtained, the measured normalized input
impedance for the 2:1 STLT looking into port 1 with a 50 Q load on port 2 is
found from
|Zin|lL=50
1 + 5’11
1+ S 11
1 - 5 ' 11
1 - S ll
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(6.
Chpt. 6.1: PMCM-D STLT Experimental Method
149
Probe s
■ i S Probe
G
Port 1
Network
Analyzer
Port 2
Fig. 6.3 Experimental setup for measuring transmission-line transformer
scattering parameters o f spiral configuration. Figure shows coplanar GSG
probes in contact with on-wafer GSG pads connected to port 1 and port 2 of
the STLT. Photo courtesy o f MIT Lincoln Laboratory.
while the normalized input impedance for the 1:2 STLT looking into port 1 with a
50 Q load on port 2 is found from
IZinKL
50
1 +
S 22
1 + ^2 2
J L
^ ~ S 22
The measured voltage transformation ratio,
Eqs.
(5.83)—(5.85)
with
two-port
admittance
( 6.
1 -^ 2 2
, is found from Eq. (5.86) and
parameters
found
through
appropriate conversion o f scattering parameter measurements for the phaseinverting STLT. In a similar fashion, the measured voltage transformation ratio,
riy0 , follows from Eq. (5.93) and Eqs. (5.90)-(5.92) with two-port admittance
parameters found through appropriate conversion o f scattering parameter
measurements for the electrically-isolating STLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
150
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
6.3 STLTs for 2:1 Impedance Transformation
Transmission-line transformers designed for impedance transformation were
constructed by imposing R uthroffs connection, Fig. 5.14, on pairs o f spiral­
shaped coupled lines according to the port definitions shown in Fig. 5.34. GSG
pads were connected to the two ports as shown in Fig. 6.1.
Three different
transmission-line transformers were fabricated with the same basic geometry but
with differing dimensions listed in Table 6.1.
Figure 6.4 compares the predicted and measured normalized input impedance,
obtained as described in the previous section, for the three 2:1 transmission-line
transformers described geometrically in Table 6.1. The predicted and measured
results in the figure for the n = 300 pm, r0 = 340 pm, STLT agree to within a few
percent to 6 GHz— the frequency where the spiral transmission line is electrically
one wavelength. The agreement in the figure between predicted and measured
results for the r, = 100 pm, r0 = 140 pm, STLT is within a few percent to 10 GHz,
except near the one-quarter wavelength frequency where an approximately 5%
difference is evident. Such close agreement suggests that the fields in the fourturn spiral STLT are well represented by the model o f uniformly coupled lines,
Fig. 5.36, and that transformer action due to magnetic coupling is limited. An
approximately 10% increase in measured results as compared with the prediction
is evident for the r, = 50 pm, r0 = 90 pm, device at the frequency where the length
along the spiral is one-quarter wavelength.
The three turn STLT contains one less turn than the other two spirals. The
analysis o f straight-line geometries in Sect. 5.7 demonstrates that the interior
magnetic fields remain uniform even for as few as three pairs o f turns so this does
not appear to be the source o f the difference in behaviors.
The discrepancy
between prediction and observation in the this STLT might be due either to the
rise o f longitudinal fields because o f the larger curvature o f that spiral, or to the
reduced proportion o f interior to exterior turns in the three-turn spiral, or some
combination o f both causes. This difference should not obscure the fact that with
the two exceptions o f the enhanced peaks for the two smallest spirals and a
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.2: STLTs for 2:1 Impedance Transformation
4.5
151
r, = 100 pm, n = 4
Measurement 0
3.5 Prediction----S'
—I
>
c
N
0.5
r, = 50 pm, n = 3
Frequency (GHz)
Fig. 6.4 Normalized input impedance |Zin|FL vs. frequency for three 2:1
STLTs. Results shown for STLTs fabricated with 25-pm thick gold-plated
coupled microstrip lines and inner radii of 50, 100, and 300 pm. Dashed line
shows ideal normalized input impedance for 2:1 STLT of 4.
diminished peak for the largest spiral at approximately 7 GHz, the coupled-line
model predicts successfully the performance up to 10 GHz o f all three 2:1 STLTs
with an accuracy o f approximately 5-10% .
M uch better agreement between
theory and measurements is obtained overall, especially for the two larger spirals.
In an effort to reduce the even-mode capacitance and admittance and improve
the low frequency performance o f the 2:1 STLT, three STLTs were fabricated in a
manner identical to those discussed above, except that the ground plane was
omitted and the silicon substrate was removed by substrate micromachining. The
coupled-line structure that results floats over or is ‘suspended’ by the dielectric
layer, Fig. 6.2.
Eliminating the ground plane is equivalent to moving the ground plane
infinitely far from the coupled microstrip line.
From a practical standpoint,
unfortunately, this step does not entirely eliminate the even-mode capacitance
because o f the existence o f stray capacitance between the spiral and the silicon
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
152
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
substrate at the boundary o f substrate-micromachined region. This development
complicates the finite element analysis computation because o f the difficulty o f
modeling accurately the changed situation.
Rather than attempting to model the complicated geometry, this work assumes
that eliminating the ground plane and silicon substrate reduces the original even­
mode capacitances by a fractional amount in each case.
Since the odd-mode
capacitance is equal to the even-mode capacitance plus twice the mutual
capacitance, as inferred from Eqs. (5.24) and (5.25), the odd-mode capacitance in
the absence o f the ground plane is estimated by subtracting the even-mode
capacitance that was eliminated from the original odd-mode capacitance.
The fractional reduction o f Ce was determined by selecting an even-mode
capacitance that most closely matched measured results below 1 GHz for each o f
the three cases shown in Fig. 6.5. This resulted in fractional amounts o f 0.75 for
the r\ = 300 pm, r0 = 340 pm spiral; 0.65 for the r, = 100 pm, r0 = 140 pm spiral;
and 0.40 for r\ = 50 pm, r0 = 90 pm spiral. The even- and odd-mode capacitances
and impedances obtained from this procedure are recorded in Table 6.3.
Figure 6.5 compares the predicted and measured normalized input impedance,
Eq. (6.1), for the three 2:1 transmission-line transformers with the ground plane
and silicon substrate removed.
The predictions were obtained by the method
discussed in the previous section with the values shown in Table 6.3.
The results obtained from the modified STLTs differ in two important ways
from the results o f the original STLTs. First, the modified STLTs demonstrate
much wider bandwidth than the original STLTs. Comparing the responses o f the
two STLTs with 300 pm inner radii in Figs. 6.4 and 6.5 demonstrates that the
modified STLT has more than three times the bandwidth o f the original STLT—
almost 3.5 GHz as compared with approximately 1 GHz. Here ‘bandwidth’ is
defined as the difference between the two frequencies where the normalized
impedance drops to 0.707 o f the peak value.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.2: STLTs for 2:1 Impedance Transformation
n (pm)
300
100
50
n (pm)
300
100
50
'
G°..(pF/m)
3.943
5.520
9.462
Ce (pF/m)
12.82
17.95
30.77
z j'r n
469.2
335.1
195.5
C0°!pF/m)
70.07
71.65
75.59
C„ (pF/m)
143.7
148.9
161.7
Zn° (Q)
33.24
32.30
30.17
Table 6.3 Spiral-shaped coupled-line electrical parameters. Values are for
even- and odd-mode capacitances and impedances proportionally reduced to
account for fringing capacitance after the removal of the ground plane from
below the coupled line.
Measurement 0
Prediction-----
r, = 200 pm, n = 4
G
d
>c
N
T\ = 300 pm,n = 4
n = 50 pm, n = 3
Frequency (GHz)
Fig. 6.5 Normalized input impedance \Zin\YL vs. frequency for 2:1 STLT.
Results shown for STLTs fabricated without ground plane and silicon
substrate and with 25-pm thick gold-plated coupled microstrip lines and inner
radii of 50, 100, and 300 pm. Dashed line shows the ideal normalized input
impedance for the 2:1 STLT of 4.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
154
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
Additionally, the measured response near each o f the three STLTs quarter-
wavelength frequency is increased relative to the prediction. This is attributed to
suppression o f the transformer action by removal o f the ground plane, as
discussed in the previous chapter. With the ground plane in place, time-varying
currents in the spiral coupled lines induce currents in the ground plane which tend
to cancel the original currents and reduce the magnetic coupling between the
turns. Removing the ground plane eliminates the parasitic currents flowing there,
resulting in increased magnetic coupling between the lines.
Equation (5.98)
indicates that additional impedance transformation up to a factor o f four is
available from this mechanism when the ground plane is absent.
6.4 STLTs for 1:2 Impedance Transformation
Figure 6.6 compares the predicted and measured normalized input impedance,
obtained as described in Sect. 6.1, for the three 1:2 transmission-line transformers
described geometrically in Table 6.1.
The agreement between predicted and
measured results for the three STLTs in this figure is within about 10% up to
approximately 1 GHz, above which an offset between the curves becomes
apparent. Because o f the monotonically increasing normalized impedance o f the
1:2 STLT, it is not possible to identify a specific bandwidth for these devices. It
is apparent, however, that the range over which the impedance transformation is
with approximately + 20% o f 1:4 is restricted to perhaps 3-5 GHz.
Figure 6.7 shows the predicted and measured normalized input impedance for
the 1:2 STLTs without ground plane and silicon substrate. Comparing the results
o f Figs. 6.6 and 6.7 indicates that at mid-range frequencies the response o f the
STLTs in Fig. 6.7 is slightly flatter than is the response o f the STLTs in Fig. 6.6.
This advantage is offset at higher frequencies, however, because the response in
Fig. 6.7 is steeper than the response shown in Fig. 6.6 at the same frequencies.
Apparently, whatever performance
improvement is
gained
at mid-range
frequencies is sacrificed at high frequencies. Thus, modifying the 1:2 STLT by
removing the ground plane and silicon substrate provides no overall performance
advantage compared to the original STLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.3: STLTs for 1:2 Impedance Transformation
155
0.5
Measurement 0
0.45 Prediction----0.4
= 200 pm, n = 4
0.35
0.15
r( = 300 pm,n = 4
0.05,
rt = 50 pm, n = 3
Frequency (GHz)
Fig. 6.6 Normalized input impedance |Zin|KL vs. frequency for 1:2 STLT.
Results shown for STLTs fabricated with 25-pm thick gold-plated coupled
microstrip lines and inner radii of 50, 100, and 300 pm. Dashed line shows the
ideal normalized input impedance for the 1:2 STLTs of 0.25.
0.5
Measurement 0
0.45 Prediction-----
r\ = 200 pm, n = 4
0.4
0.35
0.3
§
§
^
0.25
C
0.2
f| = 300 pm,n = 4
0.15
0.05
Frequency (GHz)
Fig. 6.7 Normalized input impedance \Zm\YL vs. frequency for 1:2 STLT. Results
shown for STLTs fabricated without ground plane and silicon substrate and with
25-pm thick gold-plated coupled microstrip lines and inner radii of 50, 100, and
300 pm. Dashed line shows the ideal normalized input impedance for 1:2 STLT.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
156
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
6.5 STLTs for Phase Inversion
The phase-inverting transmission-line transformer is formed from the 100-pm
inner radius spiral described in Table 6.1 with electrical parameters as given in
Table 6.2. This transformer is constructed by connecting the spiral in the manner
shown in Fig. 5.24 with the port definitions shown in Fig. 5.34.
Figures 6.8 and 6.9 compare the predicted and measured phase angle o f the
voltage transformation ratio
and normalized input impedance |Zin |Fl for the
1:1 phase-inverting transmission-line transformer obtained as described in Sect.
6.1. Between 1 GHz and 10 GHz the agreement between predicted and measured
phase angle is within a few degrees. Below 1 GHz the predicted and measured
results diverge increasingly. Investigations continue to determine if this is due to
low frequency measurement error or due to unmodeled effects that are not
accounted for by the spiral-shaped coupled microstrip line model. Assuming that
O
the low-frequency measurement is in error and that the actual phase shift is 180 ,
this transformer provides phase inversion with no more than approximately 10%
phase error over almost two decades o f frequency change.
In Fig. 6.9, the agreement between predicted and measured normalized input
impedance |Zjn|FL is within 10% to about 5 GHz. It is apparent that the range
over which the
impedance transformation
for this
device
is
equal to
approximately unity is only a few tens o f megahertz. The resonant ‘peak’ visible
in the figure is located at the frequency where the electrical length o f the line is
approximately 90 , similar to that predicted in Fig. 5.27, Sect. 5.5.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.4: STLTs for Phase Inversion
Measurement 0
Prediction-----50
O)
•S-100
D)
<-150
-200
-250
Frequency (GHz)
Fig. 6.8 Phase angle of voltage transformation nv vs. frequency for 1:1
STLT. Results shown for STLTs fabricated with 25-pm thick gold-plated
metal coupled microstrip lines and inner radius 100 pm. Dashed line shows
O
the ideal phase angle for the phase-inverting STLT of -180 .
Measurement 0
3.5 Prediction-----
a
a
_i
>c
N
2.5
0.5
Frequency (GHz)
Fig. 6.9 Normalized input impedance |Zin|TL vs. frequency for 1:1 STLT.
Results shown for STLTs fabricated with 25-pm thick gold-plated metal
coupled microstrip lines and inner radius 100 pm. Dashed line shows ideal
normalized input impedance for the phase-inverting STLT of 1.0.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
158
6.6 STLTs for Electrical Isolation
The electrically-isolating transmission-line transformer is also formed from the
100-pm inner radius spiral described in Table 6.1 with electrical parameters as
given in Table 6.2. This transformer is constructed by connecting the spiral after
the m anner shown in Fig. 5.29 w ith the port definitions shown in Fig. 5.34.
Figures 6.10 and 6.11 compare the predicted with measured phase angle o f the
voltage transformation ratio, n 1™, and normalized input impedance, |Zin\Yl , for
the 1:1 electrically-isolating transmission-line transformer obtained as described
in Sect. 6.1.
Between 1 and 5 GFIz the agreement between predicted and
measured phase angle is within approximately 5 . Below 1 GHz the predicted and
measured results diverge increasingly.
Again, investigations continue to
determine if this is due to low frequency measurement error or due to unmodeled
effects that are not accounted for by the spiral-shaped coupled microstrip line
model. Continuing to assume that the low-frequency measurement is in error and
O
that the actual phase shift is 0 , this transformer provides electrical isolation with
no more than approximately 10% phase error over almost two decades of
frequency change.
Figure 6.11 shows the predicted and measured normalized input impedance
|Zin \Yl for the electrically-isolating STLT. The difference between predicted and
measured results is better than approximately 10% everywhere except near the
frequency where the device is approximately one-quarter wavelength. As is true
in the previous case, the range over which the impedance transformation for this
device is equal to approximately unity is somewhat restricted.
In order to compare the performance o f standard and suspended structures, a
1:1 electrically isolating transmission-line transformer was modified by removing
the ground plane and the silicon substrate. Figures 6.12 and 6.13 compare the
predicted and measured phase angle o f the voltage transformation ratio n ^
0
and
normalized input impedance |Zin|7L for a modified 1:1 electrically isolating
STLT.
Close comparison o f Figs. 6.10 and 6.11 with Figs. 6.12 and 6.13,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.5: STLTs for Electrical Isolation
159
respectively, indicates that removing the ground plane and the silicon substrate
has little effect on the phase performance o f the device. The modification does
lower the frequency where the impedance transformation is approximately 1:1
from approximately 2.5 GHz for the standard device to approximately 2 GHz for
the modified device.
The bandwidth o f the devices, however, appears little
changed.
The resonant ‘peak’ visible in both figures is located at the frequency where
o
the electrical length o f the line is approximately 90 , similar to that predicted in
Fig. 5.32, Sect. 5.6.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
160
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
100
Measurement 0
Prediction-----
cn
cn
sz
-50
Frequency (GHz)
Fig. 6.10 Phase angle of voltage transformation «v vs. frequency for 1:1
STLT. Results shown for STLTs fabricated with 25-pm thick gold-plated
metal coupled microstrip lines with inner radius 100 pm. Dashed line shows
ideal phase angle for the electrically-isolating STLT of 0°.
Measurement 0
Prediction-----
N
Frequency (GHz)
Fig. 6.11 Normalized input impedance |Zjn|lL vs- frequency for 1:1 STLT.
Results shown for STLTs fabricated with 25-pm thick gold-plated metal
coupled microstrip lines with inner radius 100 pm. Dashed line shows ideal
normalized input impedance for the electrically-isolating STLT of 1.0.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.5: STLTs for Electrical Isolation
100
Measurement 0
Prediction-----
03
co
-50
Frequency (GHz)
Fig. 6.12 Phase angle of voltage transformation n v vs. frequency for 1:1
STLT. Results shown for STLTs fabricated without ground plane and silicon
substrate and with 25-pm thick gold-plated coupled microstrip lines and
inner radius 100 pm. Dashed line shows ideal phase angle of 0 .
Measurement 0
Prediction-----
❖
a
a
c
N
Frequency (GHz)
Fig. 6.13 Normalized input impedance |Zjn|TL vs. frequency for 1:1 STLT.
Results shown for STLTs fabricated without ground plane and silicon
substrate and with 25-pm thick gold-plated coupled microstrip lines and
inner radius 100 pm. Dashed line shows ideal normalized impedance of 1.0.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
162
6.7 PMCM-D STLT Dissipative Loss
In order to provide a practical microwave component, it is important for the
transmission-line transformer to efficiently transfer power from the input to the
output port at the frequencies at which it is designed to operate.
The signal
reduction due to power losses within the device is known as the dissipative loss,
as discussed in Sect. 3.4, while the signal reduction due to the return o f power to
the source is known as the reflective loss.
Figure 6.14 shows the dissipative and reflective losses for the three spiral­
shaped transmission-line transformers with ground planes. As the figure shows,
the minimum dissipative loss for the three STLTs is approximately 0.5 dB. Thus,
the devices transfer power from input to output with an efficiency o f
approximately 90%.
This result confirms that it is possible to neglect
transmission line losses in the low gigahertz range during analysis, as was done in
Chpt. 5, without limiting the accuracy o f the model.
Figure 6.15 shows the dissipative and reflective losses for the three suspended
spiral-shaped transmission-line transformers. As the figure shows, in this case the
minimum dissipative loss for the three STLTs is approximately 0.3 dB, a few
tenths o f a dB less than with the ground plane present.
This device transfers
power from input to output with slightly improved efficiency because removing
the ground plane eliminates the power loss that results from circulating currents in
the lossy ground plane.
The modified electrically-isolating transmission-line transformer without the
ground plane is also more efficient than the standard device where the ground
plane remains. The minimum dissipation loss for the standard device is 1.6 dB
while the minimum dissipation loss for the modified device is 0.6 dB. Thus, the
modified device is about ldB more efficient than the standard device.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6.6: Spiral-Shaped PMCM-D TLT Dissipative Loss
0.5
163
0.5
2.5 c
r, = 300 pm,n = 4
3.0 ©
3.5
Q 3.5
4.0
4.5
4.5
Frequency (GHz)
Fig. 6.14 Dissipative and reflective losses for the STLTs. Minimum
dissipative loss is approximately 0.5 dB. Reflective loss for the large 2:1
STLT is 0 dB at approximately 6 GHz where its normalized input impedance
equals unity which is equivalent to an input impedance of 50 Q.
0.5
0.5
1.5 o
TJd
2.0 «£
2.5 §
O
3 .0 £
CD
0£
3.5
O 3 5 Ln = 300 pm,
n=4 .
4.0
4.5
4.5
Frequency (GHz)
Fig. 6.15 Dissipative and reflective losses for the suspended STLTs. The
minimum dissipative loss in this case is approximately 0.3 dB. Reflective
loss for the 2:1 STLTs are also shown.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chpt. 6: Spiral-Shaped Transmission-Line Transformers
164
6.8 Conclusion
This chapter compares measured and predicted results for four types o f
monolithic, planar, spiral-shaped transmission-line transformers implemented in
PMCM-D— most with and without the ground plane and silicon substrate. With
two exceptions the coupled-line model predicts successfully the performance up
to 10 GHz o f all three 2:1 STLTs with an accuracy o f approximately 5%.
Removing the ground plane and silicon substrate to suspend the transmission-line
transformer reduces even-mode capacitance and increases the STLTs bandwidth
by as much as three-fold, but also increases the amount o f impedance
transformation due to transformer action— in one case almost twice as much as
predicted on the basis o f first-order considerations.
Reversing the input and output ports converts the 2:1 STLT into a 1:2 STLT.
In this case the agreement between measured and predicted normalized input
impedance was within 10% to almost 1 GHz, above which an offset between the
two results becomes apparent.
The useable frequency range o f the 1:2 STLT
appears comparable to that o f the 2:1 STLT. Removing the ground plane and
silicon
substrate
to
suspend
the
transmission-line
transformer
improves
performance at mid-range frequencies but degrades high frequency performance.
Measurements and predictions for 1:1 STLTs for both electrical isolation and
phase inversion also were obtained and compared.
The agreement between
measured and predicted results for the phase angle o f the voltage transformation
ratio was within a few degrees from 1 GHz to 10 GHz for the phase-inverting
STLT and to within a few degrees from 1 GHz to 6 GHz for the electricallyisolating STLT. Removing the ground plane and silicon substrate to suspend the
electrically-isolating STLT slightly improves the impedance transformation
bandwidth compared to the standard device.
The modified transmission-line transformer is more efficient than the standard
device.
Removing the ground plane and silicon substrate to suspend the
transmission-line transformer reduces dissipation loss by as m uch as 1 dB as
compared to the standard device.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Seven
Stability and Noise Performance of
Resistively Loaded Microwave Amplifiers
High-performance, low-noise microwave amplifiers are necessary in order to successfully
integrate millimeter and microwave receiving systems, such as the one shown in Fig. 1.1,
on MCM substrates.
Many transistors that are candidates for this application are
potentially unstable at microwave frequencies, leading to oscillation.
This chapter
introduces a simple method to determine the stability improvement provided by eight
different resistive networks over a broad range o f frequencies. The chapter also presents
a new method to determine the amplifier noise degradation caused by these networks.
Four microwave amplifier test circuits are implemented in PMCM-D to provide
comparisons between theoretical predictions and measurement results for microwave
amplifier stability and noise performance.
7.1 Microwave Amplifier Stability
Resistively loading the input or output o f a transistor is a classic technique designed to
prevent oscillation at the frequency o f interest for all passive source and load
terminations when unconditional stability is required (Gonzalez, 1984; Rosemarin, 1983;
Besser, 1975; Vendelin 1975).
The principal method to determine the resistance necessary to maintain stability at a
single frequency requires plotting the amplifier stability circles, defined as the range o f
source and load reflection coefficients where the amplifier remains stable, on a Smith
chart, Fig 7.1 (Gonzalez, 1984). The radius o f each circle contains all values o f negative
165
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
166
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
Unstable
regions
Input
stability
circle
oi
_sq___
Output
stability
circle
Fig. 7.1 Input and output stability circles for FHR02X transistor amplifier obtained
from manufacturer-provided scattering parameters at 2 GHz. Smith chart shows
unstable regions for the source and load reflection coefficients. Dashed lines indicate
input and output normalized resistance values necessary to stabilize the amplifier.
resistance possible at the respective amplifier port. Adding the value o f resistance from
the resistance circle tangent to that stability circle in series with the appropriate port
ensures a total loop resistance that is greater than zero for all passive source and load
terminations. This guarantees stability at a single frequency. Following the example in
Fig. 7.1 leads to a series resistance o f approximately 100 Q on the input port or
approximately 400 Q on the output port. It is also possible to plot the stability circles on
an admittance Smith chart and follow a similar approach to find the parallel resistance for
the input or output port necessary to stabilize the amplifier at a single frequency.
The technique discussed above only guarantees stability at a single frequency;
stability at other frequencies remains problematic as out-of-band oscillations are possible
and are often an issue in both broadband and narrow-band operation. A second approach
stabilizes the amplifier at frequencies below the operating frequency (Kim, et al., 1999),
while a third technique proposes a modified real-frequency approach to stabilize
broadband amplifiers (Jung and Wu, 1990).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.2: Two-Port Stability and Power Gain
167
7.2 Two-Port Stability and Power Gain
In their 1992 paper, Edwards and Sinsky propose use o f a single stability parameter, pi, to
characterize amplifier stability and prove that the condition // > 1 is necessary and
sufficient for unconditional amplifier stability. In terms o f the actual device scattering
parameters, pi is given by
i- N 2
where A = S xXS 21 - S l 2 S 2l •
Additionally, pi serves as a figure o f merit with increasing values o f pi indicating
greater stability.
As an example, Fig. 7.2 shows pi computed from manufacturer’s
scattering parameters for a Fujitsu FHR02X HEMT amplifier. The figure also shows the
regions where the amplifier is unconditionally stable and potentially unstable.
These
results indicate that the device is potentially unstable over most o f its frequency range.
In order to understand the effect o f resistive stabilization over a broad range o f
frequencies, it is necessary to determine the equivalent transmission parameters o f a
cascaded two-port system that includes the transistor and any stabilizing resistor
networks. An example is shown in Fig. 7.3, where the first and last two-ports in the
cascade each represent one element, either a series or parallel resistor, or a through
connection, while the center two-port represents the transistor with transmission
parameters computed from its scattering parameters. The stability o f an overall network
o f this type can be found by cascading the transmission parameters, converting from
transmission to scattering parameters, and then applying Eq. (7.1) to determine the
stability factor pi o f the overall configuration. Eight different input/output combinations
are available for investigation with this technique depending upon whether resistors are
connected in series or parallel to one or both o f the active device’s ports.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
168
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
p. > 1 Unconditionally stable
j
1 0.8
--------------------------
p < 1 Potentially unstable
0.6
0.4
0.2
Frequency (GHz)
Fig. 7.2 Stability parameter, ju, computed from manufacturer’s scattering parameters
for a FHR02X transistor. The active device is potentially unstable below
approximately 15 GHz.
Table 7.1 lists the eight different resistance combinations that can be investigated by
repeated application o f the procedure given in Fig. 7.3 to manufacturer’s scattering
parameters for a FHR02X transistor. All resistor combinations were chosen to stabilize
the microwave amplifier at 2 GHz.
Once an amplifier is unconditionally stable, it is possible to determine the maximum
transducer power gain Gxmax- Gxmax is defined as the ratio o f the power delivered to the
load by the amplifier to the power available from the source under the condition that the
amplifier’s input and output impedances are conjugate matched, usually through the
appropriate design o f input and output matching networks. Gxmax for the eight resistor
combinations computed at 2 GHz is also shown in Table 7.1. Increasing the stability
factor beyond unity directly reduces the maximum transducer power gain, Gxmax, as the
cases o f the series resistance input/parallel resistance output and series resistance
input/series resistance output demonstrate. For the other six cases equal stability factors
lead to equal power gains— a result predicted by Edwards (1996).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.2: Two-Port Stability and Power Gain
^series
.1
■
^
^ p a r a lle l
»"■
169
Or
^
Of
-'
—
Resistor
——
—
^^
Transistor
Resistor
Network
Network
[A
i
from Eq. (7.1)
Fig. 7.3 Procedure to determine network stability parameter /a. Microwave
transistor amplifier stabilized by series and/or parallel resistors connected to the
transistor’s input and output ports.
Input R esistan ce
Series(T2)
Parallelled
SerieslQl
1
-
-
-
2
90.2
-
-
3
-
670.0
-
Curve
C alcu lated (2 G H z)
O utput R esistan ce
Parallel(Q)
GxldB)
ftoaiCdB)
G jn J m
-
u
0.17054
-
-
-
-
1.00064
21.70
19.05
2.16
-
1.00005
21.71
18.86
2.59
4
-
-
400
-
1.00016
21.70
14.22
0.46
5
-
-
-
17.7
1.00032
21.70
12.20
0.55
6
-
1450
116
-
1.00545
21.10
17.00
1.54
7
151.
-
-
10.0
1.40675
6.80
6.09
3.56
8
-
5285
-
50.0
1.00046
21.73
15.45
0.76
281.
_
480
—
1.18144
6.24
5.91
5.00
9
Table 7.1 Predicted stability, gain, and noise performance for the FHR02X microwave amplifier.
The eight resistance networks include series or parallel input resistance only, series or parallel
output resistance only, and series or parallel input resistance with series or parallel output
resistance. The stability factor fi given in the table is found for each case by applying the
procedure given in Fig. 7.3 with the resistor values listed in the table and manufacturer-provided
transistor scattering parameters measured at 2 GHz. The transducer power gain GT is the ratio of
the power delivered to the load by the amplifier to the power available from the source (Pozar,
2001). If the amplifier is unconditionally stable, it is possible to maximize transducer power gain
through conjugate matching of the amplifier’s input and output impedances by appropriate design
of the input and output matching networks. This result is listed in the table as GTmax. The overall
noise figure for the stabilized amplifier is denoted by Ftoai, as explained in Sect. 7.3.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
170
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
u- 1
Q.
0.6
0.4
0.2
Frequency (GHz)
Fig. 7.4 Stability parameter fi vs. frequency. Numbered curves correspond to
resistive network configurations given in Table 7.1. FHR02X HEMT only (dotted
curve 1), transistor with input or output stabilization only (dashed curves 2-5),
transistor with input and output stabilization (solid curves 6-9). Results are obtained
for each case by applying the procedure shown in Fig. 7.3 with the resistor values
listed in Table 7.1 and manufacturer-provided transistor scattering parameters.
Figure 7.4 depicts the stability parameter ju obtained as described previously and
plotted as a function o f frequency from 0.10 to 30 GHz. The figure shows // for each
case listed in Table 7.1. The first five cases are: no stabilization, corresponding to the
first entry in Table 7.1, curve 1; series resistance input only, curve 2; parallel resistance
input only, curve 3; series resistance output only, curve 4; and the parallel resistance
output only, curve 5.
The dependence o f stability on frequency is different for each
resistor choice. The series resistance input only connection, 2, series resistance output
only connection, 4, and the parallel resistance output only connection, 5, provide
unconditional stability above the 2 GHz design frequency, but the amplifier is potentially
unstable below 2 GHz.
The parallel input only connection, 3, provides unconditional
stability up to 2 GHz with a potential for instability above 2 GHz.
In general, stabilizing this amplifier at frequencies higher than 2 GHz requires smaller
values o f series resistance on the input or output or larger values o f parallel resistance on
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.2: Two-Port Stability and Power Gain
171
the input or output than are necessary to stabilize the amplifier at 2 GHz. Conversely,
stabilizing the transistor at frequencies below 2 GHz requires larger values o f series
resistance on the input or output or smaller values o f parallel resistance on the input or
output than are necessary to stabilize the amplifier at 2 GHz. Thus, in the case o f a single
resistor connected to either the amplifier input or output, the conditions for stabilization
above and below 2 GHz are in opposition.
Networks containing two resistors introduce an additional degree o f freedom into the
problem. As a consequence, use o f a systematic search algorithm is necessary to find
input and output resistance combinations that stabilize the transistor. A typical search
algorithm for obtaining resistor values, cf. curves 6 -9 Table 7.1, consists o f a pair o f
nested loops, with the input resistance value in the outer loop and the output resistance
value in the inner loop, cf. Fig. 7.3.
Initial resistance values are incremented or
decremented, depending on whether the resistor in question is connected in series or in
parallel.
In the case o f a series resistor, the loop is initialized with a low value o f
resistance, typically 0 £2, which is then incremented every iteration by a specified
amount, typically ohms or tens o f ohms. In the case o f a parallel resistor, the loop is
initialized with a high value o f resistance, typically 10 kQ , which is then decremented by
a specified value every iteration, typically tens or hundreds o f ohms. For each pair o f
resistors examined by the loop, the stability factor ju is found according to the procedure
given in Fig. 7.3. If the pair o f resistors results in an unconditionally stable amplifier,
i.e., the stability factor ju is greater than unity for every frequency examined, the routine
reports the resistance values along with the frequency where the minimum value o f ju
occurs and plots the results as a function o f frequency, cf. curves 6 -9 Fig. 7.4. Then the
algorithm increments or decrements the input and/or output resistance values as discussed
above and continues iterating. If the pair o f resistors does not result in an unconditionally
stable amplifier, i.e., the stability factor // is not greater than unity for all frequencies, the
routine increments or decrements the input and/or output resistance values and iterates
again. Iteration ends once the specified ending values o f input and output resistance are
reached. The curves that result from this process are examined visually to identify if a
desired result, e.g., a desired minimum value o f n at a desired frequency, is obtained.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
172
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
For this work the search algorithm was designed to identify resistor combinations that
stabilize the transistor at all frequencies while providing a stability factor as close to unity
as possible at 2 GHz, as shown in curves 6 -9 Fig. 7.4. For this particular transistor, it
proves possible to adjust the minima o f n for the parallel resistance input/series resistance
output, curve 6, and parallel resistance input/parallel resistance output, curve 8, up to
approximately 10 GHz.
The minima o f // for the series resistance input/parallel
resistance output, curve 7, and series resistance input/series resistance output, curve 9,
combinations was not adjustable.
Figure 7.4 shows that the parallel resistance input/series resistance output, curve 6,
and parallel resistance input/parallel resistance output, curve 8, amplifiers are stabilized
over the entire frequency range without gain penalty at 2 GHz as compared w ith the four
series only/parallel only single resistor combinations that provide stability only over a
limited frequency range.
The results o f this section demonstrate that, in the particular case o f the FHR02X
transistor, all o f the eight resistive networks are able to stabilize the amplifier over at least
a restricted range o f frequencies. In order to apply the technique in a more general way,
the stability o f a number o f other resistively loaded microwave amplifiers were examined
by applying the technique presented in this section with all eight resistive networks using
manufacturer-provided scattering parameters for the different transistors.
M ost o f the
results for the eight resistor networks obtained from this investigation are similar to those
presented in Fig. 7.4. For one or two o f the resistor networks in the case o f some o f the
transistors, however, no single resistance or combination o f resistances was found to
result in a value o f // greater than unity at any frequency for the overall resistively loaded
amplifier. Thus, the stability improvement due to resistive loading depends strongly on
the characteristics o f the individual transistors as well as the values o f the resistors
themselves.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.3: Microwave Amplifier Noise Performance
173
7.3 Microwave Amplifier Noise Performance
Noise performance is often a critical factor for microwave amplifiers. While noise is
unavoidable, and adding resistance to amplifiers inevitably decreases the output signalto-noise ratio, different resistive network configurations can have significantly different
effects on noise performance. For this reason, it is important to predict the effect o f the
various resistive stabilization techniques on the overall noise figure o f the amplifier in
order to facilitate design tradeoffs between amplifier stability, gain, and noise
performance.
A network approach with scattering parameters is feasible because the
noise performance o f active devices is described in terms o f system reflection
coefficients.
This is illustrated by Fig. 7.5, which models the resistors as lossy,
mismatched two-ports in a cascade network. Amplifier noise is increased by the resistive
two-ports as a result o f signal attenuation and the impedance mismatch between the
cascade-connected ports.
In Fig. 7.5, considering signals propagating to the right, an input matching network
(IMN) transforms the source impedance Zg into the appropriate source reflection
coefficient Ts while an output matching network (OMN) transforms the load impedance
ZL into the appropriate load reflection coefficient IT.
These matching networks are
designed to provide the appropriate impedance transformations necessary to achieve
maximum transducer gain, minimum noise figure, or any other amplifier specifications as
necessary to meet system requirements.
For a two-port described by scattering parameters, usually referenced to 50 Q, the
input and output reflection coefficients
and
rout are determined from
N 2521rL
(7.2)
5 12^21r s
(7.3)
r out - S 22 +
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
174
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
r in_ = r T
^in2 - ^L,
+
IMN
Resistor
Transistor
[-Si]
(Zo)
[Si]
(Zo)
r1 s2 ~—r1 OUt]
r L3 = r L
Resistor
[S3]
OMN
(Zo)
Ts, ~~i"0Ut2
out.
Fig. 7.5 Cascade of two-ports to determine resistively stabilized amplifier noise
factor. [Si] and [S3] are the scattering parameters of the input and output series or
parallel connected resistor networks (as required). [S2] contains the scattering
parameters of the transistor. Once the matching networks are specified, sequential
application of Eqs. (7.2) and (7.3) determines all reflection coefficients. Matching
networks (IMN, OMN) are selected to meet system requirements.
where Ts and Tl are the reflection coefficients looking toward the two-port’s source and
load respectively.
Referring to Fig. 7.5, sequentially applying Eq. (7.2) from right to left beginning with
r L and scattering parameters [S3] allows calculation o f the input reflection coefficient
Tinm for the mth two-port, where m = 1 to 3. Similarly, sequentially applying Eq. (7.3)
from left to right in Fig. 7.5, beginning with Ts and the scattering parameters [Sf]
determines the output reflection coefficient
r ° u tm
for the m lh two-port, where m = 1 to 3.
Thus, sequential application o f Eqs. (7.2) and (7.3) specifies all input and output
reflection coefficients for the overall network.
Many authors provide expressions for the noise figure for active and passive
components (Pozar, 2001; Lee, 1998; Peebles, 1976). For active devices the quantities
Fmin, ^n> and r opt are noise parameters that are characteristic o f a particular transistor,
while the quantity Z0 is the system impedance, normally 50 Q. W ith these definitions the
noise figure o f a transistor can be expressed as
^2 - Fmin +
r S2
4R N
1-
r opt
2\
s2
i2
(7.4)
|1 + ^opt
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
175
7.3: Microwave Amplifier Noise Performance
where Fm\n is the minimum noise figure o f the device,
is the equivalent noise
resistance o f the device, and Topt is the value o f the optimum source reflection
coefficient for the transistor, FSz, Fig. 7.5, that results in a minimum device noise figure.
The available power gain for a two-port network is defined as the ratio o f the power
available from the two-port network to the power available from the source.
Mathematically, this is expressed as
(7.5)
It is important to note that in addition to depending on a two-port network’s scattering
parameters, the available power gain depends on the reflection coefficients looking out o f
the input port and into the output port o f a two-port network.
The noise figure o f a lossy two-port network characterized at an operating
temperature T is
where T0 = 290 K and GA is the available power gain. Notice that at room temperature
the noise figure is equal to the power loss factor o f the network, L A or,
(7.7)
so that if the two-port network contains a lossy element, such as a series or parallel
connected resistor, the noise figure o f the device equals its loss. Thus, it is possible to
either increase or reduce the available power gain, Eq. (7.5), and the resulting noise
figure, Eq. (7.6), depending on the impedance mismatch at the network’s ports.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
176
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
Once the noise figures o f the individual two-port networks are available, the overall
stabilized amplifier noise figure is found by applying the Friis (1944) noise equation
p. _ 1
F « l= F 1+-2—
F t. - 1
+ - T 5—
.
(7-8)
In this situation the subscripts 1, 2, and 3 refer to the two-ports represented by [Si], [,%],
and [S 3 ], Fig. 7.5, respectively. Additionally, in Eq. (7.8), the subscripts 1 and 3 refer to
the noise figures and available gain o f the lossy two-ports that precede and follow the
transistor, Fig. 7.5, while the subscript 2 refers to the noise figure and available gain o f
the transistor itself. Specifically, F\ is the noise figure found from Eq. (7.6) with GA],
Eq. (7.5), for the first resistive network with scattering parameters [<S’i] and reflection
coefficients Ts. and r outi, Fig. 7.5. The noise figure F 3 is also found from Eq. (7.6) with
GA3, Eq. (7.5), for the last resistive network with scattering parameters [S 3 ] and
reflection coefficients Tj3 and r 0ut3 ’ Fig. 7.5.
Finally, the noise figure F 2 for the
transistor itself is found from Eq. (7.4) where GAj is the transistor’s available gain, Eq.
(7.5), with scattering parameters [S2] and reflection coefficients
and r out2, Fig. 7.5.
Even though the overall network is stable, the transistor by itself may not be. If the
transistor’s input reflection coefficient, TS2, approaches the input stability circle, r out2
will approach unity. Equation (7.5) then predicts that the available gain o f the last twoport will vanish. This causes the noise contribution o f the final resistor to rise because o f
reflection from the transistor’s output port, which also increases the overall network noise
figure, Ftotai-
This leads to the observation that the transistor’s input reflection
coefficient, TS2, must not approach the transistor’s input stability circle if the minimum
possible noise contribution from the final resistive two-port network is to be obtained.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.4: Microwave Amplifier Experimental Results
177
The final two columns in Table 7.1, G j and F totai, predict the transducer power gain
and overall noise figure for the stabilized amplifier when the matching network is
designed so that the transistor’s input reflection coefficient, FS2, equals the optimum
reflection coefficient, Topt. For the example o f the FHR02X, this minimizes the noise
contribution, which is 0.33 dB at 2 GHz.
O f special interest in these results is that the series output only case, 4, provides more
than 2 dB o f additional gain and almost 0.1 dB better noise figure performance as
compared with the parallel output only case, 5.
The parallel input/parallel output
configuration, 8, is unconditionally stable across the entire frequency range and improves
the gain by 1.23 dB while suffering only a 0.30 dB degradation o f the noise figure
compared to the series output only case.
These comparisons illustrate the possible
choices o f a stabilizing network for the amplifier that provides alternative compromises
among gain, noise, and stability for a given application.
The results in the proceeding paragraph can be understood from the Friis noise
expression, Eq. (7.8). For example, configurations 4, 5, and 8 result in the lowest noise
contribution, with 4 and 5 lower than 8.
This is because the attenuator follows the
transistor, and as Eq. (7.8) shows, the effect o f the noise contribution from the final twoport is reduced by the relatively large amplifier gains. In the case o f configuration 8, the
overall noise figure is slightly worse than for cases 4 and 5 because the attenuation is
applied at the amplifier input, and as Eq. (7.8) shows, the full noise contribution o f this
two-port appears in the overall noise figure, F totai. This attenuator is relatively ineffective
in adding noise, however, because the attenuation and mismatch produced by the parallel
connected 5k Q resistor is very small compared with the other cases shown.
Thus,
attenuators at the input and the output do not contribute equally to the degradation o f the
overall amplifier noise figure, F totai, but the degree o f degradation also depends upon the
attenuation and mismatch o f a specific attenuator, in addition to its location.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
178
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
7.4 Experimental PMCM-D Microwave Amplifiers
Four microwave amplifier test circuits were implemented in PMCM-D in order to
determine the validity o f the theoretical stability and noise predictions, Sects. 7.2 and 7.3,
as applied to microwave amplifiers implemented in this technology. The active devices
are the FHR02X transistors, also used as examples in Sect. 7.2.
Each transistor is
attached to the PMCM-D substrate with bond wires, as shown in Fig. 7.6, with embedded
resistors connected in parallel with the input and/or output for three o f the amplifiers.
Networks consisting o f parallel resistors are convenient from an implementation point
o f view because inserting a series-connected blocking capacitor eliminates the dc path
that otherwise would perturb the transistor’s bias.
Three amplifiers were constructed
with stabilizing resistors designed to be 200 Q, but measured in the range o f
approximately 160 Q, to investigate three o f the eight different resistive stabilization
combinations corresponding to the configurations but not the values o f cases 3, 5, and 8;
that is, parallel input only, parallel output only, and both parallel input and parallel
output, respectively. The design value o f 200 Q was chosen for the resistors because
calculations indicated this value would clearly distinguish between the three cases.
A fourth amplifier circuit without resistive stabilization was constructed to allow
measurement o f the scattering parameters for the transistor itself.
Identical bias tees
external to the network analyzer provided operating current for each transistor, Fig. 7.7.
It was not possible for practical reasons to use the same transistor in each test circuit,
so the four configurations tested employed distinct physical units.
This introduces
parametric error into the comparison between the measured and the predicted results
because o f device-to-device variation in the scattering and noise parameters.
7.4.1 Experimental Amplifier Stability Performance
The measured stability parameters shown in Fig. 7.8 were computed by applying Eq.
(7.1) to measured scattering parameters for the three stabilized amplifiers obtained as
shown in Figs. 7.6 and 7.7. The predicted stability parameters shown in the figure for the
stabilized amplifiers were obtained by applying the method presented in Fig. 7.3. The
predicted results were obtained using measured scattering parameters from the
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.4.1: Experimental Amplifier Stability Performance
200 Ohm SHUNT OUTPUT
Fig. 7.6 Test fixture constructed for Fujitsu FHR02X microwave amplifier.
Photograph shows transistor connected to PMCM-D wafer by bond wires. GSG
probes (the trident-shaped objects) connect the amplifier’s input and output ports
through external bias tees (not shown) to a network analyzer. The embedded
stabilizing resistor is connected to the signal terminal on the right side and is hidden
from view underneath the probe. Transistor size is approximately 0.5 mm x 0.5 mm.
Photo courtesy o f MIT Lincoln Laboratory.
P2
E8361A Network
A nalyzer
Microwave amplifier
FHR02X
50 Q coax
DS
Bias
tee
200 Q
Bias
tee
50 Q, coax
200 Q
GS
DS
block
block
PMCM-D wafer
Fig. 7.7 Microwave amplifier test circuit for measuring scattering parameters.
Fujitsu FHR02X transistor with stabilizing resistors connected in parallel to the input
and output terminals of the transistor through blocking capacitors. Voltage source
F Gs is adjusted in order to achieve / DS= 10 mA with VDS = 2 V.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
180
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
Measurement 0
Prediction-----
Parallel resistor
3.5
input and output
Parallel resistor
input only
5)1.5
0.5 Parallel resistor
output only
—&
. Aa
F re q u e n c y (G H z)
Fig. 7.8 Stability parameter p for three FHR02X transistor amplifiers. Amplifiers
stabilized with resistor(s) connected in parallel to the amplifier input only, amplifier
output only, and both amplifier input and output.
unstabilized (fourth) transistor with measured resistor values o f 156.4 Q for the parallel
resistor input only, 155.0 Q for the parallel resistor output only, and 159.6 and 164.4
Q for the parallel resistor input and output, respectively. As shown in the figure, the
difference between predicted and measured values o f the stability parameter for the
amplifiers stabilized with parallel resistors connected across the input or output amplifier
ports is less than approximately 10% to at least 10 GHz. Above 10 GHz, the resistor
connected in parallel with the output amplifier port provides more stability than the
model predicts. In the case o f the amplifier with resistors connected in parallel with both
input and output ports, the difference between predicted and measured values o f the
stability parameter is less than approximately 10% to better than 1 GHz. Above 1 GHz,
the amplifier with two stabilizing resistors provides up to approximately a 100% greater
stability than the model predicts.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.4.2: Experimental Amplifier Noise Performance
181
7.4.2 Experimental Amplifier Noise Performance
In order to verify a portion o f the noise predictions o f Sect. 7.3, noise figure
measurements were obtained for the four FHR02X microwave amplifiers discussed in
Sect. 7.4.
This is done by replacing the network analyzer shown in Fig. 7.7 with an
Agilent N8975A noise figure meter driven by an Agilent N4002A noise source, Fig. 7.9.
Otherwise, test conditions for the four amplifiers remain as shown in Fig. 7.7.
Figures 7.10-7.13 depict measured and predicted amplifier gain and noise figure for
the same four amplifiers up to 26 GHz. Figure 7.10 shows the measured gain for the
FHR02X transistor alone obtained from an Agilent E8361A network analyzer, Fig. 7.7,
along with the measured gain and noise from an Agilent N8975A noise figure meter, Fig.
7.9.
The ripple in the noise figure m eter data is attributed to the slight impedance
mismatches between the cables and connectors that are necessary to insert the noise
figure meter. Otherwise, the correspondence between the two gain measurements is very
good. The predicted gain is obtained by following a procedure similar to that shown in
Fig. 7.3 in order to determine the scattering parameters o f the overall network. Since the
first amplifier does not include resistive stabilization, the predicted and measured gains
are the same, as Fig. 7.10 shows.
Figure 7.10 also shows the measured noise figure for the unstabilized FHR02X
amplifier, as well as a least square quadratic ‘best fit’ o f the data to facilitate comparison
with theoretical predictions. The predicted noise figure was obtained by applying the
procedure in Sect. 7.3 to the measured scattering parameters for the amplifier obtained
here, Sect. 7.4, along with manufacturer-provided transistor noise parameters listed in
Table 7.2. The error between the theoretical predictions and the measured results for the
noise figure is attributed to differences between the manufacturer-provided noise
parameters listed in Table 7.2 and the noise parameters o f the actual device.
Figure 7.11 compares measured and predicted noise figure and gain for the FHR02X
transistor amplifier with a 155.0 Q resistor connected in parallel w ith the output port o f
the transistor. The agreement between the measured and predicted amplifier gain is
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
182
Chpt. 7: Stability and Noise Performance ofResistively Loaded Microwave Amplifiers
N4002A Noise
S ource
N8975A Noise
Figure Meter
FHR02X
50 Q coax
Bias
tee
Bias
tee
200
200 Q
n
GS
50 Q coax
DS
block
block
PMCM-D wafer
Fig. 7.9 Microwave amplifier test circuit for measuring amplifier gain and noise
figure. N4002A source switches between low- and high-temperature noise which in
turn allows the N8975A noise figure meter to solve for the amplifier gain and noise
figure at each frequency. The loss from all cables, bias tees, connectors, and probes
is compensated for through the use of loss tables entered into the noise figure meter.
Signal reflections due to connector/cable transitions in this configuration, however,
result in small ripples in the measurements, which it is not possible to overcome.
/
GHz
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
r op,
Mag.
0.80
0.74
0.68
0.63
0.58
0.52
0.47
0.42
0.38
0.33
0.30
0.28
0.26
0.25
0.24
Ang.
16
31
46
61
75
89
102
114
126
137
146
155
162
171
-170
R d 50
Q
0.50
0.45
0.40
0.30
0.23
0.18
0.14
0.12
0.10
0.09
0.09
0.09
0.08
0.08
0.08
fmin
dB
0.33
0.35
0.44
0.53
0.63
0.70
0.81
0.92
1.04
1.16
1.34
1.56
1.78
2.00
2.34
Table 7.2 Manufacturer-provided noise parameters for the Fujitsu FHR02X
transistor for FDS= 2V, /DS= 10 mA.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.4.2: Experimental Amplifier Noise Performance
14
14
12
10
oo
Network analyzer-----Noise figure meter 0
Prediction □ ,+
Quadratic best f i t -----
10
8
S
"O'
8 q)
3
O)
6
6i
c
CO
12
4
2
0
0
10
5
15
20
25
Frequency (GHz)
Fig. 7.10 Noise figure and gain for FHR02X transistor amplifier without resistive
stabilization. Network analyzer gain obtained from Agilent E8361 A, Fig. 7.7. Noise
figure meter gain and noise obtained from Agilent N8975A, Fig. 7.9. Predicted noise
figure obtained as discussed in Sect. 7.3.
Network analyzer
Noise figure meter o, 0
Prediction □ ,+
Quadratic best fit
V
$$>&bcPo
5% o
o o
o
o<>o% o
'
Frequency (GHz)
Fig. 7.11 Noise figure and gain for FHR02X transistor amplifier with output
resistive stabilization. Network analyzer gain obtained from Agilent E8361A, Fig.
7.7. Noise figure meter gain and noise obtained from Agilent N8975A, Fig. 7.9.
Predicted noise figure obtained as discussed in Sect. 7.3.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
184
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
12
12
Network analyzer-----Noise figure meter 0
Prediction □ ,+
Quadratic best f it ........
10
10
8 jo
8?
d
o>
6 o</)
8
oo
6
o
4
.<X>.
2
0,
0
5
10
15
zu
20
z25
o
0
Frequency (GHz)
Fig. 7.12 Noise figure and gain for FHR02X transistor amplifier with input resistive
stabilization. Network analyzer gain obtained from Agilent E8361A, Fig. 7.7. Noise
figure meter gain and noise obtained from Agilent N8975A, Fig. 7.9. Predicted noise
figure obtained as discussed in Sect. 7.3.
Network analyzer------Noise figure meter °, 0
Prediction □ ,+
Quadratic best f i t -------
10
15
20
25
Frequency (GHz)
Fig. 7.13 Noise figure and gain for FF1R02X transistor amplifier with input and
output resistive stabilization. Network analyzer gain obtained from Agilent E8361A,
Fig. 7.7. Noise figure meter gain and noise obtained from Agilent N8975A, Fig. 7.9.
Predicted noise figure obtained as discussed in Sect. 7.3.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
7.4.2: Experimental Amplifier Noise Performance
within a few tenths o f a dB to 26 GHz.
185
The agreement between the measured and
predicted amplifier noise figure is within a few tenths o f a dB to approximately 10 GHz.
The error between the theoretical predictions and the measured results for the noise figure
above 10 GHz is attributed to plausible differences between the noise parameters listed in
Table 7.2 and the noise parameters o f the actual device. Comparison o f Fig. 7.11 with
Fig. 7.10 indicates that the primary effect o f the 155.0 Q parallel resistor is a reduction o f
the amplifier gain. The presence o f the resistor at the output o f the amplifier has little
impact on the amplifier’s noise performance, for the reason discussed in Sect. 7.3.
Figure 7.12 compares measured and predicted noise figure and gain for the FHR02X
transistor amplifier with a 156.4 Q resistor connected in parallel with the input port o f the
transistor. Figure 7.13 compares the same results for the FHR02X transistor amplifier
with a 159.6 Q resistor connected in parallel with the input port o f the transistor and a
164.4 Q resistor connected in parallel with the output port o f the transistor. Both figures
show that locating the resistor at the input port o f the amplifier degrades the noise
performance by approximately 2 dB compared to the first two amplifiers, Figs. 7.10 and
7.11, as also discussed in Sect. 7.3.
Except for the predicted gain in Fig. 7.13, the
agreement between measured and predicted results for both figures is similar to what was
obtained in the previous two figures for the reasons given in the previous paragraph. The
measured gain in Fig. 7.13 above 5 GHz is 1 to 2 dB less than the predicted results. This
could occur if the gain o f this particular transistor above 5 GHz is substantially less than
the gain o f a nominal device over the same frequency range. Since each transistor is
fastened to the MCM-D wafer with epoxy, it is not possible to remove and recharacterize
the device without the parallel resistors to determine the exact source o f the error.
This conjecture may also provide insight into the disagreement between the measured
and predicted amplifier stability for the same amplifier, Fig. 7.8. Equation (7.1) indicates
that amplifier stability increases with decreases in amplifier gain, as measured by £21.
Hence, if a transistor is ‘weak’ above 5 GHz compared to an amplifier with a ‘nom inal’
transistor, Eq. (7.1) predicts that it will have greater stability than the nominal transistor
amplifier, which is in agreement with the data in Fig. 7.8.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
186
Chpt. 7: Stability and Noise Performance of Resistively Loaded Microwave Amplifiers
7.5 Conclusion
This chapter presents a new method to predict the stability improvement and noise
performance o f resistively loaded transistor microwave amplifiers over a broad frequency
range. This method is useful to optimize the stability and noise performance o f both lownoise designs as well as broadband amplifiers.
Experimental measurements o f the
stability parameter differ less than 10% from predicted values up to 1 GHz with
disagreement increasing above that frequency, especially in the case o f the transistor
amplifier with parallel resistors connected to both ports. Noise figure measurements for
the four amplifiers agree with the predicted values to within a few tenths o f a dB up to
approximately 10 GHz. Additional work is needed to reduce the discrepancies between
the stability measurements and predictions noted in Fig. 7.8 for the transistor amplifier
with parallel resistors connected to both ports.
The method presented in this chapter is easily generalized to include the effect of
matching network losses on stability and noise performance. This is done by extending
the cascade shown in Fig. 7.5 to include the input and output matching networks, as
represented by their measured or predicted two-port scattering parameters. Also, other
resistive topologies, such as a resistor connected between the input and output ports, are
in common use in amplifier circuits.
The approaches taken in Figs. 1 3 and 7.5 are
inappropriate for that connection so another technique is necessary to predict the stability
and noise performance in this situation.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter Eight
Conclusion
8.1 Summary
This dissertation investigates the behavior o f selected active and passive
components and circuits that could enable MCM-D technology to integrate highperformance millimeter wave and microwave systems.
•
Embedded capacitors are necessary for interstage coupling and bypass
applications in these systems.
Chapter Two develops a model o f
embedded capacitors, constructed by anodizing the aluminum layer
between the ground and power planes, that is suitable for microwave
frequency applications. This simple model o f the embedded capacitor and
interconnect demonstrates good agreement between measured and
modeled results for both the one-port and two-port PMCM-D embedded
capacitors. Additionally, removing the silicon substrate from beneath the
bottom plate o f the two-port capacitor serves to halve the embedded
capacitor’s minimum insertion loss while decreasing the insertion loss at
25 GHz from 3.0 dB to 0.35 dB, as compared w ith an identical capacitor
that retains the silicon substrate beneath the bottom plate.
•
Microstrip line and coplanar waveguide are commonly employed as planar
transmission lines in millimeter wave and microwave systems. Scattering
parameter measurements reviewed in Chapter Three demonstrate that
PMCM-D microstrip line is a suitable high-performance transmission line
for interconnecting components in millimeter/microwave systems.
187
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The
Chapter 8: Conclusion
188
microstrip line has an insertion loss o f approximately 2 dB/cm at 50 GHz,
can be modeled accurately by quasi-TEM approximations such as
W heeler’s equation, and is essentially dispersion free up to 50 GHz.
•
Passive filters separate different frequency signals in millimeter wave and
microwave receiving
systems.
Chapter Four
explores PMCM-D
interdigitated-line bandpass filters as a space-efficient filtering alternative.
These millimeter wavelength filters achieve 10% bandwidths with
insertion losses in the range o f 7 -9 dB. A 2.5 GHz interdigitated-line
bandpass filter, for example, has approximately a 10% bandwidth with an
area o f only 1.5mm x 18mm.
•
Ruthroff transmission-line transformers provide an alternative approach to
the problem o f high-frequency impedance transformation. Chapter Five
extends the theory o f coupled microstrip lines to the task o f designing
planar, spiral transm ission-line transformers. This chapter demonstrates
that these transmission-line transformers provide an alternative to coupled
inductors for applications that require impedance transformation, phase
inversion, and electrical isolation.
•
In order to validate the spiral-shaped, coupled microstrip line model
presented in Chapter Five, it is necessary to compare measured results
with model predictions. Chapter Six compares predictions obtained from
the model with measurements for each o f the four types o f transmissionline transformers.
These results show that, w ith two exceptions, the
coupled-line model predicts the performance up to 10 GHz o f all three
spiral-shaped 2:1 transmission-line transformers w ith an accuracy o f
approximately 5%. In the case o f the 1:2 transmission-line transformers
the difference between measured
and predicted normalized input
impedance was less than 10% to almost 1 GHz, above which an offset
between the two results becomes apparent. For the electrically-isolating
and phase-inverting transmission-line transformer, the phase angle o f the
voltage transformation ratio was within a few degrees from 1 GHz to 10
GHz for the phase-inverting transmission-line transformer and to within a
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
8.2: Contributions
189
few degrees from 1 GHz to 6 GHz for the electrically-isolating
transmission-line
transformer.
Modifying
the
transmission-line
transformer by removing the ground plane and silicon substrate reduces
dissipation loss by as much as 1 dB, as compared with an unmodified
device.
•
High-performance, low-noise microwave amplifiers form the ‘front-ends’
o f many millimeter wave and microwave receiving systems.
Chapter
Seven presents a network approach to predict the stability improvement
and noise performance o f resistively loaded transistor microwave
amplifiers. Experimental measurements o f the stability parameter differ
less than 10% from predicted values up to 1 GHz, with disagreement
increasing above that frequency in two cases. W ith one exception, only a
few tenths o f a dB difference between predicted and measured noise figure
was observed.
8.2 Contributions
This work contributes to our understanding o f the theory and practice o f active
and passive microwave and millimeter wave devices modified to the micron
scales o f multichip module deposited technology. Topics and devices considered
are: characterization o f embedded capacitors and microstrip transmission lines;
design o f space-efficient millimeter-wavelength bandpass filters; analysis and
design o f planar, spiral-shaped transmission-line transformers; and optimization
o f the stability and noise performance o f resistively loaded microwave amplifiers.
Specific contributions in each area are:
1.
Verification o f microwave circuit models for one- and two-port embedded
capacitors fabricated by anodizing the layer between the multichip module’s
ground and power planes.
(a) Characterized one- and two-port embedded capacitors at microwave
frequencies and compared against theoretical predictions.
(b) Described Q degradation from interconnect parasitics to enable improved
interconnect and process design.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 8: Conclusion
190
(c) Determined intrinsic for embedded capacitors with AI2O3 dielectric.
(d) Analyzed and described relative importance o f PMCM-D primary device
structure in controlling capacitor performance.
2.
Devised a new method for experimental determination o f propagation
characteristics o f multichip module transmission lines.
Demonstrated the
effectiveness o f the method by comparing the measured characteristic impedance
o f low-loss lines against theoretical predictions.
3.
Designed and experimentally determined the properties o f millimeter
wavelength interdigitated-line bandpass
filters implemented in PMCM-D.
Demonstrated space-efficient interdigitated-line bandpass filters with center
frequencies up to 50 GHz.
Characterized the differences between standard
laboratory scale and PMCM-D devices.
4. Developed the basic theory o f the spiral-shaped coupled-line transmissionline transformer. Analyzed 1-mm scale spiral-shapes at microwave frequencies
and compared this theory with test devices designed and fabricated for this
purpose.
(a) Demonstrated relationships between transformer bandwidth and even- and
odd-mode admittance ratios.
(b) Approximated EM fields in coupled-line array leading to an analytic
model o f spiral-shaped coupled-line transmission-line transformers.
(c) Characterized spiral transmission-line transformers at microwave
frequencies and compared with theoretical predictions from the model.
(d) Devised design rules to permit application o f the four-port coupled
microstrip line network to the problem o f modeling spiral-shaped
transmission-line transformers
5. Applied an optimized network approach to predict microwave amplifier
stability and noise and demonstrated efficacy by application to example devices.
(a) Predicts stability performance at all frequencies for eight types o f resistive
networks instead o f at only one frequency for four networks.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
8.3: Future Work
191
(b) Predicts amplifier noise performance by accounting for impedance
mismatch and attenuation due to stabilizing resistors on amplifier’s input
and/or output.
(c) Demonstrated selection and design o f input/output resistor networks
optimized for noise, gain, and stability or trade offs among these.
8.3 Future Work
Exploitation o f MCM-D technology for the purpose o f integrating millimeter
wave and microwave systems is in its infancy, providing opportunities for future
work along the directions outlined in this dissertation.
The topics that follow
appear promising for future investigation.
The present embedded capacitor circuit model,
Chapter 2, neglects
interconnect skin-effect loss which introduces modeling error into the expressions
for the capacitor’s series resistance and quality factor. Incorporating skin-effect
loss in the embedded capacitor circuit model is expected to improve the fidelity o f
this model, especially in the frequency range above 10 GHz.
Dielectric materials such as tantalum oxide and silicon nitride m ay achieve
higher 0 ntrmsic than AI2O3 dielectric.
Characterization o f these embedded
capacitors after the manner presented in Chapter 2 is necessary to determine to
what extent such improvements can be realized.
Chapter 4 explores the design and performance o f interdigitated microstrip
line bandpass filters that are capable o f achieving 5-10% bandwidths at
millimeter wavelengths. Systematic parameter studies o f these filters in PMCMD technology could optimize the performance o f these filters and reduce their
insertion loss.
Chapter 6 demonstrates that transmission-line transformers are capable o f 4:1
or 1:4 impedance transformations over broad bandwidths.
This range o f
impedance transformation facilitates design o f broadband microwave transistor
amplifiers with devices whose input or output impedances are such that either a
1:4 or 4:1 impedance transformation will match them to 50 Q. It is then possible
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Chapter 8: Conclusion
192
to select the appropriate resistive network to stabilize the amplifier at a minimum
noise figure by applying the techniques presented in Chapter 7.
Chapter 6 also demonstrates that transmission-line transformers fabricated
without a ground plane can provide greater than 4:1 impedance transformations.
Expanding the coupled-line model to account for the additional magnetic coupling
when the ground plane is absent would broaden the applicability o f this model.
Chapter 7 presents a technique that predicts the stability and noise
performance o f eight different resistively loaded microwave amplifiers. At least
one other resistive network, a resistor in parallel with the input and output ports, is
in common use. The technique presented in Chapter 7 is inappropriate for this
topology so another approach is necessary to predict the stability and noise
performance o f an amplifier stabilized in this manner.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix A
Characterizing Devices on
Multichip Modules
Specialized test equipment and procedures are necessary to characterize
accurately the performance o f MCMs containing passive and active devices at
millimeter/microwave frequencies. Figure A. 1(a) depicts the layout o f a typical
measurement setup employing a network analyzer to extract the scattering
parameters o f a device under test (DUT), when either fabricated as part o f the
MCM or subsequently attached to it. The coplanar ground-signal-ground (GSG)
probes provide a physical transition that minimizes the discontinuity between the
radial coaxial cable and the planar probe pads in order to reduce signal reflections
from the transition (Cascade Microtech, 1988). The probe heads in the figure are
moved by means o f vernier positioners until the 50 Q GSG probes make contact
with the appropriate probe pad located on the top surface o f the MCM. The DUT
normally is connected between the GSG signal terminals while the GSG ground
terminals are connected together, either through the ground plane or by means o f
a short interconnect that runs directly between the ground terminals, Fig. A. 1(b).
The process o f network analyzer calibration effectively places the reference
plane o f the measurement at the probe tips. It is possible to remove substantially
the parasitic contribution o f any necessary test structures between the DUT and
the probe tips, such as the probe pads and lengths o f interconnect, by subtracting
their contribution to the measurement (Ryu et a l , 2000; Martens, 1998; Arcioni et
a l, 1998). In order to accomplish this it is necessary to measure the admittance o f
an empty or ‘dummy’ structure without a DUT, as shown in Fig. A. 1(b).
193
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
194
Appendix A: Characterizing Devices on Multichip-Modules
Probe
Pads
50 Q coax
■I
DUT
■I
50 Q coax
Probe
heads
• Port 1 Network A nalyzer
Port 2 •
(a)
Probe
Pads
50 Q coax
50 O coax
Probe
heads
• Port 1 Network A nalyzer
Port 2
(b)
Fig. A.1 Diagram of a typical multichip module experimental layout, (a)
GSG probes mounted in the probe head are placed in contact with the probe
pads, which are in turn connected to the DUT through short interconnects.
(b) Admittance of the probe pads and interconnects alone is determined by
measuring an empty or ‘dummy’ structure without a DUT.
The admittance o f the probe pad and interconnect on each side o f the DUT is
assumed to consist only o f a parallel element, Tpad, whose value is found from the
scattering parameters, S u , o f the unconnected ‘dummy’ structure,
Y
PAD
=
1
1-fll
Z 0 1 + Sj,
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(A.1)
Appendix A: Characterizing Devices on Multichip-Modules
195
DUT
(a)
(b)
Fig. A.2 Circuit models for network analyzer measurements, (a) Equivalent
circuit treats probe pads as parallel connected elements on either side of the
DUT. (b) Cascade of three two-port transmission parameter networks
representing the equivalent circuit in (a).
Once the admittance o f the probe pad-interconnect combination is found an
equivalent circuit model o f the entire network between the GSG probes is
possible, Fig. A.2(a).
Figure A.2(b) depicts
representation o f the same network.
a transmission parameter
Cascading the two-port networks o f Fig.
A.2(b) gives
~A
B
C
D
1
y
A PAD
O' 'A '
B'~
1 C
D'
1
Y
A PAD
o'
1
where ABCD are found from the scattering parameter measurements, Fig. A. 1(a),
and A'B'C'D' are the transmission parameters o f the DUT itself.
Solving Eq.
(A.2) for the transmission parameters o f the DUT gives
’A'
B'~
C
D'
1
AYPA D
o'
A
B~
1
C
D AYPA D
1
o'
1
which is the needed result.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix A: Characterizing Devices on Multichip-Modules
196
A second approach to removing the parasitic contribution o f the probe-pad
interconnection combination assumes that the DUT and both sets o f probe pads
are connected in parallel as shown in Fig. A.3. The admittance parameters o f the
overall network equals the sum o f the admittance parameters o f the DUT and the
admittance parameters o f the probe pad-interconnect combination obtained from a
dummy probe pad structure without the DUT (Arcioni et al., 1998), or,
[ I 'H i'lx d + f p A D s l
(A-4)
In this case the admittance parameters o f the DUT are recovered by subtracting
the admittance parameters o f the pads from the admittance parameters o f the
overall network, as
(A.5)
Flg.A J Parallel connection of two two-port networks. Parasitic contribution
of the probe pads is removed by an independent measurement of an ‘open’ or
‘dummy’ probe pad structure without the DUT.
More sophisticated approaches are available to remove specific series and parallel
parasitics in the interconnect structure when required (Cho and Burk, 1991).
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix B
Derivation of Two-port Terms
The complete admittance matrix that results from manipulating Eqs. (5.57) and (5.58) as
described in Sect. 5.3 is
*1
Til
Tl2
T13
T14
V1
h
T21
T22
T23
T24
^2
h
T31
T32
T33
T34
v3
_T41
T42
T43
T44 _ _v4 _
which is equivalent in equation form to
h = T llvl + Tl2v2 +T13v3 + Tl4v4>
*2 = T21v1 + T22v2 + T23v3 + T24v4 >
(B.2)
h = T31v1 + T32v2 + T33v3 +T 34v4 ’
i4 = T41V1 + T42v2 + T43v3 + T44v4-
The terminal conditions shown in Fig. 5.14 are equivalent to v, = V2, v2= V x, v 3- V2, V4 =
0,
i2=/,, and ii+ U~I2. Substituting these values into Eq. (B.2) and rewriting gives
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Appendix B: Derivation o f Two-port Terms
198
h - y 21^2
+ T22^1 + T 23^2 >
(B.3)
12 = T31*2 +T32^1 + T33^2 + T l7 2 +T12^1 +Tl3^2-
1
^* 1
1
Expressing Eq. (B.3) in matrix form results in
T23+T21
Vl
T32 + Tl2
T31 + T33 + Tl 1 + Tl3
Y i
i
T22
I
J 2 _
(B.4)
Then, substituting the appropriate equivalents from Eqs. (5.59-5.62) in Eq. (B.4) gives
~h
Til
J2.
_Tl4 +T12
Tl2 + Tl4
>1
(B.5)
2(t i 3 + T ll) . 7 2
The two-port admittance parameter representation o f the network in Fig. 5.15(a) or (b) is
V
*2.
"*11
*1 2 '
>r
721
*22.
72.
(B.6)
Equating like terms in Eqs. (B.5) and (B.6) yields
*n = Tn>
*12 = y \ 2 + T 1 4 ’
(B.7)
*21 = > ’12 + Tl4>
*22 = 2 (Tl3 + Tll)>
which is the desired result.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Bibliography
Agilent
Technologies,
Impedance
Measurement Handbook
(Dec.,
2003),
http://cp.literature.aailent.com/litweb/pdf/5950-3000.pdf. (accessed 25 April, 2005).
Arcioni, P., Castello, R., De Astis, G., Sacchi, E. and Svelto, F., “Design and
characterization o f Si integrated inductors,” IEEE Instrumentation and Measurement
Technology Conference, St. Paul, Minn., pp. 1395-1401, May 18-21, 1998.
Arnold, R. G., and Pedder, D. J., “Microwave characterization o f microstrip lines and
spiral inductors in MCM-D technology,” IEEE Trans, on Components, Hybrids, and
Manufacturing Technology, vol. 15, no. 6, pp. 1038-1045, Dec., 1992.
Arnold, R. G., Faulkner, C. C., and Pedder, D. J., “Silicon MCM-D technology for RF
integration,” International Journal o f Microcircuits and Electronic Packaging, vol. 20,
no. 3, pp. 360-365,1997.
Bahl, I., and Bhartia, P., Microwave Solid State Circuit Design, John Wiley, New York,
NY, 1988.
Balanis, C. A., Advanced Engineering Electromagnetics, John Wiley, New York, NY
1989.
Besser, L., “Design considerations o f a 3.1-3.5 GHz GaAs FET feedback amplifier,”
IEEE MTT-S International Microwave Symposium Digest, pp. 230-232, May, 1972.
Besser, L., COMPACT User Manual, Version 3.3, Compact Engineering Inc., 1975.
Besser, L., “Stability considerations o f low-noise amplifiers with simultaneous noise and
power match,” IEEE M TT-S International Microwave Symposium Digest, pp. 327-329,
May, 1975.
Bogatin, E., “Design rules for microstrip capacitance,” IEEE Trans. Comp., Packag.,
Manufact., Technol., vol. 11, no. 3, pp. 253-259, Sept., 1988.
Burghartz, J. N., Soyuer, M., and Jenkins, K. A., “Integrated RF and microwave
components in BiCMOS technology,” IE EE Trans, on Electron Devices, vol. 43, no. 9,
pp. 1559-1569, Sept., 1996.
199
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
200
Bibliography
Carpentieri, E., “Model characterizes transmission-line transformers,” Microwaves & RF,
pp. 73-80, Nov., 1996.
Carchon, G., Vaesen, K. Brebels, S., De Raedt, W., Beyne, E., and Nauwelaers, B.,
“M ultilayer thin-film MCM-D for the integration o f high-performance RF and
microwave circuits,” IEEE Trans, on Components and Packaging Technologies, vol. 24,
no. 3, pp. 510-519, Sept., 2001.
Carchon, G., Brebels, S., Vendier, O., and De Raedt, W., “Multi-layer thin-film MCM-D
for the realization o f Q- and V-Band functions,” IEEE MTT-S International Microwave
Symposium Digest, pp. 1151—1154, 2003.
Cascade Microtech, “Layout rules for GHz-probing,” Application Note AN25, 1988.
Chahal, P., Tummala, R. R., Allen, M. G., and Swaminathan, M., “A novel integrated
decoupling capacitor for MCM-L technology,” IEEE Trans. Comp., Packag., Manuf.,
Technol., vol. 21, no. 2, pp. 184—193, May, 1998.
Chen, K. Y., Brown, D., Schaper, L. W., Ang, S. S., and Naseem, H. A., “A study o f the
high frequency performance o f thin film capacitors for electronic packaging,” IEEE
Trans, on Advanced Packaging., vol. 23, no. 2, pp. 293-302, May, 2000.
Cheng, S., and Edwards, M. L., “TEM equivalent circuits for quasi-TEM couplers,”
IEEE M TT-S International Microwave Symposium Digest, pp. 387-390, 1990.
Cho, H., and Burk, D. E., “A three-step method for the de-embedding o f high-frequency
s-parameter measurements,” IEEE Trans, on Electron Devices, vol. 6, no. 38, pp. 1371—
1375, June 1991.
Davis, W. A., Microwave Semiconductor Circuit Design, Van Norstrand Reinhold Co.,
New York, NY, 1984.
DARPA
Microsystems
Technology
Office
Solicitation
(1999),
http://www.darpa.mi1/mto/solicitations/BAA99-39/S/Sectionl.html, (accessed 26 Aug.,
2003).
DARPA
Microsystems
Technology
Office
Solicitation
http://www.darpa.mil/baa/baa04-15 .htm. (accessed 7 Sept., 2004).
(2003),
Dworsky, L. N., Modern Transmission Line Theory and Applications, Robert E. Krieger
Publishing Company, Malabar, Florida, 1988.
Edwards, M. L. and Sinsky, J. H., “A new criterion for linear 2-port stability using a
single geometrically derived parameter,” IEEE Trans. Microwave Theory Tech., vol. 40,
no. 12, pp. 2303-2311, Dec., 1992.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Bibliography
201
Edwards, M. L., Cheng, S., and Sinsky, J. H., “A deterministic approach for designing
conditionally stable amplifiers,” IEEE Trans. Microwave Theory Tech., vol. 43, no. 7, pp.
1567-1575, July, 1995.
Edwards, M. L., and Cheng, S., “Conditionally stable amplifier design using constant pcontours,” IEEE Trans. Microwave Theory Tech., vol. 44, no. 12, pp. 2634—2640, Dec.,
1996.
Edwards, T., Foundations fo r Microstrip Circuit Design, 2nd ed., John Wiley, West
Sussex, England, 1995.
Eisenstadt, W. R. and Eo, Y., “S-parameter-based IC interconnect transmission line
characterization,” IEEE Trans. Comp., Hybrids, Manuf. Technol., vol. 15, no. 4, pp. 483490, Aug., 1992.
Eo, Y. and Eisenstadt, W.R., “High-speed VLSI interconnect modeling based on Sparameter measurements,” IEEE Trans. Comp., Hybrids, Manuf. Technol., vol. 16, no. 5,
pp. 555-562, Aug., 1993.
Faraji-Dana, R., and Chow, Y. L., “The current distribution and AC resistance o f a
microstrip structure,” IEEE Trans. Microwave Theory Tech., vol. 38, no. 9, pp. 12681277, Sept., 1990.
Friis, H. T., “Noise figures o f radio receivers,” Proc. IRE, vol. 32, pp. 419-422, July,
1944.
Fujitsu
Compound
Semiconductors,
Inc.,
http://www.fui itsu.com, (accessed 1 May, 2003).
Microwave
Products
Division,
Gardiol, F., Microstrip Circuits, John Wiley, New York, NY, 1994.
Ginsberg, G. L. and Schnorr, D. P., M ultichip Modules & Related Technologies,
McGraw-Hill, Inc., New York, 1994.
Gilbert, B. K., and Pan, G. W., “MCM packaging for present- and next-generation high
clock-rate digital- and mixed-signal electronic systems: areas for development,” IEEE
Trans. Microwave Theory Tech., vol. 45, no. 10, pp. 1819-1835, Oct., 1997.
Ginzton, Edward L., Microwave Measurements, McGraw-Hill, New York, 1957.
Gonzalez, G., Microwave Transistor Amplifiers, 2nd ed., Upper Saddle River, NJ,
Prentice Hall, 1997.
Gouker, M., Konistis, K., Knect, J., Kushner, L., and Travis, L., “M ulti-layer spiral
inductors in a high-precision, fully-planar, MCM-D process,” IEEE M TT-S International
Microwave Symposium Digest, pp. 1055—1058, 2000.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
202
Bibliography
Guanella, G., “New method o f impedance matching in radio frequency circuits,” Rev.
Brown Boveri, vol. 31, pp. 327-329, Sept., 1944.
Gupta, K. C., Garg, R., and Bahl, I. J., Microstrip Lines and Slotlines, Artech House, Inc.
Dedham, M assachusetts, 1979.
Hasegawa, H., Furukawa, M., and Yanai, H., “Properties o f microstrip line on Si-Si02
system,” IEEE J. Solid-State Circuits, vol. SC-2, pp.201-208, Dec., 1967.
Hayt, W. H., Engineering Electromagnetics, 5th ed., McGraw-Hill, New York, NY, 1989.
Hendriks, P., “Specifying communication DACs,” IE EE Spectrum, pp. 58-69, July,
1997.
Hoer, C. and Love, C., “Exact inductance equations for rectangular conductors with
applications to more complicated geometries,” Journal o f Research o f the National
Bureau o f Standards—C. Engineering and Instrumentation, pp. 127-137, vol. 69C, no. 2,
April-June, 1965.
Howard, G. E., Dai, J., Chow, Y. L., and Stubbs, M. G., “The power transfer mechanism
o f MMIC spiral transformers and adjacent spiral inductors,” IEEE M TT-S International
Microwave Symposium Digest, pp. 1251-1254, 1989.
Itoh, T., Numerical Techniques fo r Microwave and Millimeter-wave Passive Structures,
John Wiley, New York, NY, 1989.
Ishii, T. K., Microwave Engineering, 2nd ed., Harcourt Brace Jovanovich, New York, NY,
1989.
Jackson, R.W. “Coplanar waveguide vs. microstrip for millimeter wave integrated
circuits,” IEEE M TT-S International Microwave Symposium Digest, pp. 699-702, 1986.
Johnson, R. W., Teng, Robert K. F., and Balde, J. W., Multichip Modules: Systems
Advantages, Major Constructions, and Materials Technologies, IEEE Press, Piscataway,
NJ, 1990.
Jung, W. L., and Wu, J., “Stable broad-band microwave amplifier design,” IEEE Trans.
Microwave Theory Tech., vol. 38, no. 8, pp. 1079-1085, Aug., 1990.
Keeney, A. C., Francomcaro, A. S., Edwards, R. L., and Charles, H. K., “Integrated
capacitors for multichip module packaging applications,” Proc. 2002 International
Symposium on Microelectronics, pp. 610-616, 2002.
Kim, S. W., Chang, I. S., Kang, W. T., and Kyung, I. P., “Improving amplifier stability
through resistive loading below the operating frequency,” IEEE Trans. Microwave
Theory Tech., vol. 47, no. 3, pp. 359-362, March, 1999.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Bibliography
203
Kulke, R., Rittweger, M., Simon, W., Wien, A., and Wolff, I., “High resolution coplanar
structures on multilayer LTCC for applications up to 40 GHz,” 32d International
Symposium on Microelectronics, 1999.
Laney, D. C., Larson, L. E., Chan, P., Malinowski, J., Subbanna, S., Volant, R., and Case,
M., “Microwave transformers, inductors, and transmission lines implemented in an
Si/SiGe HBT process,” IEEE Trans. Microwave Theory Tech., vol. 49, no. 8, pp. 1507
1510, Aug., 2001.
Larson, L., “Integrated circuit technology options for RFIC's—present status and future
directions,” IEEE Journal o f Solid-State Circuits, vol. 33, no. 3, pp. 387-399, March,
1998.
Lee, T. H., The Design o f CMOS Radio-Frequency Integrated Circuits, Cambridge
University Press, Cambridge, United Kingdom, 1998.
Levy, R., Snyder, R. V., Matthaei, G., “Design o f microwave filters,” IEEE Trans.
Microwave Theory Tech., vol. 50, no. 3, pp. 783—793, March, 2002.
Lowther, R., and Lee, S. G., “On-chip interconnect lines with patterned ground shields,”
IEEE Microwave and Guided Wave Letters, vol. 10, no. 2, pp. 49-51, Feb., 2000.
Marks, R. B., “A multiline method o f network analyzer calibration,” IEEE Trans.
Microwave Theory Tech., vol. 39, no. 7, pp. 1205-1215, July, 1991.
Marks, R. B., and Williams, D. F., “Characteristic impedance determination using
propagation constant measurement,” IEEE Microwave and Guided Wave Letters, vol. 1,
no. 7, pp. 141-143, June, 1991.
Marx, K. D., “Propagation modes, equivalent circuits, and characteristic terminations for
multiconductor transmission lines with inhomogeneous dielectrics,” IEEE Trans.
Microwave Theory Tech., vol. 21, no. 7, pp. 450-457, July, 1973.
Martens, L., High-Frequency Characterization o f Electronic Packaging, Kluwer
Academic Publishers, Dordrecht, Netherlands, 1998.
Matthaei, G. L., Young, L., Jones, E. M. T., Microwave Filters, Impedance-Matching
Networks, and Coupling Structures, Artech House, Dedham, MA, 1980.
McDonald, N., (1999).
DARPA Microsystems Technology Office Overview,
http://www.darpa.mil/dainatech99/Presentations/scrmts/mto/MTOOyerviewScriot.txt
(accessed 26 Aug., 2003).
Miller, M., Dictionary o f Electronic Packaging, Microelectronic, & Interconnection
Terms, Technology Seminars, Inc., Lutherville, Maryland, 1990.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
204
Bibliography
Mohan, S. S., Yue, C. P., del M ar Hershenson, M., Wong, S. S., and Lee, T. H.,
“Modeling and characterization o f on-chip transformers,” Proc. IEEE IE D M '98, pp.
531-534, 1998.
Morrill, M. A., Caliskan, V. A., Lee, C. Q., “High-frequency planar power transformers,”
IEEE Trans. On Power Electronics., vol. 7, no. 3, pp. 607-613, July, 1992.
Peebles, P.Z., Communications System Principles, Addison-Wesley, New York, NY,
1976.
Pozar, D., Microwave Engineering, Addison-Wesley, New York, NY, 1990.
Pozar, D., Microwave and R F Design o f Wireless Systems. John Wiley, New York, NY,
2001 .
Piloto, A. J., “Integrated passive components: a brief overview o f LTCC surface mount
and integral options,” Advancing Microelectronics, pp. 24-28, Sept./Oct., 1999.
Post, J. E., “Stability and noise performance o f resistively loaded microwave amplifiers,”
Microwave and Optical Technology Letters, vol. 41, no. 3, pp. 228-231, 5 May, 2004.
Post, J. E., “Optimizing the design o f spiral inductors on silicon,” IEEE Trans. On
Circuits and Systems II: Analog and D igital Signal Processing, vol. 47, no. 1, pp. 1517, Jan., 2000.
Post, J. E., Linscott, I. R., and Oslick, M. H., “Waveform symmetry properties and phase
noise in oscillators,” Electronics Letters, vol. 34, no. 16, pp. 1547-1548, Aug., 1998.
Pucel, R.A., Masse, J., and Hartwig, C.P., “Losses in microstrip,” IEEE Trans.
Microwave Theory Tech., vol. 16, no. 6, pp. 342-350, June, 1968.
Ramo, S., Whinnery, J. R., and Van Duzer, T., Fields and Waves in Communications
Electronics, 2nd ed., John Wiley, New York, NY, 1984.
Rosemarin, D., “A design cure for unstable transistors,” Microwave & RF, pp. 94-95,
March, 1983.
Rotholz, E., “Transmission line transformers,” IEEE Trans. Microwave Theory Tech.,
vol. 29, no. 4, pp. 1507-1510, April, 1981.
Ruthroff, C. L., “Some broad-band transformers,” Proc. IRE, vol. 47, pp. 1337-1342,
Aug., 1959.
Rutledge, D. B., The Electronics o f Radio, Cambridge University Press, Cambridge,
United Kingdom, 1999.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Bibliography
205
Ryu, W., Baik, S. H., Kim, H., Kim, J., Sung, M., and Kim, J., “Embedded microstrip
intercormection lines for gigahertz digital circuits,” IEEE Trans. On Advanced
Packaging, vol. 23, no. 3, pp. 495-503, Aug., 2000.
Schwab, D. J., Thompson, R. L., Gilbert, B. K., Jayaraj, K., Moravec, T. J., Jensen, R. J.,
and Sainati, R., “Performance characteristics o f thin film multilayer interconnects in the
1-10 GHz frequency range,” Proc. o f the 39th Electronic Components Conference, pp.
410—416, 1989.
Sevick, J., Transmission Line Transformers, 4th ed., American Radio Relay League,
2001 .
Sherwani, N., Yu, Q., and Badida, S., Introduction to Multichip Modules, John Wiley,
New York, NY, 1995.
Sweet, A. A., M IC and MMIC Amplifier and Oscillator Circuit Design, Artech, Boston,
MA, 1990.
Takken, T., and Tuckerman, D., “Integral decoupling capacitance reduces multichip
module ground bounce,” Proc. 1993 IEEE Multi-Chip Module C o n f, pp. 79-84, Santa
Cruz, CA, March 15, 1993.
Trinogga, L. A., Kaizhou, G., and Hunter, I. C., Practical M icrostrip Circuit Design,
Ellis Horwood, 1991.
Tripathi, V. K., “Equivalent circuits and characteristics o f inhomogeneous
nonsymmetrical coupled-line two-port circuits,” IEEE Trans. Microwave Theory Tech.,
vol. 25, no. 2, pp. 140-142, Feb., 1977.
Tripathi, V.K. and Sturdivant, R., “Guest editorial,” IEEE Trans. Microwave Theory
Tech., vol. 45, no. 10, pg. 1817, Oct., 1997.
Tsai, C., and Gupta, K. C., “A generalized model for coupled lines and its applications to
two-layer planar circuits,” IEEE Trans. M icrowave Theory Tech., vol. 40, no. 12, pp.
2190-2199, Dec., 1992.
Tuncer, E., and Neikirk, D.P., “Highly accurate quasi-static modeling o f microstrip lines
over lossy substrates,” IEEE Microwave and Guided Wave Letters, vol 2, no. 10, pp.
409-411, Oct., 1992.
Ulrich, R. K., and Shaper, L. W., Integrated Passive Component Technology, IEEE Press,
Piscataway, NJ, 2003.
Vendelin, G. D., “Feedback effects on GaAs MESFET performance,” IEEE MTT-S
International Microwave Symposium Digest, pp. 324—326, May, 1975.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
206
Bibliography
Vendelin, G. D., Design o f Amplifiers and Oscillators by the S-parameter Method, John
Wiley, New York, NY, 1982.
Vendelin, G. D., Pavio, A. M., and Rohde, U. L., Microwave Circuit Design using Linear
and Nonlinear Techniques, Wiley, New York, NY, 1990.
Wadell, B. C., Transmission Line Design Handbook, Artech House, Inc., Norwood, MA,
1991.
Wedge, S. W., Compton, R., and Rutledge, D., PUFF: Computer Aided Design fo r
Microwave Integrated Circuits, California Institute o f Technology, Pasadena, California,
1999.
Weeks, W. T., Wu, L. L., McAllister, M. F., and Sing, A., “Resistive and inductive skin
effect in rectangular conductors,” IB M Journal o f Research Developments, vol. 23, no. 6,
pp. 652-660, Nov., 1979.
Wepman, J. A., “Analog-to-digital convertors and their applications in radio receivers,”
IEEE Communications Magazine, pp. 39—45, May, 1995.
Weste, N. H. E., and Eshraghian, K., Principles o f CMOS VLSI Design, Addison-Wesley
Publishing Company, New York, NY, 1994.
Wheeler, H. A., “Transmission-line properties o f a strip on a dielectric sheet on a plane,”
IEEE Trans. Microwave Theory Tech., vol. 25, no. 8, pp. 631-647, Aug., 1977.
Williams, D. F., and Marks, R. B, “Transmission Line Capacitance Measurement,” IEEE
Microwave and Guided Wave Letters, vol. 1, no. 9, pp. 243-245, Sept., 1991.
Williams, D. F., and Marks, R. B., “Accurate transmission line characterization,” IEEE
Microwave and Guided Wave Letters, vol. 3, no. 8, pp. 247-249, Aug., 1993.
Yue, C. P. and Wong, S. S., “On-chip spiral inductors with patterned ground shields for
Si-based RF IC's,” IEEE Journal o f Solid-State Circuits, vol. 33, no. 5, May, 1998.
Zu, L., Lu, Y., Frye, R. C., Lau, M. Y., Chen, S. C. S., Kossives, D. P., Lin, J., and Tai,
K. L., “High Q-factor inductors integrated on MCM Si Substrates,” IEEE Trans. Comp.,
Packag., Manufact., Technol.— Part B, vol. 19, no. 3, pp. 635-642, Dec., 1992.
Zysman, G. I., and Johnson, K. A., “Coupled transmission line networks in an
inhomogeneous dielectric medium,” IEEE Trans. Microwave Theory Tech., vol. MTT17, no. 10, pp. 753-759, Oct., 1969.
, “Practical design information for broadband transmission line transformers,” in
Proc. IEEE, vol. 56, pp.738-739, 1968.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Документ
Категория
Без категории
Просмотров
0
Размер файла
7 257 Кб
Теги
sdewsdweddes
1/--страниц
Пожаловаться на содержимое документа