close

Вход

Забыли?

вход по аккаунту

?

Flip -chip technology and new microwave filters on coplanar strip lines

код для вставкиСкачать
UNIVERSITY OF CALIFORNIA,
IRVINE
Flip-Chip Technology and New Microwave Filters on Coplanar Strip Lines
DISSERTATION
submitted in partial satisfaction o f the requirements
for the degree of
DOCTOR OF PHILOSOPHY
in Electrical and Computer Engineering
by
Youngkyu Song
Dissertation Committee:
Professor Chin C. Lee, Chair
Professor G. P. Li
Professor Fadi Kurdahi
2007
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
UMI Number: 3271331
INFORMATION TO USERS
The quality of this reproduction is dependent upon the quality of the copy
submitted. Broken or indistinct print, colored or poor quality illustrations and
photographs, print bleed-through, substandard margins, and improper
alignment can adversely affect reproduction.
In the unlikely event that the author did not send a complete manuscript
and there are missing pages, these will be noted. Also, if unauthorized
copyright material had to be removed, a note will indicate the deletion.
®
UMI
UMI Microform 3271331
Copyright 2007 by ProQuest Information and Learning Company.
All rights reserved. This microform edition is protected against
unauthorized copying under Title 17, United States Code.
ProQuest Information and Learning Company
300 North Zeeb Road
P.O. Box 1346
Ann Arbor, Ml 48106-1346
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
© 2007 Youngkyu Song
ii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The dissertation of Youngkyu Song
is approved and is acceptable in quality
and form for publication on microfilm:
Committee Chair
University of California, Irvine
2007
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
TABLE OF CONTENTS
Page
LIST OF FIGURES
vi
LIST OF TABLES
x
ACKNOWLEDGMENTS
xi
CURRICULUM VITAE
xii
PUBLIC AION S
xiii
ABSTRACT OF THE DISSERTATION
xv
CHAPTER 1
Introduction
1.1 Motivations and Objectives
1
1.2 Characterization o f Coplanar Strip lines
3
1.3 Flip-Chip design using Coplanar Strip lines
4
1.4 Bandpass Filter Design using Coplanar Strip lines 5
1.5 Dissertation Organization
6
References Chapter 1
9
CHAPTER 2
Characterization of Coplanar Strip lines
2.1 Introduction
2.2 Experimental and Simulated Results o f CPS
Lines on Dielectric Boards.
2.3 Design Guideline
2.4 Summary
References Chapter 2
CHAPTER 3
Flip-Chip design using Coplanar Strip lines
3.1 Introduction
3.2 Flip-Chip Configuration and Design.
3.3 Flip-Chip Implementation and Measurement
Results
3.4 Summary
iv
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
12
14
30
36
37
39
41
50
51
References Chapter 3
CHAPTER 4
CHAPTER 5
52
Compact Bandpass Filters in Coplanar
Strip Lines
4.1 Introduction
4.2 Analysis o f basic electrode topologies in CPS
lines
4.3 Concept of a hybrid electrode topology and its
analysis
4.4 Design and realization of compact bandpass
filter in CPS lines
4.5 Characterization and Measurement Results
4.6 Conclusion
References Chapter 4
74
77
90
91
Summary
94
V
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
54
57
68
LIST OF FIGURES
Page
Figure 2.1
Cross section end views o f (a) Microstrip line, (b) Coplanar
waveguide (CPW), (c) Coplanar strip (CPS) line with dielectric
backside, and (d) Coplanar strip (CPS) line with metallized
backside.
13
Figure 2.2
Measurement setup for four different backside metallization
terminations.
16
Figure 2.3
Measured attenuation coefficients of CPS lines with four
different backside terminations.
19
Figure 2.4
Simulated and measured attenuation coefficients o f CPS lines
with metallized backside and dielectric backside, respectively,
open to air.
20
Figure 2.5
Simulated results on losses, (a) dielectric loss, conduction loss
and total loss o f a CPS line with dielectric backside open in air,
(b) losses o f a CPS with metallized backside open in air,
(c) conduction loss comparison between metallized backside
and dielectric backside.
(d) dielectric loss comparison between metallized backside
and dielectric backside.
23
Figure 2.6
Magnitudes o f the electric field distribution on CPS lines with
(a) dielectric backside at 10GHz, (b) metallized backside
at 10GHz, (c) dielectric backside at 30GHz, and
(d) metallized backside at 30GHz.
27
Figure 2.7
Electric filed distributions with different backside terminations
(a) dielectric backside at 10GHz, (b) metallized backside
at 10GHz, (c) dielectric backside at 30GHz, and
(d) metallized backside at 30GHz.
29
Figure 2.8
Calculated characteristic impedance of the CPS lines with
different geometries at 10GHz.
vi
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
31
Figure 2.9
Measured attenuation coefficients [dB/cm] versus frequency.
The attenuation coefficient is the average value o f CPS lines
with electrode gaps o f 50pm, 70pm, and 100pm.
34
Figure 2.10
Measured attenuation coefficients o f CPS lines with electrode
width/gap o f 450/50, 650/60, 850/70, and 1250/100pm.
35
Figure 3.1
Conventional interconnect method with wire bonding using
microstrip line.
42
Figure 3.2
A new flip-chip interconnect configuration with coplanar strip
(CPS) lines.
43
Figure 3.3
(a) Geometrical design parameters of CPS flip-chip
interconnect, (b) CPS line on chip side,
(c) CPS lines and solder balls on the board.
44
Figure 3.4
Equivalent circuit model of solder bump interconnect.
45
Figure 3.5
(a) Optical picture and (b) X-ray image the flip-chip
assembly.
48
(a) Insertion loss (S2i) and
(b) Return loss (Sn) of a typical flip-chip assembly.
49
Figure 4.1
A typical RF radio receiver block diagram.
55
Figure 4.2
Sections used in the de-embedding procedure,
(a) a open section between input and output CPS lines,
(b) a short section between input and output CPS lines,
(c) a basic filter section emulating a series inductor.
59
Figure 3.6
Figure 4.3
(a) A general filter section inserted in CPS line
(b) an equivalent circuit representation
(c) a general equivalent circuit o f the series inductance section
shown in Fig. 4-2 (c).
61
Figure 4.4
Lumped-element values versus frequency, (a) series resistance
(b) series inductance, (c) parallel capacitance, and
vii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
(d) parallel conductance.
63
Figure 4.5
Variation o f de-embedded parameters versus slit width D of
The filter section in Fig. 4-2 (c) at 2.4GHz,
(a) series inductance (b) parallel capacitance.
65
Figure 4.6
(a) Basic building block for parallel inductance in CPS line,
(b) a general equivalent circuit (c) value o f parallel inductance
versus slit width D at 2.4GHz.
67
Figure 4.7
Design example o f a basic hybrid topology.
Figure 4.8
(a) Extracted effective capacitance of the hybrid topology
after de-embedding procedure using short-open calibration in
Fig. 4-2 (b) calculated reactance o f the hybrid topology
connected with a InH parallel inductance.
71
Figure 4.9
(a) A hybrid topology in CPS electrodes, dimensions the same
as Fig. 4-7, (b) equivalent lumped-element circuit.
73
Figure 4.10
Effective parallel capacitance o f the hybrid topology Fig. 4-9
(a) after de-embedding procedure using short-open calibration
(b) and its value obtained using lumped-element
equivalent circuit.
73
Figure 4.11
(a) Lumped-element circuit of the bandpass filter.
(c) Layout o f 2.4GHz ISM bandpass filter in CPS lines
built on RT/Duroid 6010.
76
Measured and computed frequency responses o f the
2.4GHz ISM filter fabricated on RT/Duroid6010
dielectric board, (a) Return loss (Sn) and
(b) insertion loss (S2i).
79
Simulated transmission coefficients (S2i) as the dimension
o f the filter topology in Fig. 4-11 is scaled by the factor
indicated.
81
Figure 4.12
Figure 4.13
Figure 4.14
Scale down element values in the equivalent circuit model:
(a) series and parallel inductances
V lll
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
69
Figure 4.15
Figure 4.16
Figure 4.17
Figure 4.18
(b) series parallel capacitances.
82
Layout o f UNII 5.15-5.85GFIz bandpass filter in CPS lines
built on RT/Duroid6010.
84
(a) Return loss (Sn) and (b) transmission coefficient (S2i)
o f the UNII 5.15-5.85GHz bandpass filter in CPS line.
86
Layout o f improved 2.4GHz ISM bandpass filter for
wideband filter response in CPS line.
88
Measured and simulation frequency responses o f an i
mproved 2.4GHz bandpass filter: (a) Return loss (Sn) and
(b) insertion loss (S2i).
89
ix
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
LIST OF TABLES
Page
Table 2.1
Simulated dielectric loss, conduction loss, and total loss of
a CPS line with dielectric backside open in air and metallized
backside open in air, respectively, at 10, 20, 30, and 40GHz. 24
Table 2.2
Measured attenuation coefficients [dB/cm] o f CPS lines with
four different backside conditions at 10, 20, 30, and 40GHz,
and with electrode gaps o f 50pm, 70pm, and 100pm.
32
Table 4.1
Filter center frequency and size versus scaling factor.
X
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
83
ACKNOWLEDGMENTS
I would like to begin by expressing the deepest gratitude to my research advisor,
Professor Chin C. Lee, for his invaluable guidance and encouragement during the course
o f dissertation work. His continuous encouragement has been a great source o f energy to
triumph over difficult time. Without his supervision, this dissertation could not have been
completed. I also wish to express my gratitude to Professor Guann Pyng Li, and Professor
Fadi Kurdahi for invaluable discussions and comments. Without their guidance and
persistent help this dissertation would not have been possible.
I am grateful for several quarters o f regents’ graduate fellowships form the office
of research and graduate studies at University o f California, Irvine. Deepest gratitude
again goes to Dr. Chin C. Lee for the fellowship nominations.
I owe a special debt to gratitude to my parents, brothers, (Youngok, Younggoo,
Youngjoo), and sister (Youngja) for their unparalleled support and unconditional love.
My special gratitude goes to my dear wife, Hyun Ju Kim, for her constant support and
encouragement. Finally I would like to give all my best thanks and wishes to my lovely
Son, Kenneth Joonha, and daughter, Katherine Hayoung, who always gives small but
gigantic support such as angelic smile.
I would like to thank Dr. Akira Ito and Abbas Amirichimeh at Broadcom for
helpful discussion. Special appreciation goes to my colleagues, Dongwook Kim, Jonsung
Kim, Jeong Park, SungRok Bang, and Joaquin Gabriels for their invaluable technical
support and friendship throughout my study at UCI.
xi
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CURRICULUM VITAE
Youngkyu Song
1999
Bachelor of science in Electronic Materials Engineering
Kwangwoon University, Seoul Korea
2001
Master of Science in Electrical and Computer Engineering
University o f California, San Diego
2000-2001
Graduate Research Assistant
Department o f Electrical and Computer Engineering
University of California, San Diego
2002-2007
Graduate Research Assistance
Department of Electrical and Computer Engineering
University o f California, Irvine
2005
Intern, Engineer, Broadcom Corp.
Irvine, California
2007
Doctor o f Philosophy in Electrical and Computer Engineering,
University o f California, Irvine
xii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
PUBLICATIONS
Journal
1. Young K. Song and C. C. Lee, “Coplanar Strip Line Bandpass Filter
Design using Lumped-elements in Compact Size,” IEE Proceedings
Microwaves, Antennas and Propagation, 2007, 1, (3), pp.688-693.
2. Young K. Song and C. C. Lee, “Characterization o f Coplanar Strip Lines
on Dielectric Boards for RF and Microwave Applications,” International
Journal o f RF and Microwave Computer-aided Engineering, Feb. 10, 2007
(accepted).
3. Young K. Song and C. C. Lee, “A New Flip-chip Packaging using
Coplanar Strip Line up to 40GHz,” IEEE Transactions on Advanced
Packaging, Feb, 2007(submitted).
4. Young K. Song and C. C. Lee, “Topology bandpass filters in coplanar strip
lines,” International
Journal
of RF
and Microwave
Computer-aided
Engineering, Apr. 2007 (submitted).
5. Young K. Song and C. C. Lee, “Spiral Capacitor Modeling and
Applications to Bandpass filter in Coplanar Strip Lines,” (submitted).
xiii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Conference
1. Young K. Song and C. C. Lee, “RF Modeling and Design of Flip chip
Configurations
o f Microwave
Devices
on
PCBs,”
IEEE
Electronic
Components and Technology Conference, pp. 1837-1842, Las Vegas, Nevada,
Jun 1-4. 2004.
2. Young K. Song and C. C. Lee, “Millimeter-wave Coplanar strip (CPS)
Line Flip-chip Packaging on PCBs,” IEEE Electronic Components and
Technology Conference, May 31- June 3; Lake Buena Vista; FL, 2005.
3. Young K. Song and C. C. Lee, “Flip-chip Packaging Configuration with
Coplanar
Strip Lines
for Millimeter Electromagnetic
Waves,” IEEE
Electronic Components and Technology Conference, pp. 1700-1705, May 30
- June 2, San Diego, CA, Jun 2006
4. Young K. Song and C. C. Lee, “A Study o f Compact Bandpass Filter
Design in Coplanar Strip lines using Lumped-elements,” IEEE Electronic
Components and Technology Conference, May 29-June 1, Reno, NV, 2007
(accepted).
x iv
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
ABSTRACT OF THE DISSERTATION
Flip-Chip Technology and New Microwave Filters on Coplanar Strip Lines
by
Youngkyu Song
Doctor o f Philosophy in Electrical and Computer Engineering
University of California, Irvine, 2007
Professor Chin C. Lee, Chair
Traditionally, dominating transmission line is microstrip line on microwave and
millimeter-wave integrated circuits (MMICs) and on print circuit boards (PCBs). The
coplanar strip (CPS) line has both the signal and ground electrodes on the front surface o f
the board. In contrast to the microstrip line, the CPS line does not include the backside o f
the board as a part o f the transmission line. Thus, the backside can be left open as
dielectric or metallized. The backside condition can affect the wave propagation if it is too
close to the electrodes. Analysis and characterization o f CPS lines depending on backside
condition were performed at millimeter-wave frequency up to 40GHz. The CPS line was
analyzed and simulated using full-wave electromagnetic simulation. Many CPS lines
XV
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
were built on RT/Duroid board and the measured attenuation is as low as 0.8dB/cm at
30GHz. CPS lines o f various electrode width and width-to-gap ratios were measured to
obtain key design guidelines. The results clearly indicate that the CPS line is an attractive
transmission line on the board level in millimeter electromagnetic waves applications. Its
applications can be extended to microwave and millimeter-wave applications.
With those preliminary investigations and advantages o f CPS line, a new flip-chip
interconnect configuration with CPS lines on PCBs was first developed for millimeterwave applications. The flip-chip configuration was designed and implemented using a test
chip on dielectric board. Geometrical parameter analysis was carried out using full-wave
simulation and equivalent circuit model for wideband performance. The chip was
connected to the board using solder bumps. For a typical flip-chip assembly, the measured
insertion loss is less than 3dB for frequencies up to 3 5GHz and the return loss is higher
than 15dB for frequencies close to 30GHz using CPS flip-chip configuration.
A novel compact bandpass filter in coplanar strip (CPS) lines for RF and
microwave applications was newly developed and implemented. The filter is implemented
as electrode topology on the CPS electrodes. The topology consists o f basic electrode
patterns that emulate inductors and capacitors in a two-port filter section. It uses the
creation o f an electrode pattern on the coplanar strip electrodes to emulate an equivalent
circuit. Bandpass filters for 2.4GHz ISM (Industrial, Scientific and Medical) and 5.155.85GHz UNII (Unlicensed National Information Infrastructure) bands were designed,
xvi
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
fabricated, and measured. The electrode pattern can be scaled for different center
frequency and improved with fine tuning procedure. The concept o f hybrid topology that
gives resonance response was newly introduced. The compactness o f bandpass filter in
CPS line was realized with large effective capacitance o f hybrid topology, which is useful
for the technologies in the millimeter wave frequency range. The bandpass filter is very
compact in size and planar in structure. It does not use quarter-wavelength sections, vias,
or bonding wires. It can be fabricated without incurring additional cost.
x v ii
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CHAPTER 1
Introduction
1.1
Motivations and Objectives
For microwave transmission, the most commonly used transmission line on
dielectric boards or integrated circuits has been the microstrip line where the signal
electrode is on the top surface and ground plane is on the backside. In this dissertation, as
alternative transmission line, the CPS line was studied.
The CPS line has several advantages as follows [l]-[6]. First, shunt elements can be easily
connected to CPS lines without having to go through the dielectric substrate as in the case
of microstrip lines. With the advantages of flexibility and balanced structure in the
geometry, CPS lines have been used for uniplanar mixer [7], [8] and dipole antenna
design [9]. Meanwhile, CPS line has been widely used for electrooptical (EO) modulator
such as Mach-Zehnder modulator [10].
For CPS line, the signal and ground electrodes both lie on the top surface of a chip or
substrate, the line geometry can still be varied for a given value of characteristic
impedance while for microstrip lines the electrode width is determined for a substrate of
given thickness and dielectric constant. Thus, the CPS line has one more degree of
freedom in line geometry. The backside of microstrip line must be plated with thick metal
1
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
layer to strengthen it to accommodate subsequent fabrication steps. All these necessary
back-end processes are costly and can significantly reduce the yield. The thinness o f the
chips also makes die-attachment process difficult. By using CPS lines instead o f
microstrip lines, the backside of the wafer becomes free. It can be either coated with thin
metal layer or left open.
In order to explore the possibility of coplanar strip line as a transmission line for the
RF and microwave applications, low loss transmission lines are desirable. Thus,
attenuation coefficient [dB/cm] analysis is performed. Attenuation coefficient is analyzed
in terms of dielectric loss and conduction loss using full-wave simulator, HFSS [11] and
S-parameter from measurement. With the advantages o f CPS line, a new configuration of
flip-chip packaging was proposed. In this new configuration, CPS lines are used on both
the chip and the board as the transmission line. Using CPS line flip-chip interconnection,
it was achieved that the -3dB o f insertion loss close to 30GHz with good reflection
coefficient (-15dB) without further any compensation structures and miniaturized bump
technology. This flip-chip assembly using CPS lines is suitable for future millimeter
electromagnetic waves applications.
With the advantages o f CPS line, new bandpass filters using lumped-elements are
proposed for RF and microwave application. CPS lines are used as a transmission line at
input and output because it takes up much less space comparing to CPW on chip or
dielectric board. It doest not require bond wire connection between grounds.
2
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
For the compact size filter design, preliminary study o f electrode patterns was performed
to be used as lumped-elements such as capacitors and inductors in series and parallel
connections. The filter responses are characterized by an equivalent circuit model and
verified by full-wave simulation. Simulated and measured filter responses exhibit that
CPS line filter using lumped-elements has possibility for on MMIC chips and on PCB
applications with several advantages such as cost reduction, reliability improvement, and
compact size.
1.2
Characterization of Coplanar Strip Lines
The CPS line consists o f two electrodes, usually of the same width, on the same
surface. One is the signal electrode and the other is the ground electrode. As a result, the
backside of the MMIC chip and the backside o f the board are not a part o f the
transmission line anymore. The backsides are relieved o f signal transmission function and
are thus free. This possibility provides great advantages to the MMICs in reducing cost,
increasing yield, and enhancing reliability. The backside is not a part o f the transmission
line and thus can be either left open or metallized. Thus, all the fabrication steps that are
required to produce via holes through the wafer can be eliminated. This feature can be
considered as an advantage of CPS line. The thinning process needed to make 50-ohm
line narrow may be eliminated. These translate to significant cost reduction, increase in
yield, and enhancement in reliability. If the backside is too close to the electrodes, it can
affect the microwave propagation.
3
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The backside condition is important and worth studying. However, little research has been
reported for the dependence of propagation characteristics on CPS line geometry and
backside terminations in millimeter waves. Four different backside terminations are
investigated: (a) metallized backside open in air, (b) metallized backside connected to
system ground, (c) dielectric backside open in air, and (d) dielectric backside connected to
system ground.
Measured results are compared with calculated values and analyzed in details. Attenuation
coefficients, line impedance, and field distributions were studied. Based on the results o f
lines with various electrode widths and width-to-gap ratios, design guidelines become
available.
1.3
Flip-Chip Design using Coplanar Strip Lines
In this study, a new flip-chip packaging configuration of microwave and
millimeter-wave integrated circuits (MMICs) directly on a dielectric circuit board is
proposed. In this new configuration, CPS lines are used on the both o f chip and board as
the transmission line. At this time, all the MMIC chips in production use traditional
microstrip lines as the transmission line. To achieve 50-ohm characteristic impedance, the
wafer has to be lapped down to 100pm or less. Furthermore, through-wafer interconnect,
vias must be fabricated to provide ground contacts on the top surface of the wafer.
When the chip is connected to the boards using solder balls directly, interconnect
region affects the electrical performance due to geometrical and characteristic impedance
4
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
mismatch. Geometrical parameters such as dielectric-overlapping length, conductoroverlapping length, and pitch distance in flip-chip interconnect are analyzed in terms o f
reflection coefficient, Sn. By means of full wave analysis in the flip-chip interconnect
region, a design method of CPS flip-chip is presented for millimeter electromagnetic
waves. Experimental results o f the flip-chip assemblies are reported, which shows the
CPS flip-chip is an attractive interconnect technology for future millimeter-wave devices.
1.4
Bandpass Filter Design in Coplanar Strip Lines
In the RF and microwave frequencies, filters must be connected to transmission
lines, regardless o f the filter type. Filters implemented directly on transmission lines
eliminate the interfaces between the filter and the lines. Generally, microstrip line
bandpass filters use quarter-wavelength parallel coupled-lines to build the filter response
[12].
In specific applications, the coplanar waveguide (CPW) has also been used. The
signal and ground electrodes are on the same top surface o f the substrate. Thus, CPW is
convenient for the situations where the bottom surface of the substrate is not available as
the ground. Bandpass filters using CPW have been reported [13]-[15], In these filters,
wire bonding process is required to connect the two ground electrodes to suppress
parasitic modes. The parasitic reactance of bonding wires may make the filter
performance harder to predict. To eliminate wire connection between two grounds,
stepped-impedance resonator (SIR) filters were reported [16], [17]. The SIR filter is
5
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
designed based on quarter-wavelength resonators in CPW. Thus, the filter length is
restricted to the number o f quarter-wavelength sections.
The other transmission line, CPS line was less popular but is gaining moment in its
applications. For a given line impedance, the electrode width o f CPS lines can be varied
so far as the width-to-gap ratio is maintained. Thus, the CPS line provides one more
degree of freedom in line geometry. Accordingly, electrode width o f CPS line can be
chosen to match the topology of bandpass filter reported in this study. Bandpass filters
using CPS line were reported using resonator stubs realized with open- and short-ended
quarter-wavelength sections [18]-[21], The resulting filters are several quarter-wavelength
wavelengths long. Thus, these filters are not so compact unless the center frequency is
very high. For compact filter design, lowpass filter using lumped-elements on CPS lines
was fabricated on a 635 pm thick alumina substrate, where rectangular spiral inductors and
interdigital capacitors were used [22]. Wire bonding was required to connect spiral
inductors to other elements.
For initial demonstration, it was built on print circuit boards (PCBs). The novel filter
design does not use bonding wires, vias, or any interconnect structure. For chip-level
implementation, the filter size can be greatly reduced because o f much smaller minimum
electrode width.
1.5
Dissertation Organization
To explore the possibility of CPS line in millimeter and microwave application,
6
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
first, CPS line was investigated in Chapter 2. Attenuation coefficients depending on the
backside termination were studied. The method of computing conduction loss and
dielectric loss from the S-parameters using full-wave analysis was discussed. Full-wave
electromagnetic simulation was employed for electric filed distributions and calculation
o f characteristic impedance. The results of S-parameter measurements and full-wave
simulation are presented in order to investigate the backside termination effects.
Subsequently, design guidelines were obtained and presented with various CPS line
geometries. The study o f flip-chip configurations using test chips directly on dielectric
boards with CPS lines is presented in Chapter 3. The millimeter-wave performance of
flip-chip
interconnects
in
coplanar
environment
is
investigated
by
means
of
electromagnetic simulation. Simulated results in terms of return loss and insertion loss
were verified by the measurement results. To improve return loss, the geometrical
parameters of interconnect region were identified and analyzed with 7i-equivalent circuit
model. A short summary is then given. Chapter 4 presents compact bandpass filters in
CPS lines using lumped-element built on PCBs in GHz range. To achieve compact
bandpass filter design, the concept of hybrid topology was found and discussed in detail.
To demonstrate newly developed concept for bandpass filter design, two filters for ISM
2.4GHz and UNII 5.15-5.85GHz bands were designed and built on PCBs. The basic
electrode patterns that emulate inductors and capacitors in a two-port filter section were
investigated by means of equivalent circuit model and full-wave simulation with de-
7
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
embedding technique. Lumped-element model of the hybrid and filter topology from the
S-parameters of HFSS simulation were discussed in detail.
In what follows, the filter
design, fabrication, and brief design procedure were presented. Characterization and
measurement responses are reported and discussed. Finally, chapter 5 presents the
summary.
8
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
References Chapter 1
[1]
S.B. Cohn, “Slot Line on a Dielectric Substrate,” IEEE Trans. Microw. Theory
and Tech., 17, pp.768-778, Oct. 1969.
[2]
J. B. Knorr and K. Kuchler, “Analysis of coupled slots and coplanar strips on
dielectric substrate,” IEEE Trans. Microw. Theory and Tech., 23, pp.541-548, Jul.
1975.
[3]
K. C. Gupta, R. Garg, I. Bahi, and P. Bhartia,
Microstrip lines and slotlines, 2nd
edition, 1996, Artech House, Boston.
[4]
V. M. Lubecke, W. R. McGrath, and D. B. Rutledge, “A 100 GHz coplanar strip
circuit tuned with a sliding planar backshort,” IEEE, Microw. and Guided wave
lett., 3, pp. 441 - 443, Dec. 1993.
[5]
Y. H. Suh, and K. Chang, “Coplanar stripline resonators modeling and
applications to filters,” IEEE Trans. Microw. Theory and Tech., 50, pp. 1289 1296, May. 2002.
[6]
S. Gevorgian, H. Berg, H. Jacobsson, and T. Lewin, “Application notes - basic
parameters o f coplanar-strip waveguides on multilayer dielectric/semiconductor
substrates, Part 1 high permittivity superstates,” IEEE. Microw. Magazine, 4, pp.
6 0 - 7 0 , Jun. 2003.
[7]
H. K. Chiou, C. Y. Chang, and H. H. Lin, “Baiun design for uniplanar broad band
double balanced mixer,” 31, IEE Electron Lett, pp.211 3 -2 1 1 4 , Nov. 1995.
[8]
S. G. Mao, K. K. Chiou, and C. H. Chen, “Design and modeling of uniplanar
double-balanced mixer,” IEEE Microwave Guided Wave Lett., 8, pp.354 - 356,
Oct. 1998.
[9]
J. A. Flint, and J. C. Vardaxoglou, “Exploitation o f nonradiating modes in
9
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
asymmetric coplanar strip folded dipoles,” IEE Proc. Microwave Antennas
Propagat., 151, 307 - 310, Aug. 2004.
[10]
Y. Cui, and P. Berini, “Modeling and design of GaAs traveling-wave electrooptic
modulators based on capacitively loaded coplanar strips,” IEEE J. Lightwave
Tech., 24, 544 - 554, June, 2006.
[11]
HFSS (high frequency structure simulator), version 9, Ansoft Corporation,
Pittsburgh, PA.
[12]
J. W. Bandler, R. M. Biemacki, S. H. Chen, P. A. Grobelny, C. Moskowitz, and S.
H.
Talisa,
“Electromagnetic
design
o f high-temperature
superconducting
microwave filters,” IEEE Int. Microw. Symposium Dig., 2, pp. 993-996, May 2327, 1994.
[13]
Y. S. Lin, W. C. Ku, C. H. Wang, and C. H. Chen, “Wideband coplanar-waveguide
bandpass filters with good stopband rejection,” IEEE Microw. WireI. Comp. Lett.,
14, pp. 422 - 424, Sept. 2004.
[14]
J. F. Zhou, M. J. Lancaster, and F. Huang, “Compact superconducting coplanar
meander line filters,” IEE Electronics Letters, 39, pp. 665 - 667, Apr. 2003.
[15]
Y. K. Kuo, C. H. Wang, and C. H. Chen, “Novel reduced-size coplanar-waveguide
bandpass filters,” IEEE Microw. Wirel. Comp. Lett., 11, pp. 65-67, Feb. 2001.
[16]
H. L. Zhang and K. J. Chen, “Miniaturized coplanar waveguide bandpass filters
using multisection stepped-impedance resonators,” IEEE Trans. Microw. Theory
and Tech., 54, pp. 1090 - 1095, Mar. 2006.
[17]
A. Sanada, H. Takehara, and I. Awai, “Design of the CPW in-line LIA steppedimpedance resonator bandpass filter,” Asia-Pacific Microwave Conf., 2, pp. 633636, Dec. 2001.
[18]
K. Hettak, N. Dib, A. F. Sheta, and S. Toutain, “A class o f novel uniplanar series
10
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
resonators and their implementation in original applications,” IEEE Trans.
Microw. Theory and Tech., 46, pp. 1270 - 1276, Sept. 1998.
[19]
Y. K. Kuo, C. H. Wang, C. H. Chen, “Novel reduced-size coplanar-waveguide
bandpass filters,” ” IEEE Microw. Wirel. Comp. Lett., 11, pp. 65 - 67, Feb. 2001.
[20]
J. S. Lim, C. S. Kim, Y. T. Lee, D. Ahn, and S. W. Nam, “spiral-shaped defected
ground structure for coplanar waveguide,”
IEEE, Microw. and Guided wave left.,
12, pp. 330 - 332, Sep. 2002.
[21]
S. S. Liao, H. K. Chen, Y. C. Chang, and K. T. Li, “Novel reduced-size coplanarwaveguide bandpass filter using the new folded open stub structure,” IEEE
Microw. Wirel. Comp. Lett., 12, pp. 476 - 478, Dec. 2002.
[22]
S. G. Mao, H. K. Chiou, and C. H. Chen, “Modeling o f lumped-element coplanarstripline low-pass filter,” IEEE Microw. Wirel. Comp. Lett., 8, pp. 141-143, Mar.
1998.
11
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CHAPTER 2
Characterization of Coplanar Strip lines
2.1 Introduction
Since microstrip line consists o f a signal electrode on the top surface and a ground
plane on the backside of chip, additional fabrication process for via interconnection is
necessary and it is costly. As an alternative to microstrip line, coplanar transmission line
has been evaluated since it does not need via holes and backside process. In this study,
CPS line was chosen instead of other coplanar transmission lines such as slot line or CPW
because it takes up much less space. The CPS line consists o f two electrodes on the top
surface, one for signal and the other for common (ground). To explore the possibility of
CPS line as a transmission line in millimeter wave applications, it is important to
investigate propagation characteristics such as attenuation coefficient [dB/cm] and line
impedance. The characteristic impedance and effective dielectric constant of CPS have
been studied using quasi-static approach [1], [2] and full-wave analysis [3], [4]. The
attenuation coefficient [dB/cm] and its dependence on line geometry were not studied.
Recently, transmission line parameters such as capacitance, inductance, and conductance
for CPS lines on multilayer dielectric substrates were studied using conformal mapping
technique [5], [6].
Study on the backside termination effect is important for the multilayer circuit
12
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
boards and packages. The backside can be either left as it is or coated with a metallic
layer that is not connected to the ground electrode o f the CPS line, as exhibited in Fig. 21.
(a)
(b)
(c)
Fig. 2-1
(d)
Cross section end views of (a) Microstrip line, (b) Coplanar waveguide (CPW),
(c) Coplanar strip (CPS) line with dielectric backside, and (d) Coplanar strip (CPS) line
with metallized backside.
Various CPS lines on PCBs were fabricated and S-parameter measurements for
frequency range from 45MFlz to 40GHz were performed to investigate attenuation
coefficients depending on backside conditions. These new results are presented in this
chapter. The theoretical values are computed high frequency structure simulator (HFSS)
[7]. Measured results are compared with calculated values and analyzed in detail.
13
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Frequency dependence o f attenuation coefficients, characteristic impedance, and field
distributions are reported. Based on the results of lines with various electrode widths and
width-to-gap ratios, design guidelines are obtained.
2.2 Experimental and Simulated Results of CPS Lines on Dielectric
Boards.
The CPS line, portrayed in Fig. 2-1, consists o f two electrodes of width Wi and W2,
respectively, fabricated on a dielectric board. In this study, symmetry CPS lines were
chosen (W] = W2). The gap between two electrodes is designated as S. The dielectric
board chosen is RT/Duroid 6010 with dielectric constant o f 10.2 and loss tangent o f
0.0023 at 10GHz. In the simulation, loss tangent o f dielectric board and copper
conductivity (5.8x 10A7 Simens/m) are independent o f frequency. The board has a
thickness o f 635pm and is laminated with 0.5 oz. copper foil (17.5pm thickness) [8].
Initial design parameters are: W] = W2 = 450pm, S = 50pm and characteristic impedance
of 50-ohm at 10GHz as calculated by HFSS. The CPS lines were fabricated using
photolithographic technique and copper etching process. Since the gap is quite small,
proper etching process is needed to keep the sidewalls o f the electrodes more vertical.
Attenuation coefficients depending on the backside termination were investigated.
In CPS lines, the electromagnetic wave propagates mostly between two electrodes as well
as nearby the electrodes. The backside of the dielectric board is not a part of the CPS line.
14
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
This feature can be considered as an advantage of CPS line. However, if the backside is
too close to the electrodes, it can affect the microwave propagation. Thus, the backside
condition is important and worth studying. Four different backside terminations are
investigated: (a) metallized backside open in air, (b) metallized backside connected to
system ground, (c) dielectric backside open in air, and (d) dielectric backside connected to
system ground. Fig. 2-2 depicts the four backside configurations investigated, where the
system ground is the metallic platform of the probe station electrically connected to the
ground of the AC power line. Among these four configurations, two configurations have
the backside o f the board sits right on the system ground. Two other configurations have
backside separated from the platform by 6mm of air space. This is large enough to
decouple the system ground from the microwave that propagates in the CPS line.
Increasing the space beyond 12mm does not make any difference in measurement results.
15
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
S ta g e (S y stem Ground)
S ta g e (System Ground)
(a)
(b)
S t a g e ( S y s t e m Ground)
S t a g e ( S y s t e m Ground)
(c)
Fig. 2-2
(d)
Measurement setup for four different backside metallization terminations:
(a) metallized backside open in air, (b) metallized backside on system ground, (c)
dielectric backside open in air, and (d) dielectric backside on system ground.
The S-parameter measurement was performed with an Agilent 8722ES vector
network analyzer [9]. The probe station is Cascade Microtech Precision station [10]. The
microwave signals were injected into the CPS line and picked up from the CPS line using
50A SG/GS 250-P signal-ground probes made by GGB Industries, Inc [11]. The probes
have their own calibration standards and calibration constant file for calibration. Full twoport technique was employed for error correction using Short-Open-Through-Matching
calibration. This full two-port error correction provides the best accuracy when measuring
16
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
two-port devices [12]. It conducts error correction due to source and load matching errors
and directivity errors. Attenuation coefficient was determined by comparing the Sparameter results o f 5cm and 1cm long CPS lines for high accuracy after calibration. The
attenuation of a transmission line is related to the S-parameter Si2 by the expression
below:
Attenuation (dB) = 10 log (1/|S12|2)
(2-1)
where S12 is the transmission coefficient Eq. (2-1) includes the reflections loss at the
interface between the probe tip and the CPS line. To remove the reflection loss from the
measurement data, transmission coefficients o f two identical CPS lines o f different length
were measured separately. The attenuation o f the 5cm line obtained using Eq. (2-1) was
subtracted by that o f the 1cm line, and divided by the difference o f the line lengths, i.e.,
4cm. The result is the true propagation loss per cm of line length. Multiple measurements
were made until the attenuation curves for each measurement are nearly identical to
ensure high repeatability.
Fig. 2-3 displays the propagation losses obtained for four CPS lines each with a
different backside termination. It is observed that the propagation losses of the four CPS
lines are about the same for frequency up to 30GHz. The average value for the four lines
is 0.8dB/cm at 30GHz, which is considered very low at such a high frequency. Beyond
30GHz, the loss o f CPS with metallized backside open to air increases more drastically
with frequency and reaches 1.8dB/cm at 40GHz. Using E1FSS, the CPS lines were
17
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
simulated and computed. In Fig. 2-4, the simulated curves are compared with measured
curves for two backside configurations, metallized backside and backside open to air,
respectively. The computed curves agree quite well with the measured ones up to 30GHz.
At 30GHz, the measured losses begin to increase above the simulated losses. Possible
causes of discrepancy between simulations and measurements are the 2-3 pm surface
roughness of circuit board and edge roughness o f the CPS electrodes, which were not
considered in the simulation. At 30GHz, the skin depth in copper is only 0.38pm [13, 14].
Thus, the conduction current density near the copper surface follows the copper surface
roughness profile, leading to possible additional scattering and radiation losses.
18
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.0
—♦— (a) m etallized backside open in air
(b) m etallized backside on system ground
no
T3'
( r> \
/% a
.
.
.
.
.
K 'a r l / c i r l f i n n o n
m
<air
(d) dielectric backside on system ground
0.0
0
5
10
15
20
25
30
I'
35
40
Frequency [GHz]
Fig. 2-3
Measured attenuation coefficients of CPS lines with four different backside
terminations, (a) metallized backside open in air, (b) metallized backside on system
ground, (c) dielectric backside open in air, and (d) dielectric backside on system ground.
Dielectric board and CPS lines: RT/Duroid 6010, permittivity = 10.2, loss tangent =
0.0023 atlOGHz, h=635pm, t=17.5pm, W = 450pm, S = 50pm.
19
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.0 n
metallized backside - m easurem ent
£ 2.5
dielectric backside - m easurem ent
m
2,
2.0
c
0
o
metallized backside - simulation
o
o
o
c
o
03
dielectric backside - simulation
5
0
zs
c
0
■4— *
<
0.0
0
10
15
20
25
30
35
40
Frequency [GHz]
Fig. 2-4 Simulated and measured attenuation coefficients o f CPS lines with metallized
backside and dielectric backside, respectively, open to air. For simulation, the loss tangent
o f 0.0023 is assumed independent of frequency. Line geometry is the same as that in Fig.
2-3.
Since the propagation loss is an important parameter o f CPS lines for future
applications and implementation on MMICs and dielectric boards, it is worthwhile to
study the causes o f propagation losses in more details. For CPS lines with given
characteristic impedance, there are many possible combinations o f line geometry, i.e., S
and W. Different line geometries lead to different values o f line losses. Thus, the line
20
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
geometry can be optimized for or traded for the line losses. To identify the causes o f line
losses, full-wave analysis was performed to compute the conduction loss and the
dielectric loss, separately. Here, the conduction loss is caused by ohmic loss o f the
conduction current inside the electrodes. Dielectric loss is due to imperfection and
inhomogeneity o f the dielectric material and related to the loss tangent of the material.
The conduction loss was extracted from the S-parameters o f the CPS line on idea
dielectric board having zero loss tangent. The dielectric loss was obtained when the line
electrodes were assumed to be perfect conductor. For this extracting method to be valid,
the electrical field distribution of the electromagnetic wave inside the dielectric material is
assumed not to vary when the electrodes are set to be perfect conductor. Likewise, the
field distribution inside the electrodes is assumed not to change when the loss tangent o f
the dielectric material is set at zero. The results obtained o f this extracting method
indicate that these two assumptions are a good approximation.
Using HFSS, the conduction loss, dielectric loss, and total loss were calculated and
the results are presented in Fig. 2-5. Only two backside terminations were simulated,
dielectric backside open in air and metallized backside in air. The other two backside
terminations, dielectric backside sitting on system ground and metallized backside sitting
on system ground, were not simulated because the system ground connected to the AC
power line ground cannot be defined in HFSS. Table 2-1 presents simulated dielectric
loss, conduction loss, and total loss o f a CPS line with dielectric backside open in air and
21
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
metallized backside open in air, respectively, at 10, 20, 30, and 40GHz. Line geometry is
the same as that described in Fig. 2-5. For the attenuation coefficient analysis, it was
assumed that radiation loss is zero since the gap between signal and ground electrodes is
small enough for guided CPS mode propagations and that power does not leak into higher
order modes over the frequency of interest. The power leakage due to higher order modes
will be discussed later. Thus, it is found that the simulated total loss is nearly equal to the
sum o f the conduction loss and dielectric loss. This implies that, for practical purposes,
separation the total loss into conduction loss and dielectric loss is a valid practical
approximation. Based on the theory o f plane wave propagation in a lossy medium, the
dielectric loss coefficient in dB/cm is proportional to frequency [13]. On the other hand,
the conduction loss coefficient in dB/cm is proportional to the square root o f the
frequency due to skin depth effect. At higher frequency, the skin depth is smaller and the
current density crowds in a thinner region near conductor surface.
22
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Dielectric backside
Metallized backside
2.0
— total lo ss
— c o n d u ctio n lo ss
total loss
conduction loss
~~ dielectric lo ss
o
dielectric loss
■S 2. 1.2
3-
o
0.4
0.4
0.2
0.0
0.2
0.0
10
15
20
25
30
35
0
40
5
10
Freq u en cy [GHz]
15
20
25
30
35
40
Frequency [GHz]
(a)
(b)
C onduction lo ss
Dielectric loss
co n d u ctio n lo ss, m etallized b a ck sid e
co n d u ctio n lo ss, dielectric b a c k s id e
0.6
0.4
E
o
c
o
cS 5 .
"£
o o
<
Q
Q
3
C
i8
o
0.2
0.0
10
15
20
25
30
35
40
dielectric loss, m etallized backside
-
dielectric loss, dielectric backside
-
10
F req u en cy [GHz]
15
20
25
30
35
40
Frequency [GHz]
(C)
Fig. 2-5
2.0
1.8
1.6
1,4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
(d)
Simulated results on losses, (a) dielectric loss, conduction loss and total
loss of a CPS line with dielectric backside open in air, (b) losses of a CPS with metallized
backside open in air, (c) conduction loss comparison between metallized backside and
dielectric backside, (d) dielectric loss comparison between metallized backside and
dielectric backside. Dielectric board and CPS lines: permittivity = 10.2, loss tangent =
0.0023 independent of frequency, h=635pm, t =17.5pm, W = 450pm, S = 50pm.
Backside metal is copper.
23
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
TABLE 2-1
Simulated dielectric loss, conduction loss, and total loss o f a CPS line with
dielectric backside open in air and metallized backside open in air, respectively, at 10, 20,
30, and 40GHz. Line geometry is the same as that described in Fig. 2-2.
Metallized backside
open in air
10GHz
20GHz
30GHz
40GHz
Dielectric loss [dB/cm]
0.09
0.21
0.56
0.86
Conduction loss [dB/cm]
0.26
0.40
0.60
0.97
Total loss [dB/cm]
0.33
0.63
1.19
1.88
10GHz
20GHz
30GHz
40GHz
Dielectric loss [dB/cm]
0.10
0.19
0.31
0.45
Conduction loss [dB/cm]
0.27
0.34
0.44
0.63
Total loss [dB/cm]
0.39
0.51
0.78
1.06
Dielectric backside
open in air
For the CPS line with dielectric backside, both dielectric and conduction loss
coefficients increase with frequency at the expected rate over the frequency range studied,
shown in Fig. 2-5 (a). Meanwhile, loss coefficients for CPS line with metallized do not
increase with frequency as expected like the case o f CPS line with dielectric backside in
Fig. 2-5 (b). Metallized backside has advantages in mechanical strength and heat sinking
ability. It may also cause problems. It can support higher order modes such as surface
wave or parallel plate modes. It also can provide a coupling path to neighboring lines.
Thus, it is worthwhile to investigate higher order modes. Dispersion characteristics o f
24
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
higher order modes in CPS lines were investigated using spectral-domain method [15]
and finite-difference time domain technique [16]. For the CPS line with metallized
backside, higher order modes can be analyzed using a simplified structure where the gap
of the two CPS electrodes is filled with metal layer. The critical frequency o f higher order
m odes,/c (h) is given by [17],
(h) =
.------L— =
- 1)
(2-2)
h P / - ‘o£ o ( £ r
where p0 and e0 are permeability and permittivity in free space, respectively, h and sr are
the thickness and the dielectric constant, respectively.
At and above the critical frequency, fundamental modes become leaky as a result o f
radiating to higher order modes. With our CPS geometry shown in Fig. 2-3, the calculated
critical frequency is llOGFlz. This is much higher than the highest frequency o f in this
study, 40GHz. Thus, the sharp attenuation increase in Fig. 2-3 for the CPS line with
metallized backside at high frequency is not caused by higher order mode generation.
When the CPS line has metallized backside that is electrically floating, the fields
terminating there comprise a parasitic microstrip-like line. The CPS structure with
metallized backside thus supports two fundamental modes, the CPS mode and the
parasitic microstrip mode. The propagation behavior o f two fundamental modes depends
on frequency and CPS structure, in particular, backside conditions. The microstrip mode
becomes significant when the board is thin and electrodes and gap are wide [14]. The
effective permittivity o f CPS line with metallized backside is larger than that of CPS line
25
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
with dielectric backside. Fig. 2-6 exhibits the magnitude of electric field distributions on
the top surface o f dielectric board for the CPS lines with dielectric backside and
metallized backside, respectively. The wavelength (kB) at 10GHz and 30GHz was
respectively calculated for the analysis o f attenuation coefficient. At 10GHz, the
wavelengths for the CPS lines with dielectric backside and metallized backside are
13.56mm and 13.27mm, respectively. The wavelength decreases by 2.1% when the
backside is metallized. At 30GHz, the wavelength decreases from 4.40mm to 4.26mm, i.e.
by 3.2%, as the backside is metallized. This interprets effective permittivity increase,
from 5.17 to 5.51 at 30GHz, when CPS line has metallized backside.
26
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
E[v/m]
! 3.0e+05
! I 2 c -05
; 5.0e+04
2.0c+04
!.5e+03
| 3.5e+03
1.4e+03
i 5.9e+02
I 2.4e+02
1.0e+02 ’■
TX: “
'
- ‘ a: -
(a)
(b)
-I f f -
" n lr
'^ / • r r r
—
f-~
r 'g‘~ f ---------- * --------------------- - V ? -1
-y%.-rr
(C)
a n
•=^*rs
(d)
Fig. 2-6
Magnitudes o f the electric field distribution on CPS lines with (a) dielectric
backside at 10GHz, (b) metallized backside at 10GHz, (c) dielectric backside at 30GHz,
and (d) metallized backside at 30GHz. The dot lines are for the cross sectional view o f
electric field distributions in Fig. 2-7. Dielectric thickness is 635pm. CPS line has
electrode width o f 450|im and gap size is 50pm. and electrode thickness, 17.5pm.
27
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
To further understand the propagation of two fundamental modes, the electrical
fields of the electromagnetic wave were calculated using HFSS including all possible
higher order modes. Fig. 2-7 exhibits the electric field distributions on a transverse plane
where the electrical field is a maximum in the longitudinal direction. The field
distribution inside dielectric board for the case of dielectric backside is quite different
from the case of metallized backside. Since backside metal is not connected to the ground
electrode of the CPS line, it is not a part o f the transmission line. However, it forms
parasitic microstrips with the CPS electrodes. The microstrip mode is shown in Fig. 2-7
(b) and (d). At higher frequency, electrical field distribution stretches further to the
backside metal. The microstrip mode is more significant at 30GHz in Fig. 2-7 (d). The
backside metal terminates electric field lines and thus increases the portion o f
electromagnetic energy that propagates within the dielectric board. As a result, the
dielectric loss increases comparing to the case of dielectric backside. Since the backside
metal shorts the tangential component of the electrical field and makes the electrical field
perpendicular to the backside metal, it incurs additional conduction loss also.
28
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. 2-7
Electric filed distributions with different backside terminations (a) dielectric
backside at 10GHz, (b) metallized backside at 10GHz, (c) dielectric backside at 30GHz,
and (d) metallized backside at 30GHz.
The portion o f conduction loss due to CPS electrodes and backside metal were
calculated for the detail analysis. It is seen that at 10GHz, 95% of the conduction loss
occurs on the two strip electrodes. At 30GHz, only 68% of the conduction loss incurs on
the two strip electrodes. The other 32% incurs on the backside metal. This is another
29
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
observation showing that the microstrip mode becomes more significant and induces
more additional loss at higher frequency, in particular, at frequency beyond 20GHz.
2.3 Design Guideline
So far, CPS lines with 450pm electrode width 50pm gap were studied. Attenuation
coefficients for four different backside terminations are presented in Fig. 2-3. In order to
gain design guidelines, many CPS lines that have different electrode widths and gaps
were fabricated and measured. To make sure that the line impedance is in reasonable
range, the characteristic impedance of CPS lines 10GHz versus gap size was calculated
and is plotted in Fig. 2-8. Electrode width varies from 450pm to 1250pm on RT/Duroid
6010 with the dielectric thickness of 635 pm. Table 2-2 shows measured attenuation
coefficients [dB/cm] o f CPS lines with four different backside conditions. Electrode gaps
are 50pm, 70pm, and 100pm. The CPS lines with 450pm electrode width and three
different gaps were first fabricated and measured. Four backside conditions were
evaluated. The attenuation coefficients [dB/cm] measured at 10, 20, 30, and 40GHz are
listed in Table 2-2.
30
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
90
80
70
60
E■50
JZ
O •40
— 450|jm
♦—650|jm
— 850|jm
•— 1250pm
30
20
10
0
0
Fig. 2-8
50
100
150
S [pm]
200
250
300
Calculated characteristic impedance o f the CPS lines with different
geometries at 10GHz. Dielectric board is RT/Duroid 6010 with permittivity = 10.2, and
dielectric thickness is 635pm, and electrode thickness 17.5pm. electrode width varies
from 450pm to 1250pm. S denotes gap size between electrodes.
31
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
TABLE 2-2
Measured attenuation coefficients [dB/cm] o f CPS lines with four
different backside conditions at 10, 20, 30, and 40GHz, and with electrode gaps o f 50pm,
70pm, and 100pm, respectively. Electrode width is 450pm, dielectric thickness is 635pm,
and electrode thickness 17.5pm.
Metallized
Metallized
Dielectric
Dielectric
backside
backside on
backside
backside on
system
open
in air
system
ground
open in air
ground
10GHz
50pm
0.55
0.60
0.40
0.50
70pm
0.50
0.52
0.32
0.45
100pm
0.40
0.50
0.32
0.40
50pm
0.60
0.70
0.70
0.70
70pm
0.55
0.58
0.60
0.55
100pm
0.50
0.56
0.60
0.50
50pm
0.85
1.10
0.90
0.85
70pm
0.80
0.90
0.78
0.80
100 pm
0.80
0.82
0.76
0.80
50pm
1.90
1.95
1.20
1.30
70pm
1.50
1.58
1.00
1.10
100pm
1.50
1.58
1.00
1.05
20GHz
30GHz
40GHz
32
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
It is seen that as the gap increases, the attenuation coefficient decreases. At 20GHz,
attenuation coefficients for gaps o f 50pm and 100pm are 0.7dB/cm and 0.6dB/cm,
respectively, for CPS lines with dielectric backside open in air. For smaller electrode gap,
conduction loss increases due to higher current density within a skin depth, especially
inner edges between electrodes. A CPS line with metallized backside has higher
attenuation coefficient than that with dielectric backside. A new plot was made in Fig. 2-9
to see the trends more clearly. The attenuation coefficient is the average value o f CPS
lines with electrode gaps o f 50 pm, 70 pm, and 100 pm, respectively, in Table 2-2. The
average level o f attenuation coefficient with dielectric backside on system ground is
1.15dB/cmat40GHz.
33
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.0 n
■1250/100|jm
E
o
2.5
■850/70|jm
650/60|jm
CQ
2, 2.0
c
g
o
ifc
(U
oo
■4—*
450/50|jm
c
o
<o
3
-*—1
C
(1)
33
< 0.5
0.0
T
0
Fig. 2-9
Measured
10
T
15
20
25
Frequency [GHz]
attenuation
coefficients
T
T
'I
30
35
40
[dB/cm]
versus
frequency.
The
attenuation coefficient is the average value of CPS lines with electrode gaps o f 50pm,
70pm, and 100pm, respectively.
Four different electrode widths, 450, 650, 850, and 1250pm o f CPS lines with
dielectric backside open in air were then fabricated. These cases would provide a design
guideline o f minimum achievable attenuation coefficient with given line geometry. For
each electrode width, the gap is chosen to achieve 50-ohm characteristic impedance.
Here, it is worthwhile to point out that, if microstrip lines were fabricated, there would be
only one possible electrode width for 50-ohm line impedance. Fig. 2-10 exhibits the
measured attenuation coefficients versus frequency. Overall, the line with 450pm
34
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
electrode width and 50pm gap has the lowest the attenuation coefficient. However at
40GHz, CPS line with 650pm electrode width and 60pm gap provide lowest attenuation
coefficient. Smaller electrode width and gap are possible if the gap can be nicely etched
on the copper clad board to produce nearly vertical sidewalls.
3.0
■♦—1250/100pm
2.5
— 850/70pm
co
T3,
2.0
c
650/60pm
E
.o
—450/50pm
o
it=
CD
o
o
c
'■o+—
*
ro
3
C
s
<
0.5
0.0
T
0
10
15
20
25
r
30
T
1
35
40
Frequency [GHz]
Fig. 2-10
Measured attenuation coefficients of CPS lines with electrode width/gap o f
450/50, 650/60, 850/70, and 1250/100pm. CPS lines have dielectric backside and 50-ohm
impedance. Dielectric board is RT/Duroid 6010 with permittivity o f 10.2 and loss tangent
o f 0.0023, dielectric thickness is 635pm, and electrode thickness 17.5pm.
35
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2.4 Summary
The results of this study on coplanar strip (CPS) lines on PCBs are reported. Four
different backside conditions were investigated. Attenuation analysis was performed in
terms o f dielectric loss and conductor loss.
Simulation and measurement was performed to analyze CPS line in terms of attenuation
coefficient and line impedance. The measured attenuation of CPS lines built on
RT/Duroid is as low as 0.8dB/cm at 30GHz for all four backside conditions. Electric field
distributions on the top surface of the board and on the transverse cross section were
computed and displayed to investigate how the fields are affected when the backside is
metallized. With the overall results in this study, CPS line can be a promising
transmission line for implementation on the board level and for future monolithic
microwave
and
millimeter wave
integrated
circuits
(MMICs).
On
chip
level
implementation, the gap can be made much smaller, several pm. The electrode width
would also scale down accordingly.
36
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
References Chapter 2
[1]
V. F. Hanna, “Finite boundary corrections to coplanar stripline analysis,” IEE
Electron Lett., 16, pp.604-606, 1980.
[2]
G. Ghione and C. Nalidi, “Analytical formulas for coplanar lines in hybrid and
monolithic M IC’s,” IEE Electron Lett., 20, pp.179-181, 1984.
[3]
J. B. Knorr and K. Kuchler, “Analysis of coupled slots and coplanar strips on
dielectric substrate,” IEEE Trans Microwave Theory Tech., 23, pp.541-548, Jul.
1975.
[4]
S. G. Pintzos, “Full-wave spectral-domain analysis o f coplanar strips,” IEEE Trans
Microwave Theory Tech., 39, pp.239 - 246, Feb. 1991.
[5]
S. Gevorgian, H. Berg, H. Jacobsson, and T. Lewin, “basic parameters o f
coplanar-strip waveguides on multilayer dielectric/semiconductor substrates, Part
1: high permittivity superstates,” IEEE Microwave Mag., 4, pp.60-70, Jun. 2003.
[6]
S. Gevorgian, H. Berg, H. Jacobsson, and T. Lewin, “Basic parameters o f
coplanar-strip waveguides on multilayer dielectric/semiconductor substrates. Part
2: Low permittivity superstates,” IEEE Microwave Mag ., 4, pp.59-78, Sep. 2003.
[7]
HFSS (high frequency structure simulator), version 9, Ansoft Corporation,
Pittsburgh, PA.
[8]
Rogers Corporation, Rogers, CT, http://www.rogerscorporation.com.
[9]
Agilent Technologies, Palo Alto, C A , http://www.agilent.com.
37
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
[10]
Cascade Microtech, Beaverton, OR, http://www.cascademicrotech.com.
[11]
GGB Industries, Inc, Naples, FL, http://www.ggb.com.
[12]
User’s guide o f Agilent Technologies 8722ES network analyzer: calibrating for
increased measurement accuracy, http://www.agilent.com.
[13]
S. Ramo, J. R. Whinnery and T. V. Duzer, Fields and waves in communication
electronics, 3rd edition, Wiley, New York, 1994.
[14]
K. C. Gupta, R. Garg, I. Bahi, and P. Bhartia,
Microstrip lines and slotlines, 2nd
edition, Artech House, Boston, 1996.
[15]
M. Tsuji, H. Shigesawa, and A. A. Oliner, “Simultaneous propagation o f both
bound and leaky dominant modes on conductor-backed coplanar strips,” IEEE Int.,
Microwave Symposium Dig., 3, San Diego, CA, pp.1295-1298, Jun. 1993.
[16]
K. Goverdhanam, R. N. Simons, and L. P. B Katehi, “Coplanar stripline
propagation characteristics and bandpass filter,” IEEE Microwave Guided Wave
Lett., 7, pp. 214-216, Aug. 1997.
[17]
W. Heinrich, F. Schnieder, and T. Tischler, “Dispersion and radiation characteristics
of conductor-backed CPW with finite ground width,” IEEE Int., Microwave
Symposium Dig., 3, pp. 1663-1666, Jun. 2000.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CHAPTER 3
Flip-Chip Design using Coplanar Strip Lines
3.1 Introduction
Traditionally, wire bonding has been used in monolithic microwave integrated
circuit (MMIC) packaging. With this technique, the operation frequency is limited to a
few GHz because o f the inductance of bonding wires and package leads. To overcome
this difficulty, flip-chip interconnect method has emerged as a leading technology for
silicon integrated circuits. In flip-chip configurations, solder bumps are used as
interconnects to greatly reduce the parasitic inductance. With this technology, a large
number of joints can be made in one bonding process, the pitch in an array of joints can
be very small, and self fine alignment o f the chip is possible because of the surface
tension of molten solder.
In MMICs, microstrip line has been used as the transmission as exhibited in Fig. 21 (a). The use o f microstrip lines requires through-chip via holes to provide ground pads
on the top surface o f the chip. Inserting shunt components on the top surface is difficult
because ground pads are not easily assessable to the shunt components. As an alternative,
the coplanar waveguide (CPW), also shown in Fig. 2-1 (b), had been employed in some
devices for some time. The most noticeable success is probably LiN b03 electrooptic
39
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
modulators for fiber optic communications [1]. Recently, it has also been used to
implement flip-chip configurations [2],
The development o f microwave and millimeter-wave systems demands for new
chip packaging solutions. The flip-chip technique is one o f the most attractive
technologies for cost-effective packaging promising excellent performance of microwave
chip modules [2]-[6].
To the best o f our knowledge, no research works have been reported for flip-chip
packaging using CPS lines. Because CPS line has several possible advantages [7]-[9], the
use o f CPS lines was explored for flip-chip implementation. The CPS line is depicted in
Fig. 2-1. The CPS line needs only one ground electrode while CPW uses two ground
electrodes that are very wide. The ground electrode o f the CPS line can have the same
width as the signal electrode. Therefore, the CPS line would take much less space and
thus is more efficient in the use o f space on MMICs and PCBs. Additionally, CPS line is
a balanced line, i.e., the currents in the two electrodes are equal and opposite. With these
advantages, CPS line has been used in balanced circuits such as mixers, modulators, and
feeding network for printed antennas. It is less sensitive to substrate thickness and easy to
connect shunt elements. It does not require via holes and backside processing.
In this chapter, flip-chip configuration on the chip and on the PCB was successfully
designed and implemented using CPS lines as the transmission line.
40
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.2 Flip-Chip Configuration and Design
Fig. 3-1 depicts a conventional interconnect method with wire bonding using
microstrip line. For microstrip lines built on a dielectric substrate o f given thickness, the
width of signal electrode is determined by the line impedance required. For CPS lines,
both the signal and ground electrodes lie on the top surface of the substrate.
Therefore, the line impedance is less dependent on the substrate thickness so that the
substrate thickness does not have to be lapped down to achieve manageable electrode
width for 50-ohm impedance as in the case o f MS lines. Expensive lapping and via hole
processes can be eliminated. For a given line impedance, the electrode width can still be
varied so far as the gap between two electrodes is also varied in the proper ratio. Thus, the
CPS line provides one more degree of freedom in line geometry. Since both signal and
ground electrodes are on the top surface, the backside o f the substrate is not a part o f the
transmission line anymore. The backside is thus relieved o f signal transmission function
and can be kept for other usage.
41
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
onding Wire
RF (.’hip
50 ohm
Line
.Metal Via
Solder
Ceramic
M etal V ia
Dielectric Board
...............
'•
..
-8
m
m
m
m
m
■;
■H
m
H
•
Isl
1/
m
m
Ground
Fig. 3-1
Conventional interconnect method with wire bonding using microstrip line
In the new flip-chip configuration studied, CPS lines on the IC chip and on the PCB
are connected by solder bumps, as illustrated in Fig. 3-2. On the circuit board and
microwave device chip, CPS lines are used as the transmission line to transmit microwave
signals. The chip is flipped with active surface facing down towards the board. The
components o f the MMIC chip are fabricated on the active surface o f the chip. Thus, the
CPS lines on the chip and on the board can be connected easily using solder bumps. In
microwave designs and assemblies, a challenge is to reduce the reflection o f microwave
signals at the solder bumps.
42
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. 3-2
A new flip-chip interconnect configuration with coplanar strip (CPS) lines.
Solder bumps must be modeled and designed as an integral part o f the transmission
line so that the microwave signal sees a continuation o f line from the board to the chip
back to the board at the other end. Besides signal transmission purpose, some solder
bumps can be used for other interconnect purposes such as DC voltage supplies and
control signals. Additional solder bumps can also be added for heat conduction and
mechanical support if needed. The solder joints for microwave transmission are designed
and analyzed as a short transmission line section. Fig. 3-3 depicts the flip-chip solder
interconnect with geometrical design parameters.
43
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
fr­
it.
D ie le c tr ic board
i§
(a)
(b)
S older ball
w
o
!•
•T-,
IS •1
O
•
S o lde r m ask
(C )
Fig. 3-3
(a) Geometrical design parameters of CPS flip-chip interconnect, (b) CPS
line on chip side, (c) CPS lines and solder balls on the board. CPS lines have electrode
width of 850pm, gap o f 60pm and electrode thickness o f 17pm. The thicknesses o f board
and chip are 535pm and 385pm, respectively. The board is TMM10 [6] with permittivity
o f 9.2, loss tangent of 0.0022, and 0.5 oz. copper cladding. Pitch distance, d, between
solder balls is 790pm. Conductor-overlap length (C0) is 380pm. Dielectric-overlap length
(D0) is 100pm.
44
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The solder interconnect is also modeled as an equivalent circuit exhibited in Fig. 34 [10]. The values of six elements in the circuit are first extracted from the Y-parameters,
which are converted from the de-embedded S-parameters obtained from full-wave
analysis using FIFSS (high frequency structure simulator) [11]. The S-parameters o f the
resulting circuit are calculated using ADS (advanced design system) [12] and compared
with that obtained from full-wave analysis. The final equivalent circuit values are
obtained using the optimization algorithm of ADS.
Equivalent circuit model of solder bump interconnect.
In the circuit model, C] and C 2 are shunt capacitors mainly due to bump pad area
between electrodes on the dielectric board and chip, respectively. The conductors, Gb, Gi
and G2, represent losses due to radiation loss, conducting loss and dielectric loss o f the
interconnect. The inductor, Lb, is associated with parameters such as bump geometry,
pitch between bumps (d), and bump height (Bh). The characteristic impedance o f the
equivalent circuit representing the transmission line is given b y Z = ^Lh/(C, +C 2). This
45
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
impedance provides an idea of how well it matches to the impedance of the CPS lines.
However, matching to this circuit characteristic impedance alone does not guarantee low
reflection because reflection can be also caused by geometrical mismatch o f field
distributions. When the electric and magnetic field distribution are not matched on the
interface of two different lines, reflection can occur even if these two lines have the same
characteristic impedance. Thus, matching to the 50-ohm characteristic impedance o f the
CPS lines does not always guarantee optimal signal transmission through the flip-chip
interconnect.
After matching equivalent circuit impedance to characteristic impedance o f CPS
line, geometrical parameters were adjusted to further reduce reflection with the help o f
full-wave electromagnetic simulations. It was found that the pitch distance, d, between
bumps is the most important parameter. Smaller pitch distance provides excellent match
but only in low frequency range. Larger pitch distance provides wideband match but with
relatively higher signal reflection. Thus, it is necessary to optimize the pitch distance in
order to increase the bandwidth of flip-chip interconnect with adequate return loss. Other
geometrical parameters in Fig. 3-3(a) were used again for final optimization with practical
design consideration. Optimized geometrical parameters in single flip-chip interconnect
were verified with S-parameters of flip-chip packaging from full-wave simulation and
measurement.
Fig. 3-5 shows the optical picture and X-ray image o f the CPS flip-chip package.
46
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. 3-6 presents return loss (Sn) and insertion loss (S2i) o f an optimal CPS flip-chip
design using TMM10 board (permittivity 9.2, loss tangent 0.0022, cladding 0.5 oz
copper) [13]. The geometrical design parameters are presented in Fig. 3-3. The chip size
is 4x4mm and the CPS line length is 2.3mm on dielectric board. The total length o f CPS
lines on the chip and board is 7.9mm. The board is 535pm thick and the thickness o f chip
is 385pm. The electrode width and the gap between electrodes are 850pm and 60pm,
respectively. Calculated characteristic impedance is 49.7ohm by full-wave simulator.
Pitch distance (d) between solder balls is 790pm. Conductor-overlap length (C0) and
dielectric-overlap length (D0) are 380pm and 100pm, respectively.
47
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. 3-5
(a) Optical picture and (b) X-ray image the flip-chip assembly.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-1 0
CD
-
-20
"O
■Me asur ement
w -30
- - - - Simulation
-40
-50
10
20
30
40
Fre quency [GHz]
(a)
-10
-20
co
TD
— Measurement
- - Simulation
-40
-50
0
10
30
20
Frequency
40
[GHz]
(b)
Fig. 3-6
(a) Insertion loss (S2i) and (b) Return loss (Si,) of a typical flip-chip assembly.
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.3 Flip-Chip Implementation and Measurement Results
Solder maskes in Fig. 3-3 (c) were coated on the board and delineated to define the
contact pads for solder bumps during solder reflow process. The CPS lines on the chip are
connected to the CPS lines on the board by solder bumps. 63Sn/37Pb solder balls with a
diameter of 300pm were used. The reflow process is performed in a Metcal QX2
convection rework system [14]. The resulting bump height is around 250pm after solder
reflow process.
The flip-chip assemblies are measured in frequency range up to 40GHz using
Agilent 8722ES network analyzer [15]. The probe station is Cascade Microtech Precision
station [16]. The microwave signals are injected into the CPS line and picked up from the
CPS line using 50A SG/GS 250-P signal-ground probes made by GGB Industry, Inc [17].
Full two-port technique is conducted for error correction due to source and load matching
errors and directivity error using Short-Open-Through-Matching calibration [18]. In the
measurements, the microwave signal propagates from one end o f CPS line on the board,
through the solder interconnect, the CPS line on the chip, the other solder interconnect,
and to the other end o f CPS line on the board. The measured S-parameters of a typical
assembly are presented in Fig. 3-6. The measured insertion loss o f the assembly is less
than 3dB for frequencies up to 3 5GHz. Return loss is higher than 15dB for frequencies up
to 29GHz. The measured insertion loss agrees quite well with the measured curve over
the entire frequency range. The measured reflection coefficient does not agree well with
50
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
simulated curve at frequency below 10GHz. This is probably caused by misalignment o f
solder bumps on the contact pads during reflow process.
3.4 Summary
A new flip-chip configuration using CPS lines is proposed and studied for
millimeter wave applications. The CPS flip-chip interconnect was designed and optimized
for frequencies up to 40GHz. The measured insertion loss is as low as 3dB for frequencies
up to 35GHz and the return loss is higher than 15dB for frequencies close to 30GHz.
These high performance results make this flip-chip interconnect configuration an
attractive and practical interconnect alternative for millimeter wave applications.
51
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
References Chapter 3
[1]
W. K. Bums, M. M. Howerton, R. P. Moeller, R. Krathenbuhl, R. W. McElhanon,
and A. S. Greenblatt, “Low drive voltage, broad-band LiNbC>3 modulators with and
without etched ridges,” IEEE J. Lightwave technology, vol. 17, pp. 2551-2555,
Dec. 1999.
[2]
W. Heinrich, W. A. Jentzsch, and H. Richter, “Flip-chip interconnects for
frequencies up to W-band,” IEEE Electronics Lett., vol. 37, pp. 180-181, Feb.
2001 .
[3]
D.Staiculescu, J.Laskar, E.Tentzeris, “Design rule development for microwave
flip-chip applications,” IEEE Trans. Microw. Theory and Tech., 48, pp. 1476 1481, Sep. 2000.
[4]
A. Jentzsch, W.Heinrich, “Theory and measurements o f flip-chip interconnects for
frequencies up to 100 GHz,” IEEE Trans. Microw. Theory and Tech., 49, pp. 871 878, May 2001.
[5]
T. Hirose, Hirose, K. Makiyama, K. Ono, T. M. Shimura, S. Aoki, Y. Ohashi, S.
Yokokawa, Y. Watanabe, “A flip-chip MMIC design with coplanar waveguide
transmission line in the W-band,” IEEE Trans. Microw. Theory and Tech., 46, pp.
2276-2282, Dec. 1998.
[6]
R. Sturdivant, C. Quan, and J. Wooldridge, “Investigation of MMIC flip-chips
with sealants for improved reliability without hermeticity,” IEEE MTT-S Int.
52
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Microwave Symp. Dig., 1, pp. 239-242, 1996.
[7]
S. B. Cohn, “Slot Line on a Dielectric Substrate,” IEEE Trans. Microw. Theory
and Tech., vol. 17, pp. 768-778, Oct. 1969.
[8]
J. B. Knorr and K. Kuchler, “Analysis of coupled slots and coplanar strips on
dielectric substrate,” IEEE Trans. Microw. Theory and Tech., vol. 23, pp. 541-548,
July 1975.
[9]
W. K. C. Gupta, R. Garg, I. Bahi, and P. Bhartia,
Microstrip lines and slotlines,
2nd edition, Boston, Artech House, 1996.
[10]
D. M. Pozar, Microwave Engineering, New York, John Wiley and Sons, 1998.
[11]
HFSS (high frequency structure simulator), version 9, Ansoft Corporation,
Pittsburgh, PA,
[12]
Agilent Technologies, http://www.agilent.com, Palo Alto, CA.
[13]
Rogers Corporation, Rogers, CT, http://www.rogerscorporation.com
[14]
Metcal Precision Systems, http://metcal.okinternational.com.
[15]
Agilent Technologies, Palo Alto, CA, http://www.agilent.com,
[16]
Cascade Microtech, Beaverton, OR, http://www.cascademicrotech.com.
[17]
GGB Industries, Inc, Naples, FL, http://www.ggb.com,.
[18]
User’s guide o f Agilent Technologies 8722ES network analyzer: calibrating for
increased measurement accuracy, http://www.agilent.com.
53
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CHAPTER 4
Compact Bandpass Filters in Coplanar Strip Lines
4.1
Introduction
At present, the microstrip line is still the dominating transmission line on MMIC
chips and on PCBs in production. In the filter design using microstrip lines built on the
dielectric substrate of given thickness, the width of signal electrode is fixed to achieve 50ohm characteristic impedance. Thus it has difficulty for compact filter design. Generally,
quarter-wavelength stubs have been used for microstrip line filter design so that filter size
is determined by the number o f quarter-wavelength sections. Fig. 4-1 depicts a typical
wireless receiver block diagram. Wireless communication systems tend to use
miniaturized RF components to satisfy low-cost and compact size. Sometimes, passive
filter has critical requirements to reduce the cost and size o f mobile system. In that case,
planar filters would be preferred because they are compatible with low-cost printed circuit
technology instead o f using microstrip line filter or external passive filter.
Recently, the coplanar transmission line has been evaluated and considered as an
alternative to microstrip line for certain specific applications because o f several possible
advantages [l]-[9]. It is less sensitive to substrate thickness and easy to connect shunt
elements. It does not require via holes and backside processing. Bandpass filters using
coplanar waveguide (CPW) have been reported [2]-[4]. Wires are used to connect two
54
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
ground electrodes in CPW in order to suppress parasitic modes. But wire bonding is not a
favorable process in production.
□Wanted signal
BSF
; LNA
Mixer i
CSF
j VGA:
S l a g l e c hi p
Fig. 4-1
M In-band interference
HOut-band interference
A typical wireless receiver block diagram.
The CPS has all the advantages of CPW. In addition, CPS makes more efficient use
o f the wafer area than CPW [5]-[9]. Furthermore, with the advantage o f balanced
transmission line like slotline, CPS line has been used in balanced circuits such as mixers,
modulators, and feeding network for printed antennas. CPS line bandpass filters were
implemented using resonator stubs [5]-[7], Resonators were realized with open- and
short-ended strips with quarter-wavelength stubs. Since these filters were designed using
X.g/2 or Xg/4 sections, the filter length is at least one wavelength. Fundamentally, it is
impossible to build filters smaller than one wavelength. Thus, this type of filters with a
center frequency lower than 1 GHz will be very large.
For compact filter design, lowpass filters using lumped-elements with CPS lines at
input and output were studied and fabricated on 635pm thick alumina substrate [8]-[9].
55
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The lumped-elements consist o f spiral inductors and many interdigital capacitors [8]. The
fabrication is not straightforward because wire bonding process is required for
interconnection among lumped-elements. In addition, tapering structures may be needed
for impedance matching between lumped-elements and transmission line. Lowpass filters
were designed using CPS line discontinuities [9] where series inductors and parallel
capacitors were realized using transverse slit and parallel-coupled gap. Thus, it is difficult
to implement filter in more compact size. Filter dimension is as large as 50mm2 for a
cutoff frequency o f 5GHz.
To make the filter very small, a novel compact bandpass filter design in CPS lines
was developed using lumped-elements on PCBs for microwave applications. CPS line
rather than CPW is chosen to contain the filter because CPS takes up much less space
comparing to CPW. The CPS line consists of two electrodes on the top surface o f the
substrate, the signal electrode (Ws) and the ground electrode (WG). The substrate backside
is not a part o f the transmission line and thus is free for other uses. For a given line
impedance, the electrode width can still be varied so far as the gap between two
electrodes is also adjusted in the proper ratio. Therefore, the CPS line provides one more
degree of freedom in line geometry. The recent study of CPS line has shown that CPS
lines with attenuation coefficient as low as ldB/cm at 40GHz can be achieved [10].
The fundamental design concept for the bandpass filters is to create an electrode
topology that would provide the filter response. The electrode pattern on the signal
56
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
electrode forms series resonant circuits and the pattern between the signal and ground
electrode produces parallel resonant elements. These filter electrodes maintain impedance
matching with the input and outgoing CPS lines. To demonstrate this new concept,
bandpass filters were designed and implemented on PCBs, one for the 2.4GHz ISM band
and the other for 5.15-5.85GHz UNII band. The size for UNII 5.15-5.85GHz bandpass
filter is only 2.2x3.6mm, i.e., 7.92mm2. This is only 16% o f the filters presented in [8]
and [9] at about the same center frequency. This new filter is very simple in structure. No
bonding wires, vias, tapering structures, or quarter-wavelength sections are needed. The
filter size scales with frequency increase. Scaling characteristic of the filter electrode is
identified and studied. This information is useful for filter designs at different center
frequencies and for fine tuning procedure. A new concept o f hybrid topology that
emulates a resonant circuit was presented. The hybrid topology in CPS line was analyzed
in details using equivalent circuit model. The hybrid topology enables bandpass filter to
be compact.
4.2
Analysis of Basic Electrode Topologies in CPS Lines
Since the bandpass filter in CPS lines is relatively new, it is necessary to identify
and analyze the electrode patterns that emulate lumped-circuit elements. In this section,
the electrode patterns that emulate inductors and capacitors in series and parallel were
presented. The electrode pattern is characterized by means o f de-embedding procedure
57
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
using SOC (short-open calibration) technique with Ansoft Designer [11]. The short-open
calibration is often used to remove the effect o f the CPS lines that connect to input and
output ports o f the two-port microwave circuit for S-parameter analysis [12], [13]. The
geometry of two calibration standards in CPS line, open section and short section, are
depicted in Fig. 4-2 (a) and (b), respectively. The basic filter section is analyzed in terms
o f lumped-circuit elements with Y parameters which are converted from de-embedded Sparameters obtained using full-wave analysis.
The full-wave simulation is performed using HFSS (high frequency structure simulator)
[14]. Fig. 4-2 (c) exhibits an example of a filter section that emulates a series inductor
with dimensions given in the caption. Its equivalent circuit will be presented in next
section.
58
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
: Filter Section
:
(c)
Fig. 4-2
Sections used in the de-embedding procedure, (a) a open section between
input and output CPS lines, (b) a short section between input and output CPS lines, (c) a
basic filter section emulating a series inductor, where, L=4mm, WG==2mm, Ws=2mm,
S= 102pm, and D=707pm.
After de-embedding, the S-parameters of the filter section between two reference planes
shown in Fig. 4-3 (a) are obtained. The Y-parameters were extracted from de-embedded
S-parameters, which are described by relationships below [15],
Y „ = ((1-Sn )*(l+S22) +S12*S21) / Z0*D
(4-1)
Y 12 = -2*S12/ Z 0* D
(4-2)
Y2i = -2*S21/ Z 0*D
(4-3)
59
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Y22 = ((1+S„)*(1-S22) +S12*S21) / Zo* D
(4-4)
where
D = ((1+S„)*(1+S22)-S12*S21)
(4-5)
and Z0 is characteristic impedance of the CPS line, taken as 50-ohm
The equivalent circuit representation for the filter section between two reference
planes is exhibited in Fig. 4-3 (b). A general equivalent circuit is chosen to characterize
the filter section. This circuit has six elements as indicated in Fig. 4-3 (c). The values o f
these lumped-elements are calculated from the Y-parameters using the following
equations [15].
Rs= - Real (1/Y12)
(4-6)
Ls= - Imaginary (1/Y12) / oo
(4-7)
GP1= R e a l(Y 12+Yu )
(4-8)
Cpi= Imaginary (Y12+Y n) / co
(4-9)
GP2= Real (Y22+Y21)
(4-10)
CP2= Imaginary (Y22+Y21) loo
(4-11)
RT/Duroid6010 [16] is used as dielectric board for simulation and circuit board
fabrication. It has a permittivity of 10.2, loss tangent o f 0.0023 at 10GHz, thickness o f
635pm, and is laminated with 0.25 oz. copper foil. For simulation purpose, it was
assumed that loss tangent o f dielectric board and conductivity o f copper (5.8><10A7
Simens/m) are independent o f frequency.
60
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CPS Line_
CPS Line
Port 1
Two-Port
Filter Section
T fT" Port 2
H
(a)
(b)
(c)
Fig. 4-3
(a) A general filter section inserted in CPS line (b) an equivalent circuit
representation (c) a general equivalent circuit of the series inductance section shown in
Fig. 4-2 (c).
Fig. 4-4 shows the resulting lumped-element values versus frequency before and
after the de-embedding procedure, respectively. Since the filter section is symmetrical, the
61
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
both o f the capacitors and conductors are the same, i.e., Cpi=CP2 and GPi=Gp2. The filter
length, L=4mm, is much shorter than the wavelength within the frequency range o f
interest. The calculated wavelength is 52.8mm at 2.4GHz by assuming an effective
dielectric constant o f (er + \ ) l 2 . It is seen that the de-embedded values o f series
inductance, Ls and parallel capacitance Cp=Cpi=Cp2 do not change much with frequency.
Within 1 to 6GHz, Ls varies from 2.9nH to 1.9nH and CP changes from 106fF to 157fF.
The de-embedded series resistance, Rs, is close to 0, so is the parallel conductance, GP
62
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
10
10
‘ Rs
8
• D e - e m b e d d e d Rs
D e -e m b e d d e d Ls
6
I
4
4
2r
o
-2
2
0
-
2
1
3
4
5
6
2
F re q u e n c y (GHz)
3
4
Frequency (GHz)
5
6
(b)
(a)
400
10
8
300
D e -e m b e d d e d Gp
6
200
- D e -e m b ed d e d C P
4
2
100
0
-2
1
2
3
4
5
3
F re q u e n c y (GHz)
4
F req u en cy (GHz)
(C)
(d )
Fig. 4-4 Lumped-element values versus frequency, (a) series resistance (b) series
inductance, (c) parallel capacitance, and (d) parallel conductance. The geometry o f filter
section is shown in Fig. 4-2(c).
Variation o f de-embedded series inductance and parallel capacitance at 2.4GHz
depending on slit width (D) o f the filter section is presented in Fig. 4-5. The series
inductance increases and parallel capacitance decreases with D. The parallel capacitance
mainly results from fringing electric field between two electrodes. Capacitance decreases
63
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
as the two electrodes separate more. The series inductance increases because the magnetic
flux for inductance increases as the slit opens more. At slit width o f 302pm, the deembedded inductance and capacitance at 2.4GHz are 2nH and 164fF, respectively.
64
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
10
8
6
4
2
0
0
2
3
4
3
4
5
D [mm]
(a)
250
200
LL
<
D 150
O
C
CO
-t—<
%
100
o.
co
O
0
2
D [mm]
(b)
Fig. 4-5
Variation o f de-embedded parameters versus slit width D o f the filter section in
Fig. 4-2 (c) at 2.4GHz, (a) series inductance (b) parallel capacitance.
»
65
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The design o f electrode topology emulating a parallel inductor is important in
achieving compact filter size. Instead o f spiral inductors, narrow electrodes between the
signal and ground electrodes depicted Fig. 4-6 (a) were used. A general equivalent circuit
is presented in Fig. 4-6 (b). Since the filter section is symmetrical, inductors are the same,
i.e., LP=Lpi=Lp2. The parallel inductance can be derived from the equation below,
LP= Imaginary (1/ (Y12+Y „)) I co
(4-12)
Fig. 4-6 (c) shows the value of the resulting parallel inductance versus D at 2.4GHz. It is
observed that the inductance increases from 0.25nH to 3.9nH as D increases from 100pm
to 3.98mm.
66
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3
j Filter Section j
P’
P’
(a)
0
................T--------------
0
1
:-----
— .----------
2
3
■
<
4
5
D [mm]
(c)
Fig. 4-6
(a) Basic building block for parallel inductance in CPS line, where
Gi=0.5mm, G 2 = 2.8mm, L pO .lm m , L=4mm, Wc=2mm, Ws=2mm, S=102fim, and D is
the slit width, (b) a general equivalent circuit (c) value of parallel inductance versus slit
width D at 2.4GHz.
67
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.3
Concept of a Hybrid Electrode Topology and its Analysis
Based on the analysis results presented above, a new configuration of hybrid for a
parallel capacitor is proposed. As mentioned in introduction, our new filter is formed by
an electrode topology. A pattern on the signal electrode forms a series resonant circuit. A
pattern between the signal and ground electrodes produces a parallel resonance circuit.
When the electrode pattern for a parallel capacitor is placed nearby that of a parallel
inductor, as exhibited in Fig. 4-6 (a), the parallel inductance value changes because the
magnetic field for the inductor is affected by the smaller opening between the inductor
electrode and capacitor electrode. In other words, the parallel inductance is decreased by
inserting the electrode pattern that reduces the open area, and thus the magnetic flux.
Therefore, it is necessary to search for a new electrode pattern that would produce larger
capacitance. Capacitance caused by fringing electric field between two coplanar
electrodes is quite small. For example, as shown in Fig. 4-5 (b), a fringing parallel
capacitance o f 2mm in length in the 4 mm section with slit width D=100pm gives 0.23pF.
Thus the normalized capacitance is 1.15pF/cm for D=100pm. The slit width is limited to
100pm by the etching process of copper foil on the dielectric board. In contrast, a 2.4GHz
LC filter (/„ = l / 2tt4 lc ) with L o f InH would need parallel capacitance o f 4.4pF. This is
more than an order higher than what the 2-mm long slit capacitance can provide. To
overcome this difficulty, a hybrid topology which includes both inductors and capacitors
in series and parallel connections was searched and found. For illustration purpose, an
68
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
example is presented in Fig. 4-7. The hybrid topology is used to provide large effective
capacitance that makes the resulting bandpass filter size very small.
Lx
CPS Line
Fig. 4-7
Gx
L
CPS Line
Design example of a basic hybrid topology. Ws=2, WG=2, SK).102, L=4,
1^=0.15, L2=0.5, L3= l, L4=0.3, G,=0.3, G2=0.83, G3=0.07, G4=1.35, and G5=0.7, all in
millimeters
Fig. 4-8 (a) exhibits the effective parallel capacitance o f the hybrid topology versus
frequency. The effective capacitance is extracted from the Eq. (4-9) after de-embedding
procedure using short-open calibration in Fig. 4-2. The hybrid topology has a self
resonant frequency. Beyond the self resonant frequency, the hybrid topology is inductive.
Below self resonant frequency, it is capacitive. To make use o f the large effective
capacitance available from the hybrid topology, its resonant frequency needs to be above
69
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
but close to the center frequency o f the bandpass filter. The effective capacitance o f the
hybrid topology increases exponentially near the self resonant frequency. In Fig. 4-8 (a),
the effective capacitance is 0.7pF at 1GHz and increases drastically as the frequency
approaches the self resonant frequency of 4GHz. To verily that the new hybrid topology
can give the resonant effect with a parallel inductor, the hybrid topology in Fig. 4-7 is
connected with a InH parallel inductor. The reactance of the hybrid topology with a
parallel inductor can be calculated with the well-known equation,
(4-12)
X = c o L / ( 1 - c o 2L C )
Fig. 4-8 (b) shows the reactance of the hybrid topology with InH parallel inductance. As
expected, the resonant frequency shifts downwards from 4GHz to 3.35GHz. At 3.35GHz,
the effective capacitance o f the hybrid topology is 2.33pF. Therefore, by using the hybrid
topology, the effective capacitance can be increased by more than an order of magnitude
comparing to the fringing capacitance between two coplanar electrodes. The fringing
capacitance is 0.23pF with the slit width of D= 100 pm and the same filter length in Fig. 45(b).
70
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
U_
Inductive Region
Capacitive Region
LU
-10
3
2
4
5
6
5
6
Frequency (GHz)
(a)
CO
I
3
do)
cco
+-*
oCO
500
400
300
200
100
-100
CD -200
^ -300
-400
-500
2
4
3
F req u en cy (GHz)
(b)
Fig. 4-8
(a) Extracted effective capacitance o f the hybrid topology after de-embedding
procedure using short-open calibration in Fig. 4-2 (b) calculated reactance o f the hybrid
topology connected with a InH parallel inductance.
71
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
In order to explain how the hybrid topology has the nonlinear characteristic for the
effective capacitance, the lumped-element equivalent circuit for the hybrid topology was
employed and then the circuit values by means of Y-parameters was extracted. The hybrid
topology and its equivalent circuit are shown in Fig. 4-9 (a) and (b), respectively. The
dimensions are the same as in Fig. 7. Using the input admittance, Y u o f port 1 when the
port 2 is short-circuited as shown in Fig. 4-9 (b), the effective capacitance of the lumpedelement circuit in Fig. 4-9 (b) can be found with equation below.
effective = Imaginary (Yn ) l a
(4-13)
Fig. 4-10 compares the effective parallel capacitance o f the hybrid topology using
Eq. (4-9) after de-embedding procedure and the value calculated using its lumped-element
equivalent
circuit.
Extracted
values
for
the
lumped-elements
are
LSi=877pH,
LS2=2.067nH. CSi=274fF, CS2=308fF, and CP=368fF. The lumped-element circuit results
in effective capacitance value that is very close to the value obtained using S-parameter
analysis. It thus can be seen that, by using the effective capacitance in the nonlinear
capacitive region shown in Fig. 4-8 (a), a hybrid topology can emulate a large capacitor at
frequency near but below the resonant frequency. Thus filter size can be greatly reduced
with this possibility.
72
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Fig. 4-9
(a) A hybrid topology in CPS electrodes, dimensions the same as Fig. 4-7, (b)
equivalent lumped-element circuit.
20
15
10
5
a
0
■5
-1 0
UJ
Hybrid topology
Lumped-element
equivalent circuit.
-15
-20
2
4
3
5
6
Frequency (GHz)
Fig. 4-10
Effective parallel capacitance of the hybrid topology Fig. 4-9 (a) after de­
embedding procedure using short-open calibration and its value obtained using lumpedelement equivalent circuit.
73
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.4
Design and Realization of Compact Bandpass Filter in CPS
Lines
For compact bandpass filter design in CPS lines, a lumped-element circuit model is
first identified, shown in Fig. 4-11 (a). Based on the study o f filter sections in CPS line,
the electrode topologies in CPS line for the lumped-elements are then searched and
designed. A 2.4GHz ISM bandpass filter is portrayed in Fig. 4-11 (b). To decrease filter
size, two hybrid topologies for large effective parallel capacitance are used. To achieve
resonance effect with the parallel capacitor, a simple narrow electrode as the inductor is
used. For the series resonant circuit of the equivalent circuit, a hybrid topology is not used
to save space. As an alternative, a pole separation technique was used, where 2 poles are
located in passband and the third pole is pushed away from the passband in the 3 pole
filter system shown in Fig. 4-11 (a). The required series capacitance, Cs, is 8.14pF to
resonate with a 0.54nH series inductor (Ls) at 2.4GHz without the pole separation. With
pole separation technique applied, equivalent lumped-element values are Ls=0.54nH,
Cs=0.84pF, LP=0.26nH, and CP=T5.6pF. It is seen that the series capacitance, CSj is
reduced from 8.14pF to 0.84pF, nearly a factor of 10. Thus, in designing topology for
series resonance, series capacitance can be achieved by an electrode gap (Gi) on the
signal electrode and series inductance can be obtained with a narrow electrode (Li)
depicted in Fig. 4-11 (b). The series inductance, Ls, mainly depends on the electrode
74
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
width (Wi) and length (Li). Likewise, series capacitance, Cs, depends on electrode width
(WO, length (Li), and gap (Gi). Based on the analysis of electrode topology for series
resonance, the third pole is located at 7.93GHz, which is further confirmed with a fullwave simulation and equivalent circuit model in Fig. 4-12. Initially, the 2.4GHz bandpass
filter was designed with -30dB of out-of-band rejection up to 7.5GHz.
geometrical parameters are presented in Fig. 4-11 (b).
75
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Detailed
"
C P S Line *'
" C P S Line *'
(b)
Fig. 4-11
(a) Lumped-element circuit of the bandpass filter, (b) Layout of 2.4GHz
ISM bandpass filter in CPS lines built on RT/Duroid 6010. Ws=2.34, W0=2.79, S=0.12,
L j-4.12, L2=4.12, G ^O.29, G2=0.29, G3=0.35, G4=0.29, G s=0.145, G6=0.29, G7=0.87,
G8=L45, G9=0.44, G lo=0.58, W ^O.35, W2=0.11, W3=0.29, W4=0.44, W s= 1.508,
W6=2.32, W7=2.175, all in millimeters.
76
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.5
Characterization and Measurement Results
The bandpass filter topology is fabricated on the RT/Duroid 6010 which has
thickness of 635pm, and is laminated with 0.25 oz. copper foil. The bandpass filters
fabricated were measured with a network analyzer (HP8510C) where the S-parameters,
Sn (reflection coefficient) and S2i (transmission coefficient) were measured versus
frequency [17]. The microwave signals were injected into the input CPS line and picked
up from the output CPS line using 50A SG/GS 250P signal-ground probes made by GGB
Industries, Inc [18]. Full two-port technique was used for error correction due to source
and load matching errors and directivity error using Short-Open-Through-Matching
calibration [19].
Fig. 4-12 exhibits the responses of a 2.4GHz ISM band filter fabricated. The
insertion loss measured is 3.5dB while the return loss is about 15dB. The filter size is only
8.6mmx5.3mm. The out-of band rejection is greater than 25dB up to 6GHz. It increases
due to third pole at 7.93GHz. The center frequency of lumped-circuit model is 2.43GHz.
Comparing with the simulation results and equivalent circuit model, the measured center
frequency moves up 40 MHz.
Responses obtained using the equivalent circuit and full-wave simulations are also shown.
The insertion loss predicted by the equivalent circuit model is zero because all the
elements are lossless. The S2i curve from full-wave simulations agrees quite well with the
measurement one except the insertion loss value. The simulation result gives an insertion
77
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
loss o f 2.0dB while the measured value is 3.5dB. The insertion loss is mainly caused by
lossy reactive elements due to ohmic loss of the electromagnetic wave propagating in the
copper electrode. The additional 1.5dB insertion loss is most likely caused by the copper
surface roughness and edge roughness of the electrodes which were not considered in the
full-wave simulation. At 2.4 GHz, the skin depth is only 1.35pm which is smaller than the
2-3 pm surface roughness of copper layer [16]. Thus, the conduction current density
associated with the electromagnetic wave flows near the copper surface and follows the
surface roughness profile, leading to additional losses by scattering and radiation. Others
have also shown that, in GHz frequency range, surface roughness o f copper cladding on
PCB can contribute additional conduction loss up to 2 times in dB unit [20]. Polishing the
copper layer before filter fabrication might reduce this extra loss.
As observed in Fig. 4-12, a higher pole is located at 7.94GHz which corresponds to
series inductance, Ls=0.53nH, and series capacitance, Cs=0.836pF in the equivalent
circuit model. The higher pole can shift and insertion loss may increase due to parasitics
in etched electrodes. The measured pole shifts from 7.94GHz to 7.69GHz where insertion
loss is about -lOdB. In the bandpass filter design using pole separation technique, the
higher pole can be shifted easily to upper frequency using fine tuning procedure with
series capacitance, Cs. By decreasing series capacitance from 0.836pF to 0.336pF, the
higher pole can be shifted beyond 12GHz.
78
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Simulation
Equivalent Circuit
-2 0
CD
~o
CO
M easurem ent
•30
-^0
-50
4
6
10
Frequency (GHz)
(a)
Simulation
Equivalent Circuit
-10
M easurem ent
.-20
CD
-o
W -3 0
-40
-50
0
2
4
6
8
10
Frequency (GHz)
(b)
Fig. 4-12
Measured and computed frequency responses o f the 2.4GHz ISM filter
fabricated on RT/Duroid6010 dielectric board, (a) Return loss (Sn) and (b) insertion loss
(S2i). Simulation is performed using HFSS.
79
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The electrode topology of the bandpass filter shown in Fig. 4-11 (b) is designed
symmetrically, i.e., the left half is the mirror image o f the right half. Thus, a scaling
characteristic in filter size is inherent in the filter response. As the filter size scales down,
center frequency moves upward because lumped-element values decrease. The scaling
characteristic o f this filter topology was evaluated and analyzed. The results are presented
in Fig. 4-13, Fig. 4-14, and Table 4-1. Fig. 4-13 exhibits the full-wave simulation results
as the filter topology is scaled down. The filter size is scaled by a factor o f 0.9 to 0.6.
Table 4-1 lists the scaling factor, the filter dimensions, and the center frequency. The
filter topology is same as in Fig. 4-11 which is modified 2-pole bandpass filter.
At a
scaling factor o f 0.6, the center frequency increases to 3.9GHz. The frequency increases
almost linearly with the inverse o f the scaling factor. Element values o f the equivalent
circuit were extracted from S-parameters calculated using full-wave simulation. Fig. 4-14
displays the values o f the four lumped-elements versus center frequency. It is seen that
that inductance and capacitance values both decrease as filter size scales down. The
capacitance is mostly contributed by fringing electric field which decreases with area.
Table 4-1 can be used as design guideline o f the bandpass filter for a different center
frequency.
80
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
0
0.9
0.8
0.7
-10
0.6
co
-3 0
-4 0
0
2
3
4
5
Frequency(GHz)
Fig.
4-13
Simulated transmission coefficients (S2i) as the dimension of the filter
topology in Fig. 4-11 is scaled by the factor indicated
81
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2
3
4
5
Center Frequency (GHz)
(a)
16
14
12
10
LL
Cl
8
6
4
2
-•
0
2
•3
4
5
Center Frequency (GHz)
(b)
Fig. 4-14
Scale down element values in the equivalent circuit model: (a) series and
parallel inductances (b) series parallel capacitances
82
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Table 4-1 Filter center frequency and size versus scaling factor. Filters were designed
with modified 2 pole bandpass topology with scale factor.
Scale factor
1.0
0.9
0.8
0.7
0.6
Size in y-direction (mm)
8.7
7.8
6.9
6.0
5.2
Size in x-direction (mm)
5.3
4.8
4.2
3.7
3.2
Center frequency (GHz)
2.4
2.7
3.0
3.4
3.9
Next, a compact UNII 5.15-5.85GHz bandpass filter was designed utilizing the
scaling characteristic. The scaling factor from the 2.4GHz filter shown in Fig. 4-11 is
0.41. Fig. 4-15 portrays the layout of UNII 5.15-5.85GHz bandpass filter in CPS lines
built on RT/Duroid6010. This UNII band filter needs relative wide bandwidth. Thus, the
electrode pattern is not the exact similarity of the 2.4GHz filter. Rather, it was modified
and fine-tuned according to the equivalent circuit that would give wider bandwidth. To
satisfy the specification of UNII 5.15-5.85GHz band, electrode patterns were fine tuned
with G6 and Gio in Fig. 4-15.
83
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
C P S Line
Fig. 4-15
C P S Line
Layout of UNII 5.15-5.85GHz bandpass filter in CPS lines built on
RT/Duroid6010. Ws=0.98, WG=1.17, S=0.07, L,=1.73, L2=1.73, G^O.121, G2=0.121,
G3=0.146, G4=0.073, G5=0.061, G6=0.183, G7=0.365, G8=0.609, G9=0.183, G 10=0.20,
W i=0.146, W2=0.05, W3=0.121, W4=0.121, W5=0.633, W6=0.974, W7=0.914, all in
millimeters.
The resulting
lumped-circuit element values are Ls=0.21nH,
Cs=0.686pF,
LP=0.083nH, and Cp=:9.475pF. To provide adequate bandwidth, the two poles o f the
circuit in the passband are quite separated. This can be clearly seen from return loss (Sn)
and transmission coefficient (S2i) calculated from the equivalent circuit and exhibited in
Fig. 4-16.
The filter size is only 2.2mmx3.6mm. The smallest electrode width for
inductor pattern is 50pm and smallest gap for capacitor pattern is about 61pm, imposed
by the etching process and copper thickness. Measurement response and HFSS response
are also plotted in Fig. 4-16. The measured insertion loss is 3.3dB. Designed and
84
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
measured center frequencies are 5.5GHz and 5.425GHz, respectively.
The filter was designed for wideband filter performance, which has higher pole measured
at 15.6GHz. The out-of band rejection is greater than 30dB up to 13GHz. The measured
response agrees well with the simulation response by HFSS. The measurement response
and the HFSS response do not show the two-pole feature as does the circuit response
because of the ohmic losses o f the copper electrode.
85
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Equivalent circuit
-10
“ “ Measurement
Simulation
-40
-50
0
2
4
6
8
10
12
Frequency (GHz)
(a)
Equivalent circuit
Measurement
-10
Simulation
-40
-50
0
2
4
6
8
10
12
Frequency (GHz)
(b)
Fig. 4-16
(a) Return loss (Sn) and (b) transmission coefficient (S2i) of the UNII 5.15-
5.85GHz bandpass filter in CPS line: measurement response, simulated response by
86
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
HFSS, and response calculated using equivalent circuit model. The filter topology is a
scale down version o f Fig. 4-11 (b) with modification to provide wider bandwidth
In order to improve the characteristic of stopband rejection, the filter topology was
modified based on the analysis results of filter sections in CPS line. A layout o f the
improved 2.4GHz ISM bandpass filter with wideband response is portrayed in Fig. 4-17.
The smallest electrode gap is reduced to 60pm while smallest width is about 110pm,
made possible with improved etching process. Since filter topology has larger open space
compared to the first design in Fig. 4-11 (b), inductance value can be increased. This is
useful for filter design o f compact size. O f the improved design, the size is reduced by up
to 53% in area compared the first design shown in Fig. 4-11 (b). The measured and
computed frequency responses o f return loss (Sn) and insertion loss (S2i) up to 12GHz
are plotted in Fig. 4-18. The filter size is only 7mmx3.5mm. The measured insertion loss
is 3.1dB while the return loss is close to 15dB. The measured response agrees well with
the simulation by HFSS. The measured center frequency is 80MHz higher than simulation
value. The out-of-band rejection ratio calculated is greater than 27dB up to 11 GHz. The
measured rejection ratio is greater than 20dB up to 11 GHz.
87
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
C P S Line
C P S Line
Fig. 4-17
Layout o f improved 2.4GHz ISM bandpass filter for wideband filter response
in CPS line, Ws=1.71, WG=1.71, S=0.12, Lj-3.35, L2=0.11, L3=0.15, L4=0.2, L5=0.3,
G^O.3, G2=0.06, G3=1.33, G4=0.85, G s= 1.95, G6=1.15, G7=0.28, all in millimeters.
88
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
-10
-20
M easu rem en t
Simulation
o5 -3 0
-4 0
-5 0
0
2
8
6
4
10
12
10
12
F requency (GHz)
(a)
0
-10
M ea su rem en t
Simulation
-20
co -3 0
-4 0
-5 0
0
2
6
4
8
F req u en cy (GHz)
(b)
Fig.4-18 Measured and simulation frequency responses of an improved 2.4GHz bandpass
filter: (a) Return loss (Sn) and (b) insertion loss (S2i).
89
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.6
Conclusion
For the analysis and design of the bandpass in CPS lines, basic electrode patterns
emulating inductors and capacitors are first identified and studied through Short-Open
calibration (SOC) technique. Based on the analysis o f the two-port filter section in CPS
line, A new configurations o f 2.4GHz ISM bandpass filters in CPS lines was presented,
which does not have any wires, vias, tapering structures, quarter-wavelength sections or
any interconnect structure. The hybrid topology that uses for a large capacitor in parallel
resonance is analyzed and modeled using equivalent circuit model. The full-wave
simulation and equivalent circuit model agree well with the measured filter response and
are used for the filter design and characterization. The new filters can be implemented on
the chip level for monolithic microwave and millimeter wave integrated circuits
(MMICs). In chip level implementation, the use of CPS lines can offer several potential
advantages in cost reduction and reliability improvement. The filter size would be also
much smaller because of much smaller minimum electrode width and gap achievable on
the chip level.
90
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
References Chapter 4
[1]
S. G. Mao, C. T. Hwang, R. B. Wu, and C. H. Chen, “Analysis o f coplanar
waveguide-to-coplanar strip line transitions,” IEEE Trans. Microw. Theory Tech.,
vol. 48, pp. 23 - 29. Jan. 2000.
[2]
Y. S. Lin, W. C. Ku, C. H. Wang, and C. H. Chen, “Wideband coplanar-waveguide
bandpass filters with good stopband rejection,” IEEE Microw. Wirel. Comp. Lett.,
vol. 14, pp. 422-424, Sept. 2004
[3]
J. Zhou, M. J. Lancaster, and F. Huang, “Coplanar quarter-wavelength quasielliptic filters without bond-wire bridges,” IEEE Trans. Microw. Theory Tech., vol.
52, pp. 1150-1156. Apr. 2004.
[4]
S. G. Mao, and M. Y. Chen, “A novel periodic electromagnetic bandgap structure
for finite-width conductor-backed coplanar waveguides,” IEEE Microw. Guid.
Wave Lett., vol. 11, pp.261-263, Jun. 2001.
[5]
Y. H. Suh, and K. Chang, “Coplanar stripline resonators modeling and
applications to filters,” IEEE Trans. Microw. Theory Tech., vol. 50, pp. 1289 1296, May. 2002.
[6]
K.
Goverdhanam, R. N. Simons, and L. P. B. Katehi, “Coplanar stripline
propagation characteristics and bandpass filter,” IEEE Microw. Guid. Wave Lett., ,
vol. 8, pp. 2 1 4 -2 1 6 , Aug. 1997.
91
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
[7]
N. Yang, and Z. N. Chen, “Serially-connected series-stub resonators for
narrowband coplanar-stripline bandpass filters,” IEEE Microw. Wirel. Comp.
L ett.,, vol. 12, pp. 835 - 837, Dec. 2005.
[8]
S. M. Mao, H. K. Chiou, and C. H. Chen, “Modeling o f lumped-element coplanarstripline low-pass filter,” IEEE Microw. Wirel. Comp. Lett., vol. 3, pp. 141 - 143,
Mar. 1998.
[9]
S. Uysal, J. W. P. Ng, “A compact coplanar stripline lowpass filter,” Asia-Pacific
Microw. Conf.
[10]
Dig., Raffles, Singapore, vol. 2, pp. 307-310, Nov. 1999
Song, Y. K., and Lee, C. C.: ‘Milliliter wave coplanar strip (CPS) line flip chip
packaging on PCBs’. Proc. IEEE Electron. Comp. Tech. Conf., Lake Buena Vista,
FL, USA, vol. 2 p p .1807-1813, Jun. 2005.
[11]
Ansoft Designer, version 3.5, Ansoft Corporation, Pittsburgh, PA.
[12]
L. Zhu, and K. Wu, “Short-open calibration technique for field theory-based
parameter extraction o f lumped elements o f planar integrated circuits,” IEEE
Trans. Microw. Theory and Tech., 50, pp. 1861 - 1869, Aug, 2002.
[13]
L. F. Tiemeijer, and R. J. Havens, “A calibrated lumped-element de-embedding
technique for on-wafer RF characterization o f high-quality inductors and high­
speed transistors,” IEEE Trans. Electron Devices, 50, pp. 822-829, Mar. 2003.
[14]
HFSS (high frequency structure simulator), version 9, Ansoft Corporation,
Pittsburgh, PA.
92
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
[15]
D. M. Pozar, Microwave Engineering, 1998, John Wiley and Sons, New York.
[16]
Rogers Corporation, Rogers, CT, http://www.rogerscorporation.com.
[17]
Agilent Technologies, http://www.agilent.com, Palo Alto, CA.
[18]
GGB Industries, Inc, http://www.ggb.com, Naples, FL.
[19]
Agilent Technology, ‘User's guide of network analyzer, 85IOC’, Palo Alto, CA,
USA
[20]
Rowlands, M. J., and Rosser, S. G.: ‘Simulation and measurement o f high speed
serial link performance in a dense, thin core flip chip package’. Proc. IEEE
Electron. Comp. Tech. Conf., San Diego, CA, USA, May 2006, pp. 1776-1783
93
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
CHAPTER 5
Summary
Coplanar strip (CPS) line is characterized and studied for RF and microwave
applications. Microstrip line has a great advantage o f all lines on a device sharing a
common ground plane. Thus, the microstrip line remains as the dominating transmission
line in use. However, to obtain 50-ohm characteristic impedance on MMICs, the wafer
has to be lapped down to 100pm or less to achieve reasonably narrow electrode width.
Also, through-wafer interconnect vias must be fabricated to provide ground contacts on
the top surface o f the wafer. The backside is plated with thick metal layer to strengthen it
for subsequent fabrication steps. These necessary back-end processes are costly and can
reduce the yield.
On the other hand, CPS line has almost the same advantages over MS line as CPW. In
order to explore possible applications in RF and microwave frequency, CPS line is
characterized and studied. Attenuation coefficients were calculated using full-wave
electromagnetic simulator, HFSS, and measured using a network analyzer up to 40GHz.
To explain the difference o f attenuation coefficients for different backside conditions,
electrical field distributions were calculated and presented. Since the attenuation
94
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
coefficient varies depending on backside terminations, CPS lines o f various electrode
widths and width-to-gap ratios were evaluated to come up with design guidelines based
on backside conditions. CPS line geometry, 650/60pm (electrode width/gap size) built on
RT/Duroid can have attenuation coefficient around 0.6 [dB/cm] at 20GHz. The CPS line
that has line geometry, 450/50pm has minimum attenuation coefficient, around
1.1 [dB/cm] at 40GHz. The overall performance results of the CPS line clearly show that it
is an attractive alternative o f the commonly used microstrip line. The CPS line offers
several advantages in possible cost reduction and reliability improvement. It enables easy
insertion o f shunt circuit elements on the board.
For compact RF system integration, flip-chip technology is emerging as leading
technology to meet the high frequency and the high-density requirements. Based on the
study o f characteristic impedance and attenuation coefficient for CPS line in millimeter
wave, a new flip-chip configuration based on CPS lines is studied for millimeter wave
device applications.
Using microstrip lines for flip-chip bonding has potential coupling
problem since electric field propagated between top electrode and backside ground metal
and coupled with components on chip.
Thus, flip-chip interconnects using CPW have
been reported in order to avoid the drawback of microstrip line. CPS line as a
transmission line at input and output was used because it takes up much less space
comparing to CPW on chip or dielectric board. For wideband interconnections, the flipchip configuration was designed and implemented using a test chip directly on dielectric
95
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
boards with CPS lines. The chip is connected to the board using solder balls. In
microwave transmission, the challenge is to reduce reflection o f microwave signals on the
solder joins. The joints must be modeled and designed as an integral part o f the
transmission line so that the microwave signal sees a continuation o f line from the board
to the chip back to the board at the other end. Thus, to achieve optimum performance,
geometrical parameters in interconnect region was simulated. The flip-chip assembles are
evaluated up to 40GHz by S-parameters. The insertion loss o f flip-chip interconnect is as
low as -3dB up to 30GHz. The corresponding return loss is -15dB. A detailed
investigation o f CPS line on PCBs and CPS flip-chip reported by full wave calculation
and experiment over the frequency range of 450MHz-40GHz.With further compensation
structures, return loss can be reduced.
With the advantages o f CPS line, bandpass filter design using lumped-element was
studied for RF and microwave application. For the compact size filter design, preliminary
study o f electrode patterns was performed to be used as lumped-elements such as
capacitors and inductors in series and parallel connections for filter section. In the filter
design, spiral inductors and interdigital capacitors were not used. Even though spiral
inductor increases inductance, CPS line bandpass filters were designed using lumpedelements without bonding wires, vias, or any interconnect structure in compact size. It is
not based on quarter wavelength sections either.
Bandpass filters for 2.4GHz ISM (Iindustrial, Scientific and Medical) and 5.15-
96
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
5.85GHz UNII (Unlicensed National Information Infrastructure) bands are designed,
fabricated, and measured. The filter responses are characterized by an equivalent circuit
model and verified by full-wave simulation, HFSS (high frequency structure simulator).
The filter with CPS lines is built on RT/Duroid6010 dielectric board. It has dielectric
constant of 10.2, and is laminated with 0.25 oz. copper foil. The filter size for 5.155.85GHz UNII (Unlicensed National Information Infrastructure) band is only 2.3x3.7mm.
The smallest electrode width for inductor pattern is 42 pm and smallest gap for capacitor
pattern is about 53pm. The simulation result gives an insertion loss o f 2.2dB and return
loss o f 25dB. Simulated and measured filter responses exhibit that CPS line filter using
lumped-elements has possibility for on MMIC chips and on PCB applications with
several advantages such as cost reduction, reliability improvement, and compact size.
97
Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Документ
Категория
Без категории
Просмотров
0
Размер файла
2 632 Кб
Теги
sdewsdweddes
1/--страниц
Пожаловаться на содержимое документа