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JP2008264286

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DESCRIPTION JP2008264286
An ultrasonic diagnostic apparatus capable of reducing the capacity of an external memory and
improving the delay accuracy relating to the focusing of an ultrasonic beam. A transmission
phase adjusting unit 8 includes a clock frequency divider 25 and a waveform processing unit 27.
The clock divider 25 divides the basic clock 61 to generate a divided clock. The delay correction
unit 26 delays the divided clock based on the delay data 63 and the division ratio 65 to generate
the corrected divided clock 67. The waveform processing unit 27 includes a waveform
generation unit 28, a waveform memory 29, and a counter unit 30. The waveform generation
unit 28 generates waveform data and outputs the waveform data to the waveform memory 29.
The waveform memory 29 reads waveform data based on the waveform memory read address
output from the count unit 30, and outputs the waveform data to the D / A conversion unit 4 as a
transmission signal 69. The ultrasonic diagnostic apparatus operates the waveform memory 29
with the basic clock 61 and operates the D / A converter 4 with the correction divided clock 67.
[Selected figure] Figure 2
Ultrasonic diagnostic equipment
[0001]
The present invention relates to an ultrasound diagnostic apparatus for capturing an ultrasound
image. In particular, the present invention relates to a digital phased ultrasound diagnostic
apparatus that transmits and receives an ultrasonic beam by using digital data.
[0002]
04-05-2019
1
Generally, in an ultrasonic diagnostic apparatus, a probe including a plurality of transducers for
transmitting an ultrasonic wave to a subject and receiving a reflected signal from the subject, and
a transducer for each transmission signal A transmission unit that forms delay beams
corresponding to the arrival time difference to the focus point to form an ultrasonic beam, and a
reception signal received by each transducer is subjected to phasing addition processing
according to predetermined delay data, and ultrasonic waves And a receiver for forming a beam.
[0003]
The transmission unit has a waveform memory for storing waveform data, reads out waveform
data from the waveform memory based on predetermined delay data, and outputs a focused
transmission signal.
The output transmission signal is converted into an analog signal by a DA converter and supplied
to the vibrator (for example, see [Patent Document 1] [Patent Document 2] [Patent Document 3]).
[0004]
JP-A-8-628 JP-A-2001-8934 JP-A-2004-275635
[0005]
However, with regard to storage of waveform data, there is a problem that a large capacity
external memory is required to store these waveform data due to the increase in the amount of
waveform data accompanying the increase in the number of sampling points and the number of
waves.
Further, due to the increase in the number of channels, it takes a large amount of transfer time to
read desired waveform data from the external memory into the waveform memory for each
channel.
[0006]
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Also, in order to realize high precision in delay accuracy, the frequency of the operation clock of
the waveform memory and the DA converter may be made extremely high, or the waveform data
read from the waveform memory may be phase rotated and one cycle of the clock It is
conceivable to secure the delay accuracy within the range. However, in the case of the former,
there is a problem that the DA converter operating at high speed is expensive compared to the
waveform memory, and it is difficult to realize in cost performance. In the latter case, there is a
problem that the amplitude error becomes large if the sampling of the waveform stored in the
waveform memory is coarse.
[0007]
The present invention has been made in view of the above problems, and provides an ultrasonic
diagnostic apparatus capable of reducing the capacity of an external memory and improving the
delay accuracy relating to the focusing of an ultrasonic beam. The purpose is
[0008]
In order to achieve the above-mentioned object, according to a first aspect of the present
invention, there is provided a probe comprising a plurality of transducers arranged to form
multiple channels for transmitting and receiving ultrasonic waves to and from a subject, and a
channel of the probe A transmission unit that adjusts the waveform data and outputs a
transmission signal, a reception unit that receives and adjusts the reception signal output from
the probe, and the output from the reception unit In an ultrasonic diagnostic apparatus,
comprising: an image processing unit configured to form an ultrasonic image based on a received
wave signal; and a display unit configured to display the ultrasonic image, the transmission unit
stores the waveform data and generates a basic clock. Storage in the waveform memory, a D / A
conversion unit operating with a clock slower than the basic clock, and a delay correction unit
delaying the slow clock The transmission of the waveform data from the received waveform data
through the D / A converter An ultrasonic diagnostic apparatus characterized by generating a
degree.
[0009]
The ultrasonic diagnostic apparatus according to the first invention stores waveform data in a
waveform memory operating at high speed with a basic clock, applies delay to a clock slower
than the basic clock, and outputs the delayed data to a D / A converter. Generates a transmission
signal from
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Specifically, the timing of reading out the waveform data from the waveform memory is counted
based on the delay data related to the focus control.
The ultrasonic diagnostic apparatus divides the basic clock by the divider to output a divided
clock, delays the divided clock, and outputs the divided clock to the D / A conversion unit.
[0010]
As a result, it is possible to realize delay accuracy finer than the clock cycle of the D / A
conversion unit using the waveform memory capable of high speed operation, and to improve the
image quality of the ultrasonic image.
[0011]
In addition, it is desirable to correct the phase of the divided clock based on the remainder
obtained by performing the remainder operation between the delay data and the division ratio of
the divided clock.
Thus, the waveform data can be read out from the waveform memory in synchronization with the
correction divided clock output to the D / A converter, and the transmission signal can be output
to the D / A converter.
[0012]
In addition, it is desirable to change the frequency of the transmission signal by changing the
division ratio or the number of sampling points of the divided clock. As a result, the frequency of
the transmission signal can be changed without changing the basic clock or reading out different
waveform data.
[0013]
In addition, the wave transmission unit includes a waveform generation unit that generates
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waveform data for each channel, and each waveform generation unit includes a basic waveform
generation unit that generates a basic waveform of the waveform data and a window that
generates a window function of the waveform data. And a function generation unit. Each
waveform generation unit generates a basic waveform and a window function independently for
each channel, and generates waveform data using the basic waveform and the window function.
[0014]
The basic waveform generation unit holds a 1⁄4 cycle of the sin waveform, and generates a sin
waveform of 1 cycle by folding processing and sign inversion processing. The window function
generation unit holds 1⁄4 period of each cos waveform of cos 2π, cos 4π, cos 6π, and cos 8π,
and based on the number of sampling points and the wave number, 1 period, 2 periods, 3
periods and 4 periods Generates each cos waveform. The basic waveform generation unit and the
window function generation unit multiply the generated sin waveform and cos waveform by a
weighting factor.
[0015]
As described above, the waveform generation unit holds the basic waveform table and the
window function table, and independently generates the basic waveform and the window
function according to the number of sampling points and the number of waves for each channel,
thereby obtaining desired waveform data. Generate Thus, the capacity of the external memory
storing the waveform data can be reduced, and the transfer time of the waveform data to the
waveform memory can be shortened. There is no need to store waveform data in the external
memory in advance, and it is not necessary to transfer waveform data from the external memory
to the waveform memory of each transmission unit sequentially.
[0016]
Alternatively, phase rotation may be performed by controlling the read address of the basic
waveform table. Thus, since delay processing is performed by arithmetic processing at the time
of waveform data generation, fine delay accuracy can be realized regardless of the operation
clock.
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[0017]
According to a second aspect of the present invention, there is provided a probe in which a
plurality of transducers are arranged to form multiple channels and transmit and receive
ultrasonic waves to and from an object, and waveform data is phased for each channel of the
probe. Ultrasonic wave based on the wave receiving signal output from the wave receiving unit,
the wave receiving unit outputting the wave transmitting signal, the wave receiving unit receiving
the wave received signal from the probe, and In an ultrasonic diagnostic apparatus including an
image processing unit that constitutes an image, and a display unit that displays the ultrasonic
image, the transmission unit generates a basic waveform of the waveform data for each of the
channels. A generation unit, and a window function generation unit generating a window
function of the waveform data, using the basic waveform generated by the basic waveform
generation unit and the window function generated by the window function generation unit An
ultrasonic diagnostic apparatus characterized in that the waveform data is generated .
[0018]
According to the present invention, it is possible to provide an ultrasonic diagnostic apparatus
capable of reducing the capacity of the external memory and improving the delay accuracy
relating to the focusing of the ultrasonic beam.
[0019]
Hereinafter, preferred embodiments of an ultrasonic diagnostic apparatus according to the
present invention will be described in detail with reference to the attached drawings.
In the following description and the accompanying drawings, components having substantially
the same functional configuration will be denoted by the same reference numerals and
redundant description will be omitted.
[0020]
(1.
Configuration of Ultrasonic Diagnostic Apparatus First, the configuration of the ultrasonic
diagnostic apparatus 1 will be described with reference to FIG. FIG. 1 is a block diagram of the
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ultrasonic diagnostic apparatus 1. The ultrasonic diagnostic apparatus 1 includes a probe 2, a
transmission / reception separation unit 3, a D / A conversion unit 4, and a transmission unit 12
having a transmission adjustment unit 8, an A / D conversion unit 5 and a reception adjustment
unit 7. A wave receiver 13 having an external memory 6, a signal processor 9, a DSC unit 10
(DSC: digital scan converter), and a display unit 11.
[0021]
The probe 2 is an apparatus that transmits and receives ultrasonic waves to and from a subject
while being in contact with the subject. A plurality of strip-shaped ultrasonic transducers are
arranged in the probe 2. The probe 2 emits an ultrasonic wave to the object based on the drive
signal supplied from the transmission / reception separation unit 3, receives the reflected echo
signal reflected in the object, and outputs it to the transmission / reception separation unit 3. .
[0022]
The transmission / reception separation unit 3 switches between the reception signal and the
transmission signal based on the ultrasonic synchronization signal. The D / A conversion unit 4
converts the digital transmission signal supplied from the transmission phase adjusting unit 8
into an analog transmission signal and outputs the analog transmission signal to the transmission
/ reception separation unit 3. The A / D conversion unit 5 converts an analog reception signal
supplied from the transmission / reception separation unit 3 into a digital reception signal and
outputs the digital reception signal to the reception phase adjustment unit 7.
[0023]
The external memory 6 holds delay data (focus data) and gain data (diameter weight data). The
external memory 6 appropriately supplies delay data and gain data to the wave receiving phase
adjusting unit 7 and the wave transmitting phase adjusting unit 8.
[0024]
The wave receiving and phase adjusting unit 7 performs phase alignment based on the delay data
supplied from the external memory 6 so that the received signals of different phases in each
channel are in phase, and the received signals of all channels are By bundling, an ultrasonic beam
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is formed and output to the signal processing unit 9.
[0025]
The transmission phase adjustment unit 8 performs delay processing for each channel based on
the delay data supplied from the external memory 6, and outputs a digital transmission signal to
the D / A conversion unit 4.
In addition, the transmission phase adjusting unit 8 adjusts the gain of the transmission
waveform based on the gain data supplied from the external memory 6.
[0026]
The signal processing unit 9 performs filtering, compression processing, detection processing,
and time variable amplification processing on the digital transmission signal supplied from the
reception phase adjusting unit 7, and outputs the result to the DSC unit 10. The DSC unit 10
performs image processing such as coordinate conversion processing on the signal supplied from
the signal processing unit 9, and outputs the image processing to the display unit 10. The display
unit 10 is a display device that displays an ultrasonic image subjected to image processing.
[0027]
(2. Transmission Unit 12) Next, the transmission unit 12 according to the embodiment of the
present invention will be described with reference to FIGS. 2 and 3.
[0028]
(2−1. Configuration of Transmitting Unit 12 FIG. 2 is a configuration diagram of the
transmitting unit 12. The transmission unit 12 includes a transmission phase adjustment unit 8
and a D / A conversion unit 4. The transmission phase adjusting unit 8 includes a setting unit 22
having an external memory address generation unit 21, a gain setting unit 23, and a delay setting
unit 24, a clock divider 25, and a waveform processing unit 27. The basic clock generator 14 is a
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device that generates a basic clock 61 as a system clock.
[0029]
The external memory address generation unit 21 generates and controls the read address and
the write address. The read address is an address for reading out the gain data and the delay data
63 from the external memory 6 based on the transmission mode. The write address is an address
for temporarily storing data in the internal register of the gain setting unit 23.
[0030]
The gain setting unit 23 is a group of registers for temporarily storing gain data read from the
external memory 6. The gain data is multiplied by the waveform data output from the waveform
memory 29 to perform gain adjustment. The delay setting unit 24 is a group of registers for
temporarily storing the delay data 63 read from the external memory 6. The delay data 63 is
output from the delay setting unit 24 to the counter unit 30 and the clock divider 25.
[0031]
The clock divider 25 divides the basic clock 61 according to the dividing ratio 65 to generate a
divided clock. The clock divider 25 has a delay correction unit 26. The delay correction unit 26
performs remainder operation on the delay data 63 and the division ratio 65 of the divided clock
to calculate the remainder. The delay correction unit 26 delays the divided clock by the
calculated remainder to generate the corrected divided clock 67. The corrected divided clock 67
is output to the D / A converter 4.
[0032]
The waveform processing unit 27 includes a waveform generation unit 28, a waveform memory
29, and a counter unit 30. The waveform processing unit 27 is provided for each channel. The
waveform processing unit 27 generates a transmission signal 69 which is delay-controlled and
gain-controlled according to the transmission mode for each channel, and outputs the
transmission signal 69 to the D / A conversion unit 4.
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[0033]
The waveform generation unit 28 generates waveform data according to the transmission mode
and outputs the waveform data to the waveform memory 29. The waveform memory 29 is a
memory that can operate at high speed based on the basic clock 61 from the basic clock
generator 14. The waveform memory 29 stores the waveform data generated by the waveform
generation unit 28. The waveform memory 29 reads waveform data based on the waveform
memory read address output from the count unit 30, and outputs the waveform data to the D / A
conversion unit 4 as a transmission signal 69.
[0034]
The counter unit 30 operates as a delay counter and a read address counter. The counter unit 30
counts the count number corresponding to the delay time based on the delay data 63 output
from the delay setting unit 24, and then counts the waveform memory read address. Since the
corrected divided clock 67 is used as the operation clock of the D / A conversion unit 4, the
counter unit 30 divides the waveform memory read address in the same manner according to the
division ratio of the divided clock. Output. The division ratio of the waveform memory read
address is an integral multiple of the division ratio of the divided clock. By controlling the timing
of the waveform memory read address by the counter unit 30, delay control of the transmission
signal 69 is performed.
[0035]
(2−2. Timing Chart FIG. 3 is a timing chart according to an operation clock, a transmission
signal, and the like. The timing chart of FIG. 3 shows the basic clock 61, transmission start signal
62, delay data 63, delay count value 64, division ratio 65, division clock 66, correction division
clock 67, waveform memory read address 68, transmission 14 shows one aspect of the signal 69.
[0036]
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10
The time point 71 indicates the time of the start of transmission. The time point 71 is determined
by the transmission start signal 62, and the time point 72 indicates a time when a predetermined
delay time has elapsed from the time 71. A time point 72 is a time point when the counting of
the delay count value 64 indicated by the delay data 63 is completed.
[0037]
At time 71, the delay data 63 is "10", and the frequency division ratio 65 is "3". The counter unit
30 counts the delay count values 64 “1” to “10” indicated by the delay data 63 “10” to
determine the time point 72. The divider 25 divides the basic clock 61 to generate a divided
clock 66 based on the dividing ratio 65 “3”. One cycle of the divided clock 66 corresponds to
three cycles of the basic clock 61.
[0038]
The delay correction unit 26 of the frequency divider 25 performs remainder operation of the
delay data 63 “10” and the division ratio 65 “3” of the divided clock 66 on the divided clock
66 to obtain the remainder “1” ( Calculate 10 = 3 x 3 + "1"). The delay correction unit 26 of
the frequency divider 25 adds the delay 73 to the divided clock 66 by the calculated remainder
"1" to generate the corrected divided clock 67.
[0039]
The counter unit 30 outputs waveform memory read addresses 68 “A1” “A2”... To the
waveform memory 29 in synchronization with the correction divided clock 67. The waveform
memory 29 outputs the transmission signals 69 “H 1”, “H 2”,... To the D / A conversion unit
4 based on the waveform memory read address 68 output from the counter unit 30.
[0040]
At time 72, the timings of the correction divided clock 67, the waveform memory read address
68 and the transmission signal 69 coincide with each other. The correction divided clock 67 is
input to the D / A converter 4 as an operation clock, and the transmission signal 69 is input from
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the waveform memory 29 in synchronization with the timing of the corrected divided clock 67.
[0041]
The waveform memory 29 and the delay counter unit 30 count the delay count value 64
indicated by the delay data 63 using the basic clock 61 as an operation clock, and output the
waveform memory read address 68 and the transmission signal 69. Therefore, it is possible to
finely control the time point 72 delayed from the time point 71 of transmission start with the
basic clock 61 as a unit.
[0042]
(2−3. As described above, the ultrasonic diagnostic apparatus 1 operates the waveform
memory 29 with the high-speed basic clock 61, divides the basic clock 61, and performs delay
correction on the corrected divided clock 67. The A conversion unit 4 is operated.
[0043]
As a result, even when the D / A converter is operated with a clock that is slower than the basic
clock, the setting of the reading start point of the waveform data in the waveform memory can be
set finely, so focusing of the ultrasonic beam Delay accuracy can be improved. A delay accuracy
finer than the clock cycle of the D / A converter can be realized, and the image quality of the
ultrasonic image can be improved. In addition, since the D / A conversion unit is not required to
operate at high speed as compared with the waveform memory, the cost burden can be reduced.
In addition, since a corrected divided clock obtained by dividing and correcting the basic clock is
used, it is not necessary to use a multiphase clock configuration, and the circuit configuration
and circuit scale can be simplified.
[0044]
(3. Waveform Generation Unit 28) Next, the waveform generation unit 28 will be described
with reference to FIG. FIG. 4 is a detailed view of the waveform generation unit 28. As shown in
FIG. The waveform generation unit 28 includes a basic waveform generation unit 41 and a
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window function generation unit 44.
[0045]
The basic waveform generation unit 41 includes a basic waveform table 42 and a basic waveform
address generation unit 43. The basic waveform generation unit 41 generates a basic waveform
based on the number of sampling points and the number of waves. The basic waveform table 42
holds a 1⁄4 period of the sin waveform. The basic waveform generation unit 41 generates a basic
waveform of one cycle of the sin waveform by folding control of the address of the basic
waveform table 42 and sign inversion control.
[0046]
The basic waveform address generation unit 43 holds, as a table, an initial address offset
corresponding to the phase rotation amount and an address step width corresponding to the
number of sampling points. The basic waveform address generation unit 43 adds the step width
to the initial address offset for the number of sampling points, repeatedly performs processing
for the number of waves, and generates a read address of the basic waveform table 42.
Preferably, the step width and the initial address offset are fixed point consisting of integer part
and decimal part, and the address calculation is fixed point calculation so as not to be affected by
the error due to the accumulation processing.
[0047]
The window function generation unit 44 includes a window function table 46, a window function
address generation unit 47, a weight coefficient register 55, a multiplier 52, and an adder 53.
The window function generation unit 44 generates an envelope waveform for the basic
waveform. The window function table 46 has four types of cos tables: cos 2π table 46-1, cos 4π
table 46-2, cos 6π table 46-3, and cos 8π table 46-4. The window function generation unit 44
controls the addressing for the four types of cos tables held by the window function table 46
based on the number of sampling points and the number of waves, whereby one cycle, two
cycles, three cycles, and four cycles are stored. Generate each cos waveform.
[0048]
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The window function address generation unit 47 holds, as a table, the step width of the address
corresponding to the number of sampling points of the entire transmission waveform. The
window function address generation unit 47 accumulates by the number of sampling points of
the entire transmission waveform, and generates four types of read addresses of the cos table
held by the window function table 46. Preferably, the step width is a fixed point consisting of an
integer part and a decimal part, and the address calculation is a fixed point calculation so as not
to be affected by the error due to the accumulation processing.
[0049]
The window function generation unit 44 outputs the outputs from the four types of cos tables
held by the window function table 46 by the multiplier 52 and the adder 53, and the window
function weighting coefficients 82-1-1 held by the weighting coefficient register 82. The product
sum with the coefficient 82-4 is calculated, and further, the window function weighting
coefficient 82-0 is added, and the sum is output as the envelope waveform 83.
[0050]
Specifically, the envelope waveform 83 (W (k)) has the window function weighting coefficient 820 (a0), the window function weighting coefficient 82-1 (a1), the window function weighting
coefficient 82-2 (a2), the window It is represented by following Formula using the function
weighting coefficient 82-3 (a3) and the window function weighting coefficient 82-4 (a4).
[0051]
[Formula] W (k) = a0-a1 x cos (2 pi k / N) + a2 x cos (4 pi k / N)-a3 x cos (6 pi k / N) + a4 x cos (8
pi k / N), (0 <k <N ).
[0052]
The waveform generation unit 28 multiplies the basic waveform output from the basic waveform
generation unit 41 by the multiplier 51 by the waveform weighting factor, and then multiplies
the basic waveform output by the multiplier 54 with the envelope waveform 83 to obtain desired
waveform data. Generate
The waveform generation unit 28 outputs the generated waveform data to the waveform
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memory 29.
The waveform generation unit 28 can also output only the basic waveform or only the envelope
waveform as waveform data.
[0053]
As described above, the waveform generation unit 28 holds the basic waveform table and the
window function table, and independently generates the basic waveform and the window
function according to the number of sampling points and the number of waves for each channel
to obtain desired waveform data. Generate
Thus, the capacity of the external memory storing the waveform data can be reduced, and the
transfer time of the waveform data to the waveform memory can be shortened. Also, phase
rotation can be easily performed by controlling the read addresses of the basic waveform table
and the window function table. That is, since delay processing is performed by arithmetic
processing at the time of waveform data generation, fine delay accuracy can be realized
regardless of the operation clock.
[0054]
(4. Effects, Etc. As described above in detail, according to the embodiment of the present
invention, it is possible to realize delay accuracy finer than the clock cycle of the D / A
conversion unit using a waveform memory that can operate at high speed, The image quality of
the ultrasonic image can be improved. Further, the capacity of the external memory for storing
the waveform data can be reduced, the transfer time of the waveform data to the waveform
memory can be shortened, and the diagnostic efficiency can be improved. Also, instead of
changing the basic clock or reading out different waveform data, the frequency of the
transmission signal can be changed by changing the division ratio of the divided clock or the
number of sampling points.
[0055]
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The preferred embodiments of the ultrasonic diagnostic apparatus according to the present
invention have been described above with reference to the attached drawings, but the present
invention is not limited to such examples. It is apparent that those skilled in the art can conceive
of various modifications or alterations within the scope of the technical idea disclosed in the
present application, and of course these also fall within the technical scope of the present
invention. It is understood.
[0056]
Configuration Diagram of Ultrasonic Diagnostic Apparatus 1 Configuration Diagram of
Transmission Unit 12 Details of Timing Chart Waveform Generation Unit 28 Relating to
Operation Clock, Transmission Signal, etc.
Explanation of sign
[0057]
DESCRIPTION OF SYMBOLS 1 ......... Ultrasonic diagnostic apparatus 2 ......... Transducer 3 .........
Transmission / reception isolation | separation part 4 ......... D / A conversion part 5 ......... A / D
conversion part 6 ............ External memory 7 ...... Wave receiving phase adjusting unit 8 ...
Transmission phase adjusting unit 9 ... Signal processing unit 10 ... DSC unit 11 ... Display unit 12
... Transmission unit 13 ... Reception unit 14 ... ... Basic clock generator 21 ... ... External memory
address generation unit 22 ... ... Setting unit 23 ... ... Gain setting unit 24 ... ... Delay setting unit 25
... ... Clock divider 26 ... ... Delay correction unit 27 ... ... waveform processing unit 28 ... ...
waveform generation unit 29 ... ... waveform memory 30 ... ... counter unit 41 ... ... basic waveform
generation unit 42 ... ... basic waveform table 43 ... ... basic waveform address generation unit 44
......... Window function generation unit 46 ......... Window function table 47 ......... Window function
address generation unit 51, 52, 4 ...... Multiplier 53 ...... Adder 55 ...... Weight coefficient register
61 ...... Basic clock 62 ...... Transmission start signal 63 ...... Delay data 64 ...... Delay count value 65
...... Division ratio 66 ... ... Division clock 67 ... ... Correction division clock 68 ... ... Waveform
memory read address 69 ... ... Transmission signal 71 ... ... Transmission start time 72 ... ... Delay
time 73 ... ... Delay 82-0 to 82-4 ..... Window function weighting coefficient 83 ........ Envelope
waveform
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