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JP2018019339

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DESCRIPTION JP2018019339
Abstract: In a method of manufacturing a CMUT, a process of reducing the thickness of a
substrate to suppress reflection of ultrasonic waves by the substrate is simply performed while
suppressing a change in stress characteristics and the like of a vibrating film. SOLUTION: The
method of manufacturing a CMUT has a step of forming a pillar by making the height in the
stacking direction outside the region in the stacking direction higher than the height in the
stacking direction of the region provided with the void. And a step of reducing the thickness in
the stacking direction of the substrate using the support. [Selected figure] Figure 2
Capacitance transducer and method of manufacturing the same
[0001]
The present invention relates to a capacitive transducer and a method of manufacturing the
same.
[0002]
In recent years, research on transducers using micromachining has been actively conducted.
Above all, capacitance type transducers are devices that transmit or receive elastic waves such as
ultrasonic waves using lightweight diaphragms, and broadband characteristics can be easily
obtained in liquid and air, so conventional medical diagnostic Ultrasonic diagnosis with higher
accuracy than modalities is attracting attention as a promising technology. Capacitive
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1
micromachined ultrasonic transducers are sometimes referred to below as CMUTs. The CMUT
detects an inspection object by detecting a photoacoustic wave generated when the inspection
object is irradiated with light, or an acoustic wave (ultrasound) generated when the inspection
object is irradiated with ultrasonic waves. It is used for the photoacoustic apparatus which
acquires the information of (1), an ultrasonic probe, or the probe provided with both.
[0003]
In the CMUT, a plurality of cells in which a gap (hereinafter referred to as a cavity) is provided
between a substrate and a thin film which is a vibrating film are formed, and the cells are
electrically connected to each other.
[0004]
Here, when the CMUT receives an ultrasonic wave, the ultrasonic wave transmitted through the
diaphragm and reflected by the substrate may be noise.
In patent document 1, in order to suppress the noise which generate | occur | produces in this
way, it is disclosed that the frequency of the ultrasonic wave reflected by a board | substrate is
made larger than the frequency band of the ultrasonic wave received by CMUT by thinning a
board | substrate. There is. The noise can be suppressed by shifting the frequency of the
reflected ultrasonic wave from the reception frequency band of the CMUT.
[0005]
On the other hand, in Patent Document 2, in the junction type CMUT, in order to detect a signal
for each element, a part of the back surface of the surface on which the vibrating film is formed
is removed by cutting, polishing, etching or the like to form a recess. There is a disclosure of
performing trench processing.
[0006]
U.S. Patent Application Publication No. 2003-0103412 specification JP-A-2010-35156
[0007]
Here, Patent Document 1 does not disclose a specific method of the step of thinning the back
surface of the substrate.
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2
[0008]
Moreover, in patent document 2, the handling member is fixed to the vibrating membrane of
CMUT, and trench processing is performed.
Therefore, when the trench processing is performed, the stress characteristic or the like of the
vibrating film may be changed by pressing the handling member against the vibrating film.
[0009]
A method of manufacturing a capacitive transducer according to the present invention comprises
the steps of: providing a lower electrode layer in a stacking direction of a substrate; providing a
sacrificial layer in the stacking direction on the lower electrode layer; Forming a first membrane
layer in the stacking direction, providing an upper electrode layer in the stacking direction on the
first membrane layer, and providing an etching hole in the first membrane layer; And removing
the sacrificial layer through the etching hole to form a void, and the method of manufacturing a
capacitive transducer, wherein the stacking direction of the region in which the void is provided.
Forming a column by raising the height in the stacking direction in at least a part of the area
outside the area, and forming the column using the column And reducing the thickness in the
stacking direction.
[0010]
According to the method of manufacturing a CMUT according to the present invention, the step
of reducing the thickness of the substrate for suppressing the reflection of the ultrasonic wave by
the substrate can be easily performed while suppressing the change in the stress characteristics
and the like of the vibrating film. be able to.
[0011]
It is a figure for demonstrating each process of the manufacturing method of the electrostatic
capacitance type transducer which concerns on Embodiment 1 of this invention.
It is a figure for demonstrating the structure of the electrostatic capacitance type transducer
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which concerns on Embodiment 2 of this invention.
[0012]
Although the manufacturing method of CMUT which concerns on embodiment of this invention
is demonstrated, this invention is not limited to them.
[0013]
In the method of manufacturing a CMUT in this embodiment, a cell of a CMUT that transmits and
receives ultrasonic waves, and a structure serving as a support when thinning a substrate
constituting the cell are integrally formed on the main surface of the substrate.
In this embodiment, the cell of the CMUT comprises a substrate, a first electrode protective layer,
a lower electrode layer, a first wiring layer, a second electrode protective layer, a sacrificial layer,
a first membrane layer, an upper electrode layer, a second The membrane layer, the third
membrane layer, and the second wiring layer are formed in this order.
A pillar is formed by at least one of the steps of forming the lower electrode layer, forming the
sacrificial layer, forming the first membrane layer, and forming the upper electrode layer.
Specifically, the height in the stacking direction in at least a part of the area outside the cell
region is made higher than the height in the stacking direction of the cell region.
As a result, pillars are formed outside the cell area. Here, the height in the stacking direction of
the cell region is the height (height h1 in the cell region β of FIG. 1 (13) described later). The
height h2 (FIG. 1 (13)) in the stacking direction in at least a part of the area outside the cell area
is higher than h1. Hereinafter, at least a part of the area outside the cell area may be simply
referred to as outside the cell area.
[0014]
Next, the formed support is fixed to the stage to reduce the thickness in the stacking direction of
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the substrate. As described above, since the cell is formed, the support is formed, and the
material constituting the cell is used as the support, the support can be easily formed without
increasing the number of processes. Further, since the support is provided outside the cell
region, it is possible to suppress a change in stress characteristics or the like of the vibrating film
of the cell when fixing the CMUT, which is a laminate, using the support. Here, the method of
forming the support is roughly divided into two. One is a method of leaving a certain layer only
outside the cell area. In this case, a layer may be provided once inside or outside the cell region,
and the layer in the cell region may be removed, or a layer may be formed only outside the cell
region. Once a layer is formed only outside the cell region, even if another layer is formed
thereafter, relatively high portions are formed outside the cell region, which become pillars. This
method has an advantage that the thickness when providing each layer can be made constant
and the process can be simplified. In the present method, it is preferable that the layer located
only outside the cell area is not only a function as a support but also a layer necessary for driving
the CMUT. For example, as a layer which exists only outside the cell region, a layer of a wiring
connected to an electrode can be mentioned.
[0015]
Another method of forming the support is a method in which in the step of providing a layer, the
layer thickness of the layer provided outside the cell area is larger than the layer thickness of the
layer provided in the cell area. Note that the layer thickness provided outside the cell region may
be larger than the layer thickness provided in the cell region in a plurality of steps as well as one
step.
[0016]
Note that the lower electrode layer, the upper electrode layer, and the sacrificial layer are
preferably formed in narrower regions in a plane perpendicular to the stacking direction than the
first and second electrode protective layers. When the end surfaces of the lower electrode layer,
the upper electrode layer, and the sacrificial layer are exposed to the surface of the support,
etching can be suppressed. Also, the step of thinning the substrate may be performed during the
formation of the CMUT. The pillars may be formed higher in at least a part of the cell region than
in the cell region when performing the step of thinning the substrate. The support may be
disposed in the gap between cells. A large area of support may be arranged outside the cell area.
[0017]
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5
The method for manufacturing a CMUT according to the present embodiment may have at least
the following steps. (A) A step of providing a lower electrode layer in the stacking direction of the
substrate. (B) providing a sacrificial layer on the lower electrode layer; (C) forming a first
membrane layer on the sacrificial layer; (D) providing an upper electrode layer on the first
membrane layer; (E) forming an etching hole in the first membrane layer; (F) forming a void by
removing the sacrificial layer through the etching hole; Each of these layers is provided in the
stacking direction.
[0018]
Then, the height of the stacking direction in at least a part of the area outside the cell region is
made higher than the height in the stacking direction of the cell region in which the void portion
is provided, thereby forming a support.
[0019]
Then, by using the formed support, the thickness in the stacking direction of the substrate is
reduced.
[0020]
Note that the method of manufacturing a capacitive transducer according to the present
embodiment may further include the step of providing the following covering layer on the top
layer of the capacitive transducer manufactured in the above-described process. good.
The covering layer in the present embodiment is a layer in which the adhesive layer, the acoustic
matching layer, the light reflecting layer support layer, and the light reflecting layer are
laminated in this order from the side closer to the above-mentioned top layer.
In addition, layers other than the layers listed above may be appropriately included. The light
reflection layer is, for example, a light reflection layer that contains gold or the like and reflects
light incident from the outside to the inspection object. The light reflecting layer support layer is
a layer that contains, for example, polyethylene terephthalate (PET) and generally supports a thin
light reflecting layer. The acoustic matching layer contains, for example, fluorine-substituted
polydimethylsiloxane, and has an intermediate value between the value of the acoustic
04-05-2019
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impedance of the light reflection layer and the value of the acoustic impedance of the top layer
described above. Suppress the reflection of sound waves). The adhesive layer contains, for
example, polydimethylsiloxane without fluorine substitution, and is provided to improve the
adhesion between the acoustic matching layer and the aforementioned top layer.
[0021]
Here, the difference between the height in the stacking direction of the cell region provided with
the void and the height of the support is small in order to make it difficult for air bubbles to enter
when the adhesive layer is provided on the uppermost layer. Is preferred. The difference between
the height in the stacking direction of the cell region provided with the void and the height of the
support is preferably 1000 nm or less, more preferably 500 nm or less, and particularly
preferably 100 nm or less.
[0022]
On the other hand, if the difference between the height in the stacking direction of the cell region
provided with the void portion and the height of the support is too small, the stage used when
thinning the substrate easily contacts the vibrating film etc. There needs to be a difference. From
such a viewpoint, the difference between the height in the stacking direction of the cell region
provided with the void and the height of the support is preferably 20 nm or more, preferably 30
nm or more, and particularly preferably 50 nm or more. Therefore, the difference between the
height in the stacking direction of the region in which the void portion is provided and the height
in the stacking direction of the columns is preferably 20 nm or more and 1000 nm or less, and
more preferably 50 nm or more and 100 nm or less.
[0023]
In the first and second embodiments described later, although the covering layer is not
particularly described, the above contents are applied. First Embodiment Method of
Manufacturing CMUT Hereinafter, each step of a method of manufacturing CMUT according to
the first embodiment will be described in detail with reference to FIG.
[0024]
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(1-1) Step of Providing Substrate (FIG. 1 (1)) In the present embodiment, first, the substrate 101
is provided. The substrate is made of a material excellent in smoothness and heat resistance. For
example, a silicon or glass substrate with a thickness of 100 μm to 1000 μm can be used as the
substrate 101.
[0025]
(1-2) Step of Providing First Electrode Protective Layer (FIG. 1 (1)) Next, the first electrode
protective layer 102 is formed on the main surface of the substrate 101 in the stacking direction
α. In the present embodiment, the first electrode protection layer 102 is made of a material
having high electrical insulation and small surface roughness. In addition, the first electrode
protective layer 102 has high coverage and is provided by a deposition method with few defects.
From such a viewpoint, an insulating film such as silicon oxide, silicon nitride, or glass can be
used as the first electrode protective layer, and a film formation method such as CVD or PVD can
be used. When the substrate 101 is a silicon substrate, the first electrode protection layer 102 is
preferably a thermal oxide film because formation is easy. Note that when the substrate is a
material such as glass with high insulating properties, the first electrode protective layer may not
be formed.
[0026]
Each layer and each member provided on the substrate in the following FIGS. 1 (2) to (14) are
provided in the above-mentioned stacking direction α unless otherwise noted.
[0027]
(2) Step of Providing First Wiring Layer (FIG. 1 (2)) Next, a first wiring layer 103 electrically
connected to the lower electrode layer is provided.
The first wiring layer 103 is provided on the region of the substrate from which the first
electrode protection layer 102 has been partially removed. Then, the first wiring layer 103 ′ is
provided on the first electrode protective layer 102 from which the protective layer 102 of the
lower electrode layer is not removed. Although 103 and 103 'are preferably provided in the same
step and method, they may be provided in different steps and methods.
04-05-2019
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[0028]
(3) Step of Providing Lower Electrode Layer (FIG. 1 (3)) Next, the lower electrode layer 104 is
provided on the first wiring layer 103 and the first electrode protection layer 102. Then, the
lower electrode layer 104 'is provided on the first wiring layer 103'. Although 104 and 104 'are
preferably provided in the same step and method, they may be provided in different steps and
methods.
[0029]
When the substrate 101 is insulating, the lower electrode layer 104 may be formed directly on
the surface of the substrate 101. The lower electrode layers 104 and 104 'are made of a material
having a small surface roughness, an excellent heat resistance, and a small electric resistance.
[0030]
The lower electrode layers 104 and 104 'have a high coverage and use a deposition method with
few defects. From such a point of view, the lower electrode layers 104 and 104 ′ are formed,
for example, with a film thickness of 30 nm to 1000 nm as a single layer or multiple layers of
titanium, tungsten, or aluminum by CVD, PVD, etc. Do. The material constituting these lower
electrode layers may be an alloy. The lower electrode layer 104 ′ is preferably formed of the
same material as the lower electrode layer 104 at the same time. The lower electrode layer 104
'may be, for example, 1 μm to 100 μm in diameter, and cells may be disposed between the
cells, or may be provided on the entire surface of the margin in the chip outside the cell group.
[0031]
(4) Step of Providing Second Electrode Protective Layer (FIG. 1 (4)) Next, a second electrode
protective layer 105 for protecting the lower electrode layer is provided on the lower electrode
layer 104. Then, a second electrode protection layer 105 'is provided on the lower electrode
layer 104'. Although 105 and 105 'are preferably provided in the same step and method, they
may be provided in different steps and methods. The second electrode protective layer 105, 105
04-05-2019
9
'is made of a material having high electro-insulation and small surface roughness. In the second
electrode protective layers 105 and 105 ', the electrode protective layer has high coverage and
uses a film formation method with few defects. From such a point of view, the second electrode
protection layers 105 and 105 'can be made of, for example, materials such as silicon oxide,
silicon nitride, and glass, and film formation methods such as CVD and PVD can be used. In
particular, it is preferable to use, as the silicon oxide 105, a material having a high potential
potential at the interface with the lower electrode layer in order to make charging difficult at
pull-in. Therefore, silicon oxide is preferably used as the first membrane layer.
[0032]
(5) Step of Providing a Sacrificial Layer (FIG. 1 (5)) Next, a sacrificial layer 106 is provided on the
second electrode protective layer 105. Then, a sacrificial layer 106 'is provided on the second
electrode protective layer 105'. The 106 and 106 'are preferably provided in the same step and
method, but may be provided in different steps and methods. The sacrificial layers 106 and 106
'are formed by removing the sacrificial layer by etching in steps after the formation of the first
membrane layer described later to form a void in the cell.
[0033]
The sacrificial layer 106, 106 'has a low surface roughness, a high heat resistance, and a material
that can be selectively etched with the material around the sacrificial layer. From such a point of
view, the sacrificial layers 106 and 106 'can be made of, for example, amorphous silicon,
polysilicon, chromium, titanium, tungsten, morbden, or their alloy materials, and use a film
forming method such as CVD or PVD. be able to. For the sacrificial layer etching, an etching
solution containing XeF 2, mixed acid, and hydrogen peroxide as a main solution can be used
according to the material of the sacrificial layer.
[0034]
(6) Step of Providing First Membrane Layer (FIG. 1 (6)) Next, the first membrane layer 107 is
provided in the stacking direction α on the sacrificial layer 106. Then, the first membrane layer
107 'is provided in the stacking direction α on the sacrificial layer 106'. 107 and 107 'are
preferably provided in the same step and method, but may be provided in different steps and
methods. The first membrane layer 107, 107 'is made of a material having high electrical
04-05-2019
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insulation and small surface roughness.
[0035]
The first membrane layer 107, 107 'uses a film forming method excellent in coverage and stress
controllability. From such a point of view, the first membrane layer can be made of, for example,
a material such as silicon oxide, silicon nitride, or silicon carbide, and a film formation method
such as CVD or PVD can be used. The first membrane layer 107 functions as a vibrating
membrane when receiving or transmitting ultrasonic waves. Therefore, it is preferable to use
silicon nitride having appropriate tensile stress as the first membrane layer.
[0036]
(7) Step of Providing Upper Electrode Layer (FIG. 1 (7)) Next, the upper electrode layer 108 is
provided in the stacking direction on the first membrane layer. In addition, an upper electrode
layer 108 'is provided on the first membrane layer 107'. Although it is preferable to provide 108,
108 'by the same process and method, you may be provided by a different process and method.
[0037]
The upper electrode layer uses a material having a small surface roughness, a high heat
resistance, and a small electric resistance.
[0038]
The upper electrode layer has a high coverage and uses a film formation method with few
defects.
[0039]
The upper electrode layer is formed, for example, of titanium, tungsten, aluminum, or
neodymium as a single layer or a plurality of layers with a thickness of 30 nm to 1000 nm by
CVD, PVD, or the like, and an etching method.
04-05-2019
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The material constituting these upper electrode layers may be an alloy.
[0040]
(8) Step of Providing Second Membrane Layer (FIG. 1 (8)) Next, the second membrane layer 109
is provided in the stacking direction on the upper electrode layer.
In addition, a second membrane layer 109 'is provided on the upper electrode layer 108'. 109
and 109 'are preferably provided in the same step and method, but may be provided in different
steps and methods. The second membrane layer 109, 109 'is made of a material having high
electrical insulation and small surface roughness. In addition, the second membrane layer 109,
109 'uses a film forming method excellent in coverage and stress controllability. From such a
point of view, the second membrane layer can be made of, for example, a material such as silicon
oxide, silicon nitride, or silicon carbide, and a film formation method such as CVD or PVD can be
used. The second membrane layer 109 functions as a vibrating membrane when receiving or
transmitting ultrasonic waves. Therefore, it is preferable to use silicon nitride having a suitable
tensile stress as the second membrane layer. When the first membrane layer and the second
membrane layer are provided in contact with each other, it is preferable that the second
membrane layer and the first membrane layer be the same material.
[0041]
(9) Step of Providing Etching Hole (FIG. 1 (9)) The etching hole 110 is for processing a part of
the first membrane layer 107, the second membrane layer 109 and the upper electrode layer
108 to expose the sacrificial layer Provided in Note that when the second membrane layer 109 is
not provided, the etching hole 110 is provided in the first membrane layer 107 and the upper
electrode layer 108. When the area in which the upper electrode layer 108 is formed is smaller
than the area in which the first membrane layer is formed, the etching hole 110 is provided in
the first membrane layer. The etching hole 110 is formed by a processing method with high
processing accuracy.
[0042]
The etching holes can be formed, for example, by etching.
04-05-2019
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[0043]
(10) Step of Providing Void Portion (FIG. 1 (10)) The void portion 111 is provided by etching the
sacrificial layer 110 through the etching hole.
When the void portion 111 is provided by performing a sacrificial layer etching using a liquid,
the void portion 111 is replaced with a chemical solution having a small surface tension and then
dried.
[0044]
For example, an etching gas or an etching solution containing XeF 2, mixed acid, and hydrogen
peroxide water as a main solution can be used in the void portion according to the material of the
sacrificial layer Carbon dioxide can be used. When amorphous silicon or polysilicon is used as
the material of the sacrificial layer, etching is performed using XeF 2− after the silicon oxide on
the surface of the amorphous silicon or polysilicon is removed using hydrofluoric acid.
[0045]
(11) Step of Providing Third Membrane Layer (FIG. 1 (11)) A third membrane layer 112 is
provided on the second membrane layer in the stacking direction. The third membrane layer 112
is formed at least on the etching hole 110. In addition, the third membrane layer 112 is
preferably formed so as to seal the air gap 110 described above. In addition, a third membrane
layer 112 'is provided on the second membrane layer 109'. Although it is preferable to provide
112, 112 'by the same process and method, you may be provided by different processes and
methods.
[0046]
The third membrane layer 112, 112 'uses a material having high electrical insulation. In addition,
the third membrane layer 112, 112 'uses a film forming method excellent in coverage and stress
controllability. From such a point of view, the third membrane layers 112 and 112 'can be made
of, for example, a material such as silicon oxide, silicon nitride, or silicon carbide, and a film
04-05-2019
13
forming method such as CVD or PVD can be used. The third membrane layer 112 functions as a
vibrating membrane when receiving or transmitting ultrasonic waves. Therefore, as the third
membrane layer 112, silicon nitride having a suitable tensile stress is preferably used. When the
third membrane layer and the second membrane layer are provided in contact with each other,
the third membrane layer and the second membrane layer are preferably the same material.
[0047]
(12) Step of Providing Contact Holes (FIG. 1 (12)) In order to expose the upper electrode layer
108 described above in the stacking direction on the second membrane layer 109 and the third
membrane layer 112 to connect the wiring The first contact hole 113 is provided. In addition,
holes are formed in the first membrane layer 107, the second membrane layer 109, the third
membrane layer 112, and the second electrode protection layer 105, and the lower electrode
layer 104 is exposed to connect the wiring. , Second contact holes 113 'are provided. The contact
holes 113 and 113 'can be formed by etching.
[0048]
(13) Step of Providing Second and Third Wires (FIG. 1 (13)) The second wire 114 is provided in
the lower electrode layer 104. The second wire 114 ′ is provided on the third membrane layer
112.
[0049]
A third wire 115 is provided to make an electrical connection with the upper electrode layer 108.
The 114, 114 ', 115 are preferably provided in the same step and method, but may be provided
in different steps and methods.
[0050]
The second wiring 114 and the third wiring 115 are provided so as to be able to input and
output electrical signals from the outside of the capacitive transducer when transmitting and
receiving ultrasonic waves.
04-05-2019
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[0051]
At least one of the above-described steps of: (3) providing the lower electrode layer, (5) providing
the sacrificial layer, (6) providing the first membrane layer, and (7) providing the upper electrode
layer Form a post by the process.
Specifically, the height h2 in the stacking direction outside the region β is made higher than the
height h1 in the stacking direction of the region β in which the void portion is provided. As a
result, the pillars 120 are formed.
[0052]
(14) Step of Reducing Thickness of Substrate (FIG. 1 (14)) The support 120 is fixed to the stage
130, and the substrate 101 is thinned using a grinding stone or the like. As mentioned above, the
support 120 can be formed at the same time as the transducer formation process, without the
need to add a new process. Therefore, a support can be easily provided to thin the substrate.
Further, the support is provided outside the area where the air gap is provided, that is, the area
where the vibrating membrane vibrates when transmitting and receiving the ultrasonic wave.
Therefore, changes in stress characteristics and the like of the vibrating film can be suppressed.
Alternatively, the substrate may be thinned by plasma etching. The etching gas is ionized in a
vacuum state, and the substrate is etched using fluorine radicals or chlorine radicals. At this time,
since the columns are in contact with the chuck surface or the tray of the etching apparatus, it is
possible to suppress the application of a load to the vibrating membrane.
[0053]
Second Embodiment CMUT The configuration of a CMUT according to the present embodiment
will be described using a cross-sectional view (FIG. 2) of the CMUT. In the CMUT according to the
present embodiment, the substrate, the stacking direction on the substrate, from the substrate
side, the first electrode, the insulating film, and the vibrating film, in this order, the insulating film
and the vibrating film And an air gap between them. The vibrating membrane is configured such
that the first membrane and the second electrode are positioned such that the first membrane is
on the side of the gap. The height in the stacking direction in at least a part of the region outside
the region is higher than the height in the stacking direction of the region in which the void
portion is provided.
04-05-2019
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[0054]
Hereinafter, an example of a specific structure is demonstrated. The CMUT 201 according to the
present embodiment has a cell structure 202. The CMUT may constitute an element having a
plurality of cell structures 202. Furthermore, there may be a plurality of elements. Examples of
the shape of the cell structure include a circle, a square, a hexagon and the like.
[0055]
The cell structure 201 includes a substrate 211, a first electrode protection layer (first insulating
film) 212 formed on the substrate, a first electrode layer 213 formed on the first electrode
protection layer, a first A second electrode protection layer (second insulating film) 214 on the
electrode layer is provided. Furthermore, the cell structure 202 has a vibrating membrane
composed of a first membrane layer 216, a second membrane layer 218, a second electrode
layer 219 and a third membrane layer 222. The first membrane layer 216, the second membrane
layer 218, and the third membrane layer 222 are insulating films containing, for example, silicon
nitride. The vibrating membrane is supported by the membrane support portion 217 and is
disposed at a cavity 220 which is a gap. As shown in FIG. 2, a portion higher than the height in
the stacking direction of the region 202 provided with the cavity 220 is provided outside the
region 202. This can also be called a support as in the first embodiment. As shown in FIG. 2, the
support may include a sacrificial layer 221 stacked in the process of providing the cavity 220.
The first electrode layer 213 and the second electrode layer 219 face each other, and a voltage is
applied between the first electrode layer 213 and the second electrode layer 219 by voltage
application means (not shown). Ru.
[0056]
Further, by using the lead wiring 225, an electric signal can be drawn from the second electrode
layer 219. Further, by using the lead wiring 215, an electric signal can be drawn from the first
electrode layer 213. Instead of the lead-out wiring, a through wiring or the like may be used to
lead out the electric signal.
[0057]
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Note that an electric signal may be extracted from the second electrode layer 219 by disposing
the first electrode layer 213 as a common electrode and arranging the second electrode layer for
each element, and the reverse configuration may be employed. Absent. That is, by using the
second electrode layer 219 as a common electrode and arranging the first electrode layer 213
for each element, an electric signal for each element may be extracted.
[0058]
The driving principle of the CMUT will be described. When ultrasonic waves are received by the
CMUT, a DC voltage is applied to the first electrode layer 213 so that a potential difference is
generated between the first electrode layer and the second electrode layer by voltage application
means (not shown). deep. When an ultrasonic wave is received, the vibrating film having the
second electrode layer 219 bends, so the distance between the second electrode layer 219 and
the first electrode layer 213 (the distance in the depth direction of the cavity 220) changes. The
capacitance changes. The change in capacitance causes a current to flow in the lead wire (not
shown).
[0059]
This current is converted into a voltage by a current-voltage conversion element (not shown) to
obtain an ultrasonic reception signal. As described above, a direct current voltage may be applied
to the second electrode layer 219 by changing the configuration of the lead wiring, and an
electric signal may be drawn from the first electrode layer 213 for each element.
[0060]
When ultrasonic waves are transmitted, a direct current voltage can be applied to the first
electrode layer, and an alternating voltage can be applied to the second electrode layer, and the
vibrating film can be vibrated by electrostatic force. An ultrasonic wave can be transmitted by
this vibration. Also in the case of transmitting an ultrasonic wave, the diaphragm may be vibrated
by applying a DC voltage to the second electrode layer and an AC voltage to the first electrode
layer by changing the configuration of the lead wiring. Alternatively, a direct current voltage and
an alternating current voltage may be applied to the first electrode layer or the second electrode
04-05-2019
17
layer, and the vibrating film may be vibrated by electrostatic force. The CMUT according to the
present embodiment has a three-dimensional structure by providing a portion in which the
height in the stacking direction in at least a part of the area outside the area is higher than the
height in the stacking direction of the area provided with the void It becomes an obstacle and it
becomes difficult for an external object to contact the vibrating membrane. As a result, it is
possible to reduce the possibility of changing the stress characteristics and the like of the
vibrating membrane in actual use.
[0061]
101 substrate 102 first electrode protective layer 103 first wiring layer 104 lower electrode
layer 105 second electrode protective layer 106 sacrificial layer 107 first membrane layer 108
upper electrode layer 109 second membrane layer 110 etching hole 111 air gap Part 112 third
membrane layer 113 first contact hole 114 second wiring layer 115 third wiring layer 120
support 130 stage
04-05-2019
18
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