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JP2006066998

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DESCRIPTION JP2006066998
PROBLEM TO BE SOLVED: To reduce various adverse effects caused by a low pass filter while
suppressing oscillation. SOLUTION: In a feedback circuit which has at least one or more
operational amplifier, has a low pass filter in an output part, and performs feedback from the
output part, from an input terminal of the low pass filter to an inverting input terminal of the
operational amplifier A first negative feedback circuit section for feeding back a signal to apply a
negative feedback, and a second for feeding back a signal from an output terminal of the low
pass filter to an inverting input terminal of the operational amplifier for applying a negative
feedback And a negative feedback circuit unit. In this configuration, the second negative
feedback circuit section is provided with first and second two feedback operational amplifiers,
and a non-inverted input terminal of the first feedback operational amplifier is supplied with a
predetermined input signal. Preferably, the output terminal of the low pass filter is connected to
the inverting input terminal. [Selected figure] Figure 1
Feedback circuit
[0001]
The present invention relates to a feedback circuit, and can be applied to, for example, a digital
amplifier.
[0002]
In recent years, digitization of power amplifiers has been rapidly advancing.
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In particular, in the audio amplifier, there is a remarkable thing in full-scale adoption. Devices
equipped with digital amplifiers (so-called switching amplifiers) include DVD players, mini
components, television receivers, personal computers, mobile phones, and the like.
[0003]
In the digital amplifier, a rectangular wave-like digital waveform including high-frequency
distortion is obtained by the switching element which is complementarily on / off controlled, so
high-frequency distortion is removed from the digital waveform to be supplied to a speaker or
the like. It needs to be converted to an analog waveform. This conversion is performed using a
low pass filter (LPF).
[0004]
As this low pass filter, an LC second or higher order filter composed of a coil and a capacitor is
used.
[0005]
By the way, in the low pass filter portion described above, various adverse effects may occur such
as fluctuation of frequency characteristics due to load impedance to the load of the speaker or
the like, distortion increase due to a coil (LPF coil) in the low pass filter, and deterioration of
damping factor. There is.
[0006]
In order to reduce these adverse effects, it is considered effective to apply negative feedback
from the output terminal of the low pass filter (the connection point between the low pass filter
and the load (for example, the speaker)). In the case of a second or higher order filter, the phase
is delayed by 180 ° only in this portion, and it is generally difficult to apply negative feedback.
This is because oscillation occurs if negative feedback is applied in this state.
[0007]
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In order to solve such problems, in the present invention, in a feedback circuit having at least one
or more operational amplifiers, having a low pass filter in an output part, and providing feedback
from the output part, from the input terminal of the low pass filter A first negative feedback
circuit unit for feeding a signal back to the inverting input terminal of the operational amplifier
to apply negative feedback, and a signal from the output terminal of the low pass filter to the
feedback input terminal of the operational amplifier And a second negative feedback circuit unit
for applying feedback.
[0008]
As described above, according to the present invention, it is possible to reduce various adverse
effects resulting from the low pass filter while suppressing oscillation.
[0009]
(A) Embodiment Hereinafter, an embodiment will be described with an example where the
feedback circuit according to the present invention is applied to a digital amplifier.
[0010]
(A-1) Configuration of Embodiment An example of the overall configuration of the digital
amplifier 10 of the present embodiment is shown in FIG.
[0011]
In FIG. 1, the digital amplifier 10 includes input terminals 11 and 12, resistors 13, 14, 26 to 28,
30, 31 and 34, operational amplifiers 15 to 17, a comparator 18, a pulse driver 19, and an FET (
Field effect transistors 20 and 21, capacitors 23, 25, 29, 32 and 33, and a load 35 are provided.
[0012]
When the digital amplifier 10 is for audio, an audio signal is supplied between the input
terminals 11 and 12 as Vi.
[0013]
The non-inverted input terminal of the operational amplifier 15 is connected to the input
terminal 11 via the resistor 13 grounded, and the inverted input terminal of the operational
amplifier 15 is the resistor 14 grounded, the capacitors 25 and 33, and the resistor 34 and are
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connected.
As a result, negative feedback characteristic of the present embodiment is performed via the
inverting input terminal.
[0014]
That is, from the contact 24A on the output side of the low pass filter (LPF) 24 composed of the
coil 22 and the capacitor 23 disposed at the output portion of the digital amplifier 10, the
capacitor 33, the resistor 34, and the inverting input terminal of the operational amplifier 15
Negative feedback is taking place via
In the illustrated example, the LPF 24 is a first-order filter, but it is also preferable to use the
above-described second-order or higher filter.
[0015]
Since the negative feedback is also applied to the operational amplifier 34 from the contact 24B
on the input side of the LPF 24, a double negative feedback is performed.
In a normal digital amplifier, there is only negative feedback from the input contact 24B.
[0016]
The operational amplifier 15 and the operational amplifier 16 are components for negative
feedback from the output contact 24A.
[0017]
The resistors 26, 27, 28 and the capacitor 32 are connected in this order to the inverting input
terminal of the operational amplifier 15 via the capacitor 25, and the contact between the
capacitor 25 and the resistor 26 is connected to the output terminal of the operational amplifier
15. And a capacitor 29 is connected.
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[0018]
The capacitor 29 constitutes a time constant circuit together with the resistor 30, and this time
constant circuit is connected to the non-inverting input terminal of the operational amplifier 17.
[0019]
The noninverting input terminal of the operational amplifier 16 is grounded, and the inverting
input terminal is connected to the contact point of the resistors 26 and 27.
The output terminal of the operational amplifier 16 is connected to the contact point of the
resistors 27 and 28.
[0020]
The output terminal of the operational amplifier 17 is connected to the contact between the
capacitor 32 and the non-inverted input terminal of the comparator 18, and the above-described
capacitor 32 is inserted between the output terminal and the inverted input terminal of the
operational amplifier 17 There is.
[0021]
The comparator 18 is a comparator using an operational amplifier, and a carrier signal CY1
oscillating at a predetermined frequency (for example, 500 kHz) is supplied to its inverting input
terminal, for example. When a signal whose absolute value is smaller than the peak voltage of the
carrier signal CY1 is supplied to the inverting input terminal, the signal output from the output
terminal of the comparator 18 also vibrates according to the frequency.
A triangular wave described later can be used as the carrier signal CY1.
[0022]
The output terminal of the comparator 18 is connected to a driver 19 for driving a switching
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circuit having a complementary MOS (CMOS) configuration including FETs 20 and 21.
Since the FETs 20 and 21 are alternately turned on and off by being driven by the driver 19, a
rectangular wave PWM (pulse width modulation) signal is supplied to the input side contact 24B
of the LPF 24.
[0023]
That is, when the FET 20 is on and the FET 21 is off, the voltage VH is supplied to the input
contact 24B. On the contrary, when the FET 20 is off and the FET 21 is on, the voltage VL is
supplied to the input contact 24B.
Here, for example, the voltage VH is a high level voltage connected to the source of the FET 20,
and the voltage VL is a low level voltage connected to the source of the FET 21.
[0024]
Therefore, it is a rectangular wave digital signal (PWM signal) fed back from the input side
contact 24B.
Further, the analog signal from which high-frequency distortion has been removed from the
digital signal by the LPF 24 is supplied to the load 35 and is also fed back from the output
contact 24A.
[0025]
The load 35 may be, for example, the above-described speaker.
[0026]
Hereinafter, the operation of the present embodiment having the above-described configuration
will be described with reference to FIGS.
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[0027]
(A-2) Operation of Embodiment FIG. 2 shows simulation results corresponding to normal phase
correction.
[0028]
In FIG. 2, the phase Φ is delayed by about -170 ° at a point P11 where the A0 · β characteristic
(signal characteristic returned to the comparator 18) is 0 dB.
This means that the possibility of oscillation is extremely high.
In order not to oscillate, it is necessary to reduce the feedback amount so that, for example, the
A0 · β characteristic becomes 0 dB at around 10 KHz.
[0029]
FIG. 3 is a simulation result when feedforward is performed in the feedback loop by adding one
capacitor (capacitor) in the feedback loop with respect to the digital amplifier having the same
circuit constant as that in FIG.
This capacitor corresponds to the capacitor 29 shown in FIG.
The addition of this capacitor makes the circuit configuration completely the same as the digital
amplifier 10 shown in FIG.
[0030]
Compared to FIG. 2, in FIG. 3, although the place P12 where the A0 · β characteristic becomes 0
dB extends to less than 200 KHz, the phase delay at that place P12 falls within −90 °, so There
is no fear, negative feedback can be applied, and stable operation as a digital amplifier can be
expected.
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[0031]
FIG. 4 shows an overall characteristic after NFB (negative feedback) for the digital amplifier
having the circuit constant of FIG.
At this time, 8 Ω was used as the value of the load 35.
[0032]
FIG. 5 shows the characteristics at no load.
It is the same as FIG. 4 including the circuit constant except that the value of the load 35 is 0Ω.
According to this simulation result, stable operation can be achieved without oscillation even at
no load.
[0033]
FIG. 6 shows the waveform of each part in the digital amplifier 10 shown in FIG.
[0034]
In FIG. 6, the horizontal axis is 0.5 us / div (here, the frequency of the carrier signal CY1 is 500
KHz), and the waveform W1 near the zero line and crossing the zero line many times is When the
voltage VH is 30 volts and the voltage VL is -30 volts, a PWM square wave of 60 VP-P is supplied
to the input-side connection point 24B. It can be lowered to the level shown in FIG.
[0035]
Further, in FIG. 6, it can also be seen that the pulse width of the PWM rectangular wave is
determined at the position where the triangular waveform W2 indicating the carrier signal CY1
and the zero line cross.
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The PWM square wave is supplied from the switching circuit constituted by the FETs 20 and 21
to the input contact 24B.
[0036]
(A-3) Effects of the Embodiment According to this embodiment, oscillation is suppressed by
applying negative feedback not only from the input-side connection point (24B) of the LPF (24)
but also from the output-side connection point (24A). However, various negative effects caused
by the LPF can be mitigated to improve the performance of the digital amplifier (10).
[0037]
For example, it is possible to reduce various adverse effects such as fluctuation of frequency
characteristics due to load impedance with respect to the load (35), increase of distortion by the
coil (22) in the LPF, and deterioration of the damping factor.
[0038]
(B) Other Embodiments In the above embodiment, a number of specific constants are illustrated,
but it is obvious that the present invention can be applied to constants other than those
illustrated.
[0039]
Further, in the above embodiment, the switching circuit has a one-stage configuration consisting
of only a pair of FETs, but it is natural that the switching circuit may have a two-stage or multistage configuration.
By increasing the number of stages of this switching circuit, it is possible to enhance the load
drive capability.
[0040]
Furthermore, regardless of the above embodiment, it goes without saying that switching
elements other than FETs may be used in the present invention.
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[0041]
Note that regardless of the above embodiment, the present invention can be applied to a power
supply circuit (DC-DC converter etc.) and the like.
[0042]
It is a schematic diagram showing an example of circuit composition of a digital amplifier
concerning an embodiment.
It is a simulation result which shows the operation example regarding embodiment.
It is a simulation result which shows the operation example regarding embodiment.
It is a simulation result which shows the operation example regarding embodiment.
It is a simulation result which shows the operation example regarding embodiment.
It is a simulation result which shows the operation example regarding embodiment.
Explanation of sign
[0043]
DESCRIPTION OF SYMBOLS 10 ... Digital amplifier, 11, 12, ... Input terminal, 13, 14, 26-28, 30,
31, 34 ... Resistance, 15-17 ... Op amp, 18 ... Comparator, 19 ... Pulse driver, 20, 21 ... FET
(electric field Effect transistor), 23, 25, 29, 32, 33 ... capacitor, 35 ... load (speaker).
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