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JPH03254299

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DESCRIPTION JPH03254299
[0001]
SUMMARY In an acoustic signal processing circuit comprising a so-called digital signal processor,
an input signal level is detected, and when the input signal level is small, the output signal level is
attenuated. As a result, even if residual noise generated in an analog / digital converter or the like
becomes large due to signal processing, the residual noise appearing in the output signal is
reduced. FIELD OF THE INVENTION The present invention relates to an acoustic signal
processing circuit comprising a digital signal processor. 2. Related Art With recent advances in
digital signal processing technology, sound reproduction apparatuses that perform creation of
sound effects such as reverberation by digital signal processing have been put to practical use.
By using the sound effects generated by Nei's digital signal processing, realistic sound
reproduction can be performed. SUMMARY OF THE INVENTION However, when the digital signal
processor is used, residual noise generated in a configuration upstream of the digital signal
processor, such as an analog / digital converter, is also signal-processed. As a result, the residual
noise is added, resulting in a large value compared to the residual noise before signal processing.
Therefore, when the sound signal level is low, this residual noise is noticeable, which gives the
listener a sense of discomfort. An object of the present invention is to provide an acoustic signal
processing circuit capable of reducing residual noise. Means for Solving the Problems The
present invention comprises an analog / digital converter for analog / digital converting an
analog input acoustic signal, and arithmetic processing of an output of the analog / digital
converter to construct a desired sound field. Detecting an input signal level to the digital signal
processor in an audio signal processing circuit including a digital signal processor for generating
an audio signal for the digital signal processor and a digital to analog converter for converting
the output of the digital signal processor to digital to analog Detecting means, level changing
means for changing an output signal level from the digital signal processor, and an attenuation
rate of the level changing means when the input signal level is smaller than a predetermined
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level in response to the detection result of the detecting means. Control means for increasing the
size of A sound signal processing circuit. Operation According to the invention, the analog input
acoustic signal is provided to the digital signal processor via an analog to digital converter, the
digital signal processor processing the input acoustic signal into, for example, the sound field
desired by the listener. The arithmetic processing is performed with the operation constant
corresponding to, and the initial reflection sound and the reverberation sound are added.
The acoustic signal generated in this manner is output via a digital / analog converter, and
realistic sound reproduction is performed. Detection means is interposed on an input signal line
of the digital signal processor, and level change means is interposed on an output signal line
from the digital signal processor. The detection means detects an input signal level to the
arithmetic processing means and outputs it to the control means. The control means monitors
the level of the input signal, and when the level of the input signal is smaller than a
predetermined level, the control means derives an output to the level changing means and sets
the attenuation factor of the output signal level to a large value. Therefore, when the input sound
signal level is small and residual noise generated by an analog / digital converter or the like is
noticeable, the output signal level is suppressed, thereby suppressing generation of residual
noise without a sense of discomfort in hearing. Embodiment 1 FIG. 1 is a block diagram showing
the electrical configuration of an audio signal processing circuit 20 according to an embodiment
of the present invention, and FIG. 2 is an electrical configuration of an audio reproduction
apparatus 2 in which the signal processing circuit 20 is used. Is a block diagram showing FIG.
From the acoustic signal source 3 realized by a magnetic tape reproducing apparatus, a radio
receiver or the like, acoustic signals of both left and right channels are outputted. This acoustic
signal is separated into each direct sound signal of the front left and right, rear left and right, and
the sum of both left and right channels by the balance / fade adjusting unit 4, and then input to
the signal processing circuit 20. In the signal processing circuit 20, the direct sound signal of the
front left channel from the balance / fade adjustment unit 4 is given to the speaker 5PFL via the
power amplifier AFL and is sounded. Similarly, the direct sound signal of the front right channel
is given to the speaker 5 PFR via the power amplifier APR and is sounded. The direct sound
signal of the sum of both left and right channels is converted into a digital signal by the analog /
digital converter 5 and then input to the digital signal processor 1. An input operation unit 6, a
control unit 7, and a memory 8 are provided in association with the digital signal processor 1,
and the digital signal processor 1 performs initial reflected sound based on the direct sound
signal as described later. Generate sound effect signals such as sound and reverberation. The
digital signal processor 1 outputs sound effect signals at the rear left, right and front center. The
sound effect signal of the rear left channel is converted to an analog sound signal by the digital /
analog converter DARL and added to the direct sound signal from the balance / fade adjustment
unit 4 by the adder BRL, and then through the power amplifier ARL The sound is given to the
speaker 5PRL.
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Similarly, the sound effect signal of the rear right channel is converted to an analog sound signal
by the digital / analog converter DARR, added to the direct sound signal by the adder BRR, and
then applied to the speaker 5PRH via the power amplifier ARR. Sounded. The sound effect signal
of the front center channel is supplied from the digital / analog converter DAFC to the speaker
5PFC via the power amplifier AFC and is acousticized. In the passenger compartment 10 of the
car, the speaker 5PFL is disposed on the front left side, the speaker 5PFR is disposed on the front
right side, the speaker 5PFC is disposed at the front center, and the speaker 5PRL is disposed on
the rear left side The speaker 5PRR is disposed. The sound from the center speaker 5PFC is
reflected by the windshield 11 and radiated into the passenger compartment 10. In this sound
reproduction device 2, for example, three operation modes of hi-fi, casual, and fun key are set.
These operation modes are switched by operating the mode changeover switch 6 a of the input
operation unit 6. When the hi-fi mode is selected, the digital signal processor 1 is turned off, and
the direct sound signal of the sum of both the left and right channels to the analog / digital
converter 5 is directly input to the power amplifier AFC by a configuration not shown. Be done.
At this time, only direct sound is emitted from the rear speakers 5PRL and 5PRR. Also, when the
casual mode is selected, the digital signal processor 1 is turned ON, there is almost no reflected
sound from the floor, and a relatively long delay time assuming a concert hall etc. where there
are many reflected sounds from the wall and ceiling. Reverberation is added. Furthermore, when
the funky mode is selected, reverberation with a relatively short delay time is added, assuming a
live house with a large amount of reflected sound from the floor surface. Referring to FIG. 1, in
digital signal processor 1, the output signal from analog / digital converter 5 is input to
multiplier 21 from input terminal P1. The multiplier 21 multiplies the input signal by a
predetermined coefficient a and outputs the result to the filter circuit 22 in order to prevent
overflow of data in an arithmetic processing process described later. The filter circuit 22 is a
single-pass filter for setting the sound quality of the sound effect, and r-waves the output from
the multiplier 21 at a predetermined cutoff frequency I. The output from the filter circuit 22 is
given to an effect adjustment circuit CRL, CRR, CFC (hereinafter collectively referred to as a
reference symbol C) provided for each of the rear left, right and front center channels.
The output of the filter circuit 22 is also provided to an initial reflected sound generation circuit
24. The initial reflected sound generation circuit 24 generates an initial reflected sound for each
channel of the rear left, right and front center, and the effects Output to the adjustment circuit C.
Furthermore, the output of the filter circuit 22 is given to the reverberation sound generation
circuit 25. This reverberation sound generation circuit 25 produces reverberation sound for each
of the rear left, right and front center channels, and the effects described above are produced.
Output to the adjustment chart Bc. The effect adjustment circuit CRL includes four multipliers 26
to 29 and an adder circuit 30. The direct sound signal from the filter circuit 22 is multiplied by a
coefficient by the multiplier 26, and the initial reflection sound signal from the initial reflection
sound generation circuit 24 is multiplied by the coefficient C by the multiplier 27 to produce a
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reverberation generation circuit 25. The reverberation sound signal is multiplied by the
coefficient d in the multiplier 28. The outputs from the respective multipliers 26 to 28 are added
by the adder circuit 30 and multiplied by the coefficient e by the multiplier 29 which is the level
changing means to adjust the overall level, and then the digital / It is output to the analog
converter DARL. The remaining effect adjustment circuits CRR and CFC are configured in the
same manner as the effect adjustment circuit CRL, and the output from the effect adjustment
circuit cRR is input to the digital / analog converter DARR through the output terminal PRR, and
the effect adjustment is performed. The output from the circuit CFC is input to the digital /
analog converter DAFC via the output terminal RFC. Coefficients a and b of each of the
multipliers 21 and 26-29. The c, d, e, and the cut-off frequency f of the filter circuit 22 are set
corresponding to the coefficient data from the control unit 7 input via the input / output boat 31.
The coefficient data is switched by an input operation to the mode switch 6a of the input
operation unit 6, and is individually set in advance for each of the operation modes. Further, the
operation constants of the initial reflection sound generation circuit 24 and the reverberation
sound generation circuit 25 are set by constant data from the control unit 7 in accordance with
the respective operation modes. The initial reflection sound generation circuit 24 and the
reverberation sound generation circuit 25 perform arithmetic processing on the direct sound
signal from the filter circuit 22 based on the constant from the control unit 7, and the calculation
result is stored in the memory 8 through the register 32. Repeatedly write / read out, thus
producing early reflections and reverberations. An output signal from the analog / digital
converter 5 through the input terminal P1 is given to an input level detection circuit 33.
The detection result of the input level detection circuit 33 is read into the ff1 section 18 through
the input / output boat 31, and the control section 7 responds to the detected input signal level,
for example, a liquid crystal display or a light emitting diode. Drive the display device 9 realized
by On the other hand, due to a mismatch between the zero level of the direct sound signal input
to the analog / digital converter 5 and the zero level of the conversion result of the analog /
digital converter 5, the output signal of the analog / digital converter 5 is generated. Contains
residual noise. Therefore, in the present embodiment, the control unit 7 changes the coefficient e
of the multiplier 29 in the effect adjustment circuit C in accordance with the input signal level
read from the input level detection circuit 33. Therefore, when an input signal showing a change
in signal level as shown in FIG. 3 is applied to the input terminal P1, the output signal from the
output terminals PRL and PRR: PFC changes in level as shown in FIG. Indicates That is, the
residual noise sets three discrimination levels, ie, a level Vrefl which becomes noticeable in terms
of hearing, a level Vref2 lower than the level Vrefl, and an even lower level Vref3. When the
input signal level V is equal to or higher than the discrimination level Vref1, the control unit 7
sets the coefficient e to the value kO according to the operation mode. When the input signal
level V is higher than the discrimination level Vref2 and lower than VreH, the coefficient e has a
value k1 smaller than the value ko. Set to Further, when the input signal level V is not less than
the level V ref3 and is less than Vref2, the coefficient e is set to 2 to a value smaller than 1 and
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the input signal level V is less than the level Vref3. Set the value to 3 less than 2. When the
coefficient e of the multiplier 29 is set to 1 as described above, the output signal level from the
digital signal processor 1 is, for example, 3 dB lower, and when 2 is set to 6 dB lower. When 3 is
set, it becomes 9 dB lower. Note that these values 1 to 3 are set to values that can attenuate the
sound level without a sense of discomfort, considering the gain characteristics of the power
amplifiers A RL and A 'RR; A F C of the latter stages, etc. It is done. The fifth (2I is a flowchart for
illustrating the operation for reducing residual noise as described above. At step n1, the input
signal level 2 detected by the input level detection unit 33 is read as the current value Vi.
At step n2, an average value V AV of the current value Vi read at step 璽 11, the previous value
Vi, and the previous value Vi-z is calculated. At step n3, the values Vi-, Vi-2 are updated for the
next operation. In step n4, it is judged whether or not the average value VAV is equal to or higher
than the discrimination level Vref4. If so, that is, if it is an input signal level at which residual
noise does not matter for hearing, it proceeds to step n5 The coefficient e is set to a value kO
corresponding to the operation mode. In step n4, when the average value V AV is smaller than
the discrimination level Vrefl, the process proceeds to step n6, and it is determined whether it is
the discrimination level Vref2 or more. If yes, that is, if Vref2 ≦ VAv <Vrefl Moving to n7, the
coefficient e is set to one. In step n6, when the average value V AV is smaller than the
discrimination level Vref2, it proceeds to step n8, and it is determined whether it is the
discrimination level Vref3 or more, and if so, that is, if Vref3 ≦ VAv or Vref2, step n9 The
coefficient e is set to the value 1 (2). In step n8, when the average value V AV is smaller than the
discrimination level Vref3, the process moves to step nlD, and the coefficient C is set to 3. Step
n5. From n7 ° n9 nlo proceed to other operations such as the level display. Note that this
operation is performed, for example, every 25 m5 ec. Thus, in the present embodiment, when the
input signal level V becomes a value at which the residual noise becomes noticeable in terms of
hearing, the average value V AV of the past input signal levels V Since the output signal level is
reduced on the basis of audio signals so as not to cause discomfort, residual noise from the
digital signal processor 1 can be reduced. When the control unit 7 can detect the input signal
level by the multiplier 21, the input level detection cycle B33 may be omitted. FIG. 6 is an electric
circuit diagram of another embodiment of the present invention. In this embodiment, an
attenuation circuit 41 is provided at a stage subsequent to a digital / analog converter DAr (L,
DARR; DAFC (hereinafter collectively referred to as a reference DA). The attenuation circuit 41
includes, for example, three transistors Tr1 to Tr3. The collectors of the transistors Tr1 to Tr3
are connected to the acoustic signal line 42 via the resistors R1 to R3, respectively.
The drive signal from the control unit 7 is input to the bases of the transistors Tri to Tr3, and the
emitters of the transistors Tri to Tr 3 are grounded. The output of the digital / analog converter
DA is given to the signal line 42 via the protective resistance RO. The resistances of the resistors
R1 to R3 are different from each other. Therefore, in response to the control signal from the
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control unit 7, the transistors Tr1 to Tr3 are selectively turned on, and the power amplifier is
operated via the acoustic signal line 42. ARL, ARR: The signal level output to AFC is attenuated.
Thereby, residual noise generated in the digital / analog converter DA can also be reduced. As
described above, according to the present invention, when the input signal level to the digital
signal processor is small, the attenuation factor of the output signal level from the digital signal
processor is set to a large value. When it is small and residual noise is noticeable, the output
signal level can be kept low. As a result, residual noise can be suppressed without a sense of
discomfort in hearing.
[0002]
Brief description of the drawings
[0003]
A 111N is a block diagram showing an electrical configuration of the acoustic signal processing
circuit 20 according to an embodiment of the present invention, FIG. 2 is a block diagram
showing an electrical configuration of the acoustic reproduction device 2 using the signal
processing circuit 20, 3 is a graph showing changes in input signal level to the digital signal
processor 1, FIG. 4 is a graph showing changes in output signal level from the digital signal
processor 1 corresponding to the input signals shown in FIG. FIG. 5 is a flow chart for explaining
the residual noise reduction operation, and FIG. 6 is an electric circuit diagram of another
embodiment of the present invention.
DESCRIPTION OF SYMBOLS 1 ... digital signal processor, 2 sound reproduction apparatus, 3 ...
sound signal source, 5 analog / digital converter, 6 ... input operation part, 7 ... control part, 9 ...
display device, 20 ... sound signal processing circuit, 21.26-29 ... multiplier, 24 initial reflection
sound generation circuit 25 reverberation sound generation circuit 33 input level detection
circuit 41 attenuation circuit , CRL, CRR, CFC effect adjustment circuit, DA: digital to analog
converter, 5 PFL, 5 PPR, 5 PFC; 5 PRL, 5 PRR, speaker
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