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JPS607297

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DESCRIPTION JPS607297
[0001]
The antibody 852 is, on the other hand, connected to the system ground via a collector 854. The
junction of the resistor 852 and the capacitor 854 is connected to the emitter of the transistor
850 via the resistor 856. The haze of the transistor 850 is connected to the cathode of the diode
858 but is connected to the anode of the diode 858 (through the resistor 860 to the port E). The
signal of the port F2 (Cil-1: automatic bypass circuit 282 shown in detail in FIG. 17G and 1.71) is
supplied. Here, resistors 860A and 860B are connected together to port E. The emitters of
transistor 850 are also connected to the non-inverting input of amplifier 866 via capacitors 862
and 864, respectively. The amplifier 866, on the other hand, is connected to the capacitor 870
via a resistor 868'i, while the capacitor 870 is connected to port D for the right channel path
257A, and each of the input buffers 254 shown in FIG. 17A. And receive The junction of resistor
868 and capacitor 870 is connected through resistor 872 to the system ground. The noninverting input of amplifier 866 is also connected to one electrode of FET transistor 874, which
is connected to the system's pond electrode (which is connected to system ground). The
transistor 874A and 874B gates of both channels are each connected through resistor 876 to a
common junction 878 of port F- \, which is connected to a suitable power supply. Finally, the
output of amplifier 866 is connected through resistor 878 and capacitor 880 to resistor 882.
Resistors 882A and 882B are connected to the right side channel output terminal 278A and the
left channel output terminal 278B, respectively, which is connected to the right channel of the
system preamplifier (not shown) while the The 4M child 278B is connected to the left channel of
the system preamplifier. A preferred embodiment of the Ni + J pathway of the sixteenth
illustrated system will now be described in detail. In FIG. 17G, each channel input 252 has all the
pairs of input terminals J @@, that is, the negative input terminal 900 and the positive input
terminal 902. The two input terminals form the input of balanced to unbalanced converter 279.
It is connected to the positive input terminal 902 through the terminal 900fi parallel resistor
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904'i. Terminal 900 is also connected to capacitor 908 via resistor 906, which in turn is
connected to system ground.
Resistor 906 is also connected to the inverting input of amplifier 912 via resistor 910i. Terminal
902 is connected to capacitor 916 via resistor 914, which in turn is connected to system ground.
Resistor 914 is also connected to the non-inverting input of amplifier 912 via resistor 918. The
non-inverting input of amplifier 912 is also connected to system ground through resistor 920i.
The output of amplifier 912 is connected via feedback resistor 922 to its inverting input. The
output of the amplifier 912 is connected to the input of the power monitor circuit 280 (detailed
in FIG. 17H) and to the input of the automatic bypass circuit 282 (detailed in FIG. 1.7G and 171).
Ru. More specifically, as shown in FIG. 17H, the output of the amplifier 912 of each converter
279 (FIG. 17G) connects the output of the amplifier to the input of the frequency 61-quantity
filter 284. Are connected to the input of the power monitor circuit 280. The input of the filter
284 is a capacitor 924 f, which in turn is connected to each of the resistor 9.26 and the capacitor
928. The resistor 92 G and the capacitor 928 are, on the other hand, connected to the resistor
930. Resistor 930, in turn, forms the output of filter 284 and is connected to the input of level
detector 286. As described above, the detector 28G preferably uses an RMS detector that
generates a DC signal as a function of the RMS value of the input signal. The resistor 932 is
preferably connected between the input and the output of each detector (C-connected, while the
output of the detector 286 is connected to the input of the two-way comparator circuit 228 via
the resistor 934. Resistor 934 is, in turn, connected to the non-inverting input of amplifier 936,
but connected to the inverting input of the amplifier (through resistor 938 to junction 940).
Junction 940 is both channel 1 (common. The inverting input of amplifier 936 is connected to
the anode of diode 942, the cathode of which is connected to the output of the amplifier]. The
output of the amplifier 936 is connected to the anode of a diode 944 but is connected to the
cathode of the diode 944 (ri, while it is connected to the junction 946 common to the channels of
the two swords). Junctions 940 and 946 are connected to power threshold detector 290 and
display 950 + cC, respectively. More specifically, junction 940 is connected to resistor 952 of
detector 290.
Resistor 952 is connected to the inverting input of amplifier 954. The inverting input of amplifier
954 is also connected to the voltage source via resistor 956 and to the wiper arm of
potentiometer 960 via resistor 958. The noninverting input of amplifier 954 is connected to the
system ground IC while its output is connected to the anode of diode 962. The cathode of diode
962 is connected to the inverting input of amplifier 954. The output of multiplier 854 is still
connected to the cathode of diode 946, while the anode of diode 964 is connected to the
inverting input of resistor 966 wiper. The use of diode 964 is connected to the non-inverting
input of amplifier 968, the output of which is connected to its inverting input. 1iV increase? The
inverting input and the output of the comparator 968 are connected to the control input cuff 86
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of the gain control circuits 27 OA and 270B of FIG. 17E, respectively. The junction 946 of the
two-way comparator circuit 288 is connected to the input resistor 976 of the display 950 of FIG.
17H. The resistor 976 is, on the other hand, connected to the wiper arm of the potentiometer
960 of the value detector 290 through the resistor 978. Resistor 976 is also connected to the
non-inverting input of each amplifier 98 o 1982 and 984. The amplifier is used to drive all the
light emitting diodes 986, 'Bt 8 and 990. Thus, a negative voltage source is connected through
resistor 992 to the inverting input of amplifier 982. The resistor 992Q is connected to the
inverting input of the amplifier 982 via the entire resistor 994. Resistor 994 is in turn connected
through resistor 996 to the inverting input of amplifier 984. The inverting input of amplifier 984
is in turn connected to system ground. The output of amplifier 980 is connected to the anode of
diode 98G, but is connected to the cathode Q of diode 986 and the output of amplifier 982. The
output of amplifier 982 is connected to diode 988, while the cathode of diode 988 is connected
to the output of amplifier 984. Finally, the output of amplifier 984 is connected to the cathode of
diode 990, while the cathode of diode 990 is connected to a suitable voltage source. The output
of the amplifier 980 (also connected to the collector of the transistor 998, but the emitter of the
1-node is connected to the resistor 1000, which is biased by the voltage source. The base of
transistor 998 is connected through resistor 1002 to system ground as well as to the cathode of
diode 1004.
The anode of the diode 1004 is connected to the resistor r 1006 '(r via the r r source). Referring
back to FIG. 17G, the output of balanced unbalanced converter 279 is still connected to input 1
of automatic bypass circuit 282. More specifically, the output of the amplifier 912 is connected
to the input cont 'of the gain amplifier stage 294 of the circuit 282; The capacitor 101O, on the
other hand, is connected to the system ground 1 (through the entire resistor 1012). Contin .phi.
1010 is also connected to the non-inverting input of amplification 'l 1014; The output of
amplifier 1o14 is connected through resistor 101G to the inverting input of the amplifier, while
the inverting input is connected through resistor 1018 'to system ground. The output filter 1210
of the amplifier 1014 is connected to the resistor 1 o 22 via the capacitor 1020 ? r of the
amplifier 2, which in turn is connected to the capacitor 1024. The capacitor 1024 is connected
to system ground. Resistor 1022 is also connected through resistor 1026 'to the inverting input
of amplifier 1o28 of signal averaging detector 298. The non-inverting input of amplifier 1028 (is
connected to system ground while its inverting input is connected to the anode of diode 1030).
The cathode of diode 1030 is connected to the output of the amplifier. The output of amplifier
1028 is in turn connected to the emitter of transistor 1032. Meanwhile, the transistor 1032 ilj:
has a collector and a base connected to each other of the amplifier 1028 and to the inverting
input of the amplifier 1028. The emitter of transistor 1032 is connected to the emitter of
transistor 1034. The transistor 1034 is connected to the collector and the base (r is connected to
each other, to the system ground through the capacitor 1036, and to the voltage source through
the resistor 1038i. The base and the collector of the transistor 1034 are connected to a resistor
1040, while the resistor 104, 0 is in turn connected to a resistor 1046 via a capacitor 1044. The
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resistor 1046 is in turn connected to the junction formed by the capacitor 1042 and the resistor
1048. Resistor 1048, on the other hand, is connected to system ground. The resistors 1046 and
1048 are closely read by inverting the input of the amplifier 1050 shown in FIG. 17I. Still
referring to FIG. 17G, the output of the average detector 298A at the base-collector connection of
transistor 1034A is connected to resistor 1054 via resistor 1052ff.
The resistor 1054 id is connected to the system ground. The base and collector of the transistor
1o 34A are also connected to the resistor 1058 via the nodena 1056. The resistor 1058 is
connected to the system ground via a resistor 1054 and to the system ground via a capacitor
1060. The junction of resistor 152, resistor 1058, resistor 1o 54, and capacitor 1060 is
connected to the inverting input of the second multiplier 1106 shown in FIG. 17I. In FIG. 17I, the
noninverting input of amplifier 1050 is connected through resistor 1064'i to the system ground
and through resistor 106G to junction 1068. The non-inverting input of amplifier 1062 is
connected through resistor 1070 'to the system ground and through resistor 1072' to junction
1068. The output of amplifier 1050 is connected to the noninverting input of feedback capacitor
1074 and feedback resistor 1076f, respectively. Similarly, the output of amplifier 1062 is
connected to its non-inverting input via a feedback capacitor] 078 and feedback resistor 1080i,
respectively. The junction 1068 is connected to one contact 1082 of the switch 1088. The
contact 1084 of the switch 1088 is connected via a resistor 1090 to the electric J "E source as
well as to the wiper arm of the potentiometer 1092. The contact 108G of the switch 1088 is
connected via a resistor 1094 to a voltage source as well as to the wiper arm of the
potentiometer 1096. The contact 1086 of the switch 1088 is also connected to one side of the
resistor of the potentiometer 1096 via a resistor 1098'e, but the (In-side of the resistor is
connected to a voltage source. Resistor 1098 is still connected to the wiper arm of potentiometer
1092 via resistor 1100i. The resistor 1098 is also connected to one system arm 1. The switch
1088 is thus the first position where the resistors 1094 and 1098 and the potentiometer 1096
are connected in the circuit, and the second position where the resistors 1090 and 1100 and the
potentiometer 1092 are connected in the circuit. The sound can be moved open with. The
outputs of the two amplifiers 1050 and 1062 are connected to each other and to a resistor 1102,
which in turn is connected to one voltage source. The output of comparator 300, formed by the
connection of the common connection of the outputs of amplifiers 1050 and 1062, is connected
to the non-inverting input of amplifier 1104 and to the inverting input of amplifier 1106.
The inverting input of amplifier 1104 and the noninverting input of amplifier 1106 are
connected to the system arm. The output of comparator 300 is also connected to contact 1108 of
switch 1114. The contacts 1110 are not connected while the contacts 1112 of the switch are
connected to a suitable voltage source. The contact 1118 of the second switch 1116 is not
connected, while the contact 1120 of the switch is connected to an appropriate voltage source
via resistors 1122, i. The third contact 1124 is connected to the cathode of the light emitting
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diode 1126, the cathode of which is connected to the output of the amplifier 1104. The contact
1124 of the switch 1116 is also connected to the cathode of the diode] 128, while the cathode of
the diode is connected to the anode of the light emitting diode 1130. The cathode of the diode
1130 is connected to the output of the amplifier 1106 and is also connected via a resistor 1132
to a suitable voltage source. The output of amplifier 1106 is connected directly to port E, which
is connected to resistors 860A and 860B of output circuit 276. In the preferred t7 embodiment
of the system shown in FIGS. 17A-17i, the resistors and capacitors have the values shown in
Table B. Here, the resistor is indicated by the prefix R and its value is indicated in ohms. Koni and
nodensa are denoted by the prefix C, and their values are denoted by farad. Also, the letters "K" id
kilohm, "M" means megaohms, uf means microfarads, "" nf "means nanofarads and -1pr ++ 14
picofarads. B table input buffer 254 A + B element value R326A, B 220C330A, B 100 pf R332 A,
B 220 R334 A, B IKC 336 A, B O, 1 u f R 338 A, B LMC 348 A, B 1.00 pf R 250 A, B LMR 352 A,
B LMC 354 A, B 100 pf R 356 A, B B LMC 358 A , 1uf R 362 A, B LMB table (cont.) Low pass
filter 256 A, B element 1 straight R 336 A, B 27 KR 373 A, B 33 KR 374 A, B 18 K C 378 A, B
680 p F R 390 A, B 16 K C 392 A, B 220 p C C 394 A, B O, 1 u f R 396 A, B 33 K C 398 A O, 1 u f
C 400 A, B 04 Luf R 402 A, B 2 0 KR4, 06 A, B Table 18 (Cont.) Automatic balancing circuit 258
element value C410 A, B 0.1 uf R 412 A, B 20 K C 422 A, B 470 uf R 424 A B 1.8 MR 426 A, B
LMR 4301 MC 432 100 p F R 431 N c R 4420, 1 uf R 44 816. Equalization circuit 260A, B
element value R, 508A, B 15 KR 510 A, B 33 KC 512 A, B 3. 30 f R 516 A, B 240 KR 518 A, B
240 KR 520 A, B S, 2 KR 522 A, B 470 R 524 A, B 2 и 2 K C 526 A, B O, 1 u f C 528 A, B 47 K P R
530 A, B 12 K R 534 A, B 10 K C 538 A, B 4.7 N f R 540 A, B 27 K R 542 A, B 10 K C 544 A, B
4.7 K R 546 A, B 10 K R 548 A, B 2.2 K R 552 A, B 15 K R 554 A, B , B 12 KR 562 A, B 10 K C
564 A, B 2.2 N f R 568 A, B 91 K R 570 A, B 91 K R 572 A, B 750 C 574 A, B 33 N f R 576 A, B
3.9 K R 578 A, B 7.5 K R 580 A, B 16 K C 582 A B 15 nf R 592 A, +3 Table R (continuous low
frequency equalization cut-off) in the table B (following) Low frequency equalizing cut-off circuit
R element R6187, 5 KR 6250 6 KR 6210 KC 6280, 1uf R 630 '39 KC 6 364 0f Table of highfrequency equalization control circuit 266 element Value I likelihood 702 6.8 KC 70415 nf C
7040, 1uf R 7104-7 KR 71, 44 KR26710KC7180, 15ufR72210 KR7402, 21 (Table B) Output
matrix 268 elements Value R75010 KR 752 LOKR 7565, I KR 7 1010 KR 7263 KR 7610 KR 7
1010 KR 7725, IKR 7710 KB Table (following) gain control 270 elements Value C780, A, B, B 0.1
uf C 782 A, B 7 L B 1 oopf R 79, IA, B 16 KB table (cont.) High frequency tone control 272 A, B
factor value R796 A, B 5.
????????????????????????????????????????
????????????????????????????????????? IKR 814A, B
2.7 KC 816, A, B 47 mouth f B Table (cont.) High-pass filter 274 A, B element value C 820 A, B O,
1 u f C 822 A, B O, 1 u f R 826 A, B 680 KR 836 A, B 200 KR 838 A, B 24 KR 840 A , D 2-IKB
Table (cont.) Output Automatic Bypass Switch Circuit A, B Element Value R 852 A, B 2201 (C 854
A, B 4.7 uf R 856 A, E 220 KR 860 A, B 47 K C 862 A, B 4 .. 7 u C 864 A, B O, 1 uf R 868 A, B 6.8
K C 87, OA, B 22 R 872 A, B 220 KR 876 A, B l MC 880 A, B 100 p f R 882 A, B 220 B (in
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succession) balanced nonequilibrium converter 279 A, B Element R904A, BIKR906A, BIKC908A,
B220pfR910A, B10KR914A, BIKC916A, B220pfR918A, B10KR920A, B 1.5 KR 922A, B 1.5 KB
Table (continued) Power monitor circuit 280 filter 284A, B element Value C 924 A, B O, 1 u f 1
'(926 A, 868 K C 928 A, B 1 port f R 930 A, 8 33 level detector 286 A, B element value R 932 A,
8 22 MR 934 A, 13 1002 person comparison circuit 288 element value R 938 A, B 100 power
threshold Detector 290 elements 1 series R95210 KR956680 KR 9581 MR96020 KR 9610
power display 950 elements Value R97610 KR 978 LMR 9 22, 7 MR 994 LOOKR 996, 8 KR 100
O 120 R 100 247 KRIO 0610 Table B (following) automatic bypass circuit 282 gain amplification
stage 294 A, B element value Cl 0 LOA, B 47 n f R 1012 A, B 100 KR 1016 A, B 33 KR 1018 A, B
i K filter 296 A, E element value C 102 OA, B Q 15 uF , B 18 T (C 1024 A, B 2.2 nf R 1026 A, B
IOK average detector 298 A, B element value C 1036 A, B 47uf R 1038 A, 1320 with comparator
300 A, B element value R 1040330 KR 10420, 4, 7uf C 1044, 7uf R 1046 150 KR 1048 330
KR], 052 330 KR, 054 330 KCl056 4.7uf R10583330KC10600, 470fR1064330R1066'1 to 1
(1070330R107220KC1o74 10ufR), 076 LOOKC 107810n fR1080100 KR 1090 infinity
R109220 KR 1094 infinity R109620 KR1098 infinity R11024 infinity to 7 display elements
value R1122 2, 2 KR Wh IIC shows a system jri, which substantially balances the signal energy
level between two acoustic channels for an entire period 1 (over all the time).
This is achieved (and is achieved by the switches 45G and 478 of the automatic balancing circuit
258 in the position shown). Circuit 258 compares the signal energy levels in each channel from
filters 256A and 256B. The filter passes all signal energy in the acoustic range between about 20
Hz and 20 KHz while removing the preferred 1 /) noise outside this range. Each of the signal
average detectors 408A and 408B generates an output signal as a function of the average power
detected in the corresponding channel over a relatively long period k (two times FL). The two
outputs of detector 408 are compared by operational amplifier 428 to provide a difference
signal. If the output of amplifier 428 is positive, the average signal energy is higher for the left
channel than for the right channel, and if it is negative, the average signal energy for the right
channel is higher. This difference signal is corrected by the operational amplifier 440, added to
the control power of the gain control circuit 270B at port G, inverted by the amplifier 468, and
applied to the control cuff 88A of the gain control circuit 270A at the port H. . The two signals
generated at ports G and H are thus approximately equal and opposite in polarity and the control
signals provided at control input cuff 88 of circuit 270 are relatively large in one channel Give
attenuation, the other channel) (give little attenuation). Potentiometric sharpening 472 is used to
adjust the relative value of the two signals applied to ports G and H so as to obtain proper
balance. For example, when it is necessary to have an automatic balancing function as when a
specific record is being issued, at the time of l and y, the switches 462 and 478 are put in a
position not shown in FIG. 17C. 17A-17I (The system shown in FIG. 17A prevents the earth /
tooth loudspeaker from being overdriven. This is accomplished by the power monitor 280. More
specifically, the two power sources provided at the J, 7G '21 inputs 252A and 252B are
transmitted and / or converted by transducers 279N and 279B. The output signals of converters
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279A and 279B are filtered by frequency metric filters 284A and 284B shown in FIG. 17H. The
frequency metric filter 284 preferentially sends mid and high frequency signal energy to the mid
and tweeter speaker drivers, respectively, because these speaker drivers are more sensitive to
excess power than the corresponding woofer .
The outputs of the filters 284A and 284B are sent to RMS level detectors 286A and 284B, which
generate a DC output signal as a function of the RMS value of the corresponding input signal to
the detectors. . The DCflt control output signals of each detector are compared 1 to each other by
the two-way comparator circuit 288. The two-way comparator circuit produces one output signal
as a function of the larger of the two signals. This dog signal is compared with the reference level
to be bite by the potentiometer 960 of the power threshold detector 290. If the power exceeds
the level determined by the potential difference 960: ░ C 1, one output signal is sent to the
buffer amplifier 968 which, on the other hand, each of the gain control circuits 270 and 270 B
Send one signal (with a DC value as a function of the signal applied to its non-inverting input) to
the control input of. As known in the art, this gain control circuit is responsive to the amplitude
of the DC control signal output of the amplifier 268 of the signal gain total power threshold
detector 290 applied to the signal sent to each of the main signal paths of each channel. Fix IF as
this function. Generally, as the DC control signal output 1 node goes high, the gain control circuit
applies a large reduction to the gain applied to the main signal. Finally, the system of FIGS. 17A17I senses the power delivered to each of the loudspeaker inputs of the stereophonic system, at
least element 256 when the power delivered to one of the loudspeakers is less than the lowest
level of frequency. Connect the signal path defined by -276 to the corresponding output 278,
while connect the outputs 278A and 278 BK via ports C and D corresponding to the detection
257A and 257Bi when the detected power falls below the lowest level. This is accomplished by
the automatic bypass circuit 282 shown in FIGS. 17G and 17I. Circuitry 282 senses the
corresponding right and left channel speakers 1 (the right and left power signals (f detected) at
inputs 252A and 252B. As the sensed power signals are transmitted and / or converted by
converters 279A and 279B, they are then amplified by gain amplification stages 294A and
294BK. The signals thus amplified are filtered by bandpass filters 296A and 296B and sent to
signal average 1 noch detectors 298A and 298B. The detector it produces a total output of
average power levels transmitted over a long period of time to its input, rapid signal changes
substantially do not affect the outputs of the detectors 298A and 298B .
As long as the output signal of the detector 298 is higher than the reference level set by the
potentiometer 1092 or the potentiometer 1096 of the comparator 300 (by setting the switch
1088), the potentiometer sends an output to the switch driver 302, The driver 302 increases the
signal level sent to port E all the way. As shown in FIG. 17F, the signal at port E is sent to the
bases of transistors 850A and 850B when the signal level at port E is high enough that the
transistor conduction state ? is filtered and filtered. The signal outputs from units 274A and
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274B enable transmission at company outputs 278A and 278B + while making signal paths
278A and 278B-e nonconductive. However, when the power level is at the lowest level specified
by the potentiometers 1092 or 1096 of the comparators 300A and 300B (?, the output of the
level detectors 298A and 298B is set to each of the comparators 300A and 300B The signal level
of the signal sent to port E falls below the level at which transistors 850A and 8-50 B f are kept
conductive. However, for example, when only the earphones are listening at all times, the signal
paths 257A and 257B are connected to the corresponding outputs 278A and 278B. The
invention therefore provides an entire single loudspeaker system with one or more of the
following advantages. Using a conventional loudspeaker driver, for example of the
electromagnetic type, the loudspeaker can easily be configured to have both a substation wave
number response and a constant powerless boss in the forward direction. It is. When the drivers
can be made directional by known methods by placing the drivers in a fixed spatial arrangement
and adjusting the phase and amplitude of the driving signal sent to each driver in a known way
By being configured to obtain a specific frequency and power response, it is essentially
independent of the listener's position along the listening distance which is at a fixed distance
from the loudspeaker and does not cross the line extending between the loudspeakers. It is an
ability to reproduce all three-dimensional acoustic images. The modified crossover network
shown in FIGS. 15A-15C can be used with all amplifiers waiting for sufficient power, with a
substantially constant input impedance as a function of frequency. The automatic bypass circuit
282 senses the power level sent to the loudspeaker and maintains the signal path full conduction
through the elements 256-276 only if the sensed power is at least above a predetermined
minimum level.
Power monitor circuit 280 prevents the loudspeaker from over-stimulating. Autobalance circuit
258 id substantially balances the signal energy levels between the two acoustic channels over
time. Each loudspeaker 28 and the crossover network of FIGS. 15A-15C can provide any type of
radiation distribution pattern by changing the location of the loudspeaker drivers and / or
changing the elements of the crossover network. When the loudspeaker is placed against the wall
or at a corner, it acts as a wall and corner total acoustic reflector, taking the radiation dispersion
pattern into account for these reflectors, and determining the relative position of the pattern for
all loudspeakers It can be adjusted to the pattern. However, it is always substantially independent
of the frequency response (.. angle around the vertical axis in any direction within the listening
area). In addition, the automatic balancing circuit 260 is used with the gain control circuit 270,
and the automatic bypass circuit 282 is used for the automatic bypass switch of the circuit 276,
and it detects all the power of the loudspeaking power. Although it has been described to be used
for each of these (... Any device can be used to receive an acoustic signal, eg a tape recorder. It is
not necessary to make changes to the device described above without departing from the scope
of the present invention (it is not the case that 1'3T is applied, and all the matters shown in the
above description or the attached drawings are for the purpose of illustration). It is not intended
to limit the scope of the present invention.
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[0002]
Brief description of the drawings
[0003]
FIG. 1 shows a typical prior art loudspeaker with one woofer, one mid-frequency speaker and one
tweeter; FIG. 2 is a cross-sectional view taken along line 2-2 of FIG. Figures 3A and 3B show
typical 't, c radiation dispersion patterns at two different frequencies of a typical woofer; Figures
4A and 4B (each with a typical mid-range speaker and a typical Fig. 5 shows a typical radiation
dispersion pattern at two different frequencies of the tweeter; Fig. 5 is a schematic prior art lau
as shown in Figs. Power output as a function of frequency at which the frequency response is
constant: a full graphical illustration; FIG. 6 is a simplified plot of the power output of a
loudspeaker as a function of frequency, such that the power output is constant; FIG. 7 is the
present invention ? FIG. 8 is a cross-sectional view of the woofer taken along line 8-8 of FIG. 7;
FIG. 9J: line 9-9 of FIG. 10 is a cross-sectional view of the tweeter cut along line 10-10 of FIG. 7;
FIG. 11 is a comparison of the tweeters of the preferred embodiment of the present invention;
Fig. 12 shows a typical radiation dispersion pattern at a relatively low frequency of the tweeter of
the preferred real Ml embodiment of the present invention; Fig. 13 shows a three-dimensional
radiation dispersion pattern at a relatively high frequency; Acoustic imaging and plan view of a
prior art stereophonic loudspeaker system to illustrate the entire problem of the prior art; Fig.
14: Generation of a stereophonic echo image essentially independent of the position of the
listener at (a) along a sun-shining line) Small amount of FIG. 15A-15C is a plan view of a
loudspeaker system including at least two loudspeakers; FIG. 15A-15C. FIG. 16 is a schematic
diagram of a preferred embodiment of the crossover network used in the present invention; FIG.
16 shows various novel features of the present invention. And FIG. 17A-17I is a schematic
diagram of the preferred embodiment of the system shown in FIG.
[Description of the symbols of the main parts] Loudspeaker cabinet ииии ? ? 28 woofer иии 32A,
32B, 32C, 32B midrange speaker иии 34A, 34B, 34C, 34D tweeter иии 36A, 36B, 36C, 36D36E , 36F
+ applicant: De Heat X. Clean-up of the Incorporated drawings (without change to the contents)
rFIG / FIG 2 F / ? 3 FIG 4 FIG 9 FIG, 10 F / (5, 2 H 6/3 H ? / 4 ''-'vQ "(' * II <'J ?' ''- 1 = ? 888:
II ? ? tea 1: 88 fossa 1111 size и и и Seedling gHl ,,. ░ 8 ░ 8 bow 1 history 1111 effect. 1 ? 1
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secondary, 1 :: lj, en urine:: II l '1 I--11- ????? Photo 1 ? Ya, 91 T. 'O Jockey ? 1 ? 1 1 tile
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? ? 7 7 July 19, ?? ? 19 ? ?? ?] Showcase of the case 1984 Patent No. 113241 2 name
of invention Loudspeaker of invention (3) Relationship with person who has made a supplement I
2 Patent applicant 4 agent (1) As shown in the attached sheet, submit one full-text specification
to be printed. Appeal: I submitted a written statement at the beginning of the application, but I
will replace it with a typed statement.
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