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JPS5133959

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DESCRIPTION JPS5133959
(2000 yen) Patent Office Secretary 1 Title of Invention 0 Japanese Patent Application Laid-Open
No. 51-339590 Published Japanese Patent Application No. 51. (1976) 3.23 Japanese Patent
Application No. 9/19, Japanese Patent Application No. ? 2 7.7 7.7 ',' 77672 J specification 1,
title of the invention 1, title of the invention sound quality adjustment device 2, claim category
Input The signal is passed through a high pass filter path, a band pass filter circuit and a tenth
low pass filter circuit respectively, and divided into respective frequency bands of a high band
signal, a mid band signal and a low band signal, and these three rounds The signals divided into
liquid number bands are respectively applied to the amplitude control circuit. And the tone
adjusting device configured to adjust again the relative levels of the signals in the respective
frequency bands and to constitute again by the ? addition circuit, and the high-pass filter circuit
receives the input signal by the resistor and the capacitor t. A sound quality adjustment
apparatus characterized by using one that is applied to a low pass filter circuit of II2 and
configured to take out a signal of a difference between an obtained signal and the input signal.
7 ? f 1 '! 'A & [phase] Japan Patent Office
The present invention relates to a sound quality adjustment device used for a four-channel stereo
device among two-channel stereo devices. At the same time, using a variable resistor S ?-for
high tone ms and a low paste WiM variable resistor as a plaster tone * device, the feedback
circuit of the amplifier is used during a 90 uml quality adjustment ** NFII tone control *
equipment is well known for% /%. Then, as shown in FIG. 8 of the cmim tone adjustment tone
diagram adjustment device, resistance Rt1. Connect four series of variable resistance---and
connect series-path t-of capacitor Q12, C1Sm variable resistor vRH in parallel to this series
surrounding path, capacitor between the above variable resistor vILLOll constant terminals CHB,
(:! Connect u and connect the movable terminal KII of the variable resistor ? with the movable
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terminal KII of the variable resistor ? via the resistor ILzs, and connect its 11I ? point to the
output terminal ?. Connect to 4a and output the above Conden ICIMO other terminal. Child! It
was connected to 14b. By the way, if it is going to use the above-mentioned sound quality
adjustment device for a stereo device, two changeable EndPage: one each for four continuous
changeable EndPages: four for four variable resistances or two for a stereo device with two
chains. It requires two series variable resistors, and as the number of channels increases, the
configuration of the variable resistors becomes complicated and the number of the variable
resistors increases. Also, filter 4 ll! A method of adjusting the signal of each frequency band is
also conceivable. However, as shown in FIG. 9, in the conventional high pass filter circuit, the
capacitor C14 is connected in series between the input terminal 21 and the output terminal 22,
and the resistor R24 is connected between the load side terminal of the capacitor tC1L and the
ground. Since the capacitor Cps is connected in series between the input and output in this HPF
path, a capacitor Cs 4? The need for two round-off lead-out terminals leading to the outside of
the integrated circuit substrate has a disadvantage in that the circuit integration is significantly
inhibited. The present invention solves the conventional O defect as described above. In the case
where the number of channels is increased, the variable adjustment resistor 1) CI number does
not increase even if the number of channels increases. There are K to do. Another object of the
present invention is to provide a circuit configuration suitable for increasing the frequency range.
The sound quality adjustment apparatus according to the present invention will be described
with reference to the drawings of one embodiment. In the figure, 1 is an input terminal, 2 is a
high pass filter (hereinafter referred to as HPF, 3 is a band pass filter (hereinafter referred to as
BPF) circuit, and 4 is a first low pass filter (hereinafter referred to as LPF). It is a circuit.
The HPF circuit 2 has a characteristic as shown by an alternate long and short dash line in FIG. 2
and has a corner frequency f (a frequency of 3 dB or less). The BPF circuit 3 has a characteristic
as shown by a dotted line in FIG. The first LPF circuit 4 is a filter shown by line 11 in FIG. 2, for
example, an RC filter of one stage, and is% O having a corner circumference * 1 lf L (sdB
reduction frequency). ! ???? T is the above HPF circuit 2. By adjusting the amplitude of each
output signal of the BPF circuit 8 ░ first LPF circuit 4, the relative level between these frequency
bands ?! @ Because it is% O as shown in for example Gion, which is an amplitude control circuit
of Ginseng. In FIG. Input terminal 8!] The collector current of the 9th compensation transistor ?
appears as an output voltage on the load resistor 14. Transistors .tau.R2 and transistors TR5 ()
base bias resistors Re, Rt, respectively. It consists of 11 + 1 and the variable resistor 11VR. Here,
the relative DC potential between the variable resistor vitaut, the power transistor and the
transistor base of the transistor TR2 and the transistor resistor Rs is variable, and the transistor
? RMO pace is higher than the DC potential of the transistor ? R1 collector A lot of current
flows through the transistor R1 and appears as an output voltage larger than the load resistance
RsK. On the other hand, the transistor Rsty is lower than the current flowing through the base of
the transistor TR2 (as it is generated in the load resistor R4, the output voltage becomes smaller
than-. In this way, by adjusting the amplitude control circuit g indicated by 5IIK and the 6.7a
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visible resistor vl, the output voltage O to the input can be controlled with respect to the input,
and H, P, F circuits a, B, P, FI Circuit ?, 1st OL, P, F @ Path No. 40 relative level can be @ controlled. The circuit composed of the transistors TRa, TRs, TR6, resistors R5, R4, Ry in FIG. 3
flows through the load resistor R4 of the amplitude control circuit composed of the transistors
TR +, TR2, TR3 ░ resistors R +, R2, Rs, R4. It is a circuit for compensating so that the direct
current changes less even if the variable resistor VR is changed. That is, when the base potential
of the transistor TR3 becomes higher than the base potential of the transistor TR2, the base
potential of the transistor TRg becomes higher than the base potential of the transistor TR4 to S
W #, and the collector direct current of the transistor TR4 flows more to the transistor TRs. ,
Current flowing through the transistor TR6 decreases.
Therefore, at this time, the collector current of the transistor TR + flows more to the transistor R3
than to the transistor TR2 and flows to the load resistor R4. Since the direct current flowing from
the transistor ?R6 to the load resistor R4 decreases, it is possible to reduce the DC potential
change of the load resistor R4. In the figure, C1 is a capacitor, BA is a power supply, and 9 is an
output terminal. An addition circuit 10 divides an input signal into three frequency bands and
controls 1 m in width to combine nine signals EndPage: 2 again. Although this adder circuit 1o is
not shown, for example, a circuit in which a signal is continuously connected to one point via a
resistor, or three signals are applied to respective bases of three emitter grounded transistor
amplifiers, and collector load is applied. It is a circuit that shares resistance and adds eight
signals. 11 is an output terminal. Further, as shown in FIG. 4, the above-mentioned HPF circuit 2
has an input signal from the input terminal 12 and an input signal of this type, as shown in FIG. :
The signal passing through the second low pass filter (hereinafter referred to as "LPF") circuit 13
consisting of the Pundena C is applied to the subtraction circuit 14, and the input signal is passed
through the second LPF circuit 13 at the output terminal 18 It is comprised so that the signal of
the difference of the obtained signal and an input signal may be taken out. The fact that the highpass filter circuit 2 constituted by the second LPF circuit 18 and the subtractor circuit 14 in this
way actually holds up as an HPF circuit will be described next. Here, the output voltage of the
second LPF circuit 1s consisting of the resistor R and the capacitor tC is KOL, and the input
voltage ? K. Assuming that the output voltage of the HPF channel including the resistor R and
the capacitor C is also a wing and an input voltage tEi. In the case of the second LPF circuit 13, it
becomes ?. Also in the case of) IPFli path. The difference between the input signal lC1 * and the
second OLPFIIjl130 'output voltage' OL is due to the blade & gt; <and Kom'-J-EoL-shame. That is,
the low pass filter interpass -O characteristic can be converted to a high pass filter by the second
LPFI circuit 1 $, the subtractor circuit 14 and the ? path configuration. f &, when taking out the
difference between input voltage Kl) -11EjlOLPFii path 1 ? O output voltage 1Lo m, zo LPF
circuit 1m1lD output voltage IC0Ltk times (by ? ? ? 1) ?, the difference t ?9 and its
compensation number km 'expanded kf-1ci-kkL, (1-k) + jsc + 11 + jlslL, and its amplitude 1] Eorl
becomes, and its periodicity is 5IIllO '&'.
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By changing kt) 911 in this manner, it is possible to form a filter having a constant pass level
even in the low band. Fig. Ema is a specific circuit configuration diagram of the high pass filter
circuit 2 described above. In FIG. 1, the same reference numerals in FIG. 1 show the same
reference symbols. In FIG. 3, an input compensation transistor is shown in FIG. Applied to R70
base. An opposite phase voltage is generated at the collector, and an emitter Kflll phase voltage is
generated. Then, the negative phase voltage of the collector is applied to the base of the
transistor TRs, and a tenth LPFEndPage: 3 consisting of a common mode voltage line resistance R
and a dead time tC of the capacitor is added. The collectors of the transistors Rs and TRt are
connected together so that the voltage appearing at the collector is added. The voltage appearing
at the collector of transistor TRe + is in phase with the input signal. Since the voltage appearing
at the pre and lid of the transistor TRs is opposite in phase to the input signal, it is actually an
input signal. The signal obtained by passing the input signal through the second LPF circuit 18
and the 1) * @ symbol are the collectors Kll! Of the transistors TRz, TRt. And the output terminal
18KtlK is given the name. In FIG. 6, R11 to R17 ?, c4. C3 is a coupling capacitor, a diode for
gAits, p + to Dsld constant voltage. A broken line frame indicates an integrated circuit part, and
16 to 16 moa are derived terminals thereof. The output frequency characteristics of the nine
tone quality adjustment apparatus configured in this way are shown in FIG. 7. In FIG. 7, 1 curve 0
? HPF g path *, BPF 3. 3. The first LPF circuit 40 is a W # O characteristic curve having the
same relative level. When the relative level of the first LPF Iil path 40 is raised, it becomes like
songs 11a and b, and when it goes down, it becomes like curves c and d. Also, if you go up to W
of the iP1 circuit 20, 7 rubels and go up to 1 ? иии like f, conversely if you lower it like 1 ? q and
h. As described above, according to the present invention, if the DC potential difference between
the bases of the differential transistor circuit is used to control the field 4 + -amplitude control
circuit of W number channel, the DC control voltage can be shared over several channels. So, the
configuration of candlestick means such as its rounding variable resistor becomes significantly
easier. Also light the DC control voltage. It is easy to control by other control steps of the sound
box, and provides a means of new application. In addition, according to the single g @@ light, in
the case of integrating into an integrated circuit, the number of lead terminals for leading out the
capacitor can be improved by one.
Also, since the capacitor is a turtle connected to the ground, the ground terminal of the
integrated circuit board and the common terminal are common.
4, a brief description of the drawing Figure 1 main line-one one! The block diagram of the sound
quality adjustment device showing an example of theory, the second cabinet is the h filter path e
characteristic ** iio used in the same device, and FIG. 3 is the circuit diagram of the amplitude
control circuit OA body used in the same device. FIG. 9 is a circuit diagram of the conventional
high-pass filter circuit, and FIG. 2 и и и и 'iA band pass filter circuit, 8-и и и и Band pass filter circuit, 4 и
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и и и и и Low pass filter circuit, 6 ░ 6.7 и и и и и Amplitude control 'II Ju path, 13------second low pass
filter, 14---. Name of agent Attorney Nakao Toshio et al. 1 person EndPage: 4 Fig. 2 Fig. 3 Fig. 4
Fig. 9 Fig. 5 ? Fig. 5 ? Fig. 5 ? 1 6 The representative of the patent attorney's office 1 display
of the patent 1949 patent application No. 1 Q 8046 No. 2 title of the invention 2 name of the
invention sound quality adjustment device 3 person with the correction case Patent applicant
address Kadoma city Osaka Bold Kadoma 1006 Address ('1 (582) Representative Matsushita
Electric Industrial Co., Ltd. Representative Masaharu Matsushita 4 ? 517 Address Osaka
Prefecture Kadoma City Ogata Kadoma 1006 Address Matsushita Electric Industrial Co., Ltd. 6,
Contents of correction (1) Description 3? Place ?ииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииииии Corrects J &
m. (2) In the same room 6, line 9 to line 10 [base discharge current off] Next, "base DC potential
of transistor Q2" is inserted. (3) Formula% described in the lower part of Formula (4) described in
the lower part of Formula (4) described in the lower part of Formula (4) described in the upper
part of the eighth pot In the upper row of the following equation (7, in Fig. 10, line 13 in Fig. 10,
Fig. 1 J in Fig. 10 is corrected to "? 3 in Fig. 6". (@Same 10 jj 14 years old Takemoku "Figure 3"
is corrected to "Figure 6". (2) Correction is made to ?transistor TRaJ ?? ?transistor TR9J in
the 11th negative sixth row. (10) Correction is made to the [transistor TR2, TB9 Jtr transistor
?R11, TR, J of the 11th row and 8th line of the same figure. (11) Drawing 024 and FIG. 6 as in
Japanese paper) 4EndPage: ?
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