close

Вход

Забыли?

вход по аккаунту

?

JPS50134605

код для вставкиСкачать
Patent Translate
Powered by EPO and Google
Notice
This translation is machine-generated. It cannot be guaranteed that it is intelligible, accurate,
complete, reliable or fit for specific purposes. Critical decisions, such as commercially relevant or
financial decisions, should not be based on machine-translation output.
DESCRIPTION JPS50134605
(18) April 10, 1974 2 inventor Takata size · Aki full name height 1) Masaaki (one other person) 3
'l'! 1'ri'l applicant resident! す? Osaka Prefecture Kadoma City Oza Kadoma 1006 Name (582)
Matsushita Electric Industrial Co., Ltd. Daino, Ding 1 Matsushita Shoji 4 Agent 〒 517 Osaka
Kadoma city Osamu Kadoma 1006 Address 5 List of Attachments Specification [phase] Japan
Patent Office ■ JP 50-134605 2.34 〆 23 鯨 11 weeks is a four-channel stereo reproduction 祐
1 of Taito-mei, title of the invention 2,% #! The low-pass filter circuit is configured to extract only
the main channel signal from the 4-channel signal in the range of FiIW, and of the transistors
constituting the low-pass filter circuit; a series of a resistor and a capacitor between the rectifier
and the emitter. A four-channel stereo reproduction apparatus configured to connect a circuit
and extract a main channel signal delayed in phase from the main channel signal passing through
the low pass filter circuit from a connection point of the resistor and the capacitor.
4 channel stereo playback device
3. Detailed Description of the Invention The present invention relates to a 4-channel stereo
reproduction apparatus of the CD-4 system, and an object of the invention is to make it possible
to perform excellent reproduction with a simple table configuration. The four channel stereo
reproduction apparatus according to the present invention will be described below with
reference to the drawings of the embodiment 1A. In the block diagram of the reproduction
system of the left or right channel according to one embodiment of the invention, 1 is a
preamplification circuit in the figure, 2 is only the main channel signal extracted from the output
amplified by the preamplification circuit 1 □ Both are low-pass filter circuits that double as
phase-sick circuits that change the phase of the main channel signal, 3 is a variable resistor for
separation adjustment, 4 is an amplifier circuit that amplifies the main channel signal, 6 is a main
channel signal And a matrix circuit for extracting the post signal and post signal by the sub
10-05-2019
1
channel signal described later, 6 is a band pass filter circuit for extracting only the sub channel
signal from the output amplified by the preamplification circuit 1, and 7 is the band pass filter
Amplifying circuit for amplifying the sub-channel signal passed through the circuit 6, 8 is an FM
detecting circuit, 9 is Fi! +1) M equalizer circuit, 10 is its own wJ noise reduction circuit, and 11
is an amplifier circuit for amplifying the sub-channel signal. FIG. 2 specifically shows the main
parts in FIG. 1, so 4 of 6 D, in the figure R11 + ntz 11! + RI4s "15EndPage: 1C6, C7, Ca, C9 and Q
are separated by a resistor, a capacitor and a transistor which constitute the low pass filter circuit
2 which doubles as a phase shifter circuit. In the above embodiment, the CD-4 signal amplified by
the preamplification circuit 1 is separated into the main channel signal and the subchannel signal
by the phase thick circuit / low pass filter circuit 2 and the band pass filter circuit 6, respectively.
The main channel signal that has passed through the phase shifter circuit and combined low pass
filter circuit 2 is applied to the matrix circuit 6 through the variable resistor 3 for separation
matching and the amplifier circuit 4. The subchannel signal that has passed through the band
pass filter circuit 6 is applied to the FM detection circuit 8 through the amplification circuit 7 and
detected here, and then the FM / PM equalizer circuit 9. Automatic noise reduction circuit 10.
The signal is applied to the matrix circuit 6 through the amplifier circuit 11. Therefore, at the
output end of the matrix circuit 5, it is possible to obtain an audio output separated before and
after. By the way, in the 4-channel stereo reproduction apparatus of the CD-4 system, the subchannel signal always lags behind the main channel signal at the input side of the matrix circuit
7-.
Therefore, in the above embodiment, the phase sync circuit is configured by using the transistor
Q5 configuring the low pass filter circuit 2, and the operation as the low pass filter and the
operation as the phase shifter are performed by one transistor Q5. It is configured to be
performed. That is, the characteristic as the low pass filter circuit is determined by the resistor
R10 + RH and the capacitors C6 and C7, and the characteristic as the phase shifter circuit is
determined by the resistor R15 and the capacitor C8. R42 is a buffer resistor for preventing
abnormal oscillation, and the capacitor Q is for reducing the impedance of the collector so that
the transistor Q5 becomes an emitter follower in the vicinity of a high frequency at which the
filter performs high cut. The phase shifter circuit of such a configuration utilizes the fact that
when the load of the same value is applied to the collector and the emitter of the transistor Q5, a
signal having the same size and a phase of 1800 @ is generated, and the resistor R15 and
Conden 5! --- It can be changed by age. As described above, according to the present invention,
the phase sync circuit is configured using the transistors forming the low-pass filter circuit, and
according to the present invention, the phase of the main channel is raised by the 7-stage
inverter circuit. It is possible to delay as far as possible and to make the separation between the
front signal and the back signal dog-like. In addition, since the low pass filter operation and the
seventh processing operation can be performed by one transistor, the circuit configuration can
be remarkably simplified.
10-05-2019
2
4. Brief Description of the Drawings FIG. 1 shows a general example of one embodiment of the
present invention. Low-pass filter circuit which also serves as the 2 ...... phase shifter circuit, Q,
...... transistor, CB · old ·; capacitors, R45 ...... resistance. Name of agent Attorney Nakao Toshio et
al. 1 Multiple pages 1) EndPage: 26 (Inventors and agents other than iij (1) Inventors (2) Agent
address Osaka Prefecture Kadoma City Oji Kadoma 1006 90-EndPage: 3
10-05-2019
3
Документ
Категория
Без категории
Просмотров
0
Размер файла
10 Кб
Теги
jps50134605
1/--страниц
Пожаловаться на содержимое документа