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JPS51137224

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DESCRIPTION JPS51137224
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a semiconductor
electronic volume device applicable to the present invention, FIG. 2 is a connection diagram of an
attenuation circuit using it, and FIG. 3 shows attenuation characteristics of the attenuation
circuit. Fig.4 shows the squared characteristics, Fig.5 shows the characteristics used to explain
the present invention, Fig.6 shows a connection diagram of an example of the square operation
circuit, Fig.7 shows the input and output used for the explanation. FIG. 8 is a system diagram of
an example in which the present invention is applied to a 4-channel stereo decoder. Reference
numeral 2 denotes a source region, 3 a drain region, 5 a resistor layer, 10a and 10b input
terminals, 12a and 12b output terminals, and 14 a control voltage source. Fig.1-49-real opening
51-137224 (2) Fig.2 Fig.3 0 -5? -2 -1 -? -4 -5 sawtooth electric current FL (force Fig.4 -50actual opening 51-137224 (3) 0 1-1-2 J-4-5-6 '' '' 7-!! Control power, ECTr) FIG. 7 FIG. 6 FIG. 8
FIG.
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a variable
impedance circuit applied to control the level of an audio signal by a semiconductor electronic
volume device. As one of the semiconductor electronic volume devices, one having a structure
shown in FIG. 1 has been proposed. As shown in FIG. 1, (1) is a semiconductor substrate of Ntype i 9 and P-type, and has a predetermined distance on the ? surface and a source region (2)
of pH or N-type and A drain region (3) is formed, an insulating layer (4) is formed on the surface
(1) of the base (1) between the regions (2) and (3), and the insulating layer (4) is formed. ) Is
formed on the resistor layer (5). Further, regions (2) and (3) K are both ends of the resistor layer
(5) close to the electrodes (6) and (7), respectively, when the source electrode (6) and the drain
electrode (7) are formed. A first gate electrode (8) and a second gate electrode (9) are formed on
the gate. And from the electrodes (6), (7), (8), (9) and the substrate fil, the source terminal S, the
drain terminal. A first gate terminal Gls, a second gate insulator G2, and a back gate terminal
false are derived. In this case, for example-if the substrate (1) has a relatively low concentration,
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especially if it is a semiconductor integrated circuit and there is a substrate of a different
conductivity type below the substrate (1) In order to eliminate it, the resistance ratio is about 50
?cm, and regions (2) and (3) are 1020 atoms and t! The concentration is about ai. Further, the
length between the regions (2) and (3), that is, the channel length L is 20 ?, its width Wt; j 300
?, and the thickness TOXFi 8i 0 x of the insulating layer (4) is 1200 A @. The resistor layer (5) is
made of polycrystalline silicon or the like having a thickness of about 1?. In this case, if the
resistor layer (5) is too resistive, the resistance (2) 1% with the electrodes (81, +9) The resistance
of the resistor layer (5) is set to 10 (10) shears 1 (3 (one-to-one surface resistance), since the mix
contact becomes worse, and too low resistance causes tlt-to occur. In such a configuration, the
gate voltage at point X of point KO potential ? (x) and point X of the resistor layer (5) separated
by an arbitrary distance from region (2) in the channel is VG (X), threshold Assuming that the
voltage Vth is VG (x) -V (x)> Vth and the modulation of the voltage vth by the substrate potential
is sufficiently small, the number N of carriers per unit area in the channel at the point xK is as
follows become. ON--(Vg (x)-V (x) Vth) (cm-") rounded CO = 'OX / TOX epsilon OX dielectric
charge of the dielectric layer Q Fi carriers where the channel region (2) from Assuming that the
resistance tR (X) at the point x4, the surface resistance of the channel is 55 (x), and the mobility
of the carrier is ?, xdR (x) = /) 3 (X) y?8 (X) =-1 Since -Nq?, (3)-111 dxdR = -COJ (VG (x)-I (x)
Vth) W is obtained.
Therefore, if the channel current t--is given, the following equation is obtained: IdR (x) = dV (x) =
dxWJICO (VG (X) V (X) Vth). (VQ (? ?) ? V (? ?) 4 ?) dV (x) =, ,, dx *** (? ? ?Therefore,
now VG (X) ?V (x) = V (3 g = constant) и и (2) The necessary and sufficient condition for this to
hold is V (3 (x) = ? + [?, but the proof is omitted), this (2) equation t-(1 Substituting into the
equation) and integrating from x = 0 to Lll, 111 = I, I =) (V (3p-Vth) V fist "" + 3) ("," v (i, = v) wllc.
It becomes ? = 1?. (4) +> 1 and the source potential t'V8. If the potential of the drain is VD,
then v = VD-VS, and if the layer quality and thickness of the resistor layer (5) are uniform, then
VG (X) = UV. If the potential of the gate ? Vs + V ? and the potential of the second gate V D + V
?, the above-mentioned necessary and sufficient conditions are satisfied, and the equation (2) is
satisfied and the equation (3) is satisfied. (1) V = .beta. (V () o-vth) (4) holds. Therefore, the
resistance value between the source and the drain can be variably controlled by the voltage VGO.
If the potentials of the source, drain, first gate, and second gate are Vs, V, and VS + VGO1VD +
VGO, respectively, the resistance can be variably controlled by the resistance value R1?voltage
GOK between the source and the drain. Then, an attenuation circuit as shown in FIG. 2 can be
configured by the above-mentioned semiconductor electronic volume device. In FIG. 2, (10a) and
(10b) are input terminals (5) :;.., One end (10a) of which is connected to the drain D of the
semiconductor electronic volume device through a resistor ??, It is derived as one end (12 m)
of the output terminal. In addition, a capacitor (Is is inserted between the drain D and the second
gate G2, and a control voltage source ? ? is inserted between the source G and the source S,
and the source S is the other end (10b) of the input terminal. And the other end (12b) K of the
output terminal. In such a configuration, the signal voltage from the input ladders (10a, 10b) is
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divided by the resistance all and the resistance between the train and the source of the
semiconductor electronic volume device, and is attenuated by K, the output terminal (12a ) (12b).
As shown by this drain-source resistance R # '1 (14), the change characteristic with respect to
the gate voltage VGO becomes non-linear. The control voltage source ? ?? corresponds to the
gate voltage vGo.
Therefore, the change in attenuation (dB) of the attenuation circuit shown in FIG. 2 becomes nonlinear such that the rate of change in signal attenuation decreases as the control voltage
increases, as shown in FIG. . Now, considering the case where the audio signal is level-controlled
by such an attenuation circuit and applied to the speaker (6) i, back, force, etc., there is a
drawback that the change in volume with respect to the control voltage becomes unnatural in
hearing. Therefore, in the present invention, as shown in FIG. 4, using a square operation circuit
which produces an output of square characteristic with respect to the input, the control voltage is
temporarily transmitted to the first of the semiconductor electronic volume devices through this
square operation circuit. The pressure is supplied to the gate G1. That is, the control voltage is
formed such that the rate of change becomes larger as the level becomes larger due to the
operation of the square operation circuit. If this control voltage is supplied to the first gate GIK,
as shown in FIG. It is possible to realize a characteristic in which the amount of attenuation
linearly changes with respect to the voltage. An example of the square operation circuit is shown
in FIG. In the figure, the port 9 indicates an operational amplifier, R (represents a feedback
resistor), and static indicates an output terminal. One human power insulator of the operational
amplifier aS is grounded, and the other input terminal is a resistor R. Through the input terminal
111KII. Each series circuit of a resistor R1-) L4 and diodes D1 to D4 is connected in parallel with
the resistor Rs, and each connection point of the resistors ? 1 to R4 and the diodes D, D is a
resistor R11 to R14 (7) Is connected to the supplied ladder Q through the voltage -vB. Now,
assuming that the input voltage is 3 and the output voltage is vo, the cathode of the diode Dl is
an operational amplifier Q! The voltage applied to the diode DIK is zero when 8 и = ? ииии VB11
because 9 Kmi continues and is equivalently grounded. Ignoring the forward voltage of diode D,
if there is an input voltage 3 larger than the value of the above equation, diode D turns on and
resistance, enters resistor R in parallel. From this point on, the point IK amplification degree
changes. That is, in the case of?, ?-(,) VB, the amplification degree AIFi, fAI =--8%, and in the case
of V,>-(H) VB the amplification degree A2 is 1A2 =-(-+-) ?, It becomes flt. That is, the input /
output characteristics are as shown in FIG. The above description is for the resistors R1 and R11
and the diode D, but the same operation is performed for other resistors and diodes. (8) 8) By
selecting the value of each resistance, if the slope of the input / output characteristics and the
position of the inflection point are selected, it is possible to obtain the output voltage o having
square characteristics with respect to the input voltage vsK. it can.
According to the present invention described above, it is possible to realize an attenuation circuit
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in which the amount of attenuation linearly changes by the control voltage, and when the level of
the audio signal is controlled by this attenuation circuit, tIK makes the change of sound audible.
Have the advantage of being smooth and not feeling unnatural. Further, FIG. 8 shows a
configuration fI when the present invention is applied to a four channel stereo decoder of matrix
type. In the same figure, ?9 and @ # 'i, an input terminal to which a synthesized signal LT and
RT obtained by synthesizing a 4-channel stereo signal with a predetermined relationship is
supplied is shown, and the signal LT and bamboo have phase shift amount ? The phase shift
circuit Q? @ and the amount of phase shift are supplied to the matrix circuit (c) through the
phase shift circuit @ (of (? + ?). First, an optical signal is supplied to the logic circuit @ through
the phase shift circuit cl? to (?), and the logic circuit @ forms a pair of control signals of
opposite polarity. Then, the four-channel stereo signals of the body (9) body cotrix circuit (g) are
respectively supplied to the attenuation circuit on C1 1 C [K] of the same configuration as shown
in FIG. A control signal from the logic circuit (d) is supplied to the attenuation circuits (f) to e4,
and a square operation circuit @ (2) is inserted in the supply path. Thus, the crosstalk between
them is reduced at the outputs of the attenuation circuits a.eta..about. (2) to obtain signals LF,
RF% LB1RB corresponding to the left front, right front, left rear and right rear of the composter.
Of course, the present invention can be applied to various aspects other than such a matrix type
four channel stereo decoder.
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